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move nrf24l01 code to devices

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This commit is contained in:
acevest
2020-04-21 13:00:20 +08:00
parent b3f83445ff
commit 0042676b27
22 changed files with 64 additions and 1907 deletions
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2
board/Sipeed_LonganNano/eclipse/nRF24L01/.cproject
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@@ -150,6 +150,8 @@
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/nRF24L01/Application/Inc}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/nRF24L01/Application/Hardware/lcd}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/nRF24L01/nrf24l01}&quot;"/>
</option>

5
board/Sipeed_LonganNano/eclipse/nRF24L01/.project
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@@ -39,6 +39,11 @@
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>nrf24l01</name>
<type>2</type>
<locationURI>PARENT-4-PROJECT_LOC/devices/nrf24l01</locationURI>
</link>
<link>
<name>Application/Hardware</name>
<type>2</type>

43
board/Sipeed_LonganNano/eclipse/nRF24L01/main.c
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@@ -1,47 +1,12 @@
#include "mcu_init.h"
#include "tos_k.h"
#include "lcd.h"
#include "nrf24.h"
#define LCD_TASK_SIZE 1024
k_task_t lcd_handle;
uint8_t lcd_stk[LCD_TASK_SIZE];
#define LED_TASK_SIZE 1024
k_task_t led_handle;
uint8_t led_stk[LED_TASK_SIZE];
k_sem_t sem_led;
typedef struct {
int port;
int pin;
} Led_t;
Led_t leds[] = {
{ LEDR_GPIO_PORT, LEDR_PIN },
{ LEDG_GPIO_PORT, LEDG_PIN },
{ LEDB_GPIO_PORT, LEDB_PIN }
};
void task_led(void *arg)
{
int task_cnt1 = 0;
while (1) {
//printf("hello world from %s cnt: %d\n", __func__, task_cnt1++);
tos_sem_pend(&sem_led, ~0);
gpio_bit_reset(LEDB_GPIO_PORT, LEDB_PIN);
tos_task_delay(50);
gpio_bit_set(LEDB_GPIO_PORT, LEDB_PIN);
}
}
void task_lcd(void *arg)
{
uint16_t color_table[] = { WHITE, BLUE, RED, GREEN, CYAN, YELLOW, GRAY};
@@ -69,6 +34,8 @@ void task_lcd(void *arg)
}
}
void nrf24l01_init();
void main(void) {
board_init();
@@ -76,13 +43,9 @@ void main(void) {
tos_knl_init();
nrf24l01_init();
tos_sem_create(&sem_led, 1);
tos_task_create(&led_handle, "led", task_led, NULL, 6, led_stk, LED_TASK_SIZE, 0);
tos_task_create(&lcd_handle, "lcd", task_lcd, NULL, 6, lcd_stk, LCD_TASK_SIZE, 0);
tos_task_create(&lcd_handle, "lcd", task_lcd, NULL, 7, lcd_stk, LCD_TASK_SIZE, 0);
tos_knl_start();

60
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24.c
View File

@@ -1,6 +1,9 @@
#include "nrf24.h"
#include "tos_k.h"
#include <stdio.h>
#include "mcu_init.h"
#include "stdlib.h"
#include "gd32vf103_gpio.h"
#include "nrf24l01_gd32v_hal.h"
#define USE_SPI1
@@ -8,10 +11,14 @@ extern k_sem_t sem_led;
k_sem_t sem_nrf;
#define TASK_SIZE (8*1024)
k_task_t task_nrf24_handle;
uint8_t task_nrf24_stk[TASK_SIZE];
#define LED_TASK_SIZE 1024
k_task_t led_handle;
uint8_t led_stk[LED_TASK_SIZE];
#define CE_GPIO_PORT GPIOA
#define CE_PIN GPIO_PIN_3
#define CSN_GPIO_PORT GPIOB
@@ -23,6 +30,36 @@ void task_nrf24();
k_sem_t sem_led;
typedef struct {
int port;
int pin;
} Led_t;
Led_t leds[] = {
{ LEDR_GPIO_PORT, LEDR_PIN },
{ LEDG_GPIO_PORT, LEDG_PIN },
{ LEDB_GPIO_PORT, LEDB_PIN }
};
void task_led(void *arg)
{
int task_cnt1 = 0;
while (1) {
//printf("hello world from %s cnt: %d\n", __func__, task_cnt1++);
tos_sem_pend(&sem_led, ~0);
gpio_bit_reset(LEDB_GPIO_PORT, LEDB_PIN);
tos_task_delay(50);
gpio_bit_set(LEDB_GPIO_PORT, LEDB_PIN);
}
}
void nrf24l01_init() {
rcu_periph_clock_enable(RCU_GPIOA);
rcu_periph_clock_enable(RCU_GPIOB);
@@ -88,7 +125,11 @@ void nrf24l01_init() {
nrf_init(&ni);
}
tos_task_create(&task_nrf24_handle, "task_nrf24", task_nrf24, NULL, 5, task_nrf24_stk, TASK_SIZE, 0);
tos_sem_create(&sem_nrf, 1);
tos_sem_create(&sem_led, 1);
tos_task_create(&task_nrf24_handle, "task_nrf24", task_nrf24, NULL, 5, task_nrf24_stk, TASK_SIZE, 0);
tos_task_create(&led_handle, "led", task_led, NULL, 6, led_stk, LED_TASK_SIZE, 0);
}
void EXTI5_9_IRQHandler(void)
@@ -144,7 +185,6 @@ void init_nrf24l01_irq() {
void test_nrf24l01_irq_rx()
{
tos_sem_create(&sem_nrf, 1);
init_nrf24l01_irq();
@@ -160,7 +200,7 @@ void test_nrf24l01_irq_rx()
nrf_set_rf_channel(64);
nrf_set_datarate(NRF_2Mbps);
uint8_t rxaddr[ADDRLEN] = { 0xAA, 0xCC, 0xEE, 0x00, 0x00 };
uint8_t rxaddr[ADDRLEN] = { 0xCB, 0xA7, 0xF9, 0xAC, 0xE0 };
nrf_set_rxaddr(0, rxaddr, ADDRLEN);
nrf_enable_dynamic_payload(0);
nrf_enable_rxaddr(0);
@@ -197,7 +237,7 @@ void test_nrf24l01_rx() {
nrf_set_rf_channel(64);
nrf_set_datarate(NRF_2Mbps);
uint8_t rxaddr[ADDRLEN] = { 0xAA, 0xCC, 0xEE, 0x00, 0x00 };
uint8_t rxaddr[ADDRLEN] = { 0xCB, 0xA7, 0xF9, 0xAC, 0xE0 };
nrf_set_rxaddr(0, rxaddr, ADDRLEN);
nrf_enable_dynamic_payload(0);
nrf_enable_rxaddr(0);
@@ -235,7 +275,7 @@ void test_nrf24l01_tx() {
nrf_set_rf_channel(100);
nrf_set_datarate(NRF_2Mbps);
nrf_enable_dynamic_payload(0);
uint8_t txaddr[] = { 0xAA, 0xCC, 0xEE, 0x00, 0x01 };
uint8_t txaddr[] = { 0xCB, 0xA7, 0xF9, 0xAC, 0xE1 };
nrf_set_txaddr(txaddr, 5);
nrf_flush_rx();
@@ -245,7 +285,7 @@ void test_nrf24l01_tx() {
nrf_flush_rx();
nrf_flush_tx();
uint8_t buf[32];
snprintf(buf, sizeof(buf), "Ace nRF24L01+ %u", cnt++);
snprintf(buf, sizeof(buf), "TOS nRF24L01+ %u", cnt++);
nrf_write_payload(buf, strlen(buf)+1);
tos_sem_post(&sem_led);
nrf_delay(100);
@@ -253,7 +293,7 @@ void test_nrf24l01_tx() {
}
void task_nrf24() {
//test_nrf24l01_irq_rx();
test_nrf24l01_irq_rx();
//test_nrf24l01_rx();
test_nrf24l01_tx();
//test_nrf24l01_tx();
}

11
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24.h
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@@ -1,11 +0,0 @@
#ifndef NRF24_H_
#define NRF24_H_
#include "stdlib.h"
#include "gd32vf103_gpio.h"
#include "nrf24l01_hal.h"
void nrf24l01_init();
#endif /* NRF24_H_ */

464
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01.c
View File

@@ -1,464 +0,0 @@
#include "nrf24l01.h"
#include "tos_k.h"
static nrf_init_t g_nrf;
int nrf_init(nrf_init_t *ni) {
memcpy(&g_nrf, ni, sizeof(nrf_init_t));
return g_nrf.init(g_nrf.private);
}
void nrf_flush_rx() {
nrf_write_cmd(CMD_FLUSH_RX);
}
void nrf_flush_tx() {
nrf_write_cmd(CMD_FLUSH_TX);
}
void nrf_delay(uint32_t delay) {
tos_task_delay(delay);
}
int nrf_powerup() {
return nrf_set_reg_bit(REG_CONFIG, PWR_UP);
}
int nrf_powerdown() {
return nrf_clear_reg_bit(REG_CONFIG, PWR_UP);
}
void nrf_enable_rx_irq() {
nrf_clear_reg_bit(REG_CONFIG, MASK_RX_DR);
}
void nrf_disable_rx_irq() {
nrf_set_reg_bit(REG_CONFIG, MASK_RX_DR);
}
void nrf_enable_tx_irq() {
nrf_clear_reg_bit(REG_CONFIG, MASK_TX_DS);
}
void nrf_disable_tx_irq() {
nrf_set_reg_bit(REG_CONFIG, MASK_TX_DS);
}
void nrf_enable_max_rt_irq() {
nrf_clear_reg_bit(REG_CONFIG, MASK_MAX_RT);
}
void nrf_disable_max_rt_irq() {
nrf_clear_reg_bit(REG_CONFIG, MASK_MAX_RT);
}
void nrf_set_rf_channel(uint8_t channel) {
channel &= 0x7F;
nrf_write_reg_byte(REG_RF_CH, channel);
}
int nrf_set_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t addrlen) {
if(addrlen >= 6 || pipe >= 6) {
return -1;
}
if(pipe >= 2) {
addrlen = 1;
}
uint8_t reg = REG_RX_ADDR_P0 + pipe;
return nrf_write_reg(reg, addr, addrlen);
}
int nrf_get_addrlen() {
uint8_t v = 0;
uint8_t addrlen = 0;
if(0 != nrf_read_reg_byte(REG_SETUP_AW, &v)) {
return 0;
}
v &= 0x03;
switch(v) {
case AW_3BYTES:
addrlen = 3;
break;
case AW_4BYTES:
addrlen = 4;
break;
case AW_5BYTES:
addrlen = 5;
break;
default:
break;
}
return addrlen;
}
int nrf_get_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t *addrlen) {
*addrlen = nrf_get_addrlen();
uint8_t reg = REG_RX_ADDR_P0 + pipe;
return nrf_read_reg(reg, addr, *addrlen);
}
int nrf_get_txaddr(uint8_t *addr, uint8_t *addrlen) {
*addrlen = nrf_get_addrlen();
return nrf_read_reg(REG_TX_ADDR, addr, *addrlen);
}
int nrf_set_txaddr(uint8_t *addr, uint8_t addrlen) {
if(addrlen >= 6) {
return -1;
}
return nrf_write_reg(REG_TX_ADDR, addr, addrlen);
}
int nrf_enable_rxaddr(uint8_t pipe) {
if(pipe >= 6) {
return -1;
}
nrf_set_reg_bit(REG_EN_RXADDR, pipe);
return 0;
}
void nrf_reset_registers() {
nrf_write_reg_byte(REG_CONFIG, _BV(EN_CRC));
nrf_write_reg_byte(REG_EN_AA, _BV(ENAA_P0) | _BV(ENAA_P1) | _BV(ENAA_P2) | _BV(ENAA_P3) | _BV(ENAA_P4) | _BV(ENAA_P5));
nrf_write_reg_byte(REG_EN_RXADDR, _BV(ERX_P0) | _BV(ERX_P1));
nrf_write_reg_byte(REG_SETUP_AW, _VV(AW_5BYTES, AW));
nrf_write_reg_byte(REG_SETUP_RETR, _VV(ARD_250us, ARD) | _VV(ARC_3, ARC));
nrf_write_reg_byte(REG_RF_CH, 0b00000010);
nrf_write_reg_byte(REG_RF_SETUP, _BV(RF_DR) | _VV(RF_PWR_0dBm, RF_PWR));
uint8_t status = 0;
nrf_read_reg_byte(REG_STATUS, &status);
if(status & _BV(RX_DR)) {
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
}
if(status & _BV(TX_DS)) {
nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
}
if(status & _BV(MAX_RT)) {
nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
}
nrf_write_reg_byte(REG_RX_PW_P0, 0);
nrf_write_reg_byte(REG_RX_PW_P1, 0);
nrf_write_reg_byte(REG_RX_PW_P2, 0);
nrf_write_reg_byte(REG_RX_PW_P3, 0);
nrf_write_reg_byte(REG_RX_PW_P4, 0);
nrf_write_reg_byte(REG_RX_PW_P5, 0);
nrf_write_reg_byte(REG_DYNPD, 0);
nrf_write_reg_byte(REG_FEATURE, 0);
uint8_t addrp0[] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7};
uint8_t addrp1[] = {0xC2, 0xC2, 0xC2, 0xC2, 0xC2};
nrf_write_reg(REG_TX_ADDR, addrp0, 5);
nrf_write_reg(REG_RX_ADDR_P0, addrp0, 5);
nrf_write_reg(REG_RX_ADDR_P1, addrp1, 5);
nrf_write_reg_byte(REG_RX_ADDR_P2, 0xC3);
nrf_write_reg_byte(REG_RX_ADDR_P3, 0xC4);
nrf_write_reg_byte(REG_RX_ADDR_P4, 0xC5);
nrf_write_reg_byte(REG_RX_ADDR_P5, 0xC6);
nrf_flush_rx();
nrf_flush_tx();
}
void nrf_set_standby_mode() {
nrf_ce(0);
nrf_powerdown();
nrf_reset_registers();
nrf_delay(10);
nrf_powerup();
nrf_delay(10); // 10m > 1.5~2ms
}
void nrf_set_receive_mode() {
nrf_set_reg_bit(REG_CONFIG, PRIM_RX);
nrf_ce(1);
nrf_delay(1); // 1ms > 120~130us
}
void nrf_set_send_mode() {
nrf_clear_reg_bit(REG_CONFIG, PRIM_RX);
nrf_ce(1);
nrf_delay(1); // 1ms > 120~130us
}
void nrf_enable_autoack(uint8_t pipe) {
if(pipe >= 6) {
return ;
}
nrf_set_reg_bit(REG_EN_AA, pipe);
}
void nrf_disable_autoack(uint8_t pipe) {
if(pipe >= 6) {
return ;
}
nrf_clear_reg_bit(REG_EN_AA, pipe);
}
void nrf_set_datarate(uint8_t dr) {
if(NRF_1Mbps == dr) {
dr = 0;
} else if(NRF_2Mbps == dr) {
nrf_write_reg_byte(REG_RF_SETUP, 0b00001110);
nrf_write_reg_byte(REG_SETUP_RETR, 0b00010011);
} else {
}
}
int nrf_enable_dynamic_payload(uint8_t pipe) {
if(pipe >= 6) {
return -1;
}
uint8_t feature = 0;
uint8_t dynpd = 0;
nrf_read_reg_byte(REG_FEATURE, &feature);
nrf_read_reg_byte(REG_DYNPD, &dynpd);
feature |= _BV(EN_DPL);
dynpd |= _BV(pipe);
nrf_write_reg_byte(REG_DYNPD, dynpd);
nrf_write_reg_byte(REG_FEATURE, feature);
return 0;
}
int nrf_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
// 读数据通道
uint8_t status = 0;
nrf_read_reg_byte(REG_STATUS, &status);
*pipe = ((status>>1) & 0x07);
// 读数据长度
nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
// 读数据
nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
// 清除数据标志位
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
// 清空接收缓冲区
nrf_flush_rx();
if(*pipe >= 6) {
*len = 0;
}
return 0;
}
int nrf_poll_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
while(1) {
// 读数据通道
uint8_t status = 0;
nrf_read_reg_byte(REG_STATUS, &status);
if((status & _BV(RX_DR)) == 0) {
nrf_delay(1);
continue;
}
*pipe = ((status>>1) & 0x07);
break;
}
// 读数据长度
nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
// 读数据
nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
// 清除数据标志位
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
// 清空接收缓冲区
nrf_flush_rx();
if(*pipe >= 6) {
*len = 0;
}
return 0;
}
int nrf_write_payload(uint8_t *buf, uint8_t len) {
nrf_write_cmd_and_data(CMD_W_TX_PAYLOAD_NOACK, buf, len);
while(1) {
uint8_t status = 0;
nrf_read_reg_byte(REG_STATUS, &status);
if(status & _BV(TX_DS)) {
nrf_delay(1);
}
nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
break;
}
return 0;
}
void nrf_ce(uint8_t mode) {
g_nrf.ce(mode);
}
void nrf_csn(uint8_t mode) {
g_nrf.csn(mode);
}
int nrf_read_reg(uint8_t reg, uint8_t *buf, uint8_t len) {
uint8_t cmd = CMD_R_REGISTER | reg;
nrf_csn(0);
g_nrf.spi_send(&cmd, 1);
g_nrf.spi_recv(buf, len);
nrf_csn(1);
return 0;
}
int nrf_write_reg(uint8_t reg, uint8_t *buf, uint8_t len)
{
uint8_t cmd = CMD_W_REGISTER | reg;
nrf_csn(0);
g_nrf.spi_send(&cmd, 1);
g_nrf.spi_send(buf, len);
nrf_csn(1);
return 0;
}
int nrf_cmd_read(uint8_t cmd, uint8_t *data, uint8_t len) {
nrf_csn(0);
g_nrf.spi_send(&cmd, 1);
g_nrf.spi_recv(data, len);
nrf_csn(1);
return 0;
}
int nrf_write_cmd_and_data(uint8_t cmd, uint8_t *data, uint8_t len) {
nrf_csn(0);
g_nrf.spi_send(&cmd, 1);
g_nrf.spi_send(data, len);
nrf_csn(1);
return 0;
}
int nrf_cmd_read_byte(uint8_t cmd, uint8_t *data) {
return nrf_cmd_read(cmd, data, 1);
}
int nrf_write_cmd(uint8_t cmd) {
nrf_csn(0);
g_nrf.spi_send(&cmd, 1);
nrf_csn(1);
return 0;
}
int nrf_read_reg_byte(uint8_t reg, uint8_t *v) {
return nrf_read_reg(reg, v, 1);
}
int nrf_write_reg_byte(uint8_t reg, uint8_t byte) {
return nrf_write_reg(reg, &byte, 1);
}
int nrf_clear_reg_bit(uint8_t reg, uint8_t bit) {
uint8_t v = 0;
if(0 != nrf_read_reg_byte(reg, &v)) {
return -1;
}
v &= ~_BV(bit);
if(0 != nrf_write_reg_byte(reg, v)) {
return -1;
}
return 0;
}
int nrf_set_reg_bit(uint8_t reg, uint8_t bit) {
uint8_t v = 0;
if(0 != nrf_read_reg_byte(reg, &v)) {
return -1;
}
v |= _BV(bit);
if(0 != nrf_write_reg_byte(reg, v)) {
return -1;
}
return 0;
}

375
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01.h
View File

@@ -1,375 +0,0 @@
#ifndef NRF24L01_H_
#define NRF24L01_H_
#include "stdint.h"
typedef struct {
int (*init)(void *private);
void (*csn)(uint8_t mode);
void (*ce)(uint8_t mode);
void (*spi_send)(uint8_t *buf, uint8_t len);
void (*spi_recv)(uint8_t *buf, uint8_t len);
void *private;
} nrf_init_t;
#define REG_CONFIG 0x00
// 屏蔽因RX_DR触发的中断
// 0 不屏蔽， 1 屏蔽
#define MASK_RX_DR 6
// 屏蔽因TX_DS触发的中断
// 0 不屏蔽， 1 屏蔽
#define MASK_TX_DS 5
// 屏蔽因MAX_RT触发的中断
// 0 不屏蔽， 1 屏蔽
#define MASK_MAX_RT 4
// 启用CRC
// 如果EN_AA有一个比特为1，就会被强制置1
#define EN_CRC 3
// CRC编码方式
// 0 一字节，1 二字节
#define CRCO 2
// 0 POWER DOWN, 1 POWER UP
#define PWR_UP 1
// 收发控制
// 0 PTX, 1 PRX
#define PRIM_RX 0
#define REG_EN_AA 0x01
// Enable相应data pipe的自动Ack
#define ENAA_P5 5
#define ENAA_P4 4
#define ENAA_P3 3
#define ENAA_P2 2
#define ENAA_P1 1
#define ENAA_P0 0
#define REG_EN_RXADDR 0x02
// Enable相应的data pipe
#define ERX_P5 5
#define ERX_P4 4
#define ERX_P3 3
#define ERX_P2 2
#define ERX_P1 1
#define ERX_P0 0
#define REG_SETUP_AW 0x03
// RX、TX地址宽度, AW占两个比特位
// 00 illegal
// 01 3字节
// 10 4字节
// 11 5字节
#define AW 0
#define AW_3BYTES 1
#define AW_4BYTES 2
#define AW_5BYTES 3
#define REG_SETUP_RETR 0x04
// ARD, Auto Retransmit Delay占7:4共4个比特位
// 0000 250us
// 0001 500us
// 0010 750us
// ...
// 1111 4000us
#define ARD 4
#define ARD_250us 0
#define ARD_500us 1
#define ARD_750us 2
#define ARD_1000us 3
#define ARD_1250us 4
#define ARD_1500us 5
#define ARD_1750us 6
#define ARD_2000us 7
#define ARD_2250us 8
#define ARD_2500us 9
#define ARD_2750us 10
#define ARD_3000us 11
#define ARD_3250us 12
#define ARD_3500us 13
#define ARD_3750us 14
#define ARD_4000us 15
// ARC, Auto Retransmit Count占3:0共4个比特
// 0000 Re-Transmit disabled
// 0001 最多重试一次
// ...
// 1111 最多重度15次
#define ARC 0
#define ARC_0 0
#define ARC_1 1
#define ARC_2 2
#define ARC_3 3
#define ARC_4 4
#define ARC_5 5
#define ARC_6 6
#define ARC_7 7
#define ARC_8 8
#define ARC_9 9
#define ARC_10 10
#define ARC_11 11
#define ARC_12 12
#define ARC_13 13
#define ARC_14 14
#define ARC_15 15
// RF Channel选择
// 占6:0共7个比特
#define REG_RF_CH 0x05
#define REG_RF_SETUP 0x06
#define PLL_LOCK 4 // 仅用在测试
// Air Data Rate
// 0 1Mbps
// 1 2Mbps
#define RF_DR 3
#define NRF_1Mbps 0
#define NRF_2Mbps 1
// 对于250Kbps的配置需要特别注意
// 因为nRF24L01P(也就是nRF24L01+)和nRF24L01在这里不一样
// nRF24L01P只定义了第3比特位的RF_DR，0为1Mbps,1为2Mbps
// nRF24L01则定义了第3比特位的RF_DR_HIGH和第5比特位的RF_DR_LOW，当RF_DR_HIGH==0 && RF_DR_LOW == 1时设置为250Kbps
// 然而nRF24L01的第5比特位只允许为0，所以无法发送250Kbps
// 因此为了避免两个不同的产品在250Kbps不能通信带来的疑惑和调式程序的麻烦，本程序直接删除了NRF_250Kbps的定义
// 如果确实想用250Kbps，可以自己手动设置
// 仅用在nRF24L01P芯片上
#define RF_DR_LOW 5
#define RF_DR_HIGH 3
// PWR, 占2:1共2个比特，仅nRF24L01P、nRF24L01有效
// 00 -18dBm
// 01 -12dBm
// 10 -6dBm
// 11 0dBm
#define RF_PWR 1
#define RF_PWR_n18dBm 0
#define RF_PWR_n12dBm 1
#define RF_PWR_n6dBm 2
#define RF_PWR_0dBm 3
// 仅nRF24L01有效，nRF24L01P没有这位定义
#define LNA_HCURR 0
// 在SI24R1中，针对nRF24L01P没有使用这一位就直接拿来扩充RF_PWR的位数了
// 因此在SI24R1中 RF_PWR == 0 占用0:2共3个比特位
// 与nRF24L01P的对应关系如下
// [2:0] SI24R1 nRF24L01P
// 000 -12dBm -18dBm
// 001 -6dBm
// 010 -4dBm -12dBm
// 011 0dBm
// 100 1dBm -6dBm
// 101 3dBm
// 110 4dBm 0dBm
// 111 7dBm
// 以下定义仅SI24R1芯片有效
#define SI24R1_PWR 0
#define SI24R1_PWR_n12dBm 0
#define SI24R1_PWR_n6dBm 1
#define SI24R1_PWR_n4dBm 2
#define SI24R1_PWR_0dBm 3
#define SI24R1_PWR_1dBm 4
#define SI24R1_PWR_3dBm 5
#define SI24R1_PWR_4dBm 6
#define SI24R1_PWR_7dBm 7
#define REG_STATUS 0x07
// RX FIFO数据READY中断标记位
// 写1清除此位
#define RX_DR 6
// 数据已发送中断标记位
// 如果启用AUTO_ACK，则此位仅在收到ACK后置1
// 写1清除此位
#define TX_DS 5
// 达到最大重发次数中断标记位
// 为了继续使用通信功能，此位必需被清0
// 写1清除此位
#define MAX_RT 4
// RX_P_NO 占用3:1共3个比特位
// RX_FIFIO中数据来自哪个data pipe的number
// 000-101 Data Pipe Number
// 110 未用
// 111 RX FIFO空
#define RX_P_NO 1
// TX FIFO满标志
// 0 TX FIFO中还有空间
// 1 满
#define TX_FULL 0
#define REG_OBSERVE_TX 0x08
// 占7:4共4个比特位，丢包计数
#define PLOS_CNT 4
// 占3:0共4个比特位，重传计数
#define ARC_CNT 0
// RSSI, Carrier Detect
// 最低比特位有效(0 接收信号小于-60dBm)
#define REG_RSSI 0x09
#define REG_RX_ADDR_P0 0x0A // 39:0 默认0xE7E7E7E7E7
#define REG_RX_ADDR_P1 0x0B // 39:0 默认0xC2C2C2C2C2
#define REG_RX_ADDR_P2 0x0C // 7:0 默认0xC3
#define REG_RX_ADDR_P3 0x0D // 7:0 默认0xC4
#define REG_RX_ADDR_P4 0x0E // 7:0 默认0xC5
#define REG_RX_ADDR_P5 0x0F // 7:0 默认0xC6
#define REG_TX_ADDR 0x10 // 39:0 默认0xE7E7E7E7E7
// 以下是一组表示各通道的静态负载长度
// 都是5:0为有效比特位
// 0 表示pipe未使用
// 1 1byte
// ...
// 32 32bytes
#define REG_RX_PW_P0 0x11
#define REG_RX_PW_P1 0x12
#define REG_RX_PW_P2 0x13
#define REG_RX_PW_P3 0x14
#define REG_RX_PW_P4 0x15
#define REG_RX_PW_P5 0x16
#define REG_FIFO_STATUS 0x17
// 如果置1则重用上次传输的数据包
// 只要CE为1，数据包就会不断地被重发
// SPI命令REUSE_TX_PL对此位置1
// SPI命令W_TX_PAYLOAD或FLUSH_TX对此位清0
#define TX_REUSE 6
// 0 TX FIFO尚有空间
// 1 TX FIFO已满
#define TX_FIFO_FULL 5
// 0 TX FIFO中有数据
// 1 TX FIFO中没有数据
#define TX_FIFIO_EMPTY 4
// 0 RX FIFO尚有空间
// 1 RX FIFO已满
#define RX_FIFO_FULL 1
// 0 RX FIFO中有数据
// 1 RX FIFO中没有数据
#define RX_FIFO_EMPTY 0
// 启用相应data pip的动态负载长度
// 需要启用 EN_DPL 和 ENAA_Pn
#define REG_DYNPD 0x1C
#define DPL_P5 5
#define DPL_P4 4
#define DPL_P3 3
#define DPL_P2 2
#define DPL_P1 1
#define DPL_P0 0
#define REG_FEATURE 0x1D
// Enable Dynamic Payload Length
#define EN_DPL 2
// Enable Payload with ACK
#define EN_ACK_PAY 1
// Enable W_TX_PAYLOAD_NOACK 命令
#define EN_DYN_ACK 0
#define REGISTER_MASK 0x1F
#define CMD_R_REGISTER 0x00
#define CMD_W_REGISTER 0x20
#define CMD_R_RX_PAYLOAD 0b01100001
#define CMD_W_TX_PAYLOAD 0b10100000
#define CMD_FLUSH_TX 0b11100001
#define CMD_FLUSH_RX 0b11100010
#define CMD_REUSE_TX_PL 0b11100011
#define CMD_ACTIVATE 0b01010000
#define CMD_R_RX_PL_WID 0b01100000
#define CMD_W_ACK_PAYLOAD 0b10101000
#define CMD_W_TX_PAYLOAD_NOACK 0b10110000
#define CMD_NOP 0b11111111
#define _BV(n) (1<<(n))
#define _VV(v, n) ((v)<<(n))
int nrf_init(nrf_init_t *ni);
void nrf_flush_rx();
void nrf_flush_tx();
void nrf_delay(uint32_t delay);
int nrf_powerup();
int nrf_powerdown();
void nrf_enable_rx_irq();
void nrf_disable_rx_irq();
void nrf_enable_tx_irq();
void nrf_disable_tx_irq();
void nrf_enable_max_rt_irq();
void nrf_disable_max_rt_irq();
void nrf_set_rf_channel(uint8_t channel);
int nrf_set_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t addrlen);
int nrf_get_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t *addrlen);
int nrf_set_txaddr(uint8_t *addr, uint8_t addrlen);
int nrf_get_txaddr(uint8_t *addr, uint8_t *addrlen);
int nrf_enable_rxaddr(uint8_t pipe);
void nrf_reset_registers();
void nrf_set_standby_mode();
void nrf_set_receive_mode();
void nrf_set_send_mode();
void nrf_enable_autoack(uint8_t pipe);
void nrf_disable_autoack(uint8_t pipe);
void nrf_set_datarate(uint8_t dr);
int nrf_enable_dynamic_payload(uint8_t pipe);
int nrf_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe);
int nrf_poll_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe);
int nrf_write_payload(uint8_t *buf, uint8_t len);
void nrf_ce(uint8_t mode);
void nrf_csn(uint8_t mode);
int nrf_read_reg(uint8_t reg, uint8_t *buf, uint8_t len);
int nrf_read_reg_byte(uint8_t reg, uint8_t *v);
int nrf_write_reg(uint8_t reg, uint8_t *buf, uint8_t len);
int nrf_write_reg_byte(uint8_t reg, uint8_t byte);
int nrf_clear_reg_bit(uint8_t reg, uint8_t bit);
int nrf_set_reg_bit(uint8_t reg, uint8_t bit);
int nrf_cmd_read(uint8_t cmd, uint8_t *data, uint8_t len);
int nrf_cmd_read_byte(uint8_t cmd, uint8_t *data);
int nrf_write_cmd_and_data(uint8_t cmd, uint8_t *data, uint8_t len);
int nrf_write_cmd(uint8_t cmd);
#endif /* NRF24L01_H_ */

2
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01_hal.c → board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01_gd32v_hal.c
View File

@@ -1,4 +1,4 @@
#include "nrf24l01_hal.h"
#include "nrf24l01_gd32v_hal.h"
#include "gd32vf103_gpio.h"
#include <string.h>

6
board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01_hal.h → board/Sipeed_LonganNano/eclipse/nRF24L01/nrf24l01_gd32v_hal.h
View File

@@ -1,5 +1,5 @@
#ifndef NRF24L01_HAL_H_
#define NRF24L01_HAL_H_
#ifndef NRF24L01_GD32V_HAL_H_
#define NRF24L01_GD32V_HAL_H_
#include "nrf24l01.h"
@@ -21,4 +21,4 @@ void nrf_hal_spi_send(uint8_t *buf, uint8_t len);
void nrf_hal_spi_recv(uint8_t *buf, uint8_t len);
#endif /* NRF24L01_HAL_H_ */
#endif /* NRF24L01_GD32V_HAL_H_ */