add reset nrf24l01 registers

This commit is contained in:
acevest
2020-03-30 17:30:11 +08:00
parent 522ebe4f9b
commit 019b69f592
2 changed files with 122 additions and 19 deletions

View File

@@ -197,21 +197,68 @@ int nrf_enable_rxaddr(uint8_t pipe) {
} }
_nrf_write_reg_byte(REG_EN_RXADDR, pipe); _nrf_write_reg_byte(REG_EN_RXADDR, pipe);
return 0;
}
void nrf_reset_registers() {
_nrf_write_reg_byte(REG_CONFIG, _BV(EN_CRC));
_nrf_write_reg_byte(REG_EN_AA, _BV(ENAA_P0) | _BV(ENAA_P1) | _BV(ENAA_P2) | _BV(ENAA_P3) | _BV(ENAA_P4) | _BV(ENAA_P5));
_nrf_write_reg_byte(REG_EN_RXADDR, _BV(ERX_P0) | _BV(ERX_P1));
_nrf_write_reg_byte(REG_SETUP_AW, _VV(AW_5BYTES, AW));
_nrf_write_reg_byte(REG_SETUP_RETR, _VV(ARD_250us, ARD) | _VV(ARC_3, ARC));
_nrf_write_reg_byte(REG_RF_CH, 0b00000010);
_nrf_write_reg_byte(REG_RF_SETUP, _BV(RF_DR_HIGH) | _VV(RF_PWR_0dBm, RF_PWR));
uint8_t status = 0;
_nrf_read_reg_byte(REG_STATUS, &status);
if(status & _BV(RX_DR)) {
_nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
}
if(status & _BV(TX_DS)) {
_nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
}
if(status & _BV(MAX_RT)) {
_nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
}
_nrf_write_reg_byte(REG_RX_PW_P0, 0);
_nrf_write_reg_byte(REG_RX_PW_P1, 0);
_nrf_write_reg_byte(REG_RX_PW_P2, 0);
_nrf_write_reg_byte(REG_RX_PW_P3, 0);
_nrf_write_reg_byte(REG_RX_PW_P4, 0);
_nrf_write_reg_byte(REG_RX_PW_P5, 0);
_nrf_write_reg_byte(REG_DYNPD, 0);
_nrf_write_reg_byte(REG_FEATURE, 0);
uint8_t addrp0[] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7};
uint8_t addrp1[] = {0xC2, 0xC2, 0xC2, 0xC2, 0xC2};
_nrf_write_reg(REG_TX_ADDR, addrp0, 5);
_nrf_write_reg(REG_RX_ADDR_P0, addrp0, 5);
_nrf_write_reg(REG_RX_ADDR_P1, addrp1, 5);
_nrf_write_reg_byte(REG_RX_ADDR_P2, 0xC3);
_nrf_write_reg_byte(REG_RX_ADDR_P3, 0xC4);
_nrf_write_reg_byte(REG_RX_ADDR_P4, 0xC5);
_nrf_write_reg_byte(REG_RX_ADDR_P5, 0xC6);
nrf_flush_rx();
nrf_flush_tx();
} }
void nrf_set_standby_mode() { void nrf_set_standby_mode() {
nrf_ce(0); nrf_ce(0);
nrf_powerdown(); nrf_powerdown();
nrf_reset_registers();
nrf_delay(10); nrf_delay(10);
printf("\n");
_nrf_set_reg_bit(REG_CONFIG, EN_CRC); for(int i=0; i<=7; i++) {
uint8_t v = 0;
_nrf_read_reg_byte(i, &v);
printf("--reg %u val %x\n", i, v);
}
nrf_powerup(); nrf_powerup();
nrf_delay(10); // 10m > 1.5~2ms nrf_delay(10); // 10m > 1.5~2ms
nrf_flush_rx();
nrf_flush_tx();
} }
@@ -312,10 +359,10 @@ uint8_t nrf_hal_test() {
nrf_delay(200); nrf_delay(200);
nrf_set_standby_mode(); nrf_set_standby_mode();
nrf_set_receive_mode(); nrf_set_receive_mode();
//nrf_disable_rx_irq(); //nrf_disable_rx_irq();
@@ -338,6 +385,7 @@ uint8_t nrf_hal_test() {
nrf_enable_rxaddr(0); nrf_enable_rxaddr(0);
nrf_enable_rxaddr(1); nrf_enable_rxaddr(1);
printf("\n");
for(int i=0; i<=7; i++) { for(int i=0; i<=7; i++) {
uint8_t v = 0; uint8_t v = 0;
_nrf_read_reg_byte(i, &v); _nrf_read_reg_byte(i, &v);
@@ -355,18 +403,6 @@ uint8_t nrf_hal_test() {
uint8_t buf[32]; uint8_t buf[32];
uint8_t len = 0; uint8_t len = 0;
#if 0
uint8_t v = 0;
_nrf_read_reg_byte(7, &v);
printf("1reg status val %x\n", v);
printf("%x len %u\n", buf[0], len);
_nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
_nrf_read_reg_byte(7, &v);
printf("2reg status val %x\n", v);
#endif
uint8_t status = 0; uint8_t status = 0;
_nrf_read_reg_byte(REG_STATUS, &status); _nrf_read_reg_byte(REG_STATUS, &status);
nrf_read_payload(buf, &len); nrf_read_payload(buf, &len);

View File

@@ -1,6 +1,14 @@
#ifndef NRF24L01_H_ #ifndef NRF24L01_H_
#define NRF24L01_H_ #define NRF24L01_H_
#if defined(__SI24R1__) && defined(__NRF24L01__)
#error "you must choose chip between SI24R1 and NRF24L01"
#endif
#if !defined(__SI24R1__) && !defined(__NRF24L01__)
#define __NRF24L01__
#endif
#define REG_CONFIG 0x00 #define REG_CONFIG 0x00
// 屏蔽因RX_DR触发的中断 // 屏蔽因RX_DR触发的中断
// 0 不屏蔽, 1 屏蔽 // 0 不屏蔽, 1 屏蔽
@@ -51,6 +59,10 @@
// 10 4字节 // 10 4字节
// 11 5字节 // 11 5字节
#define AW 0 #define AW 0
#define AW_3BYTES 1
#define AW_4BYTES 2
#define AW_5BYTES 3
#define REG_SETUP_RETR 0x04 #define REG_SETUP_RETR 0x04
@@ -61,6 +73,22 @@
// ... // ...
// 1111 4000us // 1111 4000us
#define ARD 4 #define ARD 4
#define ARD_250us 0
#define ARD_500us 1
#define ARD_750us 2
#define ARD_1000us 3
#define ARD_1250us 4
#define ARD_1500us 5
#define ARD_1750us 6
#define ARD_2000us 7
#define ARD_2250us 8
#define ARD_2500us 9
#define ARD_2750us 10
#define ARD_3000us 11
#define ARD_3250us 12
#define ARD_3500us 13
#define ARD_3750us 14
#define ARD_4000us 15
// ARC, Auto Retransmit Count占3:0共4个比特 // ARC, Auto Retransmit Count占3:0共4个比特
// 0000 Re-Transmit disabled // 0000 Re-Transmit disabled
@@ -68,6 +96,22 @@
// ... // ...
// 1111 最多重度15次 // 1111 最多重度15次
#define ARC 0 #define ARC 0
#define ARC_0 0
#define ARC_1 1
#define ARC_2 2
#define ARC_3 3
#define ARC_4 4
#define ARC_5 5
#define ARC_6 6
#define ARC_7 7
#define ARC_8 8
#define ARC_9 9
#define ARC_10 10
#define ARC_11 11
#define ARC_12 12
#define ARC_13 13
#define ARC_14 14
#define ARC_15 15
// RF Channel选择 // RF Channel选择
@@ -76,7 +120,9 @@
#define REG_RF_SETUP 0x06 #define REG_RF_SETUP 0x06
#define RF_DR_LOW 5
#define PLL_LOCK 4 // 仅用在测试 #define PLL_LOCK 4 // 仅用在测试
#define RF_DR_HIGH 3
// Air Data Rate // Air Data Rate
// 0 1Mbps // 0 1Mbps
// 1 2Mbps // 1 2Mbps
@@ -91,9 +137,29 @@
// 01 -12dBm // 01 -12dBm
// 10 -6dBm // 10 -6dBm
// 11 0dBm // 11 0dBm
#if defined(__NRF24L01__)
#define RF_PWR 1 #define RF_PWR 1
#define RF_PWR_n18dBm 0
#define RF_PWR_n12dBm 1
#define RF_PWR_n6dBm 2
#define RF_PWR_0dBm 3
// Non-P omissions // Non-P omissions
#define LNA_HCURR 0 #define LNA_HCURR 0
#endif
#if defined(__SI24R1__)
#define RF_PWR 0
#define RF_PWR_n12dBm 0
#define RF_PWR_n6dBm 1
#define RF_PWR_n4dBm 2
#define RF_PWR_0dBm 3
#define RF_PWR_1dBm 4
#define RF_PWR_3dBm 5
#define RF_PWR_4dBm 6
#define RF_PWR_7dBm 7
#endif
#define REG_STATUS 0x07 #define REG_STATUS 0x07
// RX FIFO数据READY中断标记位 // RX FIFO数据READY中断标记位
@@ -207,6 +273,7 @@
#define _BV(n) (1<<(n)) #define _BV(n) (1<<(n))
#define _VV(v, n) ((v)<<(n))
void nrf_powerup(); void nrf_powerup();