add ota update demo base tc esp8266 fw
This commit is contained in:
mculover666
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,923 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>2.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>TencentOS_tiny</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
|
||||||
|
<uAC6>0</uAC6>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>STM32L431RCTx</Device>
|
||||||
|
<Vendor>STMicroelectronics</Vendor>
|
||||||
|
<PackID>Keil.STM32L4xx_DFP.2.4.0</PackID>
|
||||||
|
<PackURL>https://www.keil.com/pack/</PackURL>
|
||||||
|
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll></FlashDriverDll>
|
||||||
|
<DeviceId></DeviceId>
|
||||||
|
<RegisterFile></RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\obj\</OutputDirectory>
|
||||||
|
<OutputName>TencentOS_tiny</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>1</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>0</BrowseInformation>
|
||||||
|
<ListingPath>.\list\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopB1X>0</nStopB1X>
|
||||||
|
<nStopB2X>0</nStopB2X>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin --output=@L.bin !L</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopA1X>0</nStopA1X>
|
||||||
|
<nStopA2X>0</nStopA2X>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>0</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4107</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
|
<RvdsCdeCp>0</RvdsCdeCp>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>1</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<nSecure>0</nSecure>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x40000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8007800</StartAddress>
|
||||||
|
<Size>0x19000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>2</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<uGnu>0</uGnu>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<v6Lang>1</v6Lang>
|
||||||
|
<v6LangP>1</v6LangP>
|
||||||
|
<vShortEn>1</vShortEn>
|
||||||
|
<vShortWch>1</vShortWch>
|
||||||
|
<v6Lto>0</v6Lto>
|
||||||
|
<v6WtE>0</v6WtE>
|
||||||
|
<v6Rtti>0</v6Rtti>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define>USE_HAL_DRIVER,STM32L431xx,</Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath>..\..\..\BSP\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\..\kernel\core\include;..\..\..\TOS-CONFIG;..\..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\..\kernel\pm\include;..\..\..\..\..\osal\cmsis_os;..\..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\BSP\Hardware\DHT11;..\..\..\BSP\Hardware\OLED;..\..\..\BSP\Hardware\BH1750;..\..\..\..\..\net\at\include;..\..\..\..\..\kernel\hal\include;..\..\..\..\..\components\ota\download\include;..\..\..\..\..\components\ota\common\crc;..\..\..\..\..\components\ota\common\image;..\..\..\..\..\components\ota\common\flash;..\..\..\..\..\components\ota\common\partition;..\..\..\..\..\components\ota\common\env;..\..\..\..\..\components\fs\kv\include;..\..\..\..\..\components\ota\common\info;..\..\..\..\..\components\ota\recovery\include;..\..\..\..\..\devices\esp8266_tencent_firmware;..\..\..\..\..\net\tencent_firmware_module_wrapper</IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<ClangAsOpt>4</ClangAsOpt>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>1</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile></ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Application/MDK-ARM</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>startup_stm32l431xx.s</FileName>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<FilePath>startup_stm32l431xx.s</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Application/User</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>gpio.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\gpio.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>main.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\main.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>mcu_init.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\mcu_init.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_msp.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_it_module.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\stm32l4xx_it_module.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>usart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\usart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>adc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\adc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>dac.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\dac.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>i2c.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\i2c.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>spi.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\spi.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tim.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Src\tim.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>examples</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>ota_download_through_qcould_firmware_sample.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\examples\ota_download_through_qcould_firmware\ota_download_through_qcould_firmware_sample.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_tim.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_tim_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_uart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_uart_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_i2c.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_i2c_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_rcc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_rcc_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_flash.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_flash_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_gpio.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_dma.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Drivers/CMSIS</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>system_stm32l4xx.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>system_stm32l4xx.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Hardware</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>DHT11_BUS.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>oled.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>onchip_flash.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>onchip_flash_ota.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash_ota.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>kernel</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_binary_heap.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_char_fifo.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_completion.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_completion.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_countdownlatch.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_event.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_event.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_global.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_global.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_mail_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_message_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_mmblk.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_mmheap.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_mutex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_mutex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_pend.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_pend.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_priority_mail_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_priority_message_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_priority_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_ring_queue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_robin.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_robin.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_sched.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_sched.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_sem.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_sem.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_sys.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_sys.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_task.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_task.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_tick.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_tick.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_time.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_time.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_timer.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_timer.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_barrier.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_barrier.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_bitmap.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_bitmap.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_rwlock.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_rwlock.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_stopwatch.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\kernel\core\tos_stopwatch.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>cpu</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>port_s.S</FileName>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_cpu.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>port_c.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>cmsis</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>cmsis_os.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>config</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_config.h</FileName>
|
||||||
|
<FileType>5</FileType>
|
||||||
|
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>at</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_at.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\net\at\src\tos_at.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>devices</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>esp8266_tencent_firmware.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\devices\esp8266_tencent_firmware\esp8266_tencent_firmware.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>sal_module_wrapper</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tencent_firmware_module_wrapper.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\net\tencent_firmware_module_wrapper\tencent_firmware_module_wrapper.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>hal</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_hal_uart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>ota_common</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>ota_flash.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\ota\common\flash\ota_flash.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>crc8.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\ota\common\crc\crc8.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ota_image.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\ota\common\image\ota_image.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ota_partition.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\ota\common\partition\ota_partition.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ota_env.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\ota\common\env\ota_env.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>kv</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>tos_kv.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\..\..\components\fs\kv\tos_kv.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>::CMSIS</GroupName>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
<RTE>
|
||||||
|
<apis/>
|
||||||
|
<components>
|
||||||
|
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||||
|
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="TencentOS_tiny"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
|
</components>
|
||||||
|
<files/>
|
||||||
|
</RTE>
|
||||||
|
|
||||||
|
<LayerInfo>
|
||||||
|
<Layers>
|
||||||
|
<Layer>
|
||||||
|
<LayName><Project Info></LayName>
|
||||||
|
<LayDesc></LayDesc>
|
||||||
|
<LayUrl></LayUrl>
|
||||||
|
<LayKeys></LayKeys>
|
||||||
|
<LayCat></LayCat>
|
||||||
|
<LayLic></LayLic>
|
||||||
|
<LayTarg>0</LayTarg>
|
||||||
|
<LayPrjMark>1</LayPrjMark>
|
||||||
|
</Layer>
|
||||||
|
</Layers>
|
||||||
|
</LayerInfo>
|
||||||
|
|
||||||
|
</Project>
|
||||||
@@ -0,0 +1,404 @@
|
|||||||
|
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||||
|
;* File Name : startup_stm32l431xx.s
|
||||||
|
;* Author : MCD Application Team
|
||||||
|
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||||
|
;* This module performs:
|
||||||
|
;* - Set the initial SP
|
||||||
|
;* - Set the initial PC == Reset_Handler
|
||||||
|
;* - Set the vector table entries with the exceptions ISR address
|
||||||
|
;* - Branches to __main in the C library (which eventually
|
||||||
|
;* calls main()).
|
||||||
|
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||||
|
;* priority is Privileged, and the Stack is set to Main.
|
||||||
|
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||||
|
;*******************************************************************************
|
||||||
|
;*
|
||||||
|
;* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
;* are permitted provided that the following conditions are met:
|
||||||
|
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer.
|
||||||
|
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
;* this list of conditions and the following disclaimer in the documentation
|
||||||
|
;* and/or other materials provided with the distribution.
|
||||||
|
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
;* may be used to endorse or promote products derived from this software
|
||||||
|
;* without specific prior written permission.
|
||||||
|
;*
|
||||||
|
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;*
|
||||||
|
;*******************************************************************************
|
||||||
|
;
|
||||||
|
; Amount of memory (in bytes) allocated for Stack
|
||||||
|
; Tailor this value to your application needs
|
||||||
|
; <h> Stack Configuration
|
||||||
|
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Stack_Size EQU 0x100
|
||||||
|
|
||||||
|
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||||
|
Stack_Mem SPACE Stack_Size
|
||||||
|
__initial_sp
|
||||||
|
|
||||||
|
|
||||||
|
; <h> Heap Configuration
|
||||||
|
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Heap_Size EQU 0x100
|
||||||
|
|
||||||
|
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||||
|
__heap_base
|
||||||
|
Heap_Mem SPACE Heap_Size
|
||||||
|
__heap_limit
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
EXPORT __Vectors_End
|
||||||
|
EXPORT __Vectors_Size
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD HardFault_Handler ; Hard Fault Handler
|
||||||
|
DCD MemManage_Handler ; MPU Fault Handler
|
||||||
|
DCD BusFault_Handler ; Bus Fault Handler
|
||||||
|
DCD UsageFault_Handler ; Usage Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD PendSV_Handler ; PendSV Handler
|
||||||
|
DCD SysTick_Handler ; SysTick Handler
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WWDG_IRQHandler ; Window WatchDog
|
||||||
|
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||||
|
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||||
|
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||||
|
DCD FLASH_IRQHandler ; FLASH
|
||||||
|
DCD RCC_IRQHandler ; RCC
|
||||||
|
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||||
|
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||||
|
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||||
|
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||||
|
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||||
|
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||||
|
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||||
|
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||||
|
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||||
|
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||||
|
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||||
|
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||||
|
DCD ADC1_IRQHandler ; ADC1
|
||||||
|
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||||
|
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||||
|
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||||
|
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||||
|
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||||
|
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||||
|
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||||
|
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||||
|
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||||
|
DCD TIM2_IRQHandler ; TIM2
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||||
|
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||||
|
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||||
|
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||||
|
DCD SPI1_IRQHandler ; SPI1
|
||||||
|
DCD SPI2_IRQHandler ; SPI2
|
||||||
|
DCD USART1_IRQHandler ; USART1
|
||||||
|
DCD USART2_IRQHandler ; USART2
|
||||||
|
DCD USART3_IRQHandler ; USART3
|
||||||
|
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||||
|
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SPI3_IRQHandler ; SPI3
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||||
|
DCD TIM7_IRQHandler ; TIM7
|
||||||
|
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||||
|
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||||
|
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||||
|
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||||
|
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD COMP_IRQHandler ; COMP Interrupt
|
||||||
|
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||||
|
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||||
|
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||||
|
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||||
|
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||||
|
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||||
|
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||||
|
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||||
|
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD RNG_IRQHandler ; RNG global interrupt
|
||||||
|
DCD FPU_IRQHandler ; FPU
|
||||||
|
DCD CRS_IRQHandler ; CRS interrupt
|
||||||
|
|
||||||
|
__Vectors_End
|
||||||
|
|
||||||
|
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
; Reset handler
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT SystemInit
|
||||||
|
IMPORT __main
|
||||||
|
|
||||||
|
LDR R0, =SystemInit
|
||||||
|
BLX R0
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
MemManage_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT MemManage_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
BusFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT BusFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
UsageFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT UsageFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
DebugMon_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT DebugMon_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
PendSV_Handler PROC
|
||||||
|
EXPORT PendSV_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SysTick_Handler PROC
|
||||||
|
EXPORT SysTick_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT WWDG_IRQHandler [WEAK]
|
||||||
|
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||||
|
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||||
|
EXPORT FLASH_IRQHandler [WEAK]
|
||||||
|
EXPORT RCC_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI0_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI1_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI2_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI3_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI4_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC1_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM2_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI2_IRQHandler [WEAK]
|
||||||
|
EXPORT USART1_IRQHandler [WEAK]
|
||||||
|
EXPORT USART2_IRQHandler [WEAK]
|
||||||
|
EXPORT USART3_IRQHandler [WEAK]
|
||||||
|
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||||
|
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI3_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||||
|
EXPORT TIM7_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||||
|
EXPORT COMP_IRQHandler [WEAK]
|
||||||
|
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||||
|
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||||
|
EXPORT LPUART1_IRQHandler [WEAK]
|
||||||
|
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||||
|
EXPORT SAI1_IRQHandler [WEAK]
|
||||||
|
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||||
|
EXPORT TSC_IRQHandler [WEAK]
|
||||||
|
EXPORT RNG_IRQHandler [WEAK]
|
||||||
|
EXPORT FPU_IRQHandler [WEAK]
|
||||||
|
EXPORT CRS_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
WWDG_IRQHandler
|
||||||
|
PVD_PVM_IRQHandler
|
||||||
|
TAMP_STAMP_IRQHandler
|
||||||
|
RTC_WKUP_IRQHandler
|
||||||
|
FLASH_IRQHandler
|
||||||
|
RCC_IRQHandler
|
||||||
|
EXTI0_IRQHandler
|
||||||
|
EXTI1_IRQHandler
|
||||||
|
EXTI2_IRQHandler
|
||||||
|
EXTI3_IRQHandler
|
||||||
|
EXTI4_IRQHandler
|
||||||
|
DMA1_Channel1_IRQHandler
|
||||||
|
DMA1_Channel2_IRQHandler
|
||||||
|
DMA1_Channel3_IRQHandler
|
||||||
|
DMA1_Channel4_IRQHandler
|
||||||
|
DMA1_Channel5_IRQHandler
|
||||||
|
DMA1_Channel6_IRQHandler
|
||||||
|
DMA1_Channel7_IRQHandler
|
||||||
|
ADC1_IRQHandler
|
||||||
|
CAN1_TX_IRQHandler
|
||||||
|
CAN1_RX0_IRQHandler
|
||||||
|
CAN1_RX1_IRQHandler
|
||||||
|
CAN1_SCE_IRQHandler
|
||||||
|
EXTI9_5_IRQHandler
|
||||||
|
TIM1_BRK_TIM15_IRQHandler
|
||||||
|
TIM1_UP_TIM16_IRQHandler
|
||||||
|
TIM1_TRG_COM_IRQHandler
|
||||||
|
TIM1_CC_IRQHandler
|
||||||
|
TIM2_IRQHandler
|
||||||
|
I2C1_EV_IRQHandler
|
||||||
|
I2C1_ER_IRQHandler
|
||||||
|
I2C2_EV_IRQHandler
|
||||||
|
I2C2_ER_IRQHandler
|
||||||
|
SPI1_IRQHandler
|
||||||
|
SPI2_IRQHandler
|
||||||
|
USART1_IRQHandler
|
||||||
|
USART2_IRQHandler
|
||||||
|
USART3_IRQHandler
|
||||||
|
EXTI15_10_IRQHandler
|
||||||
|
RTC_Alarm_IRQHandler
|
||||||
|
SDMMC1_IRQHandler
|
||||||
|
SPI3_IRQHandler
|
||||||
|
TIM6_DAC_IRQHandler
|
||||||
|
TIM7_IRQHandler
|
||||||
|
DMA2_Channel1_IRQHandler
|
||||||
|
DMA2_Channel2_IRQHandler
|
||||||
|
DMA2_Channel3_IRQHandler
|
||||||
|
DMA2_Channel4_IRQHandler
|
||||||
|
DMA2_Channel5_IRQHandler
|
||||||
|
COMP_IRQHandler
|
||||||
|
LPTIM1_IRQHandler
|
||||||
|
LPTIM2_IRQHandler
|
||||||
|
DMA2_Channel6_IRQHandler
|
||||||
|
DMA2_Channel7_IRQHandler
|
||||||
|
LPUART1_IRQHandler
|
||||||
|
QUADSPI_IRQHandler
|
||||||
|
I2C3_EV_IRQHandler
|
||||||
|
I2C3_ER_IRQHandler
|
||||||
|
SAI1_IRQHandler
|
||||||
|
SWPMI1_IRQHandler
|
||||||
|
TSC_IRQHandler
|
||||||
|
RNG_IRQHandler
|
||||||
|
FPU_IRQHandler
|
||||||
|
CRS_IRQHandler
|
||||||
|
|
||||||
|
B .
|
||||||
|
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
;*******************************************************************************
|
||||||
|
; User Stack and Heap initialization
|
||||||
|
;*******************************************************************************
|
||||||
|
IF :DEF:__MICROLIB
|
||||||
|
|
||||||
|
EXPORT __initial_sp
|
||||||
|
EXPORT __heap_base
|
||||||
|
EXPORT __heap_limit
|
||||||
|
|
||||||
|
ELSE
|
||||||
|
|
||||||
|
IMPORT __use_two_region_memory
|
||||||
|
EXPORT __user_initial_stackheap
|
||||||
|
|
||||||
|
__user_initial_stackheap
|
||||||
|
|
||||||
|
LDR R0, = Heap_Mem
|
||||||
|
LDR R1, =(Stack_Mem + Stack_Size)
|
||||||
|
LDR R2, = (Heap_Mem + Heap_Size)
|
||||||
|
LDR R3, = Stack_Mem
|
||||||
|
BX LR
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
END
|
||||||
|
|
||||||
|
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||||
@@ -0,0 +1,337 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32l4xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
|
||||||
|
*
|
||||||
|
* This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32l4xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* After each device reset the MSI (4 MHz) is used as system clock source.
|
||||||
|
* Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
|
||||||
|
* configure the system clock before to branch to main program.
|
||||||
|
*
|
||||||
|
* This file configures the system clock as follows:
|
||||||
|
*=============================================================================
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System Clock source | MSI
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(Hz) | 4000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* HCLK(Hz) | 4000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* AHB Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB1 Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB2 Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_M | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_N | 8
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_P | 7
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_Q | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_R | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI1_P | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI1_Q | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI1_R | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI2_P | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI2_Q | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLLSAI2_R | NA
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* Require 48MHz for USB OTG FS, | Disabled
|
||||||
|
* SDIO and RNG clock |
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
*=============================================================================
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l4xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32l4xx.h"
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (MSI_VALUE)
|
||||||
|
#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* MSI_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************* Miscellaneous Configuration ************************/
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x7800 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* The SystemCoreClock variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 4000000U;
|
||||||
|
|
||||||
|
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||||
|
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||||
|
const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \
|
||||||
|
4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set MSION bit */
|
||||||
|
RCC->CR |= RCC_CR_MSION;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR = 0x00000000U;
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON , HSION, and PLLON bits */
|
||||||
|
RCC->CR &= 0xEAF6FFFFU;
|
||||||
|
|
||||||
|
/* Reset PLLCFGR register */
|
||||||
|
RCC->PLLCFGR = 0x00001000U;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= 0xFFFBFFFFU;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIER = 0x00000000U;
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
|
||||||
|
* or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
|
||||||
|
* 4 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
|
||||||
|
* 16 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
|
||||||
|
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate(void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U;
|
||||||
|
|
||||||
|
/* Get MSI Range frequency--------------------------------------------------*/
|
||||||
|
if((RCC->CR & RCC_CR_MSIRGSEL) == RESET)
|
||||||
|
{ /* MSISRANGE from RCC_CSR applies */
|
||||||
|
msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{ /* MSIRANGE from RCC_CR applies */
|
||||||
|
msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
|
||||||
|
}
|
||||||
|
/*MSI frequency range in HZ*/
|
||||||
|
msirange = MSIRangeTable[msirange];
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||||
|
{
|
||||||
|
case 0x00: /* MSI used as system clock source */
|
||||||
|
SystemCoreClock = msirange;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x04: /* HSI used as system clock source */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x08: /* HSE used as system clock source */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x0C: /* PLL used as system clock source */
|
||||||
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
|
||||||
|
SYSCLK = PLL_VCO / PLLR
|
||||||
|
*/
|
||||||
|
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||||
|
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
|
||||||
|
|
||||||
|
switch (pllsource)
|
||||||
|
{
|
||||||
|
case 0x02: /* HSI used as PLL clock source */
|
||||||
|
pllvco = (HSI_VALUE / pllm);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x03: /* HSE used as PLL clock source */
|
||||||
|
pllvco = (HSE_VALUE / pllm);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default: /* MSI used as PLL clock source */
|
||||||
|
pllvco = (msirange / pllm);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
|
||||||
|
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
|
||||||
|
SystemCoreClock = pllvco/pllr;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
SystemCoreClock = msirange;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
@@ -271,6 +271,80 @@ static int esp8266_tencent_firmware_init(void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int esp8266_tencent_firmware_ota_set(ota_mode_t mode, char *version)
|
||||||
|
{
|
||||||
|
at_echo_t echo;
|
||||||
|
|
||||||
|
tos_at_echo_create(&echo, NULL, 0, "+TCOTASET:OK");
|
||||||
|
|
||||||
|
tos_at_cmd_exec(&echo, 2000, "AT+TCOTASET=%d,\"%s\"\r\n", mode, version);
|
||||||
|
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
k_sem_t ota_fw_info_sem;
|
||||||
|
|
||||||
|
int esp8266_tencent_firmware_ota_read_fwinfo(ota_fw_info_t *ota_fw_info)
|
||||||
|
{
|
||||||
|
at_echo_t echo;
|
||||||
|
char echo_buffer[64];
|
||||||
|
uint8_t FileSize[10] = {0};
|
||||||
|
uint32_t updateFileSize = 0;
|
||||||
|
|
||||||
|
/* wait update command frome cloud forever */
|
||||||
|
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_info_sem, 0, 1)) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
tos_sem_pend(&ota_fw_info_sem, TOS_TIME_FOREVER);
|
||||||
|
|
||||||
|
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+TCFWINFO:");
|
||||||
|
|
||||||
|
tos_at_cmd_exec(&echo, 2000, "AT+TCFWINFO?\r\n");
|
||||||
|
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||||
|
|
||||||
|
sscanf(echo_buffer, "%*[^\"]%*c%[^\"]%*[^,]%*c%[^,]%*[^\"]%*c%[^\"]", ota_fw_info->fw_version, FileSize, ota_fw_info->fw_md5);
|
||||||
|
for(int i = 0; i<10; i++)
|
||||||
|
{
|
||||||
|
if(FileSize[i] == 0)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
updateFileSize = updateFileSize*10 + (FileSize[i] - 0x30);
|
||||||
|
}
|
||||||
|
ota_fw_info->fw_size = updateFileSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
k_chr_fifo_t ota_fw_data_chr_fifo;
|
||||||
|
k_sem_t ota_fw_data_sem;
|
||||||
|
|
||||||
|
static int esp8266_tencent_firmware_ota_read_fwdata(uint8_t *ota_fw_data_buffer,uint16_t read_len)
|
||||||
|
{
|
||||||
|
at_echo_t echo;
|
||||||
|
|
||||||
|
if(K_ERR_NONE != tos_chr_fifo_create(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len)) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_data_sem, 0, 1)) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||||
|
|
||||||
|
tos_at_cmd_exec(&echo, 300, "AT+TCREADFWDATA=%d\r\n", read_len);
|
||||||
|
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
tos_sem_pend(&ota_fw_data_sem, TOS_TIME_FOREVER);
|
||||||
|
|
||||||
|
return tos_chr_fifo_pop_stream(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len);
|
||||||
|
}
|
||||||
|
|
||||||
__STATIC__ uint8_t topic_buffer[64];
|
__STATIC__ uint8_t topic_buffer[64];
|
||||||
__STATIC__ uint8_t payload_buffer[64];
|
__STATIC__ uint8_t payload_buffer[64];
|
||||||
|
|
||||||
@@ -325,8 +399,70 @@ void esp8266_tencent_firmware_recvpub(void)
|
|||||||
printf("payload: %s\n", payload_buffer);
|
printf("payload: %s\n", payload_buffer);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void esp8266_tencent_firmware_recvcmd(void)
|
||||||
|
{
|
||||||
|
/*
|
||||||
|
+TCOTASTATUS:UPDATEFAIL
|
||||||
|
+TCOTASTATUS:UPDATESUCCESS
|
||||||
|
*/
|
||||||
|
uint8_t buffer[20];
|
||||||
|
int read_len = 13;
|
||||||
|
|
||||||
|
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(!strstr((char*)buffer, "UPDATESUCCESS")) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
tos_sem_post(&ota_fw_info_sem);
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
void esp8266_tencent_firmware_recvfwdata(void)
|
||||||
|
{
|
||||||
|
/*
|
||||||
|
+TCREADFWDATA:256,<HEX Data>
|
||||||
|
*/
|
||||||
|
uint8_t data;
|
||||||
|
uint16_t data_len = 0, read_len = 0;
|
||||||
|
static uint8_t buffer[128];
|
||||||
|
|
||||||
|
while (1) {
|
||||||
|
if (tos_at_uart_read(&data, 1) != 1) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (data == ',') {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
data_len = data_len * 10 + (data - '0');
|
||||||
|
}
|
||||||
|
|
||||||
|
do {
|
||||||
|
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||||
|
read_len = MIN(data_len, sizeof(buffer));
|
||||||
|
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (tos_chr_fifo_push_stream(&ota_fw_data_chr_fifo, buffer, read_len) <= 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
data_len -= read_len;
|
||||||
|
} while (data_len > 0);
|
||||||
|
|
||||||
|
tos_sem_post(&ota_fw_data_sem);
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
at_event_t esp8266_tencent_firmware_at_event[] = {
|
at_event_t esp8266_tencent_firmware_at_event[] = {
|
||||||
{ "+TCMQTTRCVPUB:", esp8266_tencent_firmware_recvpub },
|
{ "+TCMQTTRCVPUB:", esp8266_tencent_firmware_recvpub },
|
||||||
|
{ "+TCREADFWDATA:", esp8266_tencent_firmware_recvfwdata },
|
||||||
|
{ "+TCOTASTATUS:", esp8266_tencent_firmware_recvcmd },
|
||||||
};
|
};
|
||||||
|
|
||||||
tencent_firmware_module_t tencent_firmware_module_esp8266 = {
|
tencent_firmware_module_t tencent_firmware_module_esp8266 = {
|
||||||
@@ -340,6 +476,9 @@ tencent_firmware_module_t tencent_firmware_module_esp8266 = {
|
|||||||
.mqtt_unsub = esp8266_tencent_firmware_module_mqtt_unsub,
|
.mqtt_unsub = esp8266_tencent_firmware_module_mqtt_unsub,
|
||||||
.mqtt_state_get = esp8266_tencent_firmware_module_mqtt_state_get,
|
.mqtt_state_get = esp8266_tencent_firmware_module_mqtt_state_get,
|
||||||
.debug_level_set = esp8266_tencent_firmware_module_debug_level_set,
|
.debug_level_set = esp8266_tencent_firmware_module_debug_level_set,
|
||||||
|
.ota_set = esp8266_tencent_firmware_ota_set,
|
||||||
|
.ota_read_fwinfo = esp8266_tencent_firmware_ota_read_fwinfo,
|
||||||
|
.ota_read_fwdata = esp8266_tencent_firmware_ota_read_fwdata,
|
||||||
};
|
};
|
||||||
|
|
||||||
int esp8266_tencent_firmware_sal_init(hal_uart_port_t uart_port)
|
int esp8266_tencent_firmware_sal_init(hal_uart_port_t uart_port)
|
||||||
|
|||||||
@@ -0,0 +1,166 @@
|
|||||||
|
#include "mcu_init.h"
|
||||||
|
#include "esp8266_tencent_firmware.h"
|
||||||
|
#include "tencent_firmware_module_wrapper.h"
|
||||||
|
|
||||||
|
#include "tos_k.h"
|
||||||
|
#include "tos_kv.h"
|
||||||
|
|
||||||
|
#include "ota_flash.h"
|
||||||
|
#include "ota_partition.h"
|
||||||
|
#include "ota_env.h"
|
||||||
|
|
||||||
|
extern ota_flash_drv_t stm32l4_norflash_onchip_drv_ota;
|
||||||
|
extern ota_flash_prop_t stm32l4_norflash_onchip_prop_ota;
|
||||||
|
|
||||||
|
ota_fw_info_t ota_fw_info;
|
||||||
|
|
||||||
|
#define READ_OTA_DATA_BUF_LEN 256
|
||||||
|
uint8_t ota_fw_data_buffer[READ_OTA_DATA_BUF_LEN];
|
||||||
|
|
||||||
|
#define CUR_VERSION "0.1"
|
||||||
|
|
||||||
|
void ota_download_demo_task(void)
|
||||||
|
{
|
||||||
|
mqtt_state_t state;
|
||||||
|
|
||||||
|
int read_len = 0;
|
||||||
|
uint8_t crc = 0, the_crc;
|
||||||
|
ota_img_vs_t new_version;
|
||||||
|
int remain_len = 0;
|
||||||
|
|
||||||
|
char *product_id = "WDRRDCF1TE";
|
||||||
|
char *device_name = "dev1";
|
||||||
|
char *key = "ULtbpSxXtSQyaFyeaax6pw==";
|
||||||
|
|
||||||
|
device_info_t dev_info;
|
||||||
|
memset(&dev_info, 0, sizeof(device_info_t));
|
||||||
|
|
||||||
|
printf("---------------------------\r\n");
|
||||||
|
printf("| ver:%s |\r\n", CUR_VERSION);
|
||||||
|
printf("---------------------------\r\n");
|
||||||
|
|
||||||
|
|
||||||
|
esp8266_tencent_firmware_sal_init(HAL_UART_PORT_0);
|
||||||
|
esp8266_tencent_firmware_join_ap("Mculover666", "mculover666");
|
||||||
|
|
||||||
|
strncpy(dev_info.product_id, product_id, PRODUCT_ID_MAX_SIZE);
|
||||||
|
strncpy(dev_info.device_name, device_name, DEVICE_NAME_MAX_SIZE);
|
||||||
|
strncpy(dev_info.device_serc, key, DEVICE_SERC_MAX_SIZE);
|
||||||
|
tos_tf_module_info_set(&dev_info, TLS_MODE_PSK);
|
||||||
|
|
||||||
|
mqtt_param_t init_params = DEFAULT_MQTT_PARAMS;
|
||||||
|
if (tos_tf_module_mqtt_conn(init_params) != 0) {
|
||||||
|
printf("module mqtt conn fail\n");
|
||||||
|
} else {
|
||||||
|
printf("module mqtt conn success\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
if (tos_tf_module_mqtt_state_get(&state) != -1) {
|
||||||
|
printf("MQTT: %s\n", state == MQTT_STATE_CONNECTED ? "CONNECTED" : "DISCONNECTED");
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t partition_addr = 0x0803f800;
|
||||||
|
|
||||||
|
if (ota_env_init(OTA_UPDATE_IN_POSITION, partition_addr, &stm32l4_norflash_onchip_drv_ota, &stm32l4_norflash_onchip_prop_ota) < 0) {
|
||||||
|
printf("env init failed!\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
printf("env init success\r\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
if(tos_tf_module_ota_set(OTA_ENABLE, CUR_VERSION)) {
|
||||||
|
printf("module ota enable failed!\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
printf("module ota enable success!\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
/* read info until success */
|
||||||
|
if(!tos_tf_module_ota_read_fwinfo(&ota_fw_info)) {
|
||||||
|
printf("fw info in module read success, fw_version=%s, fw_size=%d!\n", ota_fw_info.fw_version, ota_fw_info.fw_size);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* is the file too large? */
|
||||||
|
if (ota_fw_info.fw_size > ota_partition_size(OTA_PARTITION_OTA)) {
|
||||||
|
printf("OTA partition is too small, file size is %d bytes!", ota_fw_info.fw_size);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* 1. make flash ready */
|
||||||
|
uint32_t flash_addr = ota_partition_start(OTA_PARTITION_OTA);
|
||||||
|
if (ota_flash_erase_blocks(flash_addr, ota_fw_info.fw_size) < 0) {
|
||||||
|
printf("Erase Flash fail!\r\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* 2. deal with image header */
|
||||||
|
remain_len = ota_fw_info.fw_size;
|
||||||
|
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||||
|
read_len = MIN(remain_len, READ_OTA_DATA_BUF_LEN);
|
||||||
|
if(tos_tf_module_ota_read_fwdata(ota_fw_data_buffer, read_len) != read_len) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (read_len < sizeof(ota_img_hdr_t)) {
|
||||||
|
/* read_len at least larger than ota_img_hdr_t */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ota_flash_write(flash_addr, ota_fw_data_buffer, ota_flash_write_size_aligned_get(read_len)) < 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* get original image header */
|
||||||
|
the_crc = ((ota_img_hdr_t *)ota_fw_data_buffer)->patch_crc;
|
||||||
|
/* patch version */
|
||||||
|
new_version = ((ota_img_hdr_t *)ota_fw_data_buffer)->new_version;
|
||||||
|
|
||||||
|
/* calculate image header crc */
|
||||||
|
crc = ota_img_hdr_crc((ota_img_hdr_t *)ota_fw_data_buffer);
|
||||||
|
/* calculate remain image body crc */
|
||||||
|
crc = crc8(crc, ota_fw_data_buffer + sizeof(ota_img_hdr_t), read_len - sizeof(ota_img_hdr_t));
|
||||||
|
|
||||||
|
flash_addr += read_len;
|
||||||
|
remain_len -= read_len;
|
||||||
|
|
||||||
|
/* 3. read file content and write to flash */
|
||||||
|
while (remain_len > 0) {
|
||||||
|
read_len = MIN(remain_len, sizeof(ota_fw_data_buffer));
|
||||||
|
if (tos_tf_module_ota_read_fwdata(ota_fw_data_buffer, read_len) != read_len) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ota_flash_write(flash_addr, ota_fw_data_buffer, ota_flash_write_size_aligned_get(read_len)) < 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
crc = crc8(crc, ota_fw_data_buffer, read_len);
|
||||||
|
|
||||||
|
flash_addr += read_len;
|
||||||
|
remain_len -= read_len;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* 4. crc check */
|
||||||
|
if (the_crc != crc) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (tos_kv_set("new_version", &new_version, sizeof(ota_img_vs_t)) != KV_ERR_NONE) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void application_entry(void *arg)
|
||||||
|
{
|
||||||
|
ota_download_demo_task();
|
||||||
|
while (1) {
|
||||||
|
printf("Please reset your board to continue ota update!\r\n");
|
||||||
|
tos_task_delay(1000);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
@@ -91,3 +91,26 @@ int tos_tf_module_debug_level_set(int log_level)
|
|||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int tos_tf_module_ota_set(ota_mode_t mode, char *version)
|
||||||
|
{
|
||||||
|
if (g_tencent_firmware_module && g_tencent_firmware_module->ota_set) {
|
||||||
|
return g_tencent_firmware_module->ota_set(mode, version);
|
||||||
|
}
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int tos_tf_module_ota_read_fwinfo(ota_fw_info_t *ota_fw_info)
|
||||||
|
{
|
||||||
|
if (g_tencent_firmware_module && g_tencent_firmware_module->ota_read_fwinfo) {
|
||||||
|
return g_tencent_firmware_module->ota_read_fwinfo(ota_fw_info);
|
||||||
|
}
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
int tos_tf_module_ota_read_fwdata(uint8_t *ota_fw_data_buffer,uint16_t buf_size)
|
||||||
|
{
|
||||||
|
if (g_tencent_firmware_module && g_tencent_firmware_module->ota_read_fwdata) {
|
||||||
|
return g_tencent_firmware_module->ota_read_fwdata(ota_fw_data_buffer, buf_size);
|
||||||
|
}
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|||||||
@@ -77,6 +77,17 @@ typedef struct device_info_st {
|
|||||||
char device_serc[DEVICE_SERC_MAX_SIZE + 1];
|
char device_serc[DEVICE_SERC_MAX_SIZE + 1];
|
||||||
} device_info_t;
|
} device_info_t;
|
||||||
|
|
||||||
|
typedef enum ota_mode_en {
|
||||||
|
OTA_DISABLE,
|
||||||
|
OTA_ENABLE
|
||||||
|
} ota_mode_t;
|
||||||
|
|
||||||
|
typedef struct ota_fw_info_st {
|
||||||
|
char fw_version[10];
|
||||||
|
uint32_t fw_size;
|
||||||
|
uint8_t fw_md5[50];
|
||||||
|
} ota_fw_info_t;
|
||||||
|
|
||||||
typedef struct tencent_firmware_module_st {
|
typedef struct tencent_firmware_module_st {
|
||||||
int (*init)(void);
|
int (*init)(void);
|
||||||
|
|
||||||
@@ -97,6 +108,12 @@ typedef struct tencent_firmware_module_st {
|
|||||||
int (*mqtt_state_get)(mqtt_state_t *state);
|
int (*mqtt_state_get)(mqtt_state_t *state);
|
||||||
|
|
||||||
int (*debug_level_set)(int log_level);
|
int (*debug_level_set)(int log_level);
|
||||||
|
|
||||||
|
int (*ota_set)(ota_mode_t mode, char *version);
|
||||||
|
|
||||||
|
int (*ota_read_fwinfo)(ota_fw_info_t *ota_fw_info);
|
||||||
|
|
||||||
|
int (*ota_read_fwdata)(uint8_t *ota_fw_data_buffer,uint16_t buf_size);
|
||||||
} tencent_firmware_module_t;
|
} tencent_firmware_module_t;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -222,5 +239,40 @@ int tos_tf_module_mqtt_state_get(mqtt_state_t *state);
|
|||||||
*/
|
*/
|
||||||
int tos_tf_module_debug_level_set(int log_level);
|
int tos_tf_module_debug_level_set(int log_level);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set tencent firmware module OTA mode
|
||||||
|
*
|
||||||
|
* @attention None
|
||||||
|
*
|
||||||
|
* @param[in] mode OTA_DISABLE or OTA_ENABLE
|
||||||
|
*
|
||||||
|
* @return errcode
|
||||||
|
*/
|
||||||
|
int tos_tf_module_ota_set(ota_mode_t mode, char *version);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read fw info from tencent firmware module
|
||||||
|
*
|
||||||
|
* @attention None
|
||||||
|
*
|
||||||
|
* @param[in] ota_fw_info fw information struct
|
||||||
|
*
|
||||||
|
* @return errcode
|
||||||
|
*/
|
||||||
|
int tos_tf_module_ota_read_fwinfo(ota_fw_info_t *ota_fw_info);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read fw data from tencent firmware module
|
||||||
|
*
|
||||||
|
* @attention None
|
||||||
|
*
|
||||||
|
* @param[in] ota_fw_data_buffer fw data buffer
|
||||||
|
*
|
||||||
|
* @param[in] buf_size fw data buffer size
|
||||||
|
*
|
||||||
|
* @return errcode
|
||||||
|
*/
|
||||||
|
int tos_tf_module_ota_read_fwdata(uint8_t *ota_fw_data_buffer,uint16_t buf_size);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user