delete some code
This commit is contained in:
supowang
@@ -1,10 +1,10 @@
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#include "mcu_init.h"
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#include "cmsis_os.h"
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#define APPLICATION_TASK_STK_SIZE 4096
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k_task_t application_task;
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uint8_t application_task_stk[APPLICATION_TASK_STK_SIZE];
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extern void application_entry(void *arg);
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osThreadDef(application_entry, osPriorityNormal, 1, APPLICATION_TASK_STK_SIZE);
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__weak void application_entry(void *arg)
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{
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@@ -18,8 +18,8 @@ int main(void)
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{
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board_init();
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printf("Welcome to TencentOS tiny(%s)\r\n", TOS_VERSION);
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osKernelInitialize(); // TOS Tiny kernel initialize
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osThreadCreate(osThread(application_entry), NULL); // Create TOS Tiny task
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osKernelStart(); // Start TOS Tiny
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tos_knl_init(); // TencentOS Tiny kernel initialize
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tos_task_create(&application_task, "application_task", application_entry, NULL, 4, application_task_stk, APPLICATION_TASK_STK_SIZE, 0);
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tos_knl_start();
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}
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@@ -1,36 +0,0 @@
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###################################################################
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#automatic detection QTOP and LOCALDIR
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CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
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TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
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echo $$QTOP;\
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else\
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cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
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dir=`cd ../;pwd`; \
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if [ "$$dir" = "/" ] ; then \
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echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
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exit 1; \
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fi ; \
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cd $$dir; \
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done ; \
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pwd; \
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fi)
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QTOP ?= $(realpath ${TRYQTOP})
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ifeq ($(QTOP),)
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$(error Please run this in a tree)
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endif
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LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
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####################################################################
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TREE_LIB_ENABLE=0
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lib=
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subdirs=
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export BP=TencentOS_tiny_EVB_MX_Plus
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include ${QTOP}/qmk/generic/Make.tpl
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include ${QTOP}/qmk/generic/Make.subdirs
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@@ -1,70 +0,0 @@
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###################################################################
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#automatic detection QTOP and LOCALDIR
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CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
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TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
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echo $$QTOP;\
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else\
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cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
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dir=`cd ../;pwd`; \
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if [ "$$dir" = "/" ] ; then \
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echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
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exit 1; \
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fi ; \
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cd $$dir; \
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done ; \
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pwd; \
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fi)
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QTOP ?= $(realpath ${TRYQTOP})
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ifeq ($(QTOP),)
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$(error Please run this in a tree)
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endif
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LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
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export QTOP
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####################################################################
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export BP=TencentOS_tiny_EVB_MX_Plus
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TREE_LIB_ENABLE=1
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lib=
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subdirs =
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LSRCS += $(QTOP)/examples/farm_ai_demo/farm_ai_demo.c
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LSRCS += $(wildcard *.s)
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all::
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make -C ${QTOP}/arch BP=${BP}
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make -C ${QTOP}/board/TencentOS_tiny_EVB_MX_Plus/BSP BP=${BP}
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make -C ${QTOP}/components/connectivity/Eclipse-Paho-MQTT BP=${BP}
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make -C ${QTOP}/components/utils/JSON BP=${BP}
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make -C ${QTOP}/devices BP=${BP}
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make -C ${QTOP}/kernel BP=${BP}
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make -C ${QTOP}/net/at BP=${BP}
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make -C ${QTOP}/net/sal_module_wrapper BP=${BP}
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make -C ${QTOP}/net/socket_wrapper BP=${BP}
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make -C ${QTOP}/net/tencent_firmware_module_wrapper BP=${BP}
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make -C ${QTOP}/osal BP=${BP}
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make -C ${QTOP}/platform BP=${BP}
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#exec =
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LD_A_FILES += $(LIBDIR)/libarch.a
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LD_A_FILES += $(LIBDIR)/libkernel.a
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#LD_A_FILES += $(LIBDIR)/lib$(notdir $(CUR_DIR)).a
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LD_A_FILES += $(LIBDIR)/libcmsis_os.a
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LD_A_FILES += $(LIBDIR)/libhal.a
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LD_A_FILES += $(LIBDIR)/libvendor_bsp.a
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LD_A_FILES += $(LIBDIR)/libJSON.a
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LD_A_FILES += $(LIBDIR)/libBSP.a
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LD_A_FILES += $(LIBDIR)/libEclipse-Paho-MQTT.a
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LD_A_FILES += $(LIBDIR)/libesp8266_tencent_firmware.a
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LD_A_FILES += $(LIBDIR)/libesp8266.a
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LD_A_FILES += $(LIBDIR)/libat.a
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LD_A_FILES += $(LIBDIR)/libtencent_firmware_module_wrapper.a
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LD_A_FILES += $(LIBDIR)/libsal_module_wrapper.a
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LD_A_FILES += $(LIBDIR)/libsocket_wrapper.a
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LD_A_LISTS += -lc -lm -lnosys
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LD_L_LISTS += -specs=nosys.specs -T$(CUR_DIR)/STM32L431RCTx_FLASH.ld -Wl,-Map=$(LIBDIR)/$(notdir $(CUR_DIR)).map,--cref -Wl,--gc-sections
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include ${QTOP}/qmk/generic/Make.exec
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@@ -1,203 +0,0 @@
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/*
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******************************************************************************
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**
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** File : LinkerScript.ld
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**
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** Author : Auto-generated by Ac6 System Workbench
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**
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** Abstract : Linker script for STM32L431RCTx series
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** 256Kbytes FLASH and 64Kbytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed “as is,” without any warranty
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** of any kind.
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**
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*****************************************************************************
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** @attention
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**
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** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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** 1. Redistributions of source code must retain the above copyright notice,
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** this list of conditions and the following disclaimer.
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||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
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** this list of conditions and the following disclaimer in the documentation
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||||
** and/or other materials provided with the distribution.
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** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
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||||
**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20010000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(8);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(8);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(8);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(8);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(8);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(8);
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} >FLASH
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.ARM.extab :
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{
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. = ALIGN(8);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(8);
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} >FLASH
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.ARM : {
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. = ALIGN(8);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(8);
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} >FLASH
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.preinit_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(8);
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} >FLASH
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.init_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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} >FLASH
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.fini_array :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(8);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
|
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|
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/* Initialized data sections goes into RAM, load LMA copy after code */
|
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.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
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/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,60 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
export QTOP
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
export BP=TencentOS_tiny_EVB_MX_Plus
|
||||
|
||||
TREE_LIB_ENABLE=1
|
||||
lib=
|
||||
subdirs =
|
||||
|
||||
LSRCS += $(QTOP)/examples/hello_world/hello_world.c
|
||||
LSRCS += $(wildcard *.s)
|
||||
|
||||
all::
|
||||
make -C ${QTOP}/arch BP=${BP}
|
||||
make -C ${QTOP}/board/TencentOS_tiny_EVB_MX_Plus/BSP BP=${BP}
|
||||
make -C ${QTOP}/components/connectivity/Eclipse-Paho-MQTT BP=${BP}
|
||||
make -C ${QTOP}/devices BP=${BP}
|
||||
make -C ${QTOP}/kernel BP=${BP}
|
||||
make -C ${QTOP}/net/at BP=${BP}
|
||||
make -C ${QTOP}/net/sal_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/socket_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/tencent_firmware_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/osal BP=${BP}
|
||||
make -C ${QTOP}/platform BP=${BP}
|
||||
#exec =
|
||||
LD_A_FILES += $(LIBDIR)/libarch.a
|
||||
LD_A_FILES += $(LIBDIR)/libkernel.a
|
||||
#LD_A_FILES += $(LIBDIR)/lib$(notdir $(CUR_DIR)).a
|
||||
LD_A_FILES += $(LIBDIR)/libcmsis_os.a
|
||||
LD_A_FILES += $(LIBDIR)/libvendor_bsp.a
|
||||
LD_A_FILES += $(LIBDIR)/libBSP.a
|
||||
LD_A_LISTS += -lc -lm -lnosys
|
||||
LD_L_LISTS += -specs=nosys.specs -T$(CUR_DIR)/STM32L431RCTx_FLASH.ld -Wl,-Map=$(LIBDIR)/$(notdir $(CUR_DIR)).map,--cref -Wl,--gc-sections
|
||||
include ${QTOP}/qmk/generic/Make.exec
|
||||
|
||||
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,68 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
export QTOP
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
export BP=TencentOS_tiny_EVB_MX_Plus
|
||||
|
||||
TREE_LIB_ENABLE=1
|
||||
lib=
|
||||
subdirs =
|
||||
|
||||
LSRCS += $(QTOP)/examples/tencent_os_mqtt/mqtt_example.c
|
||||
LSRCS += $(wildcard *.s)
|
||||
|
||||
all::
|
||||
make -C ${QTOP}/arch BP=${BP}
|
||||
make -C ${QTOP}/board/TencentOS_tiny_EVB_MX_Plus/BSP BP=${BP}
|
||||
make -C ${QTOP}/components/connectivity/Eclipse-Paho-MQTT BP=${BP}
|
||||
make -C ${QTOP}/devices BP=${BP}
|
||||
make -C ${QTOP}/kernel BP=${BP}
|
||||
make -C ${QTOP}/net/at BP=${BP}
|
||||
make -C ${QTOP}/net/sal_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/socket_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/tencent_firmware_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/osal BP=${BP}
|
||||
make -C ${QTOP}/platform BP=${BP}
|
||||
#exec =
|
||||
LD_A_FILES += $(LIBDIR)/libarch.a
|
||||
LD_A_FILES += $(LIBDIR)/libkernel.a
|
||||
LD_A_FILES += $(LIBDIR)/lib$(notdir $(CUR_DIR)).a
|
||||
LD_A_FILES += $(LIBDIR)/libcmsis_os.a
|
||||
LD_A_FILES += $(LIBDIR)/libvendor_bsp.a
|
||||
LD_A_FILES += $(LIBDIR)/libhal.a
|
||||
LD_A_FILES += $(LIBDIR)/libBSP.a
|
||||
LD_A_FILES += $(LIBDIR)/libEclipse-Paho-MQTT.a
|
||||
LD_A_FILES += $(LIBDIR)/libesp8266_tencent_firmware.a
|
||||
LD_A_FILES += $(LIBDIR)/libesp8266.a
|
||||
LD_A_FILES += $(LIBDIR)/libat.a
|
||||
LD_A_FILES += $(LIBDIR)/libtencent_firmware_module_wrapper.a
|
||||
LD_A_FILES += $(LIBDIR)/libsal_module_wrapper.a
|
||||
LD_A_FILES += $(LIBDIR)/libsocket_wrapper.a
|
||||
LD_A_LISTS += -lc -lm -lnosys
|
||||
LD_L_LISTS += -specs=nosys.specs -T$(CUR_DIR)/STM32L431RCTx_FLASH.ld -Wl,-Map=$(LIBDIR)/$(notdir $(CUR_DIR)).map,--cref -Wl,--gc-sections
|
||||
include ${QTOP}/qmk/generic/Make.exec
|
||||
|
||||
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,68 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
export QTOP
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
export BP=TencentOS_tiny_EVB_MX_Plus
|
||||
|
||||
TREE_LIB_ENABLE=1
|
||||
lib=
|
||||
subdirs =
|
||||
|
||||
LSRCS += $(QTOP)/examples/udp_through_module/udp_through_module.c
|
||||
LSRCS += $(wildcard *.s)
|
||||
|
||||
all::
|
||||
make -C ${QTOP}/arch BP=${BP}
|
||||
make -C ${QTOP}/board/TencentOS_tiny_EVB_MX_Plus/BSP BP=${BP}
|
||||
make -C ${QTOP}/components/connectivity/Eclipse-Paho-MQTT BP=${BP}
|
||||
make -C ${QTOP}/devices BP=${BP}
|
||||
make -C ${QTOP}/kernel BP=${BP}
|
||||
make -C ${QTOP}/net/at BP=${BP}
|
||||
make -C ${QTOP}/net/sal_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/socket_wrapper BP=${BP}
|
||||
make -C ${QTOP}/net/tencent_firmware_module_wrapper BP=${BP}
|
||||
make -C ${QTOP}/osal BP=${BP}
|
||||
make -C ${QTOP}/platform BP=${BP}
|
||||
#exec =
|
||||
LD_A_FILES += $(LIBDIR)/libarch.a
|
||||
LD_A_FILES += $(LIBDIR)/libkernel.a
|
||||
LD_A_FILES += $(LIBDIR)/lib$(notdir $(CUR_DIR)).a
|
||||
LD_A_FILES += $(LIBDIR)/libcmsis_os.a
|
||||
LD_A_FILES += $(LIBDIR)/libvendor_bsp.a
|
||||
LD_A_FILES += $(LIBDIR)/libhal.a
|
||||
LD_A_FILES += $(LIBDIR)/libBSP.a
|
||||
LD_A_FILES += $(LIBDIR)/libEclipse-Paho-MQTT.a
|
||||
LD_A_FILES += $(LIBDIR)/libesp8266_tencent_firmware.a
|
||||
LD_A_FILES += $(LIBDIR)/libesp8266.a
|
||||
LD_A_FILES += $(LIBDIR)/libat.a
|
||||
LD_A_FILES += $(LIBDIR)/libtencent_firmware_module_wrapper.a
|
||||
LD_A_FILES += $(LIBDIR)/libsal_module_wrapper.a
|
||||
LD_A_FILES += $(LIBDIR)/libsocket_wrapper.a
|
||||
LD_A_LISTS += -lc -lm -lnosys
|
||||
LD_L_LISTS += -specs=nosys.specs -T$(CUR_DIR)/STM32L431RCTx_FLASH.ld -Wl,-Map=$(LIBDIR)/$(notdir $(CUR_DIR)).map,--cref -Wl,--gc-sections
|
||||
include ${QTOP}/qmk/generic/Make.exec
|
||||
|
||||
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,280 +0,0 @@
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = TencentOS_tiny
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -O0
|
||||
|
||||
TOP_DIR = ../../../../
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
KERNEL_SRC = \
|
||||
${wildcard $(TOP_DIR)/kernel/core/*.c}
|
||||
C_SOURCES += $(KERNEL_SRC)
|
||||
|
||||
ARCH_SRC = \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/*.c} \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/common/*.c}
|
||||
C_SOURCES += $(ARCH_SRC)
|
||||
|
||||
CMSIS_SRC = \
|
||||
${wildcard $(TOP_DIR)/osal/cmsis_os/*.c}
|
||||
C_SOURCES += $(CMSIS_SRC)
|
||||
|
||||
PLATFORM_SRC = \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c \
|
||||
$(TOP_DIR)/platform/hal/st/stm32l4xx/src/tos_hal_uart.c
|
||||
C_SOURCES += $(PLATFORM_SRC)
|
||||
|
||||
NET_SRC = \
|
||||
$(TOP_DIR)/net/at/src/tos_at.c \
|
||||
$(TOP_DIR)/net/sal_module_wrapper/sal_module_wrapper.c \
|
||||
$(TOP_DIR)/devices/esp8266/esp8266.c
|
||||
C_SOURCES += $(NET_SRC)
|
||||
|
||||
BSP_SRC = \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/gpio.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/main.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_hal_msp.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_it_module.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/usart.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/adc.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/dac.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/i2c.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/spi.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/system_stm32l4xx.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11/DHT11_BUS.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED/oled.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1/E53_IA1.c
|
||||
C_SOURCES += $(BSP_SRC)
|
||||
|
||||
COMPONENTS_SRC = \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/src/mqtt_wrapper.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/src/transport_wrapper.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTConnectClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTConnectServer.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTDeserializePublish.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTFormat.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTPacket.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSerializePublish.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSubscribeClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSubscribeServer.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTUnsubscribeClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTUnsubscribeServer.c \
|
||||
$(TOP_DIR)/components/utils/JSON/src/cJSON.c
|
||||
C_SOURCES += $(COMPONENTS_SRC)
|
||||
|
||||
EXAMPLES_SRC = \
|
||||
$(TOP_DIR)/examples/farm_ai_demo/farm_ai_demo.c
|
||||
C_SOURCES += $(EXAMPLES_SRC)
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
startup_stm32l431xx.s \
|
||||
|
||||
ASM_SOURCES_S = \
|
||||
$(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/port_s.S
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arm-none-eabi-
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
ifdef GCC_PATH
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size
|
||||
else
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
CPU = -mcpu=cortex-m4
|
||||
|
||||
# fpu
|
||||
FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# float-abi
|
||||
FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# mcu
|
||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines
|
||||
C_DEFS = \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES =
|
||||
|
||||
# C includes
|
||||
KERNEL_INC = \
|
||||
-I $(TOP_DIR)/kernel/core/include \
|
||||
-I $(TOP_DIR)/kernel/pm/include \
|
||||
-I $(TOP_DIR)/kernel/hal/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/common/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc
|
||||
C_INCLUDES += $(KERNEL_INC)
|
||||
|
||||
CMSIS_INC = \
|
||||
-I $(TOP_DIR)/osal/cmsis_os
|
||||
C_INCLUDES += $(CMSIS_INC)
|
||||
|
||||
PLATFORM_INC = \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc/Legacy \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Device/ST/STM32L4xx/Include \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Include
|
||||
C_INCLUDES += $(PLATFORM_INC)
|
||||
|
||||
BOARD_INC = \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/TOS-CONFIG \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/BH1750 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED
|
||||
C_INCLUDES += $(BOARD_INC)
|
||||
|
||||
NET_INC = \
|
||||
-I $(TOP_DIR)/net/at/include \
|
||||
-I $(TOP_DIR)/net/sal_module_wrapper \
|
||||
-I $(TOP_DIR)/devices/esp8266
|
||||
C_INCLUDES += $(NET_INC)
|
||||
|
||||
COMPONENTS_INC = \
|
||||
-I $(TOP_DIR)/components/utils/JSON/include \
|
||||
-I $(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/include \
|
||||
-I $(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/include
|
||||
C_INCLUDES += $(COMPONENTS_INC)
|
||||
|
||||
EXAMPLES_INC = \
|
||||
-I $(TOP_DIR)/examples/farm_ai_demo
|
||||
C_INCLUDES += $(EXAMPLES_INC)
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -g -gdwarf-2
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = STM32L431RCTx_FLASH.ld
|
||||
|
||||
# libraries
|
||||
LIBS = -lc -lm -lnosys
|
||||
LIBDIR =
|
||||
LDFLAGS = $(MCU) -u _printf_float -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) \
|
||||
-Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
|
||||
vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,278 +0,0 @@
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = TencentOS_tiny
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -O0
|
||||
|
||||
TOP_DIR = ../../../../
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
KERNEL_SRC = \
|
||||
${wildcard $(TOP_DIR)/kernel/core/*.c}
|
||||
C_SOURCES += $(KERNEL_SRC)
|
||||
|
||||
ARCH_SRC = \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/*.c} \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/common/*.c}
|
||||
C_SOURCES += $(ARCH_SRC)
|
||||
|
||||
CMSIS_SRC = \
|
||||
${wildcard $(TOP_DIR)/osal/cmsis_os/*.c}
|
||||
C_SOURCES += $(CMSIS_SRC)
|
||||
|
||||
PLATFORM_SRC = \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c \
|
||||
$(TOP_DIR)/platform/hal/st/stm32l4xx/src/tos_hal_uart.c
|
||||
C_SOURCES += $(PLATFORM_SRC)
|
||||
|
||||
NET_SRC = \
|
||||
$(TOP_DIR)/net/at/src/tos_at.c \
|
||||
$(TOP_DIR)/net/sal_module_wrapper/sal_module_wrapper.c \
|
||||
$(TOP_DIR)/devices/esp8266/esp8266.c
|
||||
C_SOURCES += $(NET_SRC)
|
||||
|
||||
BSP_SRC = \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/gpio.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/main.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_hal_msp.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_it_module.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/usart.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/adc.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/dac.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/i2c.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/spi.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/system_stm32l4xx.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11/DHT11_BUS.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED/oled.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1/E53_IA1.c
|
||||
C_SOURCES += $(BSP_SRC)
|
||||
|
||||
COMPONENTS_SRC = \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/src/mqtt_wrapper.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/src/transport_wrapper.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTConnectClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTConnectServer.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTDeserializePublish.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTFormat.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTPacket.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSerializePublish.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSubscribeClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTSubscribeServer.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTUnsubscribeClient.c \
|
||||
$(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/src/MQTTUnsubscribeServer.c
|
||||
C_SOURCES += $(COMPONENTS_SRC)
|
||||
|
||||
EXAMPLES_SRC = \
|
||||
$(TOP_DIR)/examples/tencent_os_mqtt/mqtt_example.c
|
||||
C_SOURCES += $(EXAMPLES_SRC)
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
startup_stm32l431xx.s \
|
||||
|
||||
ASM_SOURCES_S = \
|
||||
$(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/port_s.S
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arm-none-eabi-
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
ifdef GCC_PATH
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size
|
||||
else
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
CPU = -mcpu=cortex-m4
|
||||
|
||||
# fpu
|
||||
FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# float-abi
|
||||
FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# mcu
|
||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines
|
||||
C_DEFS = \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES =
|
||||
|
||||
# C includes
|
||||
KERNEL_INC = \
|
||||
-I $(TOP_DIR)/kernel/core/include \
|
||||
-I $(TOP_DIR)/kernel/pm/include \
|
||||
-I $(TOP_DIR)/kernel/hal/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/common/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc
|
||||
C_INCLUDES += $(KERNEL_INC)
|
||||
|
||||
CMSIS_INC = \
|
||||
-I $(TOP_DIR)/osal/cmsis_os
|
||||
C_INCLUDES += $(CMSIS_INC)
|
||||
|
||||
PLATFORM_INC = \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc/Legacy \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Device/ST/STM32L4xx/Include \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Include
|
||||
C_INCLUDES += $(PLATFORM_INC)
|
||||
|
||||
BOARD_INC = \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/TOS-CONFIG \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/BH1750 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED
|
||||
C_INCLUDES += $(BOARD_INC)
|
||||
|
||||
NET_INC = \
|
||||
-I $(TOP_DIR)/net/at/include \
|
||||
-I $(TOP_DIR)/net/sal_module_wrapper \
|
||||
-I $(TOP_DIR)/devices/esp8266
|
||||
C_INCLUDES += $(NET_INC)
|
||||
|
||||
COMPONENTS_INC = \
|
||||
-I $(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/wrapper/include \
|
||||
-I $(TOP_DIR)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/include
|
||||
C_INCLUDES += $(COMPONENTS_INC)
|
||||
|
||||
EXAMPLES_INC = \
|
||||
-I $(TOP_DIR)/examples/tencent_os_mqtt
|
||||
C_INCLUDES += $(EXAMPLES_INC)
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -g -gdwarf-2
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = STM32L431RCTx_FLASH.ld
|
||||
|
||||
# libraries
|
||||
LIBS = -lc -lm -lnosys
|
||||
LIBDIR =
|
||||
LDFLAGS = $(MCU) -u _printf_float -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) \
|
||||
-Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
|
||||
vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,263 +0,0 @@
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = TencentOS_tiny
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -O0
|
||||
|
||||
TOP_DIR = ../../../../
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
KERNEL_SRC = \
|
||||
${wildcard $(TOP_DIR)/kernel/core/*.c}
|
||||
C_SOURCES += $(KERNEL_SRC)
|
||||
|
||||
ARCH_SRC = \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/*.c} \
|
||||
${wildcard $(TOP_DIR)/arch/arm/arm-v7m/common/*.c}
|
||||
C_SOURCES += $(ARCH_SRC)
|
||||
|
||||
CMSIS_SRC = \
|
||||
${wildcard $(TOP_DIR)/osal/cmsis_os/*.c}
|
||||
C_SOURCES += $(CMSIS_SRC)
|
||||
|
||||
PLATFORM_SRC = \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac_ex.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c \
|
||||
$(TOP_DIR)/platform/hal/st/stm32l4xx/src/tos_hal_uart.c
|
||||
C_SOURCES += $(PLATFORM_SRC)
|
||||
|
||||
NET_SRC = \
|
||||
$(TOP_DIR)/net/at/src/tos_at.c \
|
||||
$(TOP_DIR)/net/sal_module_wrapper/sal_module_wrapper.c \
|
||||
$(TOP_DIR)/devices/esp8266/esp8266.c
|
||||
C_SOURCES += $(NET_SRC)
|
||||
|
||||
BSP_SRC = \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/gpio.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/main.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_hal_msp.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_it_module.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/usart.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/adc.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/dac.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/i2c.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/spi.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/system_stm32l4xx.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11/DHT11_BUS.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED/oled.c \
|
||||
$(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1/E53_IA1.c
|
||||
C_SOURCES += $(BSP_SRC)
|
||||
|
||||
COMPONENTS_SRC =
|
||||
C_SOURCES += $(COMPONENTS_SRC)
|
||||
|
||||
EXAMPLES_SRC = \
|
||||
$(TOP_DIR)/examples/udp_through_module/udp_through_module.c
|
||||
C_SOURCES += $(EXAMPLES_SRC)
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
startup_stm32l431xx.s \
|
||||
|
||||
ASM_SOURCES_S = \
|
||||
$(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc/port_s.S
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arm-none-eabi-
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
ifdef GCC_PATH
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size
|
||||
else
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
CPU = -mcpu=cortex-m4
|
||||
|
||||
# fpu
|
||||
FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# float-abi
|
||||
FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# mcu
|
||||
MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines
|
||||
C_DEFS = \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx \
|
||||
-DUSE_HAL_DRIVER \
|
||||
-DSTM32L431xx
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES =
|
||||
|
||||
# C includes
|
||||
KERNEL_INC = \
|
||||
-I $(TOP_DIR)/kernel/core/include \
|
||||
-I $(TOP_DIR)/kernel/pm/include \
|
||||
-I $(TOP_DIR)/kernel/hal/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/common/include \
|
||||
-I $(TOP_DIR)/arch/arm/arm-v7m/cortex-m4/gcc
|
||||
C_INCLUDES += $(KERNEL_INC)
|
||||
|
||||
CMSIS_INC = \
|
||||
-I $(TOP_DIR)/osal/cmsis_os
|
||||
C_INCLUDES += $(CMSIS_INC)
|
||||
|
||||
PLATFORM_INC = \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/STM32L4xx_HAL_Driver/Inc/Legacy \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Device/ST/STM32L4xx/Include \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/st/CMSIS/Include
|
||||
C_INCLUDES += $(PLATFORM_INC)
|
||||
|
||||
BOARD_INC = \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/TOS-CONFIG \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/DHT11 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/BH1750 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/E53_IA1 \
|
||||
-I $(TOP_DIR)/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/OLED
|
||||
C_INCLUDES += $(BOARD_INC)
|
||||
|
||||
NET_INC = \
|
||||
-I $(TOP_DIR)/net/at/include \
|
||||
-I $(TOP_DIR)/net/sal_module_wrapper \
|
||||
-I $(TOP_DIR)/devices/esp8266
|
||||
C_INCLUDES += $(NET_INC)
|
||||
|
||||
COMPONENTS_INC =
|
||||
C_INCLUDES += $(COMPONENTS_INC)
|
||||
|
||||
EXAMPLES_INC =
|
||||
C_INCLUDES += $(EXAMPLES_INC)
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CFLAGS += -g -gdwarf-2
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = STM32L431RCTx_FLASH.ld
|
||||
|
||||
# libraries
|
||||
LIBS = -lc -lm -lnosys
|
||||
LIBDIR =
|
||||
LDFLAGS = $(MCU) -u _printf_float -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) \
|
||||
-Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
|
||||
vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
@@ -1,203 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by Ac6 System Workbench
|
||||
**
|
||||
** Abstract : Linker script for STM32L431RCTx series
|
||||
** 256Kbytes FLASH and 64Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© COPYRIGHT(c) 2014 Ac6</center></h2>
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
** 1. Redistributions of source code must retain the above copyright notice,
|
||||
** this list of conditions and the following disclaimer.
|
||||
** 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
** this list of conditions and the following disclaimer in the documentation
|
||||
** and/or other materials provided with the distribution.
|
||||
** 3. Neither the name of Ac6 nor the names of its contributors
|
||||
** may be used to endorse or promote products derived from this software
|
||||
** without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20010000; /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
|
||||
|
||||
@@ -1,474 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l431xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L431xx devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address,
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* Atollic update: set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_PVM_IRQHandler
|
||||
.word TAMP_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word CAN1_TX_IRQHandler
|
||||
.word CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_TIM15_IRQHandler
|
||||
.word TIM1_UP_TIM16_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SDMMC1_IRQHandler
|
||||
.word 0
|
||||
.word SPI3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word COMP_IRQHandler
|
||||
.word LPTIM1_IRQHandler
|
||||
.word LPTIM2_IRQHandler
|
||||
.word 0
|
||||
.word DMA2_Channel6_IRQHandler
|
||||
.word DMA2_Channel7_IRQHandler
|
||||
.word LPUART1_IRQHandler
|
||||
.word QUADSPI_IRQHandler
|
||||
.word I2C3_EV_IRQHandler
|
||||
.word I2C3_ER_IRQHandler
|
||||
.word SAI1_IRQHandler
|
||||
.word 0
|
||||
.word SWPMI1_IRQHandler
|
||||
.word TSC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word RNG_IRQHandler
|
||||
.word FPU_IRQHandler
|
||||
.word CRS_IRQHandler
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM15_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM16_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,877 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
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||||
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||||
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||||
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||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_stm32l4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Hardware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DHT11_BUS.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>oled.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\event_driven\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>esp8266_evtdrv</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>esp8266_evtdrv.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\event_driven_at_module\esp8266_evtdrv\esp8266_evtdrv.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>at_evtdrv</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_at_evtdrv.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\event_driven_at_module\at_evtdrv\src\tos_at_evtdrv.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_at_utils_evtdrv.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\event_driven_at_module\at_evtdrv\src\tos_at_utils_evtdrv.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>hal</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>sal_module_wrapper</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>sal_module_wrapper.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>pwrmgr</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_pm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\pm\tos_pm.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x1000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,842 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rtc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_stm32l4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Hardware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DHT11_BUS.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>oled.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\event_driven\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>pwrmgr</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_pm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\pm\tos_pm.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x1000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,922 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4103</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx</Define>
|
||||
<Undefine></Undefine>
|
||||
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</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port_c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>devices</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>bc35_28_95.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\devices\bc35_28_95\bc35_28_95.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>esp8266.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\devices\esp8266\esp8266.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>hal</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>at</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_at.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\net\at\src\tos_at.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>sal_module_wrapper.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>mqtt</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mqtt_wrapper.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\wrapper\src\mqtt_wrapper.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>transport_wrapper.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\wrapper\src\transport_wrapper.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTConnectClient.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTConnectClient.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTConnectServer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTConnectServer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTDeserializePublish.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTDeserializePublish.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTFormat.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTFormat.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTPacket.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTPacket.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTSerializePublish.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTSerializePublish.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTSubscribeClient.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTSubscribeClient.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTSubscribeServer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTSubscribeServer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTUnsubscribeClient.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTUnsubscribeClient.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>MQTTUnsubscribeServer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Eclipse-Paho-MQTT\3rdparty\src\MQTTUnsubscribeServer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>components</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cJSON.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\utils\JSON\src\cJSON.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="Cortex-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
@@ -145,7 +145,7 @@
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U303030303030303030303031 -O10446 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256.FLM -FS08000000 -FL040000 -FP0($$Device:STM32L431RCTx$CMSIS\Flash\STM32L4xx_256.FLM)</Name>
|
||||
<Name>-U303030303030303030303031 -O10446 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256.FLM -FS08000000 -FL040000 -FP0($$Device:STM32L431RCTx$CMSIS\Flash\STM32L4xx_256.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint>
|
||||
@@ -297,7 +297,7 @@
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>1</EnableFlashSeq>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
@@ -834,7 +834,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<GroupName>tos/kernel</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1142,7 +1142,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<GroupName>tos/arch</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1186,7 +1186,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<GroupName>tos/config</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1194,26 +1194,6 @@
|
||||
<File>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>69</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\osal\cmsis_os\cmsis_os.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cmsis_os.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>70</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
|
||||
@@ -16,8 +16,8 @@
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.3.0</PackID>
|
||||
<PackURL>https://www.keil.com/pack/</PackURL>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.4.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
@@ -134,11 +134,11 @@
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
<DriverSelection>4101</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
@@ -339,7 +339,7 @@
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\helloworld</IncludePath>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\helloworld</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
@@ -611,7 +611,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<GroupName>tos/kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_binary_heap.c</FileName>
|
||||
@@ -741,7 +741,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<GroupName>tos/arch</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
@@ -761,17 +761,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<GroupName>tos/config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,882 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx,NDEBUG</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\include;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp;..\..\BSP\Hardware\Modbus_Port</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Application/MDK-ARM</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_stm32l431xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>startup_stm32l431xx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Application/User</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mcu_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_msp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_it_modbus.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_it_modbus.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\tim.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>examples</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>modbus.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\modbus\modbus.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_stm32l4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Hardware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DHT11_BUS.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>oled.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_binary_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_char_fifo.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_countdownlatch.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_event.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_global.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmblk.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mutex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mutex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_pend.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_ring_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_robin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_robin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sched.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sched.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sys.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sys.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_task.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_task.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_tick.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_tick.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_time.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port_c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>modbus_src</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mbascii.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfunccoils.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncdiag.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncdisc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncholding.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncinput.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncother.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbutils.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbcrc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbrtu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbtcp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mb.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>modbus_port</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>portevent.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\portevent.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>portserial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\portserial.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>porttimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\porttimer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,875 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060061::V5.06 update 1 (build 61)::ARMCC</pCCUsed>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx,NDEBUG</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\include;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu;..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp;..\..\BSP\Hardware\Modbus_Port</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Application/MDK-ARM</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_stm32l431xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>startup_stm32l431xx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Application/User</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mcu_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_msp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_it_modbus.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_it_modbus.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\tim.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>examples</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>modbus.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\modbus_te_qcloud_demo\modbus.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_stm32l4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Hardware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DHT11_BUS.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>oled.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_binary_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_char_fifo.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_countdownlatch.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_event.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_global.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmblk.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mutex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mutex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_pend.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_ring_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_robin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_robin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sched.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sched.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sys.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sys.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_task.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_task.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_tick.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_tick.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_time.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port_c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>modbus_src</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mbascii.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\ascii\mbascii.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfunccoils.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfunccoils.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncdiag.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdiag.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncdisc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncdisc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncholding.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncholding.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncinput.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncinput.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbfuncother.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbfuncother.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbutils.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\functions\mbutils.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbcrc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbcrc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbrtu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\rtu\mbrtu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mbtcp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\tcp\mbtcp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mb.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\connectivity\Modbus\3rdparty\freemodbus-v1.6\modbus\mb.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>modbus_port</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>portevent.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\portevent.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>portserial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\portserial.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>porttimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\Modbus_Port\porttimer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,404 +0,0 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
@@ -287,7 +287,7 @@
|
||||
|
||||
<Group>
|
||||
<GroupName>Application/User</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
@@ -774,7 +774,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<GroupName>tos/kernel</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1070,7 +1070,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<GroupName>tos/arch</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1114,7 +1114,7 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<GroupName>tos/config</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
@@ -1122,26 +1122,6 @@
|
||||
<File>
|
||||
<GroupNumber>8</GroupNumber>
|
||||
<FileNumber>67</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\..\osal\cmsis_os\cmsis_os.c</PathWithFileName>
|
||||
<FilenameWithoutPath>cmsis_os.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>68</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1154,14 +1134,14 @@
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>test</GroupName>
|
||||
<GroupName>tos/test</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>69</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>68</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1172,8 +1152,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>70</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>69</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1184,8 +1164,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>71</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>70</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1196,8 +1176,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>72</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>71</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1208,8 +1188,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>73</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>72</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1220,8 +1200,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>74</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>73</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1232,8 +1212,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>75</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>74</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1244,8 +1224,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>76</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>75</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1256,8 +1236,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>77</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>76</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1268,8 +1248,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>78</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>77</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1280,8 +1260,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>79</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>78</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1292,8 +1272,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>80</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>79</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1304,8 +1284,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>81</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>80</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1316,8 +1296,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>82</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>81</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1328,8 +1308,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>83</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>82</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1340,8 +1320,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>84</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>83</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1352,8 +1332,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>85</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>84</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
@@ -1364,8 +1344,8 @@
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>10</GroupNumber>
|
||||
<FileNumber>86</FileNumber>
|
||||
<GroupNumber>9</GroupNumber>
|
||||
<FileNumber>85</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
|
||||
@@ -16,8 +16,8 @@
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.3.0</PackID>
|
||||
<PackURL>https://www.keil.com/pack/</PackURL>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.4.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
@@ -339,7 +339,7 @@
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER,USE_ESP8266</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\helloworld;..\..\..\..\test\include</IncludePath>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\test\include</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
@@ -601,7 +601,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<GroupName>tos/kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_mmblk.c</FileName>
|
||||
@@ -726,7 +726,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<GroupName>tos/arch</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
@@ -746,17 +746,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<GroupName>tos/config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
@@ -766,7 +756,7 @@
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>test</GroupName>
|
||||
<GroupName>tos/test</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>suit_event.c</FileName>
|
||||
|
||||
@@ -1,32 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
@@ -1,663 +0,0 @@
|
||||
#include "bc26.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include "stdio.h"
|
||||
#include "stdbool.h"
|
||||
#include "ctype.h"
|
||||
|
||||
typedef struct ip_addr_st {
|
||||
uint8_t seg1;
|
||||
uint8_t seg2;
|
||||
uint8_t seg3;
|
||||
uint8_t seg4;
|
||||
}ip_addr_t;
|
||||
|
||||
static ip_addr_t domain_parser_addr={0};
|
||||
|
||||
static int bc26_reset(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QRST=1\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc26_psm_lock(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+SM=LOCK\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_open_cfun(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+CFUN=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_open_err_code(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CMEE=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_check_sim(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CIMI\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_get_net(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CGATT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi == 99) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc26_set_band(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QBAND=1,8\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc26_band_check(void)
|
||||
{
|
||||
int band;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QBAND?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+QBAND:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+QBAND:%d", &band);
|
||||
if (band != 8) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc26_init(void)
|
||||
{
|
||||
printf("Init BC26...\n" );
|
||||
|
||||
if (bc26_reset() != 0) {
|
||||
printf("bc26 reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
tos_stopwatch_delay_ms(3000);
|
||||
|
||||
if (bc26_psm_lock() != 0) {
|
||||
printf("bc26 psm lock FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_open_cfun() != 0) {
|
||||
printf("bc26 open cfun FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_echo_close() != 0) {
|
||||
printf("echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_open_err_code() != 0) {
|
||||
printf("bc26 open err code FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_check_sim() != 0) {
|
||||
printf("bc26 check sim FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_get_net() != 0) {
|
||||
printf("bc26 get net FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_set_band() != 0) {
|
||||
printf("set band FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_band_check() != 0) {
|
||||
printf("check band FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (bc26_signal_quality_check() != 0) {
|
||||
printf("check csq FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
printf("Init BC26 done\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc26_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id, send_port = 0,try = 0, is_connected = 0;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32],*str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+QSOC=1,1,1\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
str = strstr(echo.buffer, "+QSOC=");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+QSOC=%d", &id);
|
||||
|
||||
printf("get socket id is %d\r\n",id);
|
||||
id = tos_at_channel_alloc_id(id, ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(port, "%d", &send_port);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 8000, "AT+QSOCON=%d,%d,\"%s\"\r\n", id, send_port,ip);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
is_connected = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
continue;
|
||||
}
|
||||
|
||||
if (!is_connected) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
static char __num2hex(uint8_t num)
|
||||
{
|
||||
if (num <= 0x9) {
|
||||
return num + '0';
|
||||
}
|
||||
|
||||
if ((0xA <= num) && (num <= 0xF)) {
|
||||
return num - 0xA + 'A';
|
||||
}
|
||||
|
||||
return (char)-1;
|
||||
}
|
||||
|
||||
static void __hex2str(uint8_t *in, char *out, int len)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i) {
|
||||
out[i * 2] = __num2hex(in[i] >> 4);
|
||||
out[i * 2 + 1] = __num2hex(in[i] & 0x0F);
|
||||
}
|
||||
out[2 * len] = '\0';
|
||||
}
|
||||
|
||||
|
||||
static int bc26_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
char *str_buf = NULL;
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str_buf = tos_mmheap_calloc(2 * len + 1, sizeof(char));
|
||||
if (!str_buf) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
__hex2str((uint8_t *)buf, str_buf, len);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+QSOSEND=%d,%d,%s\r\n",
|
||||
id, len, str_buf);
|
||||
|
||||
tos_mmheap_free(str_buf);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
static int bc26_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int bc26_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return bc26_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
k_sem_t domain_parser_sem;
|
||||
|
||||
static int bc26_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[128];
|
||||
|
||||
tos_sem_create_max(&domain_parser_sem, 0, 1);
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+QIDNSGIP=1,\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_sem_pend(&domain_parser_sem, TOS_TIME_FOREVER);
|
||||
|
||||
/*
|
||||
+QIURC: "dnsgip",0,1,0
|
||||
|
||||
+QIURC: "dnsgip","xxx.xxx.xxx"
|
||||
*/
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", domain_parser_addr.seg1, domain_parser_addr.seg2, domain_parser_addr.seg3, domain_parser_addr.seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc26_close(int id)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+QSODIS=%d",id);
|
||||
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+QSOCL=%d",id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
__STATIC__ uint8_t __ascii2hex(char in) {
|
||||
if (('0' <= in) && (in <= '9')) {
|
||||
return in - '0';
|
||||
}
|
||||
if (('A' <= in) && (in <= 'F')) {
|
||||
return in - 'A' + 10;
|
||||
}
|
||||
if (('a' <= in) && (in <= 'f')) {
|
||||
return in - 'a' + 10;
|
||||
}
|
||||
return (uint8_t)-1;
|
||||
}
|
||||
|
||||
__STATIC__ void __asciistr2hex(char *in, uint8_t *out, int len) {
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; i += 2) {
|
||||
out[i / 2] = (__ascii2hex(in[i]) << 4) + __ascii2hex(in[i + 1]);
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t incoming_data_buffer[1024];
|
||||
__STATIC__ char ascii_stream[1024];
|
||||
__STATIC__ uint8_t hex_stream[512];
|
||||
|
||||
__STATIC__ void bc26_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0, read_len, i = 0, ds_i = 0;
|
||||
int socket = 0, ip1 = 0, ip2 = 0, ip3 = 0, ip4 = 0, port = 0, length = 0, remaining_length = 0;
|
||||
|
||||
/*
|
||||
+QSONMI=0,4\r\n
|
||||
0: socket
|
||||
4: length
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\r') {
|
||||
continue;
|
||||
}
|
||||
if (data == '\n') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (data_len > sizeof(incoming_data_buffer)) {
|
||||
data_len = sizeof(incoming_data_buffer);
|
||||
}
|
||||
|
||||
// tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(NULL, 0, "AT+QSORF=%d,%d\r\n", channel_id, data_len);
|
||||
|
||||
// wait for uart buffer to be filled
|
||||
/*
|
||||
ATTENTION:
|
||||
we cannot use tos_at_cmd_exec(NULL, timeout) to delay, because we are in at framework's parser
|
||||
task now(current function is a callback called by parser task), delay in tos_at_cmd_exec is
|
||||
tos_task_delay, this may cause a task switch, data receiving may be interrupted.
|
||||
so we must tos_at_cmd_exec(NULL, 0), and do the delay by tos_stopwatch_delay_ms.
|
||||
*/
|
||||
tos_stopwatch_delay_ms(1000);
|
||||
|
||||
/*
|
||||
1,xxx.yyy.zzz.www,8000,3,010203,0\r\n
|
||||
1: socket
|
||||
xxx.yyy.zzz.www: remote ip
|
||||
8000: remote port
|
||||
3: length
|
||||
010203: data
|
||||
0: remaining length
|
||||
*/
|
||||
|
||||
// skip the leading \r\n
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
if (data != '\r') {
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
if (data != '\n') {
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
read_len = tos_at_uart_readline(incoming_data_buffer, sizeof(incoming_data_buffer));
|
||||
|
||||
for (i = 0; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == ',') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
socket = socket * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == '.') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
ip1 = ip1 * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == '.') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
ip2 = ip2 * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == '.') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
ip3 = ip3 * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == ',') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
ip4 = ip4 * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == ',') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
port = port * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == ',') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
length = length * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
if (length > sizeof(ascii_stream)) {
|
||||
return;
|
||||
}
|
||||
|
||||
for (ds_i = 0; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == ',') {
|
||||
++i;
|
||||
break;
|
||||
}
|
||||
ascii_stream[ds_i++] = incoming_data_buffer[i];
|
||||
}
|
||||
ascii_stream[ds_i] = '\0';
|
||||
|
||||
for (; i < read_len; ++i) {
|
||||
if (incoming_data_buffer[i] == '\r') {
|
||||
break;
|
||||
}
|
||||
remaining_length = remaining_length * 10 + (incoming_data_buffer[i] - '0');
|
||||
}
|
||||
|
||||
__asciistr2hex(ascii_stream, hex_stream, length * 2);
|
||||
tos_at_channel_write(channel_id, hex_stream, length);
|
||||
}
|
||||
|
||||
__STATIC__ void bc26_demoin_parser_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '0') {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\"') {
|
||||
/* start parser domain */
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg1 = domain_parser_addr.seg1 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg2 = domain_parser_addr.seg2 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg3 = domain_parser_addr.seg3 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '\"') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg4 = domain_parser_addr.seg4 *10 + (data-'0');
|
||||
}
|
||||
tos_sem_post(&domain_parser_sem);
|
||||
}
|
||||
return;
|
||||
|
||||
}
|
||||
|
||||
at_event_t bc26_at_event[] = {
|
||||
{ "+QSONMI=", bc26_incoming_data_process },
|
||||
{ "+QIURC: \"dnsgip\",", bc26_demoin_parser_data_process}
|
||||
};
|
||||
|
||||
sal_module_t nb_iot_module_bc26 = {
|
||||
.init = bc26_init,
|
||||
.connect = bc26_connect,
|
||||
.send = bc26_send,
|
||||
.recv_timeout = bc26_recv_timeout,
|
||||
.recv = bc26_recv,
|
||||
.close = bc26_close,
|
||||
.parse_domain = bc26_parse_domain,
|
||||
};
|
||||
|
||||
|
||||
int bc26_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, bc26_at_event,
|
||||
sizeof(bc26_at_event) / sizeof(bc26_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_stopwatch_delay_ms(1000);
|
||||
|
||||
if (tos_sal_module_register(&nb_iot_module_bc26) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,25 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __BC26_H__
|
||||
#define __BC26_H__
|
||||
|
||||
#include "tos_at.h"
|
||||
|
||||
int bc26_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __BC26_H__ */
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,428 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#include "bc35_28_95_lwm2m.h"
|
||||
#include "tos_k.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include "stdio.h"
|
||||
#include "stdbool.h"
|
||||
#include "ctype.h"
|
||||
|
||||
static char __num2hex(uint8_t num)
|
||||
{
|
||||
if (num <= 0x9) {
|
||||
return num + '0';
|
||||
}
|
||||
|
||||
if ((0xA <= num) && (num <= 0xF)) {
|
||||
return num - 0xA + 'A';
|
||||
}
|
||||
|
||||
return (char)-1;
|
||||
}
|
||||
|
||||
void __hex2str(uint8_t *in, char *out, int len)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i) {
|
||||
out[i * 2] = __num2hex(in[i] >> 4);
|
||||
out[i * 2 + 1] = __num2hex(in[i] & 0x0F);
|
||||
}
|
||||
out[2 * len] = '\0';
|
||||
}
|
||||
|
||||
static int bc35_28_95_reset(void){
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "Neul");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 6000, "AT+NRB\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
printf("wait for bcxx reboot!\n");
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_check_cfun(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CFUN:1");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_cfun_set(char mode)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
if(mode){
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN=1\r\n");
|
||||
}
|
||||
else{
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN=0\r\n");
|
||||
}
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_net_set(char mode)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
if(mode){
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGATT=1\r\n");
|
||||
}
|
||||
else{
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGATT=0\r\n");
|
||||
}
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_check_net(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CGATT:1");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGATT?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi == 99) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc35_28_95_nband_set(char band){
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NBAND=%d\r\n",band);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
static int bc35_28_95_auto_report(char report){
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NNMI=%d\r\n",report);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int bc35_28_95_autoconnect_config(char mode)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
if(mode){
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NCONFIG=AUTOCONNECT,TRUE\r\n");
|
||||
}
|
||||
else{
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NCONFIG=AUTOCONNECT,FALSE\r\n");
|
||||
}
|
||||
if(echo.status == AT_ECHO_STATUS_OK){
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int bc35_28_95_print_IMEI(void) {
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGSN=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
|
||||
}
|
||||
static int bc35_28_95_print_CIMI(void) {
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CIMI\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
|
||||
}
|
||||
static int bc35_28_95_print_NBAND(void) {
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NBAND=?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
|
||||
}
|
||||
|
||||
static int bc35_28_95_lwm2m_init(void)
|
||||
{
|
||||
printf("Init BC35_28_95 ...wait reset!\n" );
|
||||
tos_stopwatch_delay_ms(5000);
|
||||
if (bc35_28_95_echo_close() != 0) {
|
||||
printf("echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
if(bc35_28_95_autoconnect_config(0)!=0){
|
||||
printf("autoconnect config FAILED\n");
|
||||
return -1;
|
||||
};
|
||||
if (bc35_28_95_cfun_set(0) != 0) {
|
||||
printf("close_cfun FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
if(bc35_28_95_nband_set(5)!=0){
|
||||
printf("nband_set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init bc35_28_95 Done\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bc35_28_95_lwm2m_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id, try = 0, is_connected = 0;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+NCDP=%s,%s\r\n,",ip,port);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(bc35_28_95_reset()!=0){
|
||||
printf("reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
tos_task_delay(1000);
|
||||
bc35_28_95_check_cfun();
|
||||
bc35_28_95_cfun_set(1);
|
||||
bc35_28_95_net_set(1);
|
||||
bc35_28_95_autoconnect_config(1);
|
||||
bc35_28_95_auto_report(1);
|
||||
bc35_28_95_print_IMEI();
|
||||
bc35_28_95_print_CIMI();
|
||||
bc35_28_95_print_NBAND();
|
||||
if (bc35_28_95_signal_quality_check() != 0) {
|
||||
printf("check csq FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
while (try++ < 10) {
|
||||
if (bc35_28_95_check_net()==0){
|
||||
is_connected = 1;
|
||||
break;
|
||||
}
|
||||
tos_task_delay(1000);
|
||||
continue;
|
||||
}
|
||||
if(is_connected){
|
||||
id=0;
|
||||
sscanf(echo.buffer, "%d", &id);
|
||||
id = tos_at_channel_alloc_id(id, ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
else{
|
||||
return -1;
|
||||
}
|
||||
return id;
|
||||
}
|
||||
|
||||
static int bc35_28_95_lwm2m_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
char *str_buf = NULL;
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
str_buf = tos_mmheap_calloc(2 * len + 1, sizeof(char));
|
||||
if (!str_buf) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
__hex2str((uint8_t *)buf, str_buf, len);
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+NMGS=%d,%s\r\n",
|
||||
len, str_buf);
|
||||
tos_mmheap_free(str_buf);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
tos_at_global_lock_post();
|
||||
return len;
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t incoming_data_buffer[1024];
|
||||
|
||||
__STATIC__ void bc35_28_95_lwm2m_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0;
|
||||
|
||||
/*
|
||||
+NNMI:2,aabb\r\n
|
||||
2: Length
|
||||
aabb: data
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
|
||||
if (data_len > sizeof(incoming_data_buffer)/2) {
|
||||
data_len = sizeof(incoming_data_buffer)/2;
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(incoming_data_buffer, data_len*2) != data_len*2) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_at_channel_write(channel_id, incoming_data_buffer, data_len*2);
|
||||
}
|
||||
|
||||
at_event_t bc35_28_95_at_event[] = {
|
||||
{ "+NNMI:", bc35_28_95_lwm2m_incoming_data_process },
|
||||
};
|
||||
|
||||
static int bc35_28_95_lwm2m_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int bc35_28_95_lwm2m_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return bc35_28_95_lwm2m_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
static int bc35_28_95_lwm2m_close(int id)
|
||||
{
|
||||
tos_at_channel_free(id);
|
||||
return 0;
|
||||
}
|
||||
|
||||
sal_module_t sal_module_bc35_28_95_lwm2m = {
|
||||
.init = bc35_28_95_lwm2m_init,
|
||||
.connect = bc35_28_95_lwm2m_connect,
|
||||
.send = bc35_28_95_lwm2m_send,
|
||||
.recv_timeout = bc35_28_95_lwm2m_recv_timeout,
|
||||
.recv = bc35_28_95_lwm2m_recv,
|
||||
.close = bc35_28_95_lwm2m_close,
|
||||
.parse_domain = NULL,
|
||||
};
|
||||
|
||||
int bc35_28_95_sal_lwm2m_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, bc35_28_95_at_event,
|
||||
sizeof(bc35_28_95_at_event) / sizeof(bc35_28_95_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_bc35_28_95_lwm2m) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1,26 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __BC35_28_95_LWM2M_H__
|
||||
#define __BC35_28_95_LWM2M_H__
|
||||
|
||||
#include "tos_at.h"
|
||||
|
||||
int bc35_28_95_sal_lwm2m_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __BC35_28_95_LWM2M_H__ */
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,547 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "ec20.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
typedef struct ip_addr_st {
|
||||
uint8_t seg1;
|
||||
uint8_t seg2;
|
||||
uint8_t seg3;
|
||||
uint8_t seg4;
|
||||
}ip_addr_t;
|
||||
|
||||
static ip_addr_t domain_parser_addr = {0};
|
||||
static k_sem_t domain_parser_sem;
|
||||
|
||||
static int ec20_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
static int ec20_sim_card_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(strstr(echo.buffer, "READY"))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec20_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi != 99) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int ec20_gsm_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec20_gprs_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CGREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec20_close_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QIDEACT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec20_set_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QICSGP=1,1,\"CMNET\"\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 3000, "AT+QIACT=1\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec20_init(void)
|
||||
{
|
||||
printf("Init ec20 ...\n" );
|
||||
|
||||
if (ec20_echo_close() != 0) {
|
||||
printf("echo close failed,please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec20_sim_card_check() != 0) {
|
||||
printf("sim card check failed,please insert your card\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ec20_signal_quality_check() != 0) {
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec20_gsm_network_check() != 0) {
|
||||
printf("GSM network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec20_gprs_network_check() != 0) {
|
||||
printf("GPRS network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec20_close_apn() != 0) {
|
||||
printf("close apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ec20_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init ec20 ok\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec20_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
char except_str[16];
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
sprintf(except_str, "+QIOPEN: %d,0", id);
|
||||
tos_at_echo_create(&echo, NULL, 0, except_str);
|
||||
tos_at_cmd_exec_until(&echo, 4000, "AT+QIOPEN=1,%d,\"%s\",\"%s\",%d,0,1\r\n",
|
||||
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
static int ec20_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int ec20_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return ec20_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ec20_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+QISEND=%d,%d\r\n", id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
int ec20_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
int ec20_recvfrom(int id, void *buf, size_t len)
|
||||
{
|
||||
return ec20_recvfrom_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ec20_sendto(int id, char *ip, char *port, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+QISEND=%d,%d\r\n", id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static void ec20_transparent_mode_exit(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(NULL, 500, "+++");
|
||||
}
|
||||
|
||||
static int ec20_close(int id)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
ec20_transparent_mode_exit();
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec20_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[128];
|
||||
|
||||
tos_sem_create_max(&domain_parser_sem, 0, 1);
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+QIDNSGIP=1,\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_sem_pend(&domain_parser_sem, TOS_TIME_FOREVER);
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", domain_parser_addr.seg1, domain_parser_addr.seg2, domain_parser_addr.seg3, domain_parser_addr.seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ void ec20_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0, read_len;
|
||||
uint8_t buffer[128];
|
||||
|
||||
/*
|
||||
+QIURC: "recv",<sockid>,<datalen>
|
||||
<data content>
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\r') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
__STATIC__ void ec20_domain_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
/*
|
||||
+QIURC: "dnsgip",0,1,600
|
||||
|
||||
+QIURC: "dnsgip","xxx.xxx.xxx.xxx"
|
||||
*/
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '0') {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\"') {
|
||||
/* start parser domain */
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg1 = domain_parser_addr.seg1 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg2 = domain_parser_addr.seg2 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg3 = domain_parser_addr.seg3 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '\"') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg4 = domain_parser_addr.seg4 *10 + (data-'0');
|
||||
}
|
||||
tos_sem_post(&domain_parser_sem);
|
||||
}
|
||||
return;
|
||||
|
||||
}
|
||||
|
||||
at_event_t ec20_at_event[] = {
|
||||
{ "+QIURC: \"recv\",", ec20_incoming_data_process},
|
||||
{ "+QIURC: \"dnsgip\",", ec20_domain_data_process},
|
||||
};
|
||||
|
||||
sal_module_t sal_module_ec20 = {
|
||||
.init = ec20_init,
|
||||
.connect = ec20_connect,
|
||||
.send = ec20_send,
|
||||
.recv_timeout = ec20_recv_timeout,
|
||||
.recv = ec20_recv,
|
||||
.sendto = ec20_sendto,
|
||||
.recvfrom = ec20_recvfrom,
|
||||
.recvfrom_timeout = ec20_recvfrom_timeout,
|
||||
.close = ec20_close,
|
||||
.parse_domain = ec20_parse_domain,
|
||||
};
|
||||
|
||||
int ec20_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, ec20_at_event,
|
||||
sizeof(ec20_at_event) / sizeof(ec20_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_ec20) != 0) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ec20_sal_deinit()
|
||||
{
|
||||
int id = 0;
|
||||
|
||||
for (id = 0; id < AT_DATA_CHANNEL_NUM; ++id) {
|
||||
tos_sal_module_close(id);
|
||||
}
|
||||
|
||||
tos_sal_module_register_default();
|
||||
|
||||
tos_at_deinit();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __EC20_H__
|
||||
#define __EC20_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
int ec20_sal_init(hal_uart_port_t uart_port);
|
||||
int ec20_sal_deinit(void);
|
||||
|
||||
#endif /* __EC20_H__ */
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,576 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "ec200s.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
typedef struct ip_addr_st {
|
||||
uint8_t seg1;
|
||||
uint8_t seg2;
|
||||
uint8_t seg3;
|
||||
uint8_t seg4;
|
||||
}ip_addr_t;
|
||||
|
||||
static ip_addr_t domain_parser_addr = {0};
|
||||
static k_sem_t domain_parser_sem;
|
||||
static k_sem_t module_ready_sem;
|
||||
|
||||
static int ec200s_check_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_sem_create_max(&module_ready_sem, 0, 1);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
} else {
|
||||
tos_sem_pend(&module_ready_sem, TOS_TIME_FOREVER);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static int ec200s_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int ec200s_sim_card_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
if (strstr(echo_buffer, "READY")) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec200s_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi != 99) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int ec200s_gsm_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec200s_gprs_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CGREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec200s_close_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QIDEACT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ec200s_set_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QICSGP=1,1,\"CMNET\"\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QIACT=1\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec200s_init(void)
|
||||
{
|
||||
printf("Init ec200s ...\n" );
|
||||
|
||||
if (ec200s_check_ready() != 0) {
|
||||
printf("wait module ready timeout, please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ec200s_echo_close() != 0) {
|
||||
printf("echo close failed,please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec200s_sim_card_check() != 0) {
|
||||
printf("sim card check failed,please insert your card\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ec200s_signal_quality_check() != 0) {
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec200s_gsm_network_check() != 0) {
|
||||
printf("GSM network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec200s_gprs_network_check() != 0) {
|
||||
printf("GPRS network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ec200s_close_apn() != 0) {
|
||||
printf("close apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ec200s_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init ec200s ok\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec200s_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
char except_str[16];
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
sprintf(except_str, "+QIOPEN: %d,0", id);
|
||||
tos_at_echo_create(&echo, NULL, 0, except_str);
|
||||
tos_at_cmd_exec_until(&echo, 4000, "AT+QIOPEN=1,%d,\"%s\",\"%s\",%d,0,1\r\n",
|
||||
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
static int ec200s_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int ec200s_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return ec200s_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ec200s_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+QISEND=%d,%d\r\n", id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
int ec200s_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
int ec200s_recvfrom(int id, void *buf, size_t len)
|
||||
{
|
||||
return ec200s_recvfrom_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ec200s_sendto(int id, char *ip, char *port, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+QISEND=%d,%d\r\n", id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static void ec200s_transparent_mode_exit(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 500, "+++");
|
||||
}
|
||||
|
||||
static int ec200s_close(int id)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
ec200s_transparent_mode_exit();
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ec200s_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[128];
|
||||
|
||||
tos_sem_create_max(&domain_parser_sem, 0, 1);
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+QIDNSGIP=1,\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_sem_pend(&domain_parser_sem, TOS_TIME_FOREVER);
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", domain_parser_addr.seg1, domain_parser_addr.seg2, domain_parser_addr.seg3, domain_parser_addr.seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ void ec200s_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0, read_len;
|
||||
uint8_t buffer[128];
|
||||
|
||||
/*
|
||||
+QIURC: "recv",<sockid>,<datalen>
|
||||
<data content>
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\r') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
__STATIC__ void ec200s_domain_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
/*
|
||||
+QIURC: "dnsgip",0,1,600
|
||||
|
||||
+QIURC: "dnsgip","xxx.xxx.xxx.xxx"
|
||||
*/
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '0') {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\"') {
|
||||
/* start parser domain */
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg1 = domain_parser_addr.seg1 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg2 = domain_parser_addr.seg2 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '.') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg3 = domain_parser_addr.seg3 *10 + (data-'0');
|
||||
}
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '\"') {
|
||||
break;
|
||||
}
|
||||
domain_parser_addr.seg4 = domain_parser_addr.seg4 *10 + (data-'0');
|
||||
}
|
||||
tos_sem_post(&domain_parser_sem);
|
||||
}
|
||||
return;
|
||||
|
||||
}
|
||||
|
||||
__STATIC__ void ec200s_ready_data_process(void)
|
||||
{
|
||||
printf("mopdule ready\r\n");
|
||||
tos_sem_post(&module_ready_sem);
|
||||
}
|
||||
|
||||
at_event_t ec200s_at_event[] = {
|
||||
{ "+QIURC: \"recv\",", ec200s_incoming_data_process},
|
||||
{ "+QIURC: \"dnsgip\",", ec200s_domain_data_process},
|
||||
{ "RDY", ec200s_ready_data_process},
|
||||
};
|
||||
|
||||
sal_module_t sal_module_ec200s = {
|
||||
.init = ec200s_init,
|
||||
.connect = ec200s_connect,
|
||||
.send = ec200s_send,
|
||||
.recv_timeout = ec200s_recv_timeout,
|
||||
.recv = ec200s_recv,
|
||||
.sendto = ec200s_sendto,
|
||||
.recvfrom = ec200s_recvfrom,
|
||||
.recvfrom_timeout = ec200s_recvfrom_timeout,
|
||||
.close = ec200s_close,
|
||||
.parse_domain = ec200s_parse_domain,
|
||||
};
|
||||
|
||||
int ec200s_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
|
||||
if (tos_at_init(uart_port, ec200s_at_event,
|
||||
sizeof(ec200s_at_event) / sizeof(ec200s_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_ec200s) != 0) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ec200s_sal_deinit()
|
||||
{
|
||||
int id = 0;
|
||||
|
||||
for (id = 0; id < AT_DATA_CHANNEL_NUM; ++id) {
|
||||
tos_sal_module_close(id);
|
||||
}
|
||||
|
||||
tos_sal_module_register_default();
|
||||
|
||||
tos_at_deinit();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __EC200S_H__
|
||||
#define __EC200S_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
int ec200s_sal_init(hal_uart_port_t uart_port);
|
||||
int ec200s_sal_deinit(void);
|
||||
|
||||
#endif /* __EC200S_H__ */
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,645 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "l610.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
static int l610_check_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
|
||||
while (++try) {
|
||||
tos_sleep_ms(2000);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(1000);
|
||||
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int l610_sim_card_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
if (strstr(echo_buffer, "READY")) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi != 99) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int l610_gsm_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_gprs_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CGREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_set_data_format(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+GTSET=\"IPRFMT\",0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int l610_check_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char buffer[64];
|
||||
char *str = NULL;
|
||||
int apn_state;
|
||||
|
||||
tos_at_echo_create(&echo, buffer, 64, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+MIPCALL?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(buffer, "+MIPCALL:");
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str+strlen("+MIPCALL: "), "%d", &apn_state);
|
||||
if (apn_state == 0) {
|
||||
return 0;
|
||||
} else if (apn_state == 1) {
|
||||
return 1;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
static int l610_check_close_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char buffer[64];
|
||||
char *str = NULL;
|
||||
int apn_state;
|
||||
|
||||
apn_state = l610_check_apn();
|
||||
|
||||
if (apn_state == -1) {
|
||||
return -1;
|
||||
} else if (apn_state == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, buffer, 64, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+MIPCALL=0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(buffer, "+MIPCALL:");
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str+strlen("+MIPCALL: "), "%d", &apn_state);
|
||||
if (apn_state == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_set_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MIPCALL");
|
||||
tos_at_cmd_exec_until(&echo, 10000, "AT+MIPCALL=1,\"CMNET\"\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_check_apn() == 1) {
|
||||
return 0;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
static int l610_init(void)
|
||||
{
|
||||
printf("Init l610 ...\n" );
|
||||
|
||||
if (l610_check_ready() != 0) {
|
||||
printf("wait module ready timeout, please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_echo_close() != 0) {
|
||||
printf("echo close failed,please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_sim_card_check() != 0) {
|
||||
printf("sim card check failed,please insert your card\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_signal_quality_check() != 0) {
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_gsm_network_check() != 0) {
|
||||
printf("GSM network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_gprs_network_check() != 0) {
|
||||
printf("GPRS network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_set_data_format() != 0) {
|
||||
printf("set data format fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_check_close_apn() != 0) {
|
||||
printf("close apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init l610 ok\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int l610_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MIPOPEN");
|
||||
tos_at_cmd_exec_until(&echo, 4000, "AT+MIPOPEN=%d,,\"%s\",%d,%d\r\n",
|
||||
id + 1, ip, atoi(port), proto == TOS_SAL_PROTO_UDP ? 1 : 0);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
static int l610_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int l610_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return l610_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int l610_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+MIPSEND=%d,%d\r\n", id + 1, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MIPSEND");
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
int l610_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
int l610_recvfrom(int id, void *buf, size_t len)
|
||||
{
|
||||
return l610_recvfrom_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int l610_sendto(int id, char *ip, char *port, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+MIPSEND=%d,%d\r\n", id + 1, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MIPSEND");
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static void l610_transparent_mode_exit(void)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 500, "+++");
|
||||
}
|
||||
|
||||
static int l610_close(int id)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
l610_transparent_mode_exit();
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+MIPCLOSE=%d\r\n", id+1);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int l610_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[128];
|
||||
char *str = NULL;
|
||||
int seg1, seg2, seg3, seg4;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+MIPDNS=\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo_buffer, "+MIPDNS:");
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str + strlen("+MIPDNS: ") + strlen(host_name) + 3, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
|
||||
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t __ascii2hex(char in) {
|
||||
if (('0' <= in) && (in <= '9')) {
|
||||
return in - '0';
|
||||
}
|
||||
if (('A' <= in) && (in <= 'F')) {
|
||||
return in - 'A' + 10;
|
||||
}
|
||||
if (('a' <= in) && (in <= 'f')) {
|
||||
return in - 'a' + 10;
|
||||
}
|
||||
return (uint8_t)-1;
|
||||
}
|
||||
|
||||
__STATIC__ void __asciistr2hex(char *in, uint8_t *out, int len) {
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; i += 2) {
|
||||
out[i / 2] = (__ascii2hex(in[i]) << 4) + __ascii2hex(in[i + 1]);
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ char ascii_stream[1024];
|
||||
__STATIC__ uint8_t hex_stream[512];
|
||||
|
||||
__STATIC__ void l610_tcp_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, leaf_data_len = 0, read_len;
|
||||
|
||||
/*
|
||||
+MIPRTCP: <socket id>,<leaf length>,<hex string>
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
channel_id--;
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
leaf_data_len = leaf_data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
read_len = tos_at_uart_readline((uint8_t*)ascii_stream, sizeof(ascii_stream));
|
||||
|
||||
read_len -= 2;
|
||||
ascii_stream[read_len] = '\0';
|
||||
__asciistr2hex(ascii_stream, hex_stream, read_len);
|
||||
|
||||
tos_at_channel_write(channel_id, hex_stream, read_len/2);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
__STATIC__ void l610_udp_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, leaf_data_len = 0, read_len;
|
||||
|
||||
/*
|
||||
+MIPRUDP: <src ip>,<src port>, <socket id>,<leaf length>,<hex string>
|
||||
*/
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
channel_id--;
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
leaf_data_len = leaf_data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
read_len = tos_at_uart_readline((uint8_t*)ascii_stream, sizeof(ascii_stream));
|
||||
|
||||
read_len -= 2;
|
||||
ascii_stream[read_len] = '\0';
|
||||
__asciistr2hex(ascii_stream, hex_stream, read_len);
|
||||
|
||||
tos_at_channel_write(channel_id, hex_stream, read_len/2);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
at_event_t l610_at_event[] = {
|
||||
{ "+MIPRTCP: ", l610_tcp_incoming_data_process},
|
||||
{ "+MIPRUDP: ", l610_udp_incoming_data_process},
|
||||
};
|
||||
|
||||
sal_module_t sal_module_l610 = {
|
||||
.init = l610_init,
|
||||
.connect = l610_connect,
|
||||
.send = l610_send,
|
||||
.recv_timeout = l610_recv_timeout,
|
||||
.recv = l610_recv,
|
||||
.sendto = l610_sendto,
|
||||
.recvfrom = l610_recvfrom,
|
||||
.recvfrom_timeout = l610_recvfrom_timeout,
|
||||
.close = l610_close,
|
||||
.parse_domain = l610_parse_domain,
|
||||
};
|
||||
|
||||
int l610_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
|
||||
if (tos_at_init(uart_port, l610_at_event,
|
||||
sizeof(l610_at_event) / sizeof(l610_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_l610) != 0) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int l610_sal_deinit()
|
||||
{
|
||||
int id = 0;
|
||||
|
||||
for (id = 0; id < AT_DATA_CHANNEL_NUM; ++id) {
|
||||
tos_sal_module_close(id);
|
||||
}
|
||||
|
||||
tos_sal_module_register_default();
|
||||
|
||||
tos_at_deinit();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __L610_H__
|
||||
#define __L610_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
int l610_sal_init(hal_uart_port_t uart_port);
|
||||
int l610_sal_deinit(void);
|
||||
|
||||
#endif /* __L610_H__ */
|
||||
|
||||
@@ -1,708 +0,0 @@
|
||||
#include "stdio.h"
|
||||
#include "string.h"
|
||||
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "tencent_firmware_module_wrapper.h"
|
||||
#include "l610_tencent_firmware.h"
|
||||
|
||||
static int l610_check_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
|
||||
while (++try) {
|
||||
tos_sleep_ms(2000);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(1000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int l610_sim_card_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
if (strstr(echo_buffer, "READY")) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi != 99) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int l610_gsm_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_gprs_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
while (try++ < 10) {
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGREG:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CGREG:%d,%d", &n, &stat);
|
||||
if (stat == 1) {
|
||||
return 0;
|
||||
}
|
||||
tos_sleep_ms(2000);
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_set_data_format(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+GTSET=\"IPRFMT\",0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int l610_check_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char buffer[64];
|
||||
char *str = NULL;
|
||||
int apn_state;
|
||||
|
||||
tos_at_echo_create(&echo, buffer, 64, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+MIPCALL?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(buffer, "+MIPCALL:");
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str+strlen("+MIPCALL: "), "%d", &apn_state);
|
||||
if (apn_state == 0) {
|
||||
return 0;
|
||||
} else if (apn_state == 1) {
|
||||
return 1;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
static int l610_check_close_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char buffer[64];
|
||||
char *str = NULL;
|
||||
int apn_state;
|
||||
|
||||
apn_state = l610_check_apn();
|
||||
|
||||
if (apn_state == -1) {
|
||||
return -1;
|
||||
} else if (apn_state == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, buffer, 64, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+MIPCALL=0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(buffer, "+MIPCALL:");
|
||||
if (str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str+strlen("+MIPCALL: "), "%d", &apn_state);
|
||||
if (apn_state == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int l610_set_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MIPCALL");
|
||||
tos_at_cmd_exec_until(&echo, 10000, "AT+MIPCALL=1,\"CMNET\"\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_check_apn() == 1) {
|
||||
return 0;
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* config dev info to module, do this operate only once in factroy is suggested
|
||||
*/
|
||||
int l610_tencent_firmware_module_info_set(device_info_t *info, tls_mode_t mode)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!info) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCDEVINFOSET: OK");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCDEVINFOSET=%d,\"%s\",\"%s\",\"%s\"\r\n",
|
||||
mode, info->product_id, info->device_name, info->device_serc);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* mqtt setup connect */
|
||||
int l610_tencent_firmware_module_mqtt_conn(mqtt_param_t init_params)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTCONN: OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCMQTTCONN=%d,%d,%d,%d,%d\r\n", init_params.tls_mode,
|
||||
init_params.command_timeout, init_params.keep_alive_interval_ms,
|
||||
init_params.clean_session, init_params.auto_connect_enable);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* mqtt disconn */
|
||||
int l610_tencent_firmware_module_mqtt_discon(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTDISCONN\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_module_mqtt_publ(const char *topic, qos_t qos, char *payload)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!topic || !payload) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+TCMQTTPUBL=\"%s\",%d,%d\r\n", topic, qos, strlen(payload)-2);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTPUB: OK");
|
||||
tos_at_raw_data_send_until(&echo, 1000, (uint8_t *)payload, strlen(payload));
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* mqtt pub msg */
|
||||
int l610_tencent_firmware_module_mqtt_pub(const char *topic, qos_t qos, char *payload)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!topic || !payload) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTPUB: OK");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+TCMQTTPUB=\"%s\",%d,\"%s\"\r\n", topic, qos, payload);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_module_mqtt_sub(char *topic, qos_t qos)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!topic) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTSUB: OK");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCMQTTSUB=\"%s\",%d\r\n", topic, qos);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_module_mqtt_unsub(const char *topic)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (!topic) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTUNSUB: OK");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCMQTTUNSUB=\"%s\"\r\n", topic);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_module_mqtt_state_get(mqtt_state_t *state)
|
||||
{
|
||||
char *str;
|
||||
int ret_state;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTSTATE?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+TCMQTTSTATE:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+TCMQTTSTATE:%d", &ret_state);
|
||||
if (ret_state == 0) {
|
||||
*state = MQTT_STATE_DISCONNECTED;
|
||||
return 0;
|
||||
} else if (ret_state == 1) {
|
||||
*state = MQTT_STATE_CONNECTED;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_module_debug_level_set(int log_level)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCTEMLOG=%d\r\n", log_level);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
#if 0 // l610 tencent_firmware not support AT+TCREGNET now
|
||||
static int l610_tencent_firmware_join_net(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 2) {
|
||||
tos_at_cmd_exec(&echo, 5000, "AT+TCREGNET?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int l610_tencent_firmware_init(void)
|
||||
{
|
||||
printf("Init l610 with tencent firmware ...\n");
|
||||
|
||||
if (l610_check_ready() != 0) {
|
||||
printf("wait module ready timeout, please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_echo_close() != 0) {
|
||||
printf("echo close failed,please check your module\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_sim_card_check() != 0) {
|
||||
printf("sim card check failed,please insert your card\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_signal_quality_check() != 0) {
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_gsm_network_check() != 0) {
|
||||
printf("GSM network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_gprs_network_check() != 0) {
|
||||
printf("GPRS network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_set_data_format() != 0) {
|
||||
printf("set data format fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_check_close_apn() != 0) {
|
||||
printf("close apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (l610_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init l610 with tencent firmware Done\n" );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int l610_tencent_firmware_ota_set(ota_mode_t mode, char *version)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCOTASET:OK");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCOTASET=%d,\"%s\"\r\n", mode, version);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
k_sem_t ota_fw_info_sem;
|
||||
|
||||
int l610_tencent_firmware_ota_read_fwinfo(ota_fw_info_t *ota_fw_info)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
uint8_t FileSize[10] = {0};
|
||||
uint32_t updateFileSize = 0;
|
||||
|
||||
/* wait update command frome cloud forever */
|
||||
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_info_sem, 0, 1)) {
|
||||
return -1;
|
||||
}
|
||||
tos_sem_pend(&ota_fw_info_sem, TOS_TIME_FOREVER);
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+TCFWINFO:");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+TCFWINFO?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
|
||||
sscanf(echo_buffer, "%*[^\"]%*c%[^\"]%*[^,]%*c%[^,]%*[^\"]%*c%[^\"]", ota_fw_info->fw_version, FileSize, ota_fw_info->fw_md5);
|
||||
for(int i = 0; i<10; i++) {
|
||||
if(FileSize[i] == 0) {
|
||||
break;
|
||||
}
|
||||
updateFileSize = updateFileSize*10 + (FileSize[i] - 0x30);
|
||||
}
|
||||
ota_fw_info->fw_size = updateFileSize;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
k_chr_fifo_t ota_fw_data_chr_fifo;
|
||||
k_sem_t ota_fw_data_sem;
|
||||
|
||||
static int l610_tencent_firmware_ota_read_fwdata(uint8_t *ota_fw_data_buffer,uint16_t read_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if(K_ERR_NONE != tos_chr_fifo_create(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_data_sem, 0, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 300, "AT+TCREADFWDATA=%d\r\n", read_len);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_sem_pend(&ota_fw_data_sem, TOS_TIME_FOREVER);
|
||||
|
||||
return tos_chr_fifo_pop_stream(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len);
|
||||
}
|
||||
|
||||
static mqtt_message_t mqtt_message;
|
||||
|
||||
void l610_tencent_firmware_recvpub(void)
|
||||
{
|
||||
/*
|
||||
+TCMQTTRCVPUB:"xxx/yyy/zzz",44,"{"type":"get", "clientToken":"123456781234"}"
|
||||
*/
|
||||
|
||||
uint8_t data;
|
||||
int read_len = 0, payload_len = 0;
|
||||
|
||||
memset(&mqtt_message, 0, sizeof(mqtt_message));
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '"') {
|
||||
continue;
|
||||
} else if (data == ',') {
|
||||
break;
|
||||
}
|
||||
if (read_len < sizeof(mqtt_message.topic)) {
|
||||
mqtt_message.topic[read_len++] = data;
|
||||
}
|
||||
}
|
||||
if (read_len == sizeof(mqtt_message.topic)) {
|
||||
mqtt_message.topic[read_len - 1] = '\0';
|
||||
} else {
|
||||
mqtt_message.topic[read_len] = '\0';
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
payload_len = payload_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (payload_len > sizeof(mqtt_message.payload)) {
|
||||
payload_len = sizeof(mqtt_message.payload);
|
||||
}
|
||||
|
||||
read_len = tos_at_uart_read((uint8_t*)mqtt_message.payload, payload_len + 2);
|
||||
if (read_len != payload_len + 2) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_mail_q_post(&mqtt_message_mail, &mqtt_message, sizeof(mqtt_message_t));
|
||||
}
|
||||
|
||||
void l610_tencent_firmware_recvcmd(void)
|
||||
{
|
||||
/*
|
||||
+TCOTASTATUS:UPDATEFAIL
|
||||
+TCOTASTATUS:UPDATESUCCESS
|
||||
*/
|
||||
uint8_t buffer[20];
|
||||
int read_len = 13;
|
||||
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(!strstr((char*)buffer, "UPDATESUCCESS")) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_sem_post(&ota_fw_info_sem);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
void l610_tencent_firmware_recvfwdata(void)
|
||||
{
|
||||
/*
|
||||
+TCREADFWDATA:256,<HEX Data>
|
||||
*/
|
||||
uint8_t data;
|
||||
uint16_t data_len = 0, read_len = 0;
|
||||
static uint8_t buffer[128];
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_chr_fifo_push_stream(&ota_fw_data_chr_fifo, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
|
||||
tos_sem_post(&ota_fw_data_sem);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
at_event_t l610_tencent_firmware_at_event[] = {
|
||||
{ "+TCMQTTRCVPUB: ", l610_tencent_firmware_recvpub },
|
||||
{ "+TCREADFWDATA:", l610_tencent_firmware_recvfwdata },
|
||||
{ "+TCOTASTATUS:", l610_tencent_firmware_recvcmd },
|
||||
};
|
||||
|
||||
tencent_firmware_module_t tencent_firmware_module_l610 = {
|
||||
.init = l610_tencent_firmware_init,
|
||||
.info_set = l610_tencent_firmware_module_info_set,
|
||||
.mqtt_conn = l610_tencent_firmware_module_mqtt_conn,
|
||||
.mqtt_discon = l610_tencent_firmware_module_mqtt_discon,
|
||||
.mqtt_pub = l610_tencent_firmware_module_mqtt_pub,
|
||||
.mqtt_publ = l610_tencent_firmware_module_mqtt_publ,
|
||||
.mqtt_sub = l610_tencent_firmware_module_mqtt_sub,
|
||||
.mqtt_unsub = l610_tencent_firmware_module_mqtt_unsub,
|
||||
.mqtt_state_get = l610_tencent_firmware_module_mqtt_state_get,
|
||||
.debug_level_set = l610_tencent_firmware_module_debug_level_set,
|
||||
.ota_set = l610_tencent_firmware_ota_set,
|
||||
.ota_read_fwinfo = l610_tencent_firmware_ota_read_fwinfo,
|
||||
.ota_read_fwdata = l610_tencent_firmware_ota_read_fwdata,
|
||||
};
|
||||
|
||||
int l610_tencent_firmware_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
int ret = -1;
|
||||
|
||||
if (tos_at_init(uart_port, l610_tencent_firmware_at_event,
|
||||
sizeof(l610_tencent_firmware_at_event) /
|
||||
sizeof(l610_tencent_firmware_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_tf_module_register(&tencent_firmware_module_l610) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if ((ret = tos_tf_module_init()) != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,27 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __L610_TENCENT_FIRMWARE_H__
|
||||
#define __L610_TENCENT_FIRMWARE_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
|
||||
int l610_tencent_firmware_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __L610_TENCENT_FIRMWARE_H__ */
|
||||
|
||||
@@ -1,117 +0,0 @@
|
||||
#include "tos_k.h"
|
||||
#include "l610_tencent_firmware.h"
|
||||
#include "tencent_firmware_module_wrapper.h"
|
||||
|
||||
|
||||
#define PRODUCT_ID "XOEHGW66ZD"
|
||||
#define DEVICE_NAME "pm0001"
|
||||
#define DEVICE_KEY "pVziOcDry+iOwcgP3kWCCw=="
|
||||
|
||||
#define REPORT_DATA_TEMPLATE "{\\\"method\\\":\\\"report\\\"\\,\\\"clientToken\\\":\\\"00000001\\\"\\,\\\"params\\\":{\\\"Pm2d5Value\\\":%d}}"
|
||||
|
||||
void default_message_handler(mqtt_message_t* msg)
|
||||
{
|
||||
printf("callback:\r\n");
|
||||
printf("---------------------------------------------------------\r\n");
|
||||
printf("\ttopic:%s\r\n", msg->topic);
|
||||
printf("\tpayload:%s\r\n", msg->payload);
|
||||
printf("---------------------------------------------------------\r\n");
|
||||
}
|
||||
|
||||
char payload[256] = {0};
|
||||
static char report_topic_name[TOPIC_NAME_MAX_SIZE] = {0};
|
||||
static char report_reply_topic_name[TOPIC_NAME_MAX_SIZE] = {0};
|
||||
|
||||
k_mail_q_t mail_q;
|
||||
|
||||
extern int l610_sal_init(hal_uart_port_t uart_port);
|
||||
extern int l610_init(void);
|
||||
|
||||
void mqtt_demo_task(void)
|
||||
{
|
||||
int ret = 0;
|
||||
int size = 0;
|
||||
int lightness = 0;
|
||||
mqtt_state_t state;
|
||||
|
||||
char *product_id = PRODUCT_ID;
|
||||
char *device_name = DEVICE_NAME;
|
||||
char *key = DEVICE_KEY;
|
||||
|
||||
device_info_t dev_info;
|
||||
memset(&dev_info, 0, sizeof(device_info_t));
|
||||
|
||||
/**
|
||||
* Please Choose your AT Port first, default is HAL_UART_2(USART2)
|
||||
*/
|
||||
ret = l610_tencent_firmware_sal_init(HAL_UART_PORT_0);
|
||||
|
||||
if (ret < 0) {
|
||||
printf("L610 tencent firmware sal init fail, ret is %d\r\n", ret);
|
||||
}
|
||||
|
||||
strncpy(dev_info.product_id, product_id, PRODUCT_ID_MAX_SIZE);
|
||||
strncpy(dev_info.device_name, device_name, DEVICE_NAME_MAX_SIZE);
|
||||
strncpy(dev_info.device_serc, key, DEVICE_SERC_MAX_SIZE);
|
||||
tos_tf_module_info_set(&dev_info, TLS_MODE_PSK);
|
||||
|
||||
mqtt_param_t init_params = DEFAULT_MQTT_PARAMS;
|
||||
if (tos_tf_module_mqtt_conn(init_params) != 0) {
|
||||
printf("module mqtt conn fail\n");
|
||||
} else {
|
||||
printf("module mqtt conn success\n");
|
||||
}
|
||||
|
||||
if (tos_tf_module_mqtt_state_get(&state) != -1) {
|
||||
printf("MQTT: %s\n", state == MQTT_STATE_CONNECTED ? "CONNECTED" : "DISCONNECTED");
|
||||
}
|
||||
|
||||
|
||||
size = snprintf(report_reply_topic_name, TOPIC_NAME_MAX_SIZE, "$thing/down/property/%s/%s", product_id, device_name);
|
||||
|
||||
if (size < 0 || size > sizeof(report_reply_topic_name) - 1) {
|
||||
printf("sub topic content length not enough! content size:%d buf size:%d", size, (int)sizeof(report_reply_topic_name));
|
||||
}
|
||||
if (tos_tf_module_mqtt_sub(report_reply_topic_name, QOS0, default_message_handler) != 0) {
|
||||
printf("module mqtt sub fail\n");
|
||||
} else {
|
||||
printf("module mqtt sub success\n");
|
||||
}
|
||||
|
||||
memset(report_topic_name, 0, sizeof(report_topic_name));
|
||||
size = snprintf(report_topic_name, TOPIC_NAME_MAX_SIZE, "$thing/up/property/%s/%s", product_id, device_name);
|
||||
|
||||
if (size < 0 || size > sizeof(report_topic_name) - 1) {
|
||||
printf("pub topic content length not enough! content size:%d buf size:%d", size, (int)sizeof(report_topic_name));
|
||||
}
|
||||
|
||||
|
||||
while (1) {
|
||||
|
||||
memset(payload, 0, sizeof(payload));
|
||||
snprintf(payload, sizeof(payload), REPORT_DATA_TEMPLATE, 30);
|
||||
|
||||
if (lightness > 100) {
|
||||
lightness = 0;
|
||||
}
|
||||
|
||||
if (tos_tf_module_mqtt_pub(report_topic_name, QOS0, payload) != 0) {
|
||||
printf("module mqtt pub fail\n");
|
||||
break;
|
||||
} else {
|
||||
printf("module mqtt pub success\n");
|
||||
}
|
||||
|
||||
tos_sleep_ms(5000);
|
||||
}
|
||||
}
|
||||
|
||||
void application_entry(void *arg)
|
||||
{
|
||||
|
||||
mqtt_demo_task();
|
||||
while (1) {
|
||||
printf("This is a mqtt demo!\r\n");
|
||||
tos_task_delay(1000);
|
||||
}
|
||||
}
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,579 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "m26.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
static int m26_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
static int m26_sim_card_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
int try = 0;
|
||||
char echo_buffer[32];
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CPIN?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(strstr(echo.buffer, "READY"))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi != 99) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
static int m26_gsm_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CREG:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CREG:%d,%d", &n, &stat);
|
||||
if (stat == 1)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_gprs_network_check(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGREG:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CGREG:%d,%d", &n, &stat);
|
||||
if (stat == 1)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_close_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QIDEACT\r\n");
|
||||
|
||||
if(strstr(echo.buffer, "DEACT OK") == NULL)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m26_send_mode_set(m26_send_mode_t mode)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QIMODE=%d\r\n", mode == M26_SEND_MODE_NORMAL ? 0 : 1);
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_multilink_set(m26_multilink_state_t state)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QIMUX=%d\r\n", state == M26_MULTILINK_STATE_ENABLE ? 1 : 0);
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_recv_mode_set()
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QINDI=0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m26_set_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QICSGP=1,\"CMNET\"\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QIFGCNT=0\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QIREGAPP\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+QIACT\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 300, "AT+QILOCIP\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int m26_init(void)
|
||||
{
|
||||
printf("Init m26 ...\n" );
|
||||
|
||||
if (m26_echo_close() != 0)
|
||||
{
|
||||
printf("echo close failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(m26_sim_card_check() != 0)
|
||||
{
|
||||
printf("sim card check failed,please insert your card\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m26_signal_quality_check() != 0)
|
||||
{
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(m26_gsm_network_check() != 0)
|
||||
{
|
||||
printf("GSM network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(m26_gprs_network_check() != 0)
|
||||
{
|
||||
printf("GPRS network register status check fail\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(m26_close_apn() != 0)
|
||||
{
|
||||
printf("close apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
|
||||
if (m26_multilink_set(SAL_MULTILINK_STATE_DISABLE) != 0)
|
||||
{
|
||||
printf("multilink set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
#else
|
||||
if (m26_multilink_set(M26_MULTILINK_STATE_ENABLE) != 0)
|
||||
{
|
||||
printf("multilink set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (m26_send_mode_set(M26_SEND_MODE_NORMAL) != 0)
|
||||
{
|
||||
printf("send mode set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(m26_recv_mode_set() != 0)
|
||||
{
|
||||
printf("recv mode set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m26_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init m26 ok\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m26_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "%s=1\r\n", "AT+QIHEAD");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
|
||||
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
|
||||
tos_at_cmd_exec(&echo, 4000, "AT+QIOPEN=\"%s\",\"%s\",\"%s\"\r\n",
|
||||
proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return id;
|
||||
}
|
||||
#else
|
||||
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
|
||||
tos_at_cmd_exec(&echo, 4000, "AT+QIOPEN=%d,\"%s\",\"%s\",%d\r\n",
|
||||
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return id;
|
||||
}
|
||||
#endif
|
||||
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m26_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int m26_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return m26_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int m26_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+QISEND=%d\r\n",
|
||||
len);
|
||||
#else
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+QISEND=%d,%d\r\n",
|
||||
id, len);
|
||||
#endif
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static void m26_transparent_mode_exit(void)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 500, "+++");
|
||||
}
|
||||
|
||||
static int m26_close(int id)
|
||||
{
|
||||
m26_transparent_mode_exit();
|
||||
|
||||
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
#else
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+QICLOSE=%d\r\n", id);
|
||||
#endif
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m26_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+QIDNSGIP=\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
"xxx.xxx.xxx.xxx"
|
||||
*/
|
||||
|
||||
int seg1, seg2, seg3, seg4;
|
||||
str = strstr(echo.buffer, "OK");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
str += strlen("OK\r\n");
|
||||
sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ void m26_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0, read_len;
|
||||
uint8_t buffer[128];
|
||||
|
||||
/*
|
||||
+RECEIVE: 0, <data_len>
|
||||
IPD<data_len>:<data context>
|
||||
|
||||
+RECEIVE: prefix
|
||||
0: scoket id
|
||||
*/
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',')
|
||||
{
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\r')
|
||||
{
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ':')
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
at_event_t m26_at_event[] = {
|
||||
{ "+RECEIVE:", m26_incoming_data_process},
|
||||
};
|
||||
|
||||
sal_module_t sal_module_m26 = {
|
||||
.init = m26_init,
|
||||
.connect = m26_connect,
|
||||
.send = m26_send,
|
||||
.recv_timeout = m26_recv_timeout,
|
||||
.recv = m26_recv,
|
||||
.close = m26_close,
|
||||
.parse_domain = m26_parse_domain,
|
||||
};
|
||||
|
||||
int m26_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
|
||||
if (tos_at_init(uart_port, m26_at_event,
|
||||
sizeof(m26_at_event) / sizeof(m26_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_m26) != 0) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __M26_H__
|
||||
#define __M26_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
typedef enum m26_send_mode {
|
||||
M26_SEND_MODE_NORMAL,
|
||||
M26_SEND_MODE_TRANSPARENT,
|
||||
} m26_send_mode_t;
|
||||
|
||||
typedef enum m26_multilink_state {
|
||||
M26_MULTILINK_STATE_ENABLE,
|
||||
M26_MULTILINK_STATE_DISABLE,
|
||||
} m26_multilink_state_t;
|
||||
|
||||
int m26_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __M26_H__ */
|
||||
|
||||
@@ -1,37 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
CFGFLAGS += -std=c99
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,480 +0,0 @@
|
||||
#include "m5310a.h"
|
||||
#include "tos_k.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include "stdio.h"
|
||||
#include "stdbool.h"
|
||||
#include "ctype.h"
|
||||
|
||||
|
||||
static int m5310a_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int m5310a_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return m5310a_recv_timeout(id, buf, len, (uint32_t)10000);
|
||||
}
|
||||
|
||||
static char __num2hex(uint8_t num)
|
||||
{
|
||||
if (num <= 0x9) {
|
||||
return num + '0';
|
||||
}
|
||||
|
||||
if ((0xA <= num) && (num <= 0xF)) {
|
||||
return num - 0xA + 'A';
|
||||
}
|
||||
|
||||
return (char)-1;
|
||||
}
|
||||
|
||||
static void __hex2str(uint8_t *in, char *out, int len)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i) {
|
||||
out[i * 2] = __num2hex(in[i] >> 4);
|
||||
out[i * 2 + 1] = __num2hex(in[i] & 0x0F);
|
||||
}
|
||||
out[2 * len] = '\0';
|
||||
}
|
||||
|
||||
static int m5310a_wait_ok(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5310a_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id, try = 0, is_connected = 0;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32];
|
||||
|
||||
tos_stopwatch_delay_ms(10000);
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 4000, "AT+NSOCR=%s,%d\r\n",
|
||||
proto == TOS_SAL_PROTO_UDP ? "DGRAM" : "STREAM",
|
||||
proto == TOS_SAL_PROTO_UDP ? 17 : 6);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(echo.buffer, "%d", &id);
|
||||
|
||||
id = tos_at_channel_alloc_id(id, ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
m5310a_wait_ok();
|
||||
|
||||
tos_stopwatch_delay_ms(3000);
|
||||
|
||||
while (is_connected == 0 && try < 10) {
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "CONNECT OK");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NSOCO=%d,%s,%s\r\n", id, ip, port);
|
||||
for(int j=0; j<5; j++) {
|
||||
if(echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
is_connected = 1;
|
||||
break;
|
||||
}
|
||||
tos_task_delay(tos_millisec2tick(1000));
|
||||
}
|
||||
|
||||
try++;
|
||||
}
|
||||
|
||||
if (!is_connected) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
|
||||
static int m5310a_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
char *str_buf = NULL;
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
const int max_send_len = 200;
|
||||
str_buf = tos_mmheap_calloc(2 * max_send_len + 1, sizeof(char));
|
||||
if (!str_buf) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int left_len = len;
|
||||
for(int i=0; left_len>0; i++) {
|
||||
int send_len = left_len > max_send_len ? max_send_len : left_len;
|
||||
__hex2str((uint8_t *)buf+i*max_send_len, str_buf, send_len);
|
||||
|
||||
char except[8];
|
||||
snprintf(except, sizeof(except), "%d,%d", id, send_len);
|
||||
tos_at_echo_create(&echo, NULL, 0, except);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+NSOSD=%d,%d,%s\r\n", id, send_len, str_buf);
|
||||
|
||||
for(int j = 0; j < 10; j++) {
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
break;
|
||||
}
|
||||
|
||||
if(echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_stopwatch_delay_ms(1000);
|
||||
}
|
||||
}
|
||||
|
||||
left_len -= send_len;
|
||||
}
|
||||
|
||||
tos_mmheap_free(str_buf);
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len - left_len;
|
||||
}
|
||||
|
||||
|
||||
static int m5310a_close(int id)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+NSOCL=%d\r\n", id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
printf("close %d called\n", id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5310a_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+CMDNS:");
|
||||
tos_at_cmd_exec(&echo, 60000, "AT+CMDNS=\"%s\"\r\n", host_name);
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr((const char *)echo.buffer, "+CMDNS:");
|
||||
if(str == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CMDNS:%s", host_ip);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5310a_reset(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "M5310-A");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 8000, "AT+NRB\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT && m5310a_wait_ok() == 0) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5310a_open_cfun(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5310a_check_cfun(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CFUN:1");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5310a_get_net(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGATT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5310a_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi == 99) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5310a_init(void)
|
||||
{
|
||||
printf("Init M5310A ...\n" );
|
||||
|
||||
if (m5310a_wait_ok() != 0) {
|
||||
printf("wait ok FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5310a_reset() != 0) {
|
||||
printf("reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (m5310a_open_cfun() != 0) {
|
||||
printf("open_cfun FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5310a_check_cfun() != 0) {
|
||||
printf("check cfun FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5310a_get_net() != 0) {
|
||||
printf("get net FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5310a_signal_quality_check() != 0) {
|
||||
printf("check csq FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init m5310a Done\n" );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t __ascii2hex(char in) {
|
||||
if (('0' <= in) && (in <= '9')) {
|
||||
return in - '0';
|
||||
}
|
||||
if (('A' <= in) && (in <= 'F')) {
|
||||
return in - 'A' + 10;
|
||||
}
|
||||
if (('a' <= in) && (in <= 'f')) {
|
||||
return in - 'a' + 10;
|
||||
}
|
||||
return (uint8_t)-1;
|
||||
}
|
||||
|
||||
__STATIC__ void __asciistr2hex(char *in, uint8_t *out, int len) {
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; i += 2) {
|
||||
out[i / 2] = (__ascii2hex(in[i]) << 4) + __ascii2hex(in[i + 1]);
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t incoming_data_buffer[512];
|
||||
|
||||
__STATIC__ void m5310a_incoming_data(void)
|
||||
{
|
||||
uint8_t data=0;
|
||||
int comma_cnt = 1;
|
||||
int socket = 0;
|
||||
int data_len = 0;
|
||||
|
||||
/*+NSORF:0,1.2.3.4,1234,5,313131310A,0*/
|
||||
while (data != ',') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if(data >= '0' && data <= '9') {
|
||||
socket = socket * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
|
||||
while(comma_cnt < 3) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
comma_cnt += (data == ',') ? 1 : 0;
|
||||
}
|
||||
|
||||
// get data len
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (data < '0' || data > '9') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
int bufsz = sizeof(incoming_data_buffer) / 2;
|
||||
bufsz *= 2; // keep bufsz is even number
|
||||
|
||||
while(data_len > 0) {
|
||||
int read_cnt = 0;
|
||||
if(bufsz < data_len*2) {
|
||||
read_cnt = bufsz;
|
||||
data_len -= bufsz/2;
|
||||
} else {
|
||||
read_cnt = data_len*2;
|
||||
data_len = 0;
|
||||
}
|
||||
for(int i=0; i<read_cnt; i++) {
|
||||
if (tos_at_uart_read_timed(&data, 1, 1000) != 1) {
|
||||
return;
|
||||
}
|
||||
incoming_data_buffer[i] = data;
|
||||
}
|
||||
__asciistr2hex(incoming_data_buffer, incoming_data_buffer, read_cnt);
|
||||
tos_at_channel_write(socket, incoming_data_buffer, read_cnt/2);
|
||||
}
|
||||
|
||||
while(tos_at_uart_read_timed(&data, 1, 1000) == 1) { }
|
||||
}
|
||||
|
||||
__STATIC__ void m5310a_incoming_udp(void) {
|
||||
// +NSONMI:0,5
|
||||
// 0 socket
|
||||
// 5 length
|
||||
uint8_t data = 0;
|
||||
int socket = 0;
|
||||
int length = 0;
|
||||
while (data != ',') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(data >= '0' && data <= '9') {
|
||||
socket = socket * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
|
||||
while (data != '\n') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(data >= '0' && data <= '9') {
|
||||
length = length * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1, "AT+NSORF=%d,%d\r\n", socket, length);
|
||||
}
|
||||
|
||||
__STATIC__ void m5310a_socket_close_event(void) {
|
||||
int id = -1;
|
||||
uint8_t data = 0;
|
||||
while (data != '\n') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if(data >= '0' && data <= '9') {
|
||||
id = id * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
tos_at_channel_free(id);
|
||||
}
|
||||
|
||||
at_event_t m5310a_at_event[] = {
|
||||
{ "+NSORF:", m5310a_incoming_data },
|
||||
{ "+NSONMI:", m5310a_incoming_udp },
|
||||
{ "+NSOCLI: ", m5310a_socket_close_event },
|
||||
};
|
||||
|
||||
sal_module_t sal_module_m5310a = {
|
||||
.init = m5310a_init,
|
||||
.connect = m5310a_connect,
|
||||
.send = m5310a_send,
|
||||
.recv_timeout = m5310a_recv_timeout,
|
||||
.recv = m5310a_recv,
|
||||
.close = m5310a_close,
|
||||
.parse_domain = m5310a_parse_domain,
|
||||
};
|
||||
|
||||
int m5310a_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, m5310a_at_event,
|
||||
sizeof(m5310a_at_event) / sizeof(m5310a_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_m5310a) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,26 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __M5310A_H__
|
||||
#define __M5310A_H__
|
||||
|
||||
#include "tos_at.h"
|
||||
|
||||
int m5310a_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __M5310A_H__ */
|
||||
|
||||
@@ -1,422 +0,0 @@
|
||||
#include "stdio.h"
|
||||
#include "string.h"
|
||||
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "tencent_firmware_module_wrapper.h"
|
||||
#include "m5311_tencent_firmware.h"
|
||||
|
||||
/*
|
||||
* config dev info to module, do this operate only once in factroy is suggested
|
||||
*/
|
||||
int m5311_tencent_firmware_module_info_set(device_info_t *info, tls_mode_t mode)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCDEVINFOSET:OK");
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCDEVINFOSET=%d,\"%s\",\"%s\",\"%s\"\r\n",
|
||||
mode, info->product_id, info->device_name, info->device_serc);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* mqtt setup connect */
|
||||
int m5311_tencent_firmware_module_mqtt_conn(mqtt_param_t init_params)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTCONN:OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCMQTTCONN=%d,%d,%d,%d,%d\r\n", init_params.tls_mode,
|
||||
init_params.command_timeout, init_params.keep_alive_interval_ms,
|
||||
init_params.clean_session, init_params.auto_connect_enable);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* mqtt disconn */
|
||||
int m5311_tencent_firmware_module_mqtt_discon(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTDISCONN\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_module_mqtt_publ(const char *topic, qos_t qos, char *payload)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTPUBL=\"%s\",%d,%d\r\n", topic, qos, strlen(payload)-2);
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTPUB:OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)payload, strlen(payload));
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* mqtt pub msg */
|
||||
int m5311_tencent_firmware_module_mqtt_pub(const char *topic, qos_t qos, char *payload)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTPUB:OK");
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTPUB=\"%s\",%d,\"%s\"\r\n", topic, qos, payload);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_module_mqtt_sub(char *topic, qos_t qos)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTSUB:OK");
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCMQTTSUB=\"%s\",%d\r\n", topic, qos);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_module_mqtt_unsub(const char *topic)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCMQTTUNSUB:OK");
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCMQTTUNSUB=\"%s\"\r\n", topic);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_module_mqtt_state_get(mqtt_state_t *state)
|
||||
{
|
||||
char *str;
|
||||
int ret_state;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCMQTTSTATE?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+TCMQTTSTATE:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+TCMQTTSTATE:%d", &ret_state);
|
||||
if (ret_state == 0) {
|
||||
*state = MQTT_STATE_DISCONNECTED;
|
||||
return 0;
|
||||
} else if (ret_state == 1) {
|
||||
*state = MQTT_STATE_CONNECTED;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_module_debug_level_set(int log_level)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+TCTEMLOG=%d\r\n", log_level);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m5311_tencent_firmware_join_net(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 5000, "AT+TCREGNET?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5311_tencent_firmware_init(void)
|
||||
{
|
||||
printf("Init m5311 with tencent firmware ...\n");
|
||||
|
||||
if (m5311_tencent_firmware_join_net() != 0) {
|
||||
printf("m5311 restore FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init m5311 with tencent firmware Done\n" );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int m5311_tencent_firmware_ota_set(ota_mode_t mode, char *version)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+TCOTASET:OK");
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCOTASET=%d,\"%s\"\r\n", mode, version);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
k_sem_t ota_fw_info_sem;
|
||||
|
||||
int m5311_tencent_firmware_ota_read_fwinfo(ota_fw_info_t *ota_fw_info)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
uint8_t FileSize[10] = {0};
|
||||
uint32_t updateFileSize = 0;
|
||||
|
||||
/* wait update command frome cloud forever */
|
||||
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_info_sem, 0, 1)) {
|
||||
return -1;
|
||||
}
|
||||
tos_sem_pend(&ota_fw_info_sem, TOS_TIME_FOREVER);
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+TCFWINFO:");
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+TCFWINFO?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
|
||||
sscanf(echo_buffer, "%*[^\"]%*c%[^\"]%*[^,]%*c%[^,]%*[^\"]%*c%[^\"]", ota_fw_info->fw_version, FileSize, ota_fw_info->fw_md5);
|
||||
for(int i = 0; i<10; i++)
|
||||
{
|
||||
if(FileSize[i] == 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
updateFileSize = updateFileSize*10 + (FileSize[i] - 0x30);
|
||||
}
|
||||
ota_fw_info->fw_size = updateFileSize;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
k_chr_fifo_t ota_fw_data_chr_fifo;
|
||||
k_sem_t ota_fw_data_sem;
|
||||
|
||||
static int m5311_tencent_firmware_ota_read_fwdata(uint8_t *ota_fw_data_buffer,uint16_t read_len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if(K_ERR_NONE != tos_chr_fifo_create(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(K_ERR_NONE != tos_sem_create_max(&ota_fw_data_sem, 0, 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 300, "AT+TCREADFWDATA=%d\r\n", read_len);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_sem_pend(&ota_fw_data_sem, TOS_TIME_FOREVER);
|
||||
|
||||
return tos_chr_fifo_pop_stream(&ota_fw_data_chr_fifo, ota_fw_data_buffer, read_len);
|
||||
}
|
||||
|
||||
static mqtt_message_t mqtt_message;
|
||||
|
||||
void m5311_tencent_firmware_recvpub(void)
|
||||
{
|
||||
/*
|
||||
+TCMQTTRCVPUB:"xxx/yyy/zzz",44,"{"type":"get", "clientToken":"123456781234"}"
|
||||
*/
|
||||
|
||||
uint8_t data;
|
||||
int read_len = 0, payload_len = 0;
|
||||
|
||||
memset(&mqtt_message, 0, sizeof(mqtt_message));
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == '"') {
|
||||
continue;
|
||||
} else if (data == ',') {
|
||||
break;
|
||||
}
|
||||
if (read_len < sizeof(mqtt_message.topic)) {
|
||||
mqtt_message.topic[read_len++] = data;
|
||||
}
|
||||
}
|
||||
if (read_len == sizeof(mqtt_message.topic)) {
|
||||
mqtt_message.topic[read_len - 1] = '\0';
|
||||
} else {
|
||||
mqtt_message.topic[read_len] = '\0';
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
payload_len = payload_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (payload_len > sizeof(mqtt_message.payload)) {
|
||||
payload_len = sizeof(mqtt_message.payload);
|
||||
}
|
||||
|
||||
read_len = tos_at_uart_read((uint8_t*)mqtt_message.payload, payload_len + 2);
|
||||
if (read_len != payload_len + 2) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_mail_q_post(&mqtt_message_mail, &mqtt_message, sizeof(mqtt_message_t));
|
||||
}
|
||||
|
||||
void m5311_tencent_firmware_recvcmd(void)
|
||||
{
|
||||
/*
|
||||
+TCOTASTATUS:UPDATEFAIL
|
||||
+TCOTASTATUS:UPDATESUCCESS
|
||||
*/
|
||||
uint8_t buffer[20];
|
||||
int read_len = 13;
|
||||
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(!strstr((char*)buffer, "UPDATESUCCESS")) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_sem_post(&ota_fw_info_sem);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
void m5311_tencent_firmware_recvfwdata(void)
|
||||
{
|
||||
/*
|
||||
+TCREADFWDATA:256,<HEX Data>
|
||||
*/
|
||||
uint8_t data;
|
||||
uint16_t data_len = 0, read_len = 0;
|
||||
static uint8_t buffer[128];
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_chr_fifo_push_stream(&ota_fw_data_chr_fifo, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
|
||||
tos_sem_post(&ota_fw_data_sem);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
at_event_t m5311_tencent_firmware_at_event[] = {
|
||||
{ "+TCMQTTRCVPUB:", m5311_tencent_firmware_recvpub },
|
||||
{ "+TCREADFWDATA:", m5311_tencent_firmware_recvfwdata },
|
||||
{ "+TCOTASTATUS:", m5311_tencent_firmware_recvcmd },
|
||||
};
|
||||
|
||||
tencent_firmware_module_t tencent_firmware_module_m5311 = {
|
||||
.init = m5311_tencent_firmware_init,
|
||||
.info_set = m5311_tencent_firmware_module_info_set,
|
||||
.mqtt_conn = m5311_tencent_firmware_module_mqtt_conn,
|
||||
.mqtt_discon = m5311_tencent_firmware_module_mqtt_discon,
|
||||
.mqtt_pub = m5311_tencent_firmware_module_mqtt_pub,
|
||||
.mqtt_publ = m5311_tencent_firmware_module_mqtt_publ,
|
||||
.mqtt_sub = m5311_tencent_firmware_module_mqtt_sub,
|
||||
.mqtt_unsub = m5311_tencent_firmware_module_mqtt_unsub,
|
||||
.mqtt_state_get = m5311_tencent_firmware_module_mqtt_state_get,
|
||||
.debug_level_set = m5311_tencent_firmware_module_debug_level_set,
|
||||
.ota_set = m5311_tencent_firmware_ota_set,
|
||||
.ota_read_fwinfo = m5311_tencent_firmware_ota_read_fwinfo,
|
||||
.ota_read_fwdata = m5311_tencent_firmware_ota_read_fwdata,
|
||||
};
|
||||
|
||||
int m5311_tencent_firmware_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
int ret = -1;
|
||||
|
||||
if (tos_at_init(uart_port, m5311_tencent_firmware_at_event,
|
||||
sizeof(m5311_tencent_firmware_at_event) /
|
||||
sizeof(m5311_tencent_firmware_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_tf_module_register(&tencent_firmware_module_m5311) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if ((ret = tos_tf_module_init()) != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,28 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __m5311_TENCENT_FIRMWARE_H__
|
||||
#define __m5311_TENCENT_FIRMWARE_H__
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
|
||||
int m5311_tencent_firmware_sal_init(hal_uart_port_t uart_port);
|
||||
int m5311_tencent_firmware_join_ap(const char *ssid, const char *pwd);
|
||||
|
||||
#endif /* __m5311_TENCENT_FIRMWARE_H__ */
|
||||
|
||||
@@ -1,118 +0,0 @@
|
||||
#include "tos_k.h"
|
||||
#include "m5311_tencent_firmware.h"
|
||||
#include "tencent_firmware_module_wrapper.h"
|
||||
|
||||
|
||||
#define PRODUCT_ID "BDDSF87WEA"
|
||||
#define DEVICE_NAME "dev001"
|
||||
#define DEVICE_KEY "2/sOZRAJ6B+vMNNXS41w5g=="
|
||||
|
||||
#define REPORT_DATA_TEMPLATE "{\\\"method\\\":\\\"report\\\"\\,\\\"clientToken\\\":\\\"00000001\\\"\\,\\\"params\\\":{\\\"ch20_ppm_value\\\":%.3f}}"
|
||||
|
||||
void default_message_handler(mqtt_message_t* msg)
|
||||
{
|
||||
printf("callback:\r\n");
|
||||
printf("---------------------------------------------------------\r\n");
|
||||
printf("\ttopic:%s\r\n", msg->topic);
|
||||
printf("\tpayload:%s\r\n", msg->payload);
|
||||
printf("---------------------------------------------------------\r\n");
|
||||
}
|
||||
|
||||
char payload[256] = {0};
|
||||
static char report_topic_name[TOPIC_NAME_MAX_SIZE] = {0};
|
||||
static char report_reply_topic_name[TOPIC_NAME_MAX_SIZE] = {0};
|
||||
|
||||
k_mail_q_t mail_q;
|
||||
|
||||
|
||||
void mqtt_demo_task(void)
|
||||
{
|
||||
int ret = 0;
|
||||
int size = 0;
|
||||
int lightness = 0;
|
||||
mqtt_state_t state;
|
||||
|
||||
char *product_id = PRODUCT_ID;
|
||||
char *device_name = DEVICE_NAME;
|
||||
char *key = DEVICE_KEY;
|
||||
|
||||
device_info_t dev_info;
|
||||
memset(&dev_info, 0, sizeof(device_info_t));
|
||||
|
||||
float ch20_ppm_value = 0.067;
|
||||
|
||||
/**
|
||||
* Please Choose your AT Port first, default is HAL_UART_2(USART2)
|
||||
*/
|
||||
ret = m5311_tencent_firmware_sal_init(HAL_UART_PORT_1);
|
||||
|
||||
if (ret < 0) {
|
||||
printf("m5311 tencent firmware sal init fail, ret is %d\r\n", ret);
|
||||
}
|
||||
|
||||
strncpy(dev_info.product_id, product_id, PRODUCT_ID_MAX_SIZE);
|
||||
strncpy(dev_info.device_name, device_name, DEVICE_NAME_MAX_SIZE);
|
||||
strncpy(dev_info.device_serc, key, DEVICE_SERC_MAX_SIZE);
|
||||
tos_tf_module_info_set(&dev_info, TLS_MODE_PSK);
|
||||
|
||||
mqtt_param_t init_params = DEFAULT_MQTT_PARAMS;
|
||||
if (tos_tf_module_mqtt_conn(init_params) != 0) {
|
||||
printf("module mqtt conn fail\n");
|
||||
} else {
|
||||
printf("module mqtt conn success\n");
|
||||
}
|
||||
|
||||
if (tos_tf_module_mqtt_state_get(&state) != -1) {
|
||||
printf("MQTT: %s\n", state == MQTT_STATE_CONNECTED ? "CONNECTED" : "DISCONNECTED");
|
||||
}
|
||||
|
||||
/* ¿ªÊ¼¶©ÔÄtopic */
|
||||
size = snprintf(report_reply_topic_name, TOPIC_NAME_MAX_SIZE, "$thing/down/property/%s/%s", product_id, device_name);
|
||||
|
||||
if (size < 0 || size > sizeof(report_reply_topic_name) - 1) {
|
||||
printf("sub topic content length not enough! content size:%d buf size:%d", size, (int)sizeof(report_reply_topic_name));
|
||||
}
|
||||
if (tos_tf_module_mqtt_sub(report_reply_topic_name, QOS0, default_message_handler) != 0) {
|
||||
printf("module mqtt sub fail\n");
|
||||
} else {
|
||||
printf("module mqtt sub success\n");
|
||||
}
|
||||
|
||||
memset(report_topic_name, 0, sizeof(report_topic_name));
|
||||
size = snprintf(report_topic_name, TOPIC_NAME_MAX_SIZE, "$thing/up/property/%s/%s", product_id, device_name);
|
||||
|
||||
if (size < 0 || size > sizeof(report_topic_name) - 1) {
|
||||
printf("pub topic content length not enough! content size:%d buf size:%d", size, (int)sizeof(report_topic_name));
|
||||
}
|
||||
|
||||
|
||||
while (1) {
|
||||
|
||||
/* Éϱ¨Öµ */
|
||||
memset(payload, 0, sizeof(payload));
|
||||
snprintf(payload, sizeof(payload), REPORT_DATA_TEMPLATE, ch20_ppm_value);
|
||||
|
||||
if (lightness > 100) {
|
||||
lightness = 0;
|
||||
}
|
||||
|
||||
if (tos_tf_module_mqtt_pub(report_topic_name, QOS0, payload) != 0) {
|
||||
printf("module mqtt pub fail\n");
|
||||
break;
|
||||
} else {
|
||||
printf("module mqtt pub success\n");
|
||||
}
|
||||
|
||||
tos_sleep_ms(5000);
|
||||
}
|
||||
}
|
||||
|
||||
void application_entry(void *arg)
|
||||
{
|
||||
|
||||
mqtt_demo_task();
|
||||
while (1) {
|
||||
printf("This is a mqtt demo!\r\n");
|
||||
tos_task_delay(1000);
|
||||
}
|
||||
}
|
||||
@@ -1,525 +0,0 @@
|
||||
#include "m5313.h"
|
||||
#include "tos_k.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include "stdio.h"
|
||||
#include "stdbool.h"
|
||||
#include "ctype.h"
|
||||
|
||||
#define M5313_USE_MUX 1 //ʹ<>ö<EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
|
||||
static int m5313_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int m5313_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return m5313_recv_timeout(id, buf, len, (uint32_t)10000);
|
||||
}
|
||||
|
||||
static int m5313_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
|
||||
char buffer[100];
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sprintf(buffer,"%d,CONNECT OK\r\n",id);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, buffer);
|
||||
#if defined(M5313_USE_MUX)
|
||||
tos_at_cmd_exec_until(&echo, 10000, "AT+IPSTART=%d,\"%s\",\"%s\",%s\r\n",id,
|
||||
proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP",
|
||||
ip,port);
|
||||
#else
|
||||
tos_at_cmd_exec_until(&echo, 10000, "AT+IPSTART=\"%s\",\"%s\",%s\r\n",
|
||||
proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP",
|
||||
ip,port);
|
||||
#endif
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return id;
|
||||
}
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m5313_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
#if defined(M5313_USE_MUX)
|
||||
tos_at_cmd_exec_until(&echo, 3000, "AT+IPSEND=%d,%d\r\n",id,len);
|
||||
#else
|
||||
tos_at_cmd_exec_until(&echo, 3000, "AT+IPSEND=%d\r\n",len);
|
||||
#endif
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
printf(buf);
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send_until(&echo, 10000, buf,len);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return len;
|
||||
}
|
||||
}
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m5313_close(int id)
|
||||
{
|
||||
#if defined(M5313_USE_MUX)
|
||||
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+IPCLOSE=%d\r\n",id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
printf("close %d called\n", id);
|
||||
#else
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+IPCLOSE\r\n");
|
||||
|
||||
tos_at_channel_free(0);
|
||||
|
||||
printf("close %d called\n", 0);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
//<2F><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
static int m5313_set_cmmux(void)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+CMMUX=1\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
//<2F><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
static int m5313_reset_cmmux(void)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+CMMUX=0\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5313_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len) {
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[100];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+CMDNSGIP:");
|
||||
tos_at_cmd_exec_until(&echo, 10000, "AT+CMDNSGIP=\"%s\"\r\n", host_name);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
// printf(echo.buffer);
|
||||
/* +CMDNSGIP:"name","1.2.3.4"\r\n */
|
||||
str = strstr((const char *)echo.buffer, "+CMDNSGIP:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CMDNSGIP:\"%*[^\"]\",\"%[^\"]",host_ip);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
int iplen = strlen(host_ip);
|
||||
if (iplen > 1 && host_ip[iplen-1] == '"') {
|
||||
host_ip[iplen-1] = 0;
|
||||
}
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5313_reset(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
HAL_GPIO_WritePin(NB_RST_GPIO_Port, NB_RST_Pin, GPIO_PIN_RESET);
|
||||
tos_task_delay(200);
|
||||
HAL_GPIO_WritePin(NB_RST_GPIO_Port, NB_RST_Pin, GPIO_PIN_SET);
|
||||
tos_task_delay(200);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CTZV:");
|
||||
tos_at_cmd_exec_until(&echo, 60000, "AT+TRB\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m5313_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5313_pin_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CPIN:READY");
|
||||
tos_at_cmd_exec_until(&echo, 5000, "AT+CPIN?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m5313_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "+CSQ:");
|
||||
tos_at_cmd_exec_until(&echo, 5000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
return -1;
|
||||
}
|
||||
printf(echo.buffer);
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi == 99) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
//Network switching mode ---Automatic mode
|
||||
static int m5313_Net_switch_mode(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CFGDUALMODE: 1,0\r\n");
|
||||
tos_at_cmd_exec_until(&echo, 5000, "AT+CFGDUALMODE?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT){
|
||||
return 0;
|
||||
}else{
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CFGDUALMODE=1,0\r\n");
|
||||
if(echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
if (m5313_reset() != 0) {
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
//
|
||||
static int m5313_Check_net_type(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+COPS: 0,2,\"46000\", 0");
|
||||
tos_at_cmd_exec_until(&echo, 8000, "AT+COPS?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CTZV:");
|
||||
tos_at_cmd_exec_until(&echo, 25000, "AT+CFGRATPRIO=2\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}else{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
//
|
||||
static int m5313_Check_sim_numb(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+CIMI\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5313_cm_head(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CMHEAD=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5313_cm_showpt(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CMSHOWPT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5313_cm_showra0(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CMSHOWRA=0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m5313_activate(void) {
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 5) {
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+CGACT=1,1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
static int m5313_Activate_pdp(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CGACT: 1, 1\r\n");
|
||||
tos_at_cmd_exec_until(&echo, 2000, "AT+CGACT?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec_until(&echo, 20000, "AT+CGACT=1,1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m5313_init(void)
|
||||
{
|
||||
printf("Init M5313 ...\n" );
|
||||
|
||||
if (m5313_reset() != 0) {
|
||||
printf("m5313 reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5313_echo_close() != 0) {
|
||||
printf("m5313 echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5313_pin_ready() != 0) {
|
||||
printf("m5313 pin not ready\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m5313_Net_switch_mode() != 0) {
|
||||
printf("nb Netswitch mode err!\n");
|
||||
// return -1;
|
||||
}
|
||||
|
||||
if (m5313_Check_net_type() != 0) {
|
||||
printf("nb net type err!\n");
|
||||
}
|
||||
|
||||
if (m5313_signal_quality_check() != 0) {
|
||||
printf("nb signal err!\n");
|
||||
}
|
||||
|
||||
if (m5313_activate() != 0) {
|
||||
printf("nb pdp err!\n");
|
||||
}
|
||||
|
||||
|
||||
if (m5313_cm_head() != 0) {
|
||||
printf("cm head err!\n");
|
||||
}
|
||||
|
||||
|
||||
if (m5313_cm_showpt() != 0) {
|
||||
printf("cm showpt err!\n");
|
||||
}
|
||||
|
||||
#if defined(M5313_USE_MUX)
|
||||
if (m5313_set_cmmux() != 0) {
|
||||
printf("cm showpt err!\n");
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define M5313_INCOMING_DATA_LEN 2048
|
||||
__STATIC__ uint8_t incoming_data_buffer[M5313_INCOMING_DATA_LEN];
|
||||
|
||||
__STATIC__ void m5313_server_ip_port(void)
|
||||
{
|
||||
|
||||
}
|
||||
#if defined(M5313_USE_MUX)
|
||||
__STATIC__ void m5313_incoming_data(void)
|
||||
{
|
||||
uint8_t data=0;
|
||||
int id = 0;
|
||||
int data_len = 0;
|
||||
int discard_suffix = 1;
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if(data >= '0' && data <= '9') {
|
||||
id = data - '0';
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(data >= '0' && data <= '9') {
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}else if(data == ':'){
|
||||
break;
|
||||
}else{
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (data_len > sizeof(incoming_data_buffer)) {
|
||||
discard_suffix = 0;
|
||||
data_len = sizeof(incoming_data_buffer);
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_at_channel_write(id, incoming_data_buffer, data_len);
|
||||
|
||||
// printf(incoming_data_buffer);
|
||||
|
||||
}
|
||||
|
||||
#else
|
||||
__STATIC__ void m5313_incoming_data(void)
|
||||
{
|
||||
uint8_t data=0;
|
||||
int data_len = 0;
|
||||
int discard_suffix = 1;
|
||||
|
||||
while (data != ':') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(data >= '0' && data <= '9') {
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
|
||||
if (data_len > sizeof(incoming_data_buffer)) {
|
||||
discard_suffix = 0;
|
||||
data_len = sizeof(incoming_data_buffer);
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
tos_at_channel_write(0, incoming_data_buffer, data_len);
|
||||
|
||||
// printf(incoming_data_buffer);
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
at_event_t m5313_at_event[] = {
|
||||
{"+RECV FROM:", m5313_server_ip_port},
|
||||
#if defined(M5313_USE_MUX)
|
||||
{"+RECEIVE,", m5313_incoming_data },
|
||||
#else
|
||||
{"+IPD,", m5313_incoming_data },
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
sal_module_t sal_module_m5313 = {
|
||||
.init = m5313_init,
|
||||
.connect = m5313_connect,
|
||||
.send = m5313_send,
|
||||
.recv_timeout = m5313_recv_timeout,
|
||||
.recv = m5313_recv,
|
||||
.close = m5313_close,
|
||||
.parse_domain = m5313_parse_domain,
|
||||
};
|
||||
|
||||
int m5313_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, m5313_at_event,
|
||||
sizeof(m5313_at_event) / sizeof(m5313_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_m5313) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,26 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __M5313_H__
|
||||
#define __M5313_H__
|
||||
|
||||
#include "tos_at.h"
|
||||
|
||||
int m5313_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __M5313_H__ */
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,422 +0,0 @@
|
||||
#include "tos_at.h"
|
||||
#include "m6312.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
|
||||
static int m6312_reset(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 20000, "AT+CMRESET\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m6312_wait_ok(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_pin_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CPIN: READY");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_activate(void) {
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
while (try++ < 5) {
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+CGACT=1,1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_attach_gprs() {
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "1");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGATT=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_enable_head() {
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CMHEAD=1\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
static int m6312_reconnect_init(void)
|
||||
{
|
||||
if (m6312_echo_close() != 0) {
|
||||
printf("m6312 echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m6312_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
|
||||
m6312_reconnect_init();
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
|
||||
tos_at_cmd_exec_until(&echo, 10000,
|
||||
"AT+IPSTART=\"%s\",\"%s\",%s\r\n",
|
||||
proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, port);
|
||||
if (echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return id;
|
||||
}
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int m6312_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int m6312_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return m6312_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
static int m6312_is_link_broken(const char *echo_buffer)
|
||||
{
|
||||
if (strstr(echo_buffer, "CLOSED") ||
|
||||
strstr(echo_buffer, "TIMEOUT")) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int m6312_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), ">");
|
||||
tos_at_cmd_exec(&echo, 3000, "AT+IPSEND=%d\r\n", len);
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
if (m6312_is_link_broken((const char *)echo.buffer)) {
|
||||
tos_at_channel_set_broken(id);
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "SEND OK");
|
||||
|
||||
/*
|
||||
ATTENTION: we should wait util "SEND OK" is echoed, otherwise the next
|
||||
time we execute at command, the m6312 maybe in a "busy s ..." state.
|
||||
*/
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
if (m6312_is_link_broken((const char *)echo.buffer)) {
|
||||
tos_at_channel_set_broken(id);
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static int m6312_sendto(int id, char *ip, char *port, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
if (!tos_at_channel_is_working(id)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), ">");
|
||||
|
||||
if (ip && port) {
|
||||
tos_at_cmd_exec(&echo, 3000,
|
||||
"AT+CIPSEND=%d,\"%s\",%s\r\n", len, ip, port);
|
||||
} else {
|
||||
tos_at_cmd_exec(&echo, 3000,
|
||||
"AT+CIPSEND=%d\r\n", len);
|
||||
}
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
if (m6312_is_link_broken((const char *)echo.buffer)) {
|
||||
tos_at_channel_set_broken(id);
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), "SEND OK");
|
||||
|
||||
/*
|
||||
ATTENTION: we should wait util "SEND OK" is echoed, otherwise the next
|
||||
time we execute at command, the m6312 maybe in a "busy s ..." state.
|
||||
*/
|
||||
tos_at_raw_data_send_until(&echo, 10000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
if (m6312_is_link_broken((const char *)echo.buffer)) {
|
||||
tos_at_channel_set_broken(id);
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return len;
|
||||
}
|
||||
|
||||
static int m6312_recvfrom_timeout(int id, char *ip, char *port, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int m6312_recvfrom(int id, char *ip, char *port, void *buf, size_t len)
|
||||
{
|
||||
return m6312_recvfrom_timeout(id, ip, port, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
static int m6312_close(int id)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+IPCLOSE\r\n");
|
||||
tos_at_channel_free(id);
|
||||
return 0;
|
||||
}
|
||||
static int m6312_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len) {
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
m6312_reconnect_init();
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 5000, "AT+CDNSGIP=\"%s\"\r\n", host_name);
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* +CDNSGIP: "1.2.3.4"\r\n */
|
||||
str = strstr((const char *)echo.buffer, "+CDNSGIP:");
|
||||
if (!str) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CDNSGIP: \"%s\"", host_ip);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
int iplen = strlen(host_ip);
|
||||
if (iplen > 1 && host_ip[iplen-1] == '"') {
|
||||
host_ip[iplen-1] = 0;
|
||||
}
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int m6312_init(void)
|
||||
{
|
||||
printf("Init M6312 ...\n" );
|
||||
|
||||
if (m6312_reset() != 0) {
|
||||
printf("m6312 reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (m6312_wait_ok() != 0) {
|
||||
printf("m6312 start FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m6312_echo_close() != 0) {
|
||||
printf("m6312 echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m6312_pin_ready() != 0) {
|
||||
printf("m6312 pin not ready\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m6312_activate()) {
|
||||
printf("m6312 activate FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (m6312_attach_gprs()) {
|
||||
printf("m6312 attach gprs FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (m6312_enable_head()) {
|
||||
printf("m6312 enable recv head FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init M6312 Done\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t incoming_data_buffer[512];
|
||||
__STATIC__ void m6312_incoming_data_process(void)
|
||||
{
|
||||
// <IPDATA: 4>\r\nDATA\r\nOK\r\n
|
||||
//
|
||||
// "<IPDATA: " prefix
|
||||
// "4" data length
|
||||
// "\r\nOK\r\n" suffix
|
||||
|
||||
uint8_t data=0;
|
||||
int data_len = 0;
|
||||
int discard_suffix = 1;
|
||||
|
||||
while (data != '\n') {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
|
||||
if(data >= '0' && data <= '9') {
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
}
|
||||
|
||||
if (data_len > sizeof(incoming_data_buffer)) {
|
||||
discard_suffix = 0;
|
||||
data_len = sizeof(incoming_data_buffer);
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
// discard suffix "\r\nOK\r\n"
|
||||
while(discard_suffix && (tos_at_uart_read_timed(&data, 1, 1000) == 1)) { }
|
||||
|
||||
tos_at_channel_write(0, incoming_data_buffer, data_len);
|
||||
|
||||
}
|
||||
|
||||
at_event_t m6312_at_event[] = {
|
||||
{ "<IPDATA: ", m6312_incoming_data_process },
|
||||
};
|
||||
|
||||
sal_module_t sal_module_m6312 = {
|
||||
.init = m6312_init,
|
||||
.connect = m6312_connect,
|
||||
.send = m6312_send,
|
||||
.recv_timeout = m6312_recv_timeout,
|
||||
.recv = m6312_recv,
|
||||
.sendto = m6312_sendto,
|
||||
.recvfrom = m6312_recvfrom,
|
||||
.recvfrom_timeout = m6312_recvfrom_timeout,
|
||||
.close = m6312_close,
|
||||
.parse_domain = m6312_parse_domain,
|
||||
};
|
||||
|
||||
int m6312_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, m6312_at_event,
|
||||
sizeof(m6312_at_event) / sizeof(m6312_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_m6312) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,26 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __M6312_H_
|
||||
#define __M6312_H_
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
|
||||
int m6312_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __M6312_H_ */
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,517 +0,0 @@
|
||||
#include "tos_at.h"
|
||||
#include "ml302.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
#include "main.h"
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
static int ml302_wait_ok(void)
|
||||
{
|
||||
|
||||
int try = 0;
|
||||
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
|
||||
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
|
||||
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_pin_ready(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CPIN: READY");
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
|
||||
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_gsm_network_check(void)
|
||||
{
|
||||
int stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CFUN?\r\n");
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CFUN:");
|
||||
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CFUN:%d", &stat);
|
||||
|
||||
if (stat == 1)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
|
||||
if (rssi != 99)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_set_gprs_apn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+CGDCONT=1,\"IP\",\"CMIOT\"\r\n");
|
||||
|
||||
if (echo.status == AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1 ;
|
||||
}
|
||||
|
||||
static int ml302_activate(void)
|
||||
{
|
||||
int n, stat;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
int try = 0;
|
||||
|
||||
while (try++ < 10)
|
||||
{
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 6000, "AT+CGACT=1,1\r\n");
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CGACT:");
|
||||
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
sscanf(str, "+CGACT:%d,%d", &n, &stat);
|
||||
|
||||
if (stat == 1)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int ml302_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
char except_str[16];
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
|
||||
if (id == -1)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
sprintf(except_str, "%d,CONNECT OK", id);
|
||||
tos_at_echo_create(&echo, NULL, 0, except_str);
|
||||
tos_at_cmd_exec_until(&echo, 6000, "AT+MIPOPEN=%d,\"%s\",\"%s\",%d\r\n",
|
||||
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT )
|
||||
{
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return id;
|
||||
}
|
||||
|
||||
static int ml302_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int ml302_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return ml302_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ml302_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
int ml302_recvfrom(int id, void *buf, size_t len)
|
||||
{
|
||||
return ml302_recvfrom_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int ml302_sendto(int id, char *ip, char *port, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec_until(&echo, 1000, "AT+MIPSEND=%d,%d\r\n", id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
int ml302_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+MIPSEND=%d,%d\r\n",
|
||||
id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
|
||||
{
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
return 0 ;
|
||||
}
|
||||
|
||||
|
||||
static void ml302_transparent_mode_exit(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(NULL, 500, "+++");
|
||||
}
|
||||
|
||||
|
||||
static int ml302_close(int id)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
ml302_transparent_mode_exit();
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 1000, "AT+MIPCLOSE=%d\r\n", id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int ml302_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+MDNSGIP=\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
+MDNSGIP: 0,"www.baidu.com","39.156.66.14","39.156.66.18"
|
||||
*/
|
||||
|
||||
int seg1, seg2, seg3, seg4;
|
||||
str = strstr(echo.buffer, "+MDNSGIP: 0,");
|
||||
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
str += strlen("+MDNSGIP: 0,\"") + strlen(host_name) + 3;
|
||||
sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ml302_init(void)
|
||||
{
|
||||
printf("Init ML302 ...\n" );
|
||||
|
||||
if (ml302_wait_ok() != 0)
|
||||
{
|
||||
printf("ml302 start FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ml302_echo_close() != 0)
|
||||
{
|
||||
printf("ml302 echo close FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ml302_pin_ready() != 0)
|
||||
{
|
||||
printf("ml302 pin not ready\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(ml302_gsm_network_check() != 0)
|
||||
{
|
||||
printf("ml302 GSM network register status check fail\n");
|
||||
return -1 ;
|
||||
}
|
||||
|
||||
if (ml302_signal_quality_check() != 0)
|
||||
{
|
||||
printf("ml302 signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ml302_set_gprs_apn() != 0)
|
||||
{
|
||||
printf("ml302 set gprs_apn failed\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ml302_activate())
|
||||
{
|
||||
printf("ml302 activate FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init ML302 Done\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ void ml302_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
int channel_id = 0, data_len = 0, read_len;
|
||||
uint8_t buffer[128];
|
||||
|
||||
/*
|
||||
+MIPURC: "recv",<sockid>,<datalen>
|
||||
<data content>
|
||||
*/
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == ',')
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (data == '\r')
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
if (tos_at_uart_read(&data, 1) != 1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
}
|
||||
while (data_len > 0);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
at_event_t ml302_at_event[] =
|
||||
{
|
||||
{ "+MIPURC: \"recv\",", ml302_incoming_data_process },
|
||||
};
|
||||
|
||||
|
||||
sal_module_t sal_module_ml302 =
|
||||
{
|
||||
.init = ml302_init,
|
||||
.connect = ml302_connect,
|
||||
.send = ml302_send,
|
||||
.recv = ml302_recv,
|
||||
.recv_timeout = ml302_recv_timeout,
|
||||
.sendto = ml302_sendto,
|
||||
.recvfrom = ml302_recvfrom,
|
||||
.recvfrom_timeout = ml302_recvfrom_timeout,
|
||||
.close = ml302_close,
|
||||
.parse_domain = ml302_parse_domain,
|
||||
};
|
||||
|
||||
int ml302_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, ml302_at_event,
|
||||
sizeof(ml302_at_event) / sizeof(ml302_at_event[0])) != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_ml302) != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_init() != 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,25 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __ML302_H_
|
||||
#define __ML302_H_
|
||||
|
||||
#include "tos_hal.h"
|
||||
|
||||
int ml302_sal_init(hal_uart_port_t uart_port);
|
||||
|
||||
#endif /* __ML302_H_ */
|
||||
@@ -1,34 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,464 +0,0 @@
|
||||
#include "nrf24l01.h"
|
||||
#include "tos_k.h"
|
||||
|
||||
static nrf_init_t g_nrf;
|
||||
|
||||
int nrf_init(nrf_init_t *ni) {
|
||||
|
||||
memcpy(&g_nrf, ni, sizeof(nrf_init_t));
|
||||
|
||||
return g_nrf.init(g_nrf.private);
|
||||
}
|
||||
|
||||
void nrf_flush_rx() {
|
||||
nrf_write_cmd(CMD_FLUSH_RX);
|
||||
}
|
||||
|
||||
void nrf_flush_tx() {
|
||||
nrf_write_cmd(CMD_FLUSH_TX);
|
||||
}
|
||||
|
||||
|
||||
void nrf_delay(uint32_t delay) {
|
||||
tos_task_delay(delay);
|
||||
}
|
||||
|
||||
|
||||
int nrf_powerup() {
|
||||
return nrf_set_reg_bit(REG_CONFIG, PWR_UP);
|
||||
}
|
||||
|
||||
int nrf_powerdown() {
|
||||
return nrf_clear_reg_bit(REG_CONFIG, PWR_UP);
|
||||
}
|
||||
|
||||
void nrf_enable_rx_irq() {
|
||||
nrf_clear_reg_bit(REG_CONFIG, MASK_RX_DR);
|
||||
}
|
||||
|
||||
void nrf_disable_rx_irq() {
|
||||
nrf_set_reg_bit(REG_CONFIG, MASK_RX_DR);
|
||||
}
|
||||
|
||||
void nrf_enable_tx_irq() {
|
||||
nrf_clear_reg_bit(REG_CONFIG, MASK_TX_DS);
|
||||
}
|
||||
|
||||
void nrf_disable_tx_irq() {
|
||||
nrf_set_reg_bit(REG_CONFIG, MASK_TX_DS);
|
||||
}
|
||||
|
||||
void nrf_enable_max_rt_irq() {
|
||||
nrf_clear_reg_bit(REG_CONFIG, MASK_MAX_RT);
|
||||
}
|
||||
|
||||
void nrf_disable_max_rt_irq() {
|
||||
nrf_set_reg_bit(REG_CONFIG, MASK_MAX_RT);
|
||||
}
|
||||
|
||||
void nrf_set_rf_channel(uint8_t channel) {
|
||||
channel &= 0x7F;
|
||||
nrf_write_reg_byte(REG_RF_CH, channel);
|
||||
}
|
||||
|
||||
int nrf_set_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t addrlen) {
|
||||
if(addrlen >= 6 || pipe >= 6) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(pipe >= 2) {
|
||||
addrlen = 1;
|
||||
}
|
||||
|
||||
uint8_t reg = REG_RX_ADDR_P0 + pipe;
|
||||
|
||||
|
||||
return nrf_write_reg(reg, addr, addrlen);
|
||||
}
|
||||
|
||||
int nrf_get_addrlen() {
|
||||
uint8_t v = 0;
|
||||
uint8_t addrlen = 0;
|
||||
if(0 != nrf_read_reg_byte(REG_SETUP_AW, &v)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
v &= 0x03;
|
||||
|
||||
switch(v) {
|
||||
case AW_3BYTES:
|
||||
addrlen = 3;
|
||||
break;
|
||||
case AW_4BYTES:
|
||||
addrlen = 4;
|
||||
break;
|
||||
case AW_5BYTES:
|
||||
addrlen = 5;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return addrlen;
|
||||
}
|
||||
|
||||
int nrf_get_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t *addrlen) {
|
||||
|
||||
*addrlen = nrf_get_addrlen();
|
||||
|
||||
uint8_t reg = REG_RX_ADDR_P0 + pipe;
|
||||
|
||||
return nrf_read_reg(reg, addr, *addrlen);
|
||||
}
|
||||
|
||||
int nrf_get_txaddr(uint8_t *addr, uint8_t *addrlen) {
|
||||
*addrlen = nrf_get_addrlen();
|
||||
return nrf_read_reg(REG_TX_ADDR, addr, *addrlen);
|
||||
}
|
||||
|
||||
int nrf_set_txaddr(uint8_t *addr, uint8_t addrlen) {
|
||||
if(addrlen >= 6) {
|
||||
return -1;
|
||||
}
|
||||
return nrf_write_reg(REG_TX_ADDR, addr, addrlen);
|
||||
}
|
||||
|
||||
int nrf_enable_rxaddr(uint8_t pipe) {
|
||||
if(pipe >= 6) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
nrf_set_reg_bit(REG_EN_RXADDR, pipe);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void nrf_reset_registers() {
|
||||
nrf_write_reg_byte(REG_CONFIG, _BV(EN_CRC));
|
||||
nrf_write_reg_byte(REG_EN_AA, _BV(ENAA_P0) | _BV(ENAA_P1) | _BV(ENAA_P2) | _BV(ENAA_P3) | _BV(ENAA_P4) | _BV(ENAA_P5));
|
||||
nrf_write_reg_byte(REG_EN_RXADDR, _BV(ERX_P0) | _BV(ERX_P1));
|
||||
nrf_write_reg_byte(REG_SETUP_AW, _VV(AW_5BYTES, AW));
|
||||
nrf_write_reg_byte(REG_SETUP_RETR, _VV(ARD_250us, ARD) | _VV(ARC_3, ARC));
|
||||
nrf_write_reg_byte(REG_RF_CH, 0b00000010);
|
||||
nrf_write_reg_byte(REG_RF_SETUP, _BV(RF_DR) | _VV(RF_PWR_0dBm, RF_PWR));
|
||||
|
||||
uint8_t status = 0;
|
||||
nrf_read_reg_byte(REG_STATUS, &status);
|
||||
if(status & _BV(RX_DR)) {
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
|
||||
}
|
||||
if(status & _BV(TX_DS)) {
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
|
||||
}
|
||||
if(status & _BV(MAX_RT)) {
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
|
||||
}
|
||||
|
||||
nrf_write_reg_byte(REG_RX_PW_P0, 0);
|
||||
nrf_write_reg_byte(REG_RX_PW_P1, 0);
|
||||
nrf_write_reg_byte(REG_RX_PW_P2, 0);
|
||||
nrf_write_reg_byte(REG_RX_PW_P3, 0);
|
||||
nrf_write_reg_byte(REG_RX_PW_P4, 0);
|
||||
nrf_write_reg_byte(REG_RX_PW_P5, 0);
|
||||
nrf_write_reg_byte(REG_DYNPD, 0);
|
||||
nrf_write_reg_byte(REG_FEATURE, 0);
|
||||
|
||||
uint8_t addrp0[] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7};
|
||||
uint8_t addrp1[] = {0xC2, 0xC2, 0xC2, 0xC2, 0xC2};
|
||||
nrf_write_reg(REG_TX_ADDR, addrp0, 5);
|
||||
nrf_write_reg(REG_RX_ADDR_P0, addrp0, 5);
|
||||
nrf_write_reg(REG_RX_ADDR_P1, addrp1, 5);
|
||||
nrf_write_reg_byte(REG_RX_ADDR_P2, 0xC3);
|
||||
nrf_write_reg_byte(REG_RX_ADDR_P3, 0xC4);
|
||||
nrf_write_reg_byte(REG_RX_ADDR_P4, 0xC5);
|
||||
nrf_write_reg_byte(REG_RX_ADDR_P5, 0xC6);
|
||||
|
||||
nrf_flush_rx();
|
||||
nrf_flush_tx();
|
||||
}
|
||||
|
||||
void nrf_set_standby_mode() {
|
||||
nrf_ce(0);
|
||||
nrf_powerdown();
|
||||
nrf_reset_registers();
|
||||
nrf_delay(10);
|
||||
|
||||
nrf_powerup();
|
||||
nrf_delay(10); // 10m > 1.5~2ms
|
||||
}
|
||||
|
||||
|
||||
|
||||
void nrf_set_receive_mode() {
|
||||
nrf_set_reg_bit(REG_CONFIG, PRIM_RX);
|
||||
|
||||
nrf_ce(1);
|
||||
|
||||
nrf_delay(1); // 1ms > 120~130us
|
||||
}
|
||||
|
||||
void nrf_set_send_mode() {
|
||||
nrf_clear_reg_bit(REG_CONFIG, PRIM_RX);
|
||||
|
||||
nrf_ce(1);
|
||||
|
||||
nrf_delay(1); // 1ms > 120~130us
|
||||
}
|
||||
|
||||
void nrf_enable_autoack(uint8_t pipe) {
|
||||
if(pipe >= 6) {
|
||||
return ;
|
||||
}
|
||||
|
||||
nrf_set_reg_bit(REG_EN_AA, pipe);
|
||||
}
|
||||
|
||||
void nrf_disable_autoack(uint8_t pipe) {
|
||||
if(pipe >= 6) {
|
||||
return ;
|
||||
}
|
||||
|
||||
nrf_clear_reg_bit(REG_EN_AA, pipe);
|
||||
}
|
||||
|
||||
|
||||
void nrf_set_datarate(uint8_t dr) {
|
||||
|
||||
if(NRF_1Mbps == dr) {
|
||||
dr = 0;
|
||||
} else if(NRF_2Mbps == dr) {
|
||||
nrf_write_reg_byte(REG_RF_SETUP, 0b00001110);
|
||||
nrf_write_reg_byte(REG_SETUP_RETR, 0b00010011);
|
||||
} else {
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
int nrf_enable_dynamic_payload(uint8_t pipe) {
|
||||
if(pipe >= 6) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint8_t feature = 0;
|
||||
uint8_t dynpd = 0;
|
||||
|
||||
nrf_read_reg_byte(REG_FEATURE, &feature);
|
||||
nrf_read_reg_byte(REG_DYNPD, &dynpd);
|
||||
|
||||
feature |= _BV(EN_DPL);
|
||||
dynpd |= _BV(pipe);
|
||||
|
||||
nrf_write_reg_byte(REG_DYNPD, dynpd);
|
||||
nrf_write_reg_byte(REG_FEATURE, feature);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int nrf_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
|
||||
// 读数据通道
|
||||
uint8_t status = 0;
|
||||
nrf_read_reg_byte(REG_STATUS, &status);
|
||||
*pipe = ((status>>1) & 0x07);
|
||||
|
||||
// 读数据长度
|
||||
nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
|
||||
|
||||
// 读数据
|
||||
nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
|
||||
|
||||
// 清除数据标志位
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
|
||||
|
||||
// 清空接收缓冲区
|
||||
nrf_flush_rx();
|
||||
|
||||
if(*pipe >= 6) {
|
||||
*len = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int nrf_poll_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
|
||||
while(1) {
|
||||
// 读数据通道
|
||||
uint8_t status = 0;
|
||||
nrf_read_reg_byte(REG_STATUS, &status);
|
||||
if((status & _BV(RX_DR)) == 0) {
|
||||
nrf_delay(1);
|
||||
continue;
|
||||
}
|
||||
|
||||
*pipe = ((status>>1) & 0x07);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
// 读数据长度
|
||||
nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
|
||||
|
||||
// 读数据
|
||||
nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
|
||||
|
||||
// 清除数据标志位
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
|
||||
|
||||
// 清空接收缓冲区
|
||||
nrf_flush_rx();
|
||||
|
||||
if(*pipe >= 6) {
|
||||
*len = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int nrf_write_payload(uint8_t *buf, uint8_t len) {
|
||||
nrf_write_cmd_and_data(CMD_W_TX_PAYLOAD_NOACK, buf, len);
|
||||
|
||||
while(1) {
|
||||
uint8_t status = 0;
|
||||
nrf_read_reg_byte(REG_STATUS, &status);
|
||||
if(status & _BV(TX_DS)) {
|
||||
nrf_delay(1);
|
||||
}
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
|
||||
nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void nrf_ce(uint8_t mode) {
|
||||
g_nrf.ce(mode);
|
||||
}
|
||||
|
||||
void nrf_csn(uint8_t mode) {
|
||||
g_nrf.csn(mode);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int nrf_read_reg(uint8_t reg, uint8_t *buf, uint8_t len) {
|
||||
uint8_t cmd = CMD_R_REGISTER | reg;
|
||||
|
||||
nrf_csn(0);
|
||||
|
||||
g_nrf.spi_send(&cmd, 1);
|
||||
|
||||
g_nrf.spi_recv(buf, len);
|
||||
|
||||
nrf_csn(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int nrf_write_reg(uint8_t reg, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
uint8_t cmd = CMD_W_REGISTER | reg;
|
||||
|
||||
nrf_csn(0);
|
||||
|
||||
g_nrf.spi_send(&cmd, 1);
|
||||
|
||||
g_nrf.spi_send(buf, len);
|
||||
|
||||
nrf_csn(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int nrf_cmd_read(uint8_t cmd, uint8_t *data, uint8_t len) {
|
||||
nrf_csn(0);
|
||||
|
||||
g_nrf.spi_send(&cmd, 1);
|
||||
|
||||
g_nrf.spi_recv(data, len);
|
||||
|
||||
nrf_csn(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int nrf_write_cmd_and_data(uint8_t cmd, uint8_t *data, uint8_t len) {
|
||||
nrf_csn(0);
|
||||
|
||||
g_nrf.spi_send(&cmd, 1);
|
||||
|
||||
g_nrf.spi_send(data, len);
|
||||
|
||||
nrf_csn(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int nrf_cmd_read_byte(uint8_t cmd, uint8_t *data) {
|
||||
return nrf_cmd_read(cmd, data, 1);
|
||||
}
|
||||
|
||||
int nrf_write_cmd(uint8_t cmd) {
|
||||
nrf_csn(0);
|
||||
|
||||
g_nrf.spi_send(&cmd, 1);
|
||||
|
||||
nrf_csn(1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int nrf_read_reg_byte(uint8_t reg, uint8_t *v) {
|
||||
return nrf_read_reg(reg, v, 1);
|
||||
}
|
||||
|
||||
int nrf_write_reg_byte(uint8_t reg, uint8_t byte) {
|
||||
return nrf_write_reg(reg, &byte, 1);
|
||||
}
|
||||
|
||||
int nrf_clear_reg_bit(uint8_t reg, uint8_t bit) {
|
||||
uint8_t v = 0;
|
||||
|
||||
if(0 != nrf_read_reg_byte(reg, &v)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
v &= ~_BV(bit);
|
||||
|
||||
if(0 != nrf_write_reg_byte(reg, v)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int nrf_set_reg_bit(uint8_t reg, uint8_t bit) {
|
||||
uint8_t v = 0;
|
||||
|
||||
if(0 != nrf_read_reg_byte(reg, &v)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
v |= _BV(bit);
|
||||
|
||||
if(0 != nrf_write_reg_byte(reg, v)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -1,375 +0,0 @@
|
||||
#ifndef NRF24L01_H_
|
||||
#define NRF24L01_H_
|
||||
|
||||
#include "stdint.h"
|
||||
|
||||
typedef struct {
|
||||
int (*init)(void *private);
|
||||
void (*csn)(uint8_t mode);
|
||||
void (*ce)(uint8_t mode);
|
||||
void (*spi_send)(uint8_t *buf, uint8_t len);
|
||||
void (*spi_recv)(uint8_t *buf, uint8_t len);
|
||||
void *private;
|
||||
} nrf_init_t;
|
||||
|
||||
#define REG_CONFIG 0x00
|
||||
// 屏蔽因RX_DR触发的中断
|
||||
// 0 不屏蔽， 1 屏蔽
|
||||
#define MASK_RX_DR 6
|
||||
// 屏蔽因TX_DS触发的中断
|
||||
// 0 不屏蔽， 1 屏蔽
|
||||
#define MASK_TX_DS 5
|
||||
// 屏蔽因MAX_RT触发的中断
|
||||
// 0 不屏蔽， 1 屏蔽
|
||||
#define MASK_MAX_RT 4
|
||||
// 启用CRC
|
||||
// 如果EN_AA有一个比特为1，就会被强制置1
|
||||
#define EN_CRC 3
|
||||
// CRC编码方式
|
||||
// 0 一字节，1 二字节
|
||||
#define CRCO 2
|
||||
// 0 POWER DOWN, 1 POWER UP
|
||||
#define PWR_UP 1
|
||||
// 收发控制
|
||||
// 0 PTX, 1 PRX
|
||||
#define PRIM_RX 0
|
||||
|
||||
|
||||
#define REG_EN_AA 0x01
|
||||
// Enable相应data pipe的自动Ack
|
||||
#define ENAA_P5 5
|
||||
#define ENAA_P4 4
|
||||
#define ENAA_P3 3
|
||||
#define ENAA_P2 2
|
||||
#define ENAA_P1 1
|
||||
#define ENAA_P0 0
|
||||
|
||||
|
||||
#define REG_EN_RXADDR 0x02
|
||||
// Enable相应的data pipe
|
||||
#define ERX_P5 5
|
||||
#define ERX_P4 4
|
||||
#define ERX_P3 3
|
||||
#define ERX_P2 2
|
||||
#define ERX_P1 1
|
||||
#define ERX_P0 0
|
||||
|
||||
|
||||
#define REG_SETUP_AW 0x03
|
||||
// RX、TX地址宽度, AW占两个比特位
|
||||
// 00 illegal
|
||||
// 01 3字节
|
||||
// 10 4字节
|
||||
// 11 5字节
|
||||
#define AW 0
|
||||
#define AW_3BYTES 1
|
||||
#define AW_4BYTES 2
|
||||
#define AW_5BYTES 3
|
||||
|
||||
|
||||
|
||||
#define REG_SETUP_RETR 0x04
|
||||
// ARD, Auto Retransmit Delay占7:4共4个比特位
|
||||
// 0000 250us
|
||||
// 0001 500us
|
||||
// 0010 750us
|
||||
// ...
|
||||
// 1111 4000us
|
||||
#define ARD 4
|
||||
#define ARD_250us 0
|
||||
#define ARD_500us 1
|
||||
#define ARD_750us 2
|
||||
#define ARD_1000us 3
|
||||
#define ARD_1250us 4
|
||||
#define ARD_1500us 5
|
||||
#define ARD_1750us 6
|
||||
#define ARD_2000us 7
|
||||
#define ARD_2250us 8
|
||||
#define ARD_2500us 9
|
||||
#define ARD_2750us 10
|
||||
#define ARD_3000us 11
|
||||
#define ARD_3250us 12
|
||||
#define ARD_3500us 13
|
||||
#define ARD_3750us 14
|
||||
#define ARD_4000us 15
|
||||
|
||||
// ARC, Auto Retransmit Count占3:0共4个比特
|
||||
// 0000 Re-Transmit disabled
|
||||
// 0001 最多重试一次
|
||||
// ...
|
||||
// 1111 最多重度15次
|
||||
#define ARC 0
|
||||
#define ARC_0 0
|
||||
#define ARC_1 1
|
||||
#define ARC_2 2
|
||||
#define ARC_3 3
|
||||
#define ARC_4 4
|
||||
#define ARC_5 5
|
||||
#define ARC_6 6
|
||||
#define ARC_7 7
|
||||
#define ARC_8 8
|
||||
#define ARC_9 9
|
||||
#define ARC_10 10
|
||||
#define ARC_11 11
|
||||
#define ARC_12 12
|
||||
#define ARC_13 13
|
||||
#define ARC_14 14
|
||||
#define ARC_15 15
|
||||
|
||||
|
||||
// RF Channel选择
|
||||
// 占6:0共7个比特
|
||||
#define REG_RF_CH 0x05
|
||||
|
||||
|
||||
#define REG_RF_SETUP 0x06
|
||||
#define PLL_LOCK 4 // 仅用在测试
|
||||
|
||||
// Air Data Rate
|
||||
// 0 1Mbps
|
||||
// 1 2Mbps
|
||||
#define RF_DR 3
|
||||
#define NRF_1Mbps 0
|
||||
#define NRF_2Mbps 1
|
||||
// 对于250Kbps的配置需要特别注意
|
||||
// 因为nRF24L01P(也就是nRF24L01+)和nRF24L01在这里不一样
|
||||
// nRF24L01P只定义了第3比特位的RF_DR，0为1Mbps,1为2Mbps
|
||||
// nRF24L01则定义了第3比特位的RF_DR_HIGH和第5比特位的RF_DR_LOW，当RF_DR_HIGH==0 && RF_DR_LOW == 1时设置为250Kbps
|
||||
// 然而nRF24L01的第5比特位只允许为0，所以无法发送250Kbps
|
||||
// 因此为了避免两个不同的产品在250Kbps不能通信带来的疑惑和调式程序的麻烦，本程序直接删除了NRF_250Kbps的定义
|
||||
// 如果确实想用250Kbps，可以自己手动设置
|
||||
|
||||
|
||||
// 仅用在nRF24L01P芯片上
|
||||
#define RF_DR_LOW 5
|
||||
#define RF_DR_HIGH 3
|
||||
|
||||
// PWR, 占2:1共2个比特，仅nRF24L01P、nRF24L01有效
|
||||
// 00 -18dBm
|
||||
// 01 -12dBm
|
||||
// 10 -6dBm
|
||||
// 11 0dBm
|
||||
#define RF_PWR 1
|
||||
#define RF_PWR_n18dBm 0
|
||||
#define RF_PWR_n12dBm 1
|
||||
#define RF_PWR_n6dBm 2
|
||||
#define RF_PWR_0dBm 3
|
||||
|
||||
// 仅nRF24L01有效，nRF24L01P没有这位定义
|
||||
#define LNA_HCURR 0
|
||||
|
||||
// 在SI24R1中，针对nRF24L01P没有使用这一位就直接拿来扩充RF_PWR的位数了
|
||||
// 因此在SI24R1中 RF_PWR == 0 占用0:2共3个比特位
|
||||
// 与nRF24L01P的对应关系如下
|
||||
// [2:0] SI24R1 nRF24L01P
|
||||
// 000 -12dBm -18dBm
|
||||
// 001 -6dBm
|
||||
// 010 -4dBm -12dBm
|
||||
// 011 0dBm
|
||||
// 100 1dBm -6dBm
|
||||
// 101 3dBm
|
||||
// 110 4dBm 0dBm
|
||||
// 111 7dBm
|
||||
// 以下定义仅SI24R1芯片有效
|
||||
#define SI24R1_PWR 0
|
||||
#define SI24R1_PWR_n12dBm 0
|
||||
#define SI24R1_PWR_n6dBm 1
|
||||
#define SI24R1_PWR_n4dBm 2
|
||||
#define SI24R1_PWR_0dBm 3
|
||||
#define SI24R1_PWR_1dBm 4
|
||||
#define SI24R1_PWR_3dBm 5
|
||||
#define SI24R1_PWR_4dBm 6
|
||||
#define SI24R1_PWR_7dBm 7
|
||||
|
||||
|
||||
#define REG_STATUS 0x07
|
||||
// RX FIFO数据READY中断标记位
|
||||
// 写1清除此位
|
||||
#define RX_DR 6
|
||||
// 数据已发送中断标记位
|
||||
// 如果启用AUTO_ACK，则此位仅在收到ACK后置1
|
||||
// 写1清除此位
|
||||
#define TX_DS 5
|
||||
// 达到最大重发次数中断标记位
|
||||
// 为了继续使用通信功能，此位必需被清0
|
||||
// 写1清除此位
|
||||
#define MAX_RT 4
|
||||
// RX_P_NO 占用3:1共3个比特位
|
||||
// RX_FIFIO中数据来自哪个data pipe的number
|
||||
// 000-101 Data Pipe Number
|
||||
// 110 未用
|
||||
// 111 RX FIFO空
|
||||
#define RX_P_NO 1
|
||||
// TX FIFO满标志
|
||||
// 0 TX FIFO中还有空间
|
||||
// 1 满
|
||||
#define TX_FULL 0
|
||||
|
||||
#define REG_OBSERVE_TX 0x08
|
||||
// 占7:4共4个比特位，丢包计数
|
||||
#define PLOS_CNT 4
|
||||
// 占3:0共4个比特位，重传计数
|
||||
#define ARC_CNT 0
|
||||
|
||||
// RSSI, Carrier Detect
|
||||
// 最低比特位有效(0 接收信号小于-60dBm)
|
||||
#define REG_RSSI 0x09
|
||||
|
||||
#define REG_RX_ADDR_P0 0x0A // 39:0 默认0xE7E7E7E7E7
|
||||
#define REG_RX_ADDR_P1 0x0B // 39:0 默认0xC2C2C2C2C2
|
||||
#define REG_RX_ADDR_P2 0x0C // 7:0 默认0xC3
|
||||
#define REG_RX_ADDR_P3 0x0D // 7:0 默认0xC4
|
||||
#define REG_RX_ADDR_P4 0x0E // 7:0 默认0xC5
|
||||
#define REG_RX_ADDR_P5 0x0F // 7:0 默认0xC6
|
||||
#define REG_TX_ADDR 0x10 // 39:0 默认0xE7E7E7E7E7
|
||||
|
||||
|
||||
// 以下是一组表示各通道的静态负载长度
|
||||
// 都是5:0为有效比特位
|
||||
// 0 表示pipe未使用
|
||||
// 1 1byte
|
||||
// ...
|
||||
// 32 32bytes
|
||||
#define REG_RX_PW_P0 0x11
|
||||
#define REG_RX_PW_P1 0x12
|
||||
#define REG_RX_PW_P2 0x13
|
||||
#define REG_RX_PW_P3 0x14
|
||||
#define REG_RX_PW_P4 0x15
|
||||
#define REG_RX_PW_P5 0x16
|
||||
|
||||
|
||||
#define REG_FIFO_STATUS 0x17
|
||||
// 如果置1则重用上次传输的数据包
|
||||
// 只要CE为1，数据包就会不断地被重发
|
||||
// SPI命令REUSE_TX_PL对此位置1
|
||||
// SPI命令W_TX_PAYLOAD或FLUSH_TX对此位清0
|
||||
#define TX_REUSE 6
|
||||
// 0 TX FIFO尚有空间
|
||||
// 1 TX FIFO已满
|
||||
#define TX_FIFO_FULL 5
|
||||
// 0 TX FIFO中有数据
|
||||
// 1 TX FIFO中没有数据
|
||||
#define TX_FIFIO_EMPTY 4
|
||||
// 0 RX FIFO尚有空间
|
||||
// 1 RX FIFO已满
|
||||
#define RX_FIFO_FULL 1
|
||||
// 0 RX FIFO中有数据
|
||||
// 1 RX FIFO中没有数据
|
||||
#define RX_FIFO_EMPTY 0
|
||||
|
||||
|
||||
// 启用相应data pip的动态负载长度
|
||||
// 需要启用 EN_DPL 和 ENAA_Pn
|
||||
#define REG_DYNPD 0x1C
|
||||
#define DPL_P5 5
|
||||
#define DPL_P4 4
|
||||
#define DPL_P3 3
|
||||
#define DPL_P2 2
|
||||
#define DPL_P1 1
|
||||
#define DPL_P0 0
|
||||
|
||||
#define REG_FEATURE 0x1D
|
||||
// Enable Dynamic Payload Length
|
||||
#define EN_DPL 2
|
||||
// Enable Payload with ACK
|
||||
#define EN_ACK_PAY 1
|
||||
// Enable W_TX_PAYLOAD_NOACK 命令
|
||||
#define EN_DYN_ACK 0
|
||||
|
||||
|
||||
#define REGISTER_MASK 0x1F
|
||||
#define CMD_R_REGISTER 0x00
|
||||
#define CMD_W_REGISTER 0x20
|
||||
|
||||
#define CMD_R_RX_PAYLOAD 0b01100001
|
||||
#define CMD_W_TX_PAYLOAD 0b10100000
|
||||
#define CMD_FLUSH_TX 0b11100001
|
||||
#define CMD_FLUSH_RX 0b11100010
|
||||
#define CMD_REUSE_TX_PL 0b11100011
|
||||
#define CMD_ACTIVATE 0b01010000
|
||||
#define CMD_R_RX_PL_WID 0b01100000
|
||||
#define CMD_W_ACK_PAYLOAD 0b10101000
|
||||
#define CMD_W_TX_PAYLOAD_NOACK 0b10110000
|
||||
#define CMD_NOP 0b11111111
|
||||
|
||||
|
||||
#define _BV(n) (1<<(n))
|
||||
#define _VV(v, n) ((v)<<(n))
|
||||
|
||||
|
||||
int nrf_init(nrf_init_t *ni);
|
||||
|
||||
void nrf_flush_rx();
|
||||
|
||||
void nrf_flush_tx();
|
||||
|
||||
void nrf_delay(uint32_t delay);
|
||||
|
||||
int nrf_powerup();
|
||||
|
||||
int nrf_powerdown();
|
||||
|
||||
void nrf_enable_rx_irq();
|
||||
|
||||
void nrf_disable_rx_irq();
|
||||
|
||||
void nrf_enable_tx_irq();
|
||||
|
||||
void nrf_disable_tx_irq();
|
||||
|
||||
void nrf_enable_max_rt_irq();
|
||||
|
||||
void nrf_disable_max_rt_irq();
|
||||
|
||||
void nrf_set_rf_channel(uint8_t channel);
|
||||
|
||||
int nrf_set_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t addrlen);
|
||||
|
||||
int nrf_get_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t *addrlen);
|
||||
|
||||
int nrf_set_txaddr(uint8_t *addr, uint8_t addrlen);
|
||||
|
||||
int nrf_get_txaddr(uint8_t *addr, uint8_t *addrlen);
|
||||
|
||||
int nrf_enable_rxaddr(uint8_t pipe);
|
||||
|
||||
void nrf_reset_registers();
|
||||
|
||||
void nrf_set_standby_mode();
|
||||
|
||||
void nrf_set_receive_mode();
|
||||
|
||||
void nrf_set_send_mode();
|
||||
|
||||
void nrf_enable_autoack(uint8_t pipe);
|
||||
|
||||
void nrf_disable_autoack(uint8_t pipe);
|
||||
|
||||
void nrf_set_datarate(uint8_t dr);
|
||||
|
||||
int nrf_enable_dynamic_payload(uint8_t pipe);
|
||||
|
||||
int nrf_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe);
|
||||
|
||||
int nrf_poll_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe);
|
||||
|
||||
int nrf_write_payload(uint8_t *buf, uint8_t len);
|
||||
|
||||
void nrf_ce(uint8_t mode);
|
||||
|
||||
void nrf_csn(uint8_t mode);
|
||||
|
||||
|
||||
|
||||
int nrf_read_reg(uint8_t reg, uint8_t *buf, uint8_t len);
|
||||
int nrf_read_reg_byte(uint8_t reg, uint8_t *v);
|
||||
int nrf_write_reg(uint8_t reg, uint8_t *buf, uint8_t len);
|
||||
int nrf_write_reg_byte(uint8_t reg, uint8_t byte);
|
||||
int nrf_clear_reg_bit(uint8_t reg, uint8_t bit);
|
||||
int nrf_set_reg_bit(uint8_t reg, uint8_t bit);
|
||||
|
||||
int nrf_cmd_read(uint8_t cmd, uint8_t *data, uint8_t len);
|
||||
int nrf_cmd_read_byte(uint8_t cmd, uint8_t *data);
|
||||
int nrf_write_cmd_and_data(uint8_t cmd, uint8_t *data, uint8_t len);
|
||||
int nrf_write_cmd(uint8_t cmd);
|
||||
#endif /* NRF24L01_H_ */
|
||||
@@ -1,594 +0,0 @@
|
||||
#include "RHF76.h"
|
||||
#include "tos_hal.h"
|
||||
|
||||
static const char RHF76_LOWPOWER_SET[] = {
|
||||
0xFF,0xFF,0xFF,0xFF,'A','T','+','L','O','W','P','O','W','E','R','=','a','u','t','o','o','f','f','\r','\n'
|
||||
};
|
||||
|
||||
static int rhf76_exit_low_power(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+LOWPOWER: AUTOOFF");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, RHF76_LOWPOWER_SET);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_reset(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+RESET: OK");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, RHF76_ATCMD_RESET);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_id(lora_id_type_t id_type, char *id)
|
||||
{
|
||||
char cmd[64] = {0};
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
switch(id_type) {
|
||||
case LORA_ID_TYPE_DEVADDR:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_ID_DEVADDR, id);
|
||||
break;
|
||||
case LORA_ID_TYPE_DEVEUI:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_ID_DEVEUI, id);
|
||||
break;
|
||||
case LORA_ID_TYPE_APPEUI:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_ID_DEVAPPEUI, id);
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
tos_at_echo_create(&echo, NULL, 0, "+ID: ");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_key(lora_key_type_t key_type, char *key)
|
||||
{
|
||||
char cmd[64] = {0};
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
switch (key_type) {
|
||||
case LORA_KEY_TYPE_APPKEY:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_KEY_TYPE_APPKEY, key);
|
||||
break;
|
||||
case LORA_KEY_TYPE_APPSKEY:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_KEY_TYPE_APPSKEY, key);
|
||||
break;
|
||||
case LORA_KEY_TYPE_NWKSKEY:
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SET_KEY_TYPE_NWKSKEY, key);
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
tos_at_echo_create(&echo, NULL, 0, "+KEY:");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_class(lora_class_t lora_class)
|
||||
{
|
||||
char *cmd = NULL, *reply = NULL;
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
switch (lora_class) {
|
||||
case LORA_CLASS_A:
|
||||
cmd = RHF76_ATCMD_SET_CLASS_A;
|
||||
reply = RHF76_ATCMD_REPLY_CLASS_A;
|
||||
break;
|
||||
case LORA_CLASS_B:
|
||||
cmd = RHF76_ATCMD_SET_CLASS_B;
|
||||
reply = RHF76_ATCMD_REPLY_CLASS_B;
|
||||
break;
|
||||
case LORA_CLASS_C:
|
||||
cmd = RHF76_ATCMD_SET_CLASS_C;
|
||||
reply = RHF76_ATCMD_REPLY_CLASS_C;
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
tos_at_echo_create(&echo, NULL, 0, reply);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 1000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_band(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, RHF76_ATCMD_REPLY_BAND_CN470);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, RHF76_ATCMD_SET_BAND_CN470);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_chanel(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CH: NUM");
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, RHF76_ATCMD_SET_CHANNEL);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_set_repeat(uint8_t num)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
char cmd[14] = {0};
|
||||
char expect[10] = {'\0'};
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_SET_REPT, num);
|
||||
snprintf(expect, sizeof(expect), "+REPT: %d", num);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, expect);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_set_data_rate(uint8_t num)
|
||||
{
|
||||
if(num>15) return -1; // num should between [0, 15]
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
char cmd[14] = {0};
|
||||
char expect[10] = {'\0'};
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_SET_DATA_RATE, num);
|
||||
snprintf(expect, sizeof(expect), " DR%d", num);
|
||||
|
||||
tos_at_echo_fuzzy_matching_create(&echo, NULL, 0, expect);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_set_delay(char *param)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
char cmd[20] = {0};
|
||||
char expect[20] = {'\0'};
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_SET_DELAY, param);
|
||||
snprintf(expect, sizeof(expect), "+DELAY %s", param);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, expect);
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, cmd);
|
||||
if(strstr(param,"?")!=NULL) return 0;
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_at_cmd_exe(char *cmd)
|
||||
{
|
||||
at_echo_t echo;
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 8000, cmd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rhf76_set_adr_off(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+ADR: OFF");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 3000, RHF76_ATCMD_SET_ADR_OFF);
|
||||
if (echo.status == AT_ECHO_STATUS_OK|| echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_set_mode(lora_mode_t mode)
|
||||
{
|
||||
char *cmd = NULL, *reply = NULL;
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
switch (mode) {
|
||||
case LORA_MODE_LWOTAA:
|
||||
cmd = RHF76_ATCMD_SET_MODE_LWOTAA;
|
||||
reply = RHF76_ATCMD_REPLY_MODE_LWOTAA;
|
||||
break;
|
||||
case LORA_MODE_LWABP:
|
||||
cmd = RHF76_ATCMD_SET_MODE_LWABP;
|
||||
reply = RHF76_ATCMD_REPLY_MODE_LWABP;
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
tos_at_echo_create(&echo, NULL, 0, reply);
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 2500, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_join_otaa(const char *deveui, const char *appkey)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
if (rhf76_set_mode(LORA_MODE_LWOTAA) != 0) {
|
||||
printf("rhf76 set mode FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_id(LORA_ID_TYPE_DEVEUI, (char *)deveui) != 0) {
|
||||
printf("rhf76 set deveui FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_key(LORA_KEY_TYPE_APPKEY, (char *)appkey) != 0) {
|
||||
printf("rhf76 set appkey FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_stopwatch_delay_ms(2000);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+JOIN: Network joined");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 14000, RHF76_ATCMD_JOIN);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int rhf76_join_abp(const char *deveui, const char *devaddr, const char *nwkskey, const char *appskey)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
if (rhf76_set_mode(LORA_MODE_LWABP) != 0) {
|
||||
printf("rhf76 set mode FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_id(LORA_ID_TYPE_DEVEUI, (char *)deveui) != 0) {
|
||||
printf("rhf76 set deveui FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_id(LORA_ID_TYPE_DEVADDR, (char *)devaddr) != 0) {
|
||||
printf("rhf76 set devaddr FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_key(LORA_KEY_TYPE_NWKSKEY, (char *)nwkskey) != 0) {
|
||||
printf("rhf76 set nwkskey FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_key(LORA_KEY_TYPE_APPSKEY, (char *)appskey) != 0) {
|
||||
printf("rhf76 set appskey FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_stopwatch_delay_ms(2000);
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "+JOIN: Network joined");
|
||||
while (try++ < 10) {
|
||||
tos_at_cmd_exec(&echo, 14000, RHF76_ATCMD_JOIN);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_init(void)
|
||||
{
|
||||
printf("Init RHF76 LoRa ...\n" );
|
||||
|
||||
tos_stopwatch_delay_ms(1000);
|
||||
if (rhf76_exit_low_power() != 0) {
|
||||
printf("rhf76 reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_reset() != 0) {
|
||||
printf("rhf76 reset FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_class(LORA_CLASS_A) != 0) {
|
||||
printf("rhf76 set class FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_band() != 0) {
|
||||
printf("rhf76 set band FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_chanel() != 0) {
|
||||
printf("rhf76 set chanel FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rhf76_set_adr_off() != 0) {
|
||||
printf("rhf76 set adr FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(rhf76_set_repeat(1)!=0){
|
||||
printf("rhf76 set repeat times for unconfirmed message FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
tos_stopwatch_delay_ms(2000);
|
||||
printf("Init RHF76 LoRa done\n");
|
||||
|
||||
/*----------------------------------------------------*/
|
||||
/*--- the following code is only used for debuging ---*/
|
||||
/*----------------------------------------------------*/
|
||||
|
||||
/*<-- query/set UART Timeout (~TX timeout) -->*/
|
||||
// rhf76_at_cmd_exe("AT+UART=TIMEOUT, 300\r\n");
|
||||
// rhf76_at_cmd_exe("AT+UART=TIMEOUT\r\n");
|
||||
|
||||
/*<-- query current band config -->*/
|
||||
// rhf76_at_cmd_exe("AT+DR=SCHEME\r\n");
|
||||
// rhf76_at_cmd_exe("AT+LW=CDR\r\n");
|
||||
|
||||
/*<-- query current data rate and the corresponding max payload size -->*/
|
||||
rhf76_set_data_rate(0);
|
||||
// rhf76_at_cmd_exe("at+dr=0\r\n");
|
||||
// rhf76_at_cmd_exe("AT+DR\r\n");
|
||||
// rhf76_at_cmd_exe("AT+LW=LEN\r\n");
|
||||
|
||||
/*<-- query RX1\RX2\JRX1\JRX2 delay config -->*/
|
||||
// rhf76_set_delay("?");
|
||||
|
||||
/*<-- query RF config -->*/
|
||||
// rhf76_at_cmd_exe("AT+MODE=TEST\r\n");
|
||||
// rhf76_at_cmd_exe("AT+TEST=?\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ uint8_t __ascii2hex(char in) {
|
||||
if (('0' <= in) && (in <= '9')) {
|
||||
return in - '0';
|
||||
}
|
||||
if (('A' <= in) && (in <= 'F')) {
|
||||
return in - 'A' + 10;
|
||||
}
|
||||
if (('a' <= in) && (in <= 'f')) {
|
||||
return in - 'a' + 10;
|
||||
}
|
||||
return (uint8_t)-1;
|
||||
}
|
||||
|
||||
__STATIC__ void __asciistr2hex(char *in, uint8_t *out, int len) {
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; i += 2) {
|
||||
out[i / 2] = (__ascii2hex(in[i]) << 4) + __ascii2hex(in[i + 1]);
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ char incoming_data_buffer[128];
|
||||
__STATIC__ uint8_t hex_stream[128];
|
||||
|
||||
__STATIC__ void rhf76_incoming_data_process(void)
|
||||
{
|
||||
int ret;
|
||||
uint8_t data;
|
||||
|
||||
/*
|
||||
+CMSG: PORT: 8; RX: "12345678"
|
||||
RX: prefix
|
||||
"12345678": data content
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
ret = tos_at_uart_read(&data, 1);
|
||||
if (data == '"') {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
memset(incoming_data_buffer, 0x00, sizeof(incoming_data_buffer));
|
||||
|
||||
while (1) {
|
||||
tos_at_uart_read(&data, 1);
|
||||
if (data == '"') {
|
||||
break;
|
||||
}
|
||||
if(ret<128)
|
||||
{
|
||||
incoming_data_buffer[ret++] = data;
|
||||
}
|
||||
else
|
||||
{
|
||||
printf(" ERR:incomming data is big ,please give more space for incoming_data_buffer\n");
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
printf("rhf76_incoming_data_process %d: %s\n", ret, incoming_data_buffer);
|
||||
|
||||
__asciistr2hex(incoming_data_buffer, hex_stream, strlen(incoming_data_buffer));
|
||||
|
||||
extern lora_module_t lora_module_rhf76;
|
||||
if (lora_module_rhf76.recv_callback) {
|
||||
lora_module_rhf76.recv_callback(hex_stream, strlen(incoming_data_buffer) / 2);
|
||||
}
|
||||
}
|
||||
|
||||
at_event_t rhf76_at_event[] = {
|
||||
{ "+CMSGHEX: PORT:", rhf76_incoming_data_process },
|
||||
{ "+MSGHEX: PORT:", rhf76_incoming_data_process }
|
||||
};
|
||||
|
||||
static char __num2hex(uint8_t num)
|
||||
{
|
||||
if (num <= 0x9) {
|
||||
return num + '0';
|
||||
}
|
||||
|
||||
if ((0xA <= num) && (num <= 0xF)) {
|
||||
return num - 0xA + 'A';
|
||||
}
|
||||
|
||||
return (char)-1;
|
||||
}
|
||||
|
||||
static void __hex2str(uint8_t *in, char *out, int len)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i) {
|
||||
out[i * 2] = __num2hex(in[i] >> 4);
|
||||
out[i * 2 + 1] = __num2hex(in[i] & 0x0F);
|
||||
}
|
||||
out[2 * len] = '\0';
|
||||
}
|
||||
|
||||
static int rhf76_send(const void *buf, size_t len)
|
||||
{
|
||||
char *str_buf = NULL;
|
||||
|
||||
str_buf = tos_mmheap_calloc(2 * len + 1, sizeof(char));
|
||||
if (!str_buf) {
|
||||
return -1;
|
||||
}
|
||||
__hex2str((uint8_t *)buf, str_buf, len);
|
||||
|
||||
char cmd[100] = {0};
|
||||
at_echo_t echo;
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SEND_CMSGHEX, str_buf);
|
||||
cmd[sizeof(cmd) - 1] = '\0';
|
||||
tos_mmheap_free(str_buf);
|
||||
tos_at_echo_create(&echo, NULL, 0, "+CMSGHEX: ACK Received");
|
||||
tos_at_cmd_exec(&echo, 6000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return len;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_send_unconfirmed(const void *buf, size_t len)
|
||||
{
|
||||
char *str_buf = NULL;
|
||||
at_echo_t echo;
|
||||
|
||||
str_buf = tos_mmheap_calloc(2 * len + 1, sizeof(char));
|
||||
if (!str_buf) {
|
||||
return -1;
|
||||
}
|
||||
__hex2str((uint8_t *)buf, str_buf, len);
|
||||
|
||||
char cmd[100] = {0};
|
||||
snprintf(cmd, sizeof(cmd), RHF76_ATCMD_FMT_SEND_MSGHEX, str_buf);
|
||||
cmd[sizeof(cmd) - 1] = '\0';
|
||||
tos_mmheap_free(str_buf);
|
||||
tos_at_echo_create(&echo, NULL, 0, "+MSGHEX: Done");
|
||||
tos_at_cmd_exec(&echo, 6000, cmd);
|
||||
if (echo.status == AT_ECHO_STATUS_OK || echo.status == AT_ECHO_STATUS_EXPECT) {
|
||||
return len;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int rhf76_close(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
lora_module_t lora_module_rhf76 = {
|
||||
.init = rhf76_init,
|
||||
.join_otaa = rhf76_join_otaa,
|
||||
.join_abp = rhf76_join_abp,
|
||||
.send = rhf76_send,
|
||||
.send_unconfirmed = rhf76_send_unconfirmed,
|
||||
.close = rhf76_close,
|
||||
.recv_callback = K_NULL,
|
||||
};
|
||||
|
||||
int rhf76_lora_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, rhf76_at_event,
|
||||
sizeof(rhf76_at_event) / sizeof(rhf76_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_stopwatch_delay_ms(1000);
|
||||
|
||||
if (tos_lora_module_register(&lora_module_rhf76) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_lora_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,151 +0,0 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef __RHF76_H__
|
||||
#define __RHF76_H__
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "usart.h"
|
||||
#include "tos_at.h"
|
||||
#include "lora_module_wrapper.h"
|
||||
|
||||
#define UART_RXBUF_MAXSIZE 256
|
||||
|
||||
typedef enum lora_class {
|
||||
LORA_CLASS_A,
|
||||
LORA_CLASS_B,
|
||||
LORA_CLASS_C,
|
||||
} lora_class_t;
|
||||
|
||||
typedef enum lora_mode {
|
||||
LORA_MODE_LWOTAA,
|
||||
LORA_MODE_LWABP,
|
||||
} lora_mode_t;
|
||||
|
||||
typedef enum lora_id_type {
|
||||
LORA_ID_TYPE_DEVADDR,
|
||||
LORA_ID_TYPE_DEVEUI,
|
||||
LORA_ID_TYPE_APPEUI,
|
||||
} lora_id_type_t;
|
||||
|
||||
typedef enum lora_key_type {
|
||||
LORA_KEY_TYPE_APPKEY,
|
||||
LORA_KEY_TYPE_APPSKEY,
|
||||
LORA_KEY_TYPE_NWKSKEY,
|
||||
} lora_key_type_t;
|
||||
|
||||
#define RHF76_ATCMD_SET_CLASS_A "AT+CLASS=A\r\n"
|
||||
#define RHF76_ATCMD_SET_CLASS_B "AT+CLASS=B\r\n"
|
||||
#define RHF76_ATCMD_SET_CLASS_C "AT+CLASS=C\r\n"
|
||||
#define RHF76_ATCMD_REPLY_CLASS_A "+CLASS: A"
|
||||
#define RHF76_ATCMD_REPLY_CLASS_B "+CLASS: B"
|
||||
#define RHF76_ATCMD_REPLY_CLASS_C "+CLASS: C"
|
||||
|
||||
#define RHF76_ATCMD_RESET "AT+RESET\r\n"
|
||||
|
||||
#define RHF76_ATCMD_FMT_SET_ID_DEVADDR "AT+ID=\"devaddr\",\"%s\"\r\n"
|
||||
#define RHF76_ATCMD_FMT_SET_ID_DEVEUI "AT+ID=\"deveui\",\"%s\"\r\n"
|
||||
#define RHF76_ATCMD_FMT_SET_ID_DEVAPPEUI "AT+ID=\"appeui\",\"%s\"\r\n"
|
||||
|
||||
#define RHF76_ATCMD_FMT_SET_KEY_TYPE_APPKEY "AT+KEY=\"appkey\",%s\r\n"
|
||||
#define RHF76_ATCMD_FMT_SET_KEY_TYPE_APPSKEY "AT+KEY=\"appskey\",%s\r\n"
|
||||
#define RHF76_ATCMD_FMT_SET_KEY_TYPE_NWKSKEY "AT+KEY=\"nwkskey\",%s\r\n"
|
||||
#define RHF76_ATCMD_FMT_SEND_CMSGHEX "AT+CMSGHEX=\"%s\"\r\n"
|
||||
#define RHF76_ATCMD_FMT_SEND_MSGHEX "AT+MSGHEX=\"%s\"\r\n"
|
||||
|
||||
#define RHF76_ATCMD_SET_REPT "AT+REPT=%d\r\n"
|
||||
#define RHF76_ATCMD_SET_DELAY "AT+DELAY=%s\r\n"
|
||||
|
||||
#define RHF76_ATCMD_SET_BAND_CN470 "AT+DR=CN470\r\n"
|
||||
#define RHF76_ATCMD_REPLY_BAND_CN470 "+DR: CN470"
|
||||
#define RHF76_ATCMD_SET_DATA_RATE "AT+DR=%d\r\n"
|
||||
|
||||
#define RHF76_ATCMD_SET_CHANNEL "at+ch=num,80-87\r\n"
|
||||
#define RHF76_ATCMD_SET_ADR_OFF "at+adr=off\r\n"
|
||||
#define RHF76_ATCMD_JOIN "AT+join\r\n"
|
||||
|
||||
#define RHF76_ATCMD_SET_MODE_LWOTAA "AT+MODE=LWOTAA\r\n"
|
||||
#define RHF76_ATCMD_SET_MODE_LWABP "AT+MODE=LWABP\r\n"
|
||||
#define RHF76_ATCMD_REPLY_MODE_LWOTAA "+MODE: LWOTAA"
|
||||
#define RHF76_ATCMD_REPLY_MODE_LWABP "+MODE: LWABP"
|
||||
|
||||
int rhf76_lora_init(hal_uart_port_t uart_port);
|
||||
|
||||
/**
|
||||
* @brief set the delay for RX1,RX2,JRX1,JRX2 OR query current delay config
|
||||
* @note Examples:
|
||||
* to set the delay(ms):
|
||||
* rhf76_set_delay("RX1,2000");
|
||||
*
|
||||
* to query current delay config:
|
||||
* rhf76_set_delay("?");
|
||||
*
|
||||
* @param params operation string
|
||||
*
|
||||
* @retval int Status
|
||||
*/
|
||||
int rhf76_set_delay(char *param);
|
||||
|
||||
/**
|
||||
* @brief set repeat times when sending unconfirmed message
|
||||
* @note it is equal to sending
|
||||
* AT+REPT=2
|
||||
* +REPT: 2
|
||||
*
|
||||
* @param num repeat times
|
||||
*
|
||||
* @retval int Status
|
||||
*/
|
||||
int rhf76_set_repeat(uint8_t num);
|
||||
|
||||
|
||||
/**
|
||||
* @brief set date rate, which would affect the maximum payload size
|
||||
* @note this function is for DEBUG purpose only, it allows user to execute
|
||||
* AT+ commands by passing the AT+ command to the function as an arg-
|
||||
* ument.
|
||||
* For example,users can query the RF configuration by following code:
|
||||
*
|
||||
* rhf76_at_cmd_exe("AT+MODE=TEST\r\n");
|
||||
* rhf76_at_cmd_exe("AT+TEST=?\r\n");
|
||||
*
|
||||
* @param num data rate
|
||||
*
|
||||
* @retval int Status
|
||||
*/
|
||||
int rhf76_set_data_rate(uint8_t num);
|
||||
|
||||
|
||||
/**
|
||||
* @brief execute AT+ commands
|
||||
* @note this function is for DEBUG purpose only, it allows user to execute
|
||||
* AT+ commands by passing the AT+ command to the function as an arg-
|
||||
* ument.
|
||||
* For example,users can query the RF configuration by following code:
|
||||
*
|
||||
* rhf76_at_cmd_exe("AT+MODE=TEST\r\n");
|
||||
* rhf76_at_cmd_exe("AT+TEST=?\r\n");
|
||||
*
|
||||
* @param cmd AT+ commands
|
||||
*
|
||||
* @retval int Status
|
||||
*/
|
||||
int rhf76_at_cmd_exe(char *cmd);
|
||||
|
||||
#endif /* __RHF76_H__ */
|
||||
|
||||
@@ -1,36 +0,0 @@
|
||||
###################################################################
|
||||
#automatic detection QTOP and LOCALDIR
|
||||
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
|
||||
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
|
||||
echo $$QTOP;\
|
||||
else\
|
||||
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
|
||||
dir=`cd ../;pwd`; \
|
||||
if [ "$$dir" = "/" ] ; then \
|
||||
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
|
||||
exit 1; \
|
||||
fi ; \
|
||||
cd $$dir; \
|
||||
done ; \
|
||||
pwd; \
|
||||
fi)
|
||||
QTOP ?= $(realpath ${TRYQTOP})
|
||||
|
||||
ifeq ($(QTOP),)
|
||||
$(error Please run this in a tree)
|
||||
endif
|
||||
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
|
||||
|
||||
####################################################################
|
||||
|
||||
|
||||
TREE_LIB_ENABLE=0
|
||||
lib=
|
||||
subdirs=
|
||||
|
||||
CFGFLAGS += -I$(QTOP)/net/at/include
|
||||
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
|
||||
|
||||
include ${QTOP}/qmk/generic/Make.tpl
|
||||
|
||||
|
||||
@@ -1,402 +0,0 @@
|
||||
#include "sim7600ce.h"
|
||||
#include "tos_at.h"
|
||||
#include "tos_hal.h"
|
||||
#include "sal_module_wrapper.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <ctype.h>
|
||||
|
||||
static int sim7600ce_echo_close(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "ATE0\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sim7600ce_set_apn(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2500, "AT+CGDCONT=1,\"%s\",\"%s\"\r\n", "IP","CMNET");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sim7600ce_signal_quality_check(void)
|
||||
{
|
||||
int rssi, ber;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[32], *str;
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CSQ\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
str = strstr(echo.buffer, "+CSQ:");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
|
||||
if (rssi == 99 || ber == 99) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sim7600ce_net_status_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CREG?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sim7600ce_cpsi_status_check(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CPSI?\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
static int sim7600ce_send_mode_set(sal_send_mode_t mode)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
while (try++ < 3) {
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2500, "AT+CIPMODE=%d\r\n", mode == SAL_SEND_MODE_NORMAL ? 0 : 1);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sim7600ce_cipccfg_set(void)
|
||||
{
|
||||
int try = 0;
|
||||
at_echo_t echo;
|
||||
|
||||
while (try++ < 10) {
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2500, "AT+CIPCCFG=10,0,0,1,1,0,500\r\n");
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sim7600ce_csocksetpn(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CSOCKSETPN=1\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int sim7600ce_net_open(void)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+NETOPEN\r\n");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int sim7600ce_init(void)
|
||||
{
|
||||
printf("Init sim7600ce ...\n" );
|
||||
|
||||
if (sim7600ce_echo_close() != 0) {
|
||||
printf("echo close failed\n");
|
||||
return -1;
|
||||
}
|
||||
if (sim7600ce_set_apn() != 0) {
|
||||
printf("apn set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (sim7600ce_signal_quality_check() != 0) {
|
||||
printf("signal quality check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
if (sim7600ce_net_status_check() != 0) {
|
||||
printf("net_status_check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
if (sim7600ce_cpsi_status_check() != 0) {
|
||||
printf("cpsi_status_check status failed\n");
|
||||
return -1;
|
||||
}
|
||||
if (sim7600ce_cipccfg_set() != 0) {
|
||||
printf("sim7600ce_cipccfg_set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
if (sim7600ce_send_mode_set(SAL_SEND_MODE_TRANSPARENT) != 0) {
|
||||
printf("send mode set FAILED\n");
|
||||
//return -1;
|
||||
}
|
||||
if (sim7600ce_csocksetpn() != 0) {
|
||||
printf("sim7600ce_csocksetpn FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (sim7600ce_send_mode_set(SAL_SEND_MODE_NORMAL) != 0) {
|
||||
printf("send mode set FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (sim7600ce_net_open() != 0) {
|
||||
printf("sim7600ce_net_open FAILED\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
printf("Init sim7600ce ok\n" );
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sim7600ce_connect(const char *ip, const char *port, sal_proto_t proto)
|
||||
{
|
||||
int id;
|
||||
at_echo_t echo;
|
||||
|
||||
id = tos_at_channel_alloc(ip, port);
|
||||
if (id == -1) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, NULL);
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "%s=1\r\n", "AT+CGATT");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_cmd_exec(&echo, 2000, "%s=1\r\n", "AT+CIPHEAD");
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
|
||||
tos_at_cmd_exec(&echo, 4000, "AT+CIPOPEN=%d,\"%s\",\"%s\",%s\r\n",
|
||||
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, port);
|
||||
if (echo.status == AT_ECHO_STATUS_OK) {
|
||||
return id;
|
||||
}
|
||||
|
||||
tos_at_channel_free(id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int sim7600ce_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
|
||||
{
|
||||
return tos_at_channel_read_timed(id, buf, len, timeout);
|
||||
}
|
||||
|
||||
static int sim7600ce_recv(int id, void *buf, size_t len)
|
||||
{
|
||||
return sim7600ce_recv_timeout(id, buf, len, (uint32_t)4000);
|
||||
}
|
||||
|
||||
int sim7600ce_send(int id, const void *buf, size_t len)
|
||||
{
|
||||
at_echo_t echo;
|
||||
|
||||
if (tos_at_global_lock_pend() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, ">");
|
||||
tos_at_cmd_exec(&echo, 1000,
|
||||
"AT+CIPSEND=%d,%d\r\n",
|
||||
id, len);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
|
||||
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
|
||||
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
|
||||
tos_at_global_lock_post();
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_at_global_lock_post();
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static void sim7600ce_transparent_mode_exit(void)
|
||||
{
|
||||
tos_at_cmd_exec(NULL, 500, "+++");
|
||||
}
|
||||
|
||||
static int sim7600ce_close(int id)
|
||||
{
|
||||
sim7600ce_transparent_mode_exit();
|
||||
|
||||
tos_at_cmd_exec(NULL, 1000, "AT+CIPCLOSE=%d\r\n", id);
|
||||
|
||||
tos_at_channel_free(id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sim7600ce_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
|
||||
{
|
||||
char *str;
|
||||
at_echo_t echo;
|
||||
char echo_buffer[64];
|
||||
|
||||
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
|
||||
tos_at_cmd_exec(&echo, 2000, "AT+CDNSGIP=\"%s\"\r\n", host_name);
|
||||
|
||||
if (echo.status != AT_ECHO_STATUS_OK) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/*
|
||||
+CDNSGIP: 1,"www.xyz.com","xxx.xxx.xxx.xxx","xxx.xxx.xxx.xxx"
|
||||
*/
|
||||
|
||||
int seg1, seg2, seg3, seg4;
|
||||
str = strstr(echo.buffer, "+CDNSGIP: 1,");
|
||||
if (!str)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
str += strlen("+CDNSGIP: 1,\"") + strlen(host_name) + 3;
|
||||
sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
|
||||
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
|
||||
host_ip[host_ip_len - 1] = '\0';
|
||||
|
||||
printf("GOT IP: %s\n", host_ip);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ void sim7600ce_incoming_data_process(void)
|
||||
{
|
||||
uint8_t data;
|
||||
uint8_t str[2];
|
||||
int channel_id = 0, data_len = 0, read_len;
|
||||
static uint8_t buffer[128];
|
||||
|
||||
/*
|
||||
+RECEIVE,0,44:1234...
|
||||
|
||||
+IPD: prefix
|
||||
0: link id
|
||||
44: data length
|
||||
1234...: data content
|
||||
*/
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(&data, 1) != 1) {
|
||||
return;
|
||||
}
|
||||
if (data == ',') {
|
||||
break;
|
||||
}
|
||||
channel_id = channel_id * 10 + (data - '0');
|
||||
}
|
||||
|
||||
while (1) {
|
||||
if (tos_at_uart_read(str, 2) != 1) {
|
||||
return;
|
||||
}
|
||||
if (str[0] == '\r') {
|
||||
break;
|
||||
}
|
||||
data_len = data_len * 10 + (data - '0');
|
||||
}
|
||||
|
||||
do {
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
read_len = MIN(data_len, sizeof(buffer));
|
||||
if (tos_at_uart_read(buffer, read_len) != read_len) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
data_len -= read_len;
|
||||
} while (data_len > 0);
|
||||
}
|
||||
|
||||
at_event_t sim7600ce_at_event[] = {
|
||||
{ "+RECEIVE,", sim7600ce_incoming_data_process },
|
||||
};
|
||||
|
||||
sal_module_t sal_module_sim7600ce = {
|
||||
.init = sim7600ce_init,
|
||||
.connect = sim7600ce_connect,
|
||||
.send = sim7600ce_send,
|
||||
.recv_timeout = sim7600ce_recv_timeout,
|
||||
.recv = sim7600ce_recv,
|
||||
.close = sim7600ce_close,
|
||||
.parse_domain = sim7600ce_parse_domain,
|
||||
};
|
||||
|
||||
int sim7600ce_sal_init(hal_uart_port_t uart_port)
|
||||
{
|
||||
if (tos_at_init(uart_port, sim7600ce_at_event,
|
||||
sizeof(sim7600ce_at_event) / sizeof(sim7600ce_at_event[0])) != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (tos_sal_module_register(&sal_module_sim7600ce) != 0) {
|
||||
return -1;
|
||||
}
|
||||
if (tos_sal_module_init() != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user