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move rv32i port code under gcc

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This commit is contained in:
acezhao
2019-09-17 22:41:48 +08:00
parent de43d4ef0e
commit 262dbe0b56
7 changed files with 3 additions and 3 deletions
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72
arch/risc-v/rv32i/gcc/port.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _PORT_H_
#define _PORT_H_
__PORT__ void port_int_disable(void);
__PORT__ void port_int_enable(void);
__PORT__ cpu_cpsr_t port_cpsr_save(void);
__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr);
__PORT__ void port_cpu_reset(void);
__PORT__ void port_sched_start(void) __NO_RETURN__;
__PORT__ void port_context_switch(void);
__PORT__ void port_irq_context_switch(void);
__PORT__ void port_systick_config(uint32_t cycle_per_tick);
__PORT__ void port_systick_priority_set(uint32_t prio);
#if TOS_CFG_TICKLESS_EN > 0u
__PORT__ void port_systick_resume(void);
__PORT__ void port_systick_suspend(void);
__PORT__ void port_systick_reload(uint32_t cycle_per_tick);
__PORT__ void port_systick_pending_reset(void);
__PORT__ k_time_t port_systick_max_delay_millisecond(void);
#endif
#if TOS_CFG_PWR_MGR_EN > 0u
__PORT__ void port_sleep_mode_enter(void);
__PORT__ void port_stop_mode_enter(void);
__PORT__ void port_standby_mode_enter(void);
#endif
#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
__PORT__ void HardFault_Handler(void);
__PORT__ void port_fault_diagnosis(void);
#endif
#endif /* _PORT_H_ */

49
arch/risc-v/rv32i/gcc/port_c.c Normal file
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/*
* port_c.c
*
* Created on: Sep 9, 2019
* Author: ace
*/
#include "riscv_encoding.h"
#include <tos.h>
#define CLINT_CTRL_ADDR 0x2000000
#define CLINT_MSIP 0x0000
#define CLINT_MTIMECMP 0x4000
#define CLINT_MTIME 0xBFF8
__PORT__ void port_systick_config(uint32_t cycle_per_tick)
{
// it cost cpu read two times, first mtime_lo and then mtime_hi
// if mtime_lo == 0xFFFFFFFF and mtime_hi = 0 at first read
// then mtime_lo == 0 and mtime_hi = 1 at next read
// the result will be 0x1FFFFFFFF, not 0x100000000
uint64_t mtime = 0;
while(1) {
uint32_t mtime_hi = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
uint32_t mtime_lo = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 0);
uint32_t mtime_hn = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
if(mtime_hi == mtime_hn) {
mtime += ((uint64_t)mtime_hi << 32) | mtime_lo;
break;
}
}
// just set mtime to mtimecmp does not accurately reflect the passage of time
// cause some time cost on the path to deal with the interrupt
// so, we need to to fix the value with a multiple of cycle_per_tick
uint64_t tick = mtime / cycle_per_tick;
uint64_t mtimecmp = (tick + 1) * cycle_per_tick;
// write to mtimecmp register
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF;
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = 0xFFFFFFFF & (mtimecmp >> 32);
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF & (mtimecmp >> 0);
}
__PORT__ void port_systick_priority_set(uint32_t prio)
{
//NVIC_SetPriority(SysTick_IRQn, prio);
}

27
arch/risc-v/rv32i/gcc/port_config.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _PORT_CONFIG_H_
#define _PORT_CONFIG_H_
#define TOS_CFG_CPU_ADDR_SIZE CPU_WORD_SIZE_32
#define TOS_CFG_CPU_DATA_SIZE CPU_WORD_SIZE_32
#define TOS_CFG_CPU_STK_GROWTH CPU_STK_GROWTH_DESCENDING
#define TOS_CFG_CPU_HRTIMER_EN 0u
#define TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT 0u
#endif /* _PORT_CONFIG_H_ */

258
arch/risc-v/rv32i/gcc/port_s.S Normal file
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.global port_int_disable
.global port_int_enable
.global port_cpsr_save
.global port_cpsr_restore
.global port_systick_resume
.global port_systick_suspend
.global port_systick_pending_reset
.global port_sched_start
.global port_context_switch
.global port_irq_context_switch
.extern k_curr_task
.extern k_next_task
#include "riscv_encoding.h"
.text
.align 2
.type port_int_disable, %function
port_int_disable:
csrci mstatus, MSTATUS_MIE
ret
.type port_int_enable, %function
port_int_enable:
csrsi mstatus, MSTATUS_MIE
ret
.type port_cpsr_save, %function
port_cpsr_save:
csrrci a0, mstatus, MSTATUS_MIE
ret
.type port_cpsr_restore, %function
port_cpsr_restore:
csrw mstatus, a0
ret
.type port_systick_resume, %function
port_systick_resume:
li t0, MIE_MTIE
csrs mie, t0
ret
.type port_systick_suspend, %function
port_systick_suspend:
li t0, MIE_MTIE
csrc mie, t0
ret
.type port_systick_pending_reset, %function
port_systick_pending_reset:
li t0, MIP_MTIP
csrc mip, t0
ret
#define REGBYTES 4
.macro SAVE_CONTEXT
addi sp, sp, -32*REGBYTES
sw x1, 2*REGBYTES(sp)
sw x3, 3*REGBYTES(sp)
sw x4, 4*REGBYTES(sp)
sw x5, 5*REGBYTES(sp)
sw x6, 6*REGBYTES(sp)
sw x7, 7*REGBYTES(sp)
sw x8, 8*REGBYTES(sp)
sw x9, 9*REGBYTES(sp)
sw x10, 10*REGBYTES(sp)
sw x11, 11*REGBYTES(sp)
sw x12, 12*REGBYTES(sp)
sw x13, 13*REGBYTES(sp)
sw x14, 14*REGBYTES(sp)
sw x15, 15*REGBYTES(sp)
sw x16, 16*REGBYTES(sp)
sw x17, 17*REGBYTES(sp)
sw x18, 18*REGBYTES(sp)
sw x19, 19*REGBYTES(sp)
sw x20, 20*REGBYTES(sp)
sw x21, 21*REGBYTES(sp)
sw x22, 22*REGBYTES(sp)
sw x23, 23*REGBYTES(sp)
sw x24, 24*REGBYTES(sp)
sw x25, 25*REGBYTES(sp)
sw x26, 26*REGBYTES(sp)
sw x27, 27*REGBYTES(sp)
sw x28, 28*REGBYTES(sp)
sw x29, 29*REGBYTES(sp)
sw x30, 30*REGBYTES(sp)
sw x31, 31*REGBYTES(sp)
.endm
.macro RESTORE_CONTEXT
lw t0, 0*REGBYTES(sp)
csrw mepc, t0
lw t0, 1*REGBYTES(sp)
csrw mstatus, t0
lw x1, 2*REGBYTES(sp)
lw x3, 3*REGBYTES(sp)
lw x4, 4*REGBYTES(sp)
lw x5, 5*REGBYTES(sp)
lw x6, 6*REGBYTES(sp)
lw x7, 7*REGBYTES(sp)
lw x8, 8*REGBYTES(sp)
lw x9, 9*REGBYTES(sp)
lw x10, 10*REGBYTES(sp)
lw x11, 11*REGBYTES(sp)
lw x12, 12*REGBYTES(sp)
lw x13, 13*REGBYTES(sp)
lw x14, 14*REGBYTES(sp)
lw x15, 15*REGBYTES(sp)
lw x16, 16*REGBYTES(sp)
lw x17, 17*REGBYTES(sp)
lw x18, 18*REGBYTES(sp)
lw x19, 19*REGBYTES(sp)
lw x20, 20*REGBYTES(sp)
lw x21, 21*REGBYTES(sp)
lw x22, 22*REGBYTES(sp)
lw x23, 23*REGBYTES(sp)
lw x24, 24*REGBYTES(sp)
lw x25, 25*REGBYTES(sp)
lw x26, 26*REGBYTES(sp)
lw x27, 27*REGBYTES(sp)
lw x28, 28*REGBYTES(sp)
lw x29, 29*REGBYTES(sp)
lw x30, 30*REGBYTES(sp)
lw x31, 31*REGBYTES(sp)
addi sp, sp, 32*REGBYTES
.endm
.align 2
context_switch_return:
irq_context_return:
ret
.align 2
.type port_sched_start, %function
port_sched_start:
// enable timer interrupt
li t0, MIE_MTIE
csrs mie, t0
// load sp from k_curr_task->sp
la t0, k_curr_task // t0 = &k_curr_task
lw t0, (t0) // t0 = &(k_curr_task->sp)
lw sp, (t0) // sp = k_curr_task->sp
// save sp to stack
addi t1, sp, 32*REGBYTES
sw t1, (t0)
RESTORE_CONTEXT
mret
.align 2
.type port_context_switch, %function
port_context_switch:
SAVE_CONTEXT
// return from port_context_switch as return from a function
la t0, context_switch_return
sw t0, 0*REGBYTES(sp)
csrr t0, mstatus
li t1, MSTATUS_MPP
or t0, t0, t1
sw t0, 1*REGBYTES(sp)
// save sp to k_curr_task.sp
la t0, k_curr_task // t0 = &k_curr_task
lw t1, (t0)
sw sp, (t1)
// switch task
// k_curr_task = k_next_task
la t1, k_next_task // t1 = &k_next_task
lw t1, (t1) // t1 = k_next_task
sw t1, (t0)
// load new task sp
lw sp, (t1)
RESTORE_CONTEXT
mret
.align 2
.type port_irq_context_switch, %function
port_irq_context_switch:
SAVE_CONTEXT
la t0, irq_context_return
sw t0, 0*REGBYTES(sp)
li t0, MSTATUS_MPP
sw t0, 1*REGBYTES(sp)
// save sp to k_curr_task.sp
la t0, k_curr_task // t0 = &k_curr_task
lw t1, (t0)
sw sp, (t1)
// switch task
// k_curr_task = k_next_task
la t1, k_next_task // t1 = &k_next_task
lw t1, (t1) // t1 = k_next_task
sw t1, (t0)
// load new task sp
lw sp, (t1)
RESTORE_CONTEXT
mret
.align 2
.global machine_trap_entry
machine_trap_entry:
SAVE_CONTEXT
csrr t0, mepc
sw t0, 0*REGBYTES(sp)
csrr t0, mstatus
sw t0, 1*REGBYTES(sp)
// save sp to k_curr_task.sp
la t0, k_curr_task // t0 = &k_curr_task
lw t1, (t0)
sw sp, (t1)
csrr a0, mcause
mv a1, sp
bltz a0, irq
call cpu_trap_entry
j restore
irq:
slli a0, a0, 1
srli a0, a0, 1
call cpu_irq_entry
restore:
RESTORE_CONTEXT
mret

41
arch/risc-v/rv32i/gcc/start.S Normal file
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// See LICENSE for license details.
#include "riscv_encoding.h"
.section .text.entry
.globl _start
.type _start,@function
_start:
csrc mstatus, MSTATUS_MIE
csrw mie, 0
la t0, machine_trap_entry
csrw mtvec, t0
la sp, _stack_top
/* Load data section */
la a0, _load_data
la a1, _data
la a2, _edata
bgeu a1, a2, begin_clear_bss
clear_data:
lw t0, (a0)
sw t0, (a1)
addi a0, a0, 4
addi a1, a1, 4
bltu a1, a2, clear_data
begin_clear_bss:
// clear bss section
la a0, _bss
la a1, _ebss
bgeu a0, a1, init_finish
clear_bss:
sw zero, (a0)
addi a0, a0, 4
bltu a0, a1, clear_bss
init_finish:
call main
__die:
j __die