diff --git a/arch/risc-v/bumblebee/gcc/riscv_port_s.S b/arch/risc-v/bumblebee/gcc/riscv_port_s.S
new file mode 100644
index 00000000..4cf01539
--- /dev/null
+++ b/arch/risc-v/bumblebee/gcc/riscv_port_s.S
@@ -0,0 +1,167 @@
+#include "port.h"
+
+.global irq_entry
+.global trap_entry
+
+.extern k_curr_task
+.extern k_next_task
+.extern k_task_irq_switch_flag
+
+.align 2
+irq_entry:
+    addi   sp,  sp, -32*REGBYTES
+    sw     x1,  2*REGBYTES(sp)
+    sw     x3,  3*REGBYTES(sp)
+    sw     x4,  4*REGBYTES(sp)
+    sw     x5,  5*REGBYTES(sp)
+    sw     x6,  6*REGBYTES(sp)
+    sw     x7,  7*REGBYTES(sp)
+    sw     x8,  8*REGBYTES(sp)
+    sw     x9,  9*REGBYTES(sp)
+    sw    x10, 10*REGBYTES(sp)
+    sw    x11, 11*REGBYTES(sp)
+    sw    x12, 12*REGBYTES(sp)
+    sw    x13, 13*REGBYTES(sp)
+    sw    x14, 14*REGBYTES(sp)
+    sw    x15, 15*REGBYTES(sp)
+    sw    x16, 16*REGBYTES(sp)
+    sw    x17, 17*REGBYTES(sp)
+    sw    x18, 18*REGBYTES(sp)
+    sw    x19, 19*REGBYTES(sp)
+    sw    x20, 20*REGBYTES(sp)
+    sw    x21, 21*REGBYTES(sp)
+    sw    x22, 22*REGBYTES(sp)
+    sw    x23, 23*REGBYTES(sp)
+    sw    x24, 24*REGBYTES(sp)
+    sw    x25, 25*REGBYTES(sp)
+    sw    x26, 26*REGBYTES(sp)
+    sw    x27, 27*REGBYTES(sp)
+    sw    x28, 28*REGBYTES(sp)
+    sw    x29, 29*REGBYTES(sp)
+    sw    x30, 30*REGBYTES(sp)
+    sw    x31, 31*REGBYTES(sp)
+
+    csrr    t0,  mepc
+    sw      t0,  0*REGBYTES(sp)
+
+    csrr    t0,  mstatus
+    sw      t0,  1*REGBYTES(sp)
+
+    // save sp to k_curr_task.sp
+    la      t0, k_curr_task         // t0 = &k_curr_task
+    lw      t1, (t0)
+    sw      sp, (t1)
+
+    csrr    a0,  mcause
+    mv      a1,  sp
+
+    slli    a0,  a0, 16
+    srli    a0,  a0, 16
+    call    cpu_irq_entry
+
+    la      t0,  k_task_irq_switch_flag
+    lw      t1,  (t0)
+    beqz    t1,  irq_restore
+    sw      zero,(t0)
+
+    // save sp to k_curr_task.sp
+    la      t0, k_curr_task         // t0 = &k_curr_task
+    lw      t1, (t0)
+    sw      sp, (t1)
+
+    // switch task
+    // k_curr_task = k_next_task
+    la      t1, k_next_task         // t1 = &k_next_task
+    lw      t1, (t1)                // t1 = k_next_task
+    sw      t1, (t0)
+
+    // load new task sp
+    lw      sp, (t1)
+
+irq_restore:
+    // restore context
+    lw      t0,   0*REGBYTES(sp)
+    csrw    mepc, t0
+
+    lw      t0,   1*REGBYTES(sp)
+    csrw    mstatus, t0
+
+    lw      x1,   2*REGBYTES(sp)
+    lw      x3,   3*REGBYTES(sp)
+    lw      x4,   4*REGBYTES(sp)
+    lw      x5,   5*REGBYTES(sp)
+    lw      x6,   6*REGBYTES(sp)
+    lw      x7,   7*REGBYTES(sp)
+    lw      x8,   8*REGBYTES(sp)
+    lw      x9,   9*REGBYTES(sp)
+    lw      x10, 10*REGBYTES(sp)
+    lw      x11, 11*REGBYTES(sp)
+    lw      x12, 12*REGBYTES(sp)
+    lw      x13, 13*REGBYTES(sp)
+    lw      x14, 14*REGBYTES(sp)
+    lw      x15, 15*REGBYTES(sp)
+    lw      x16, 16*REGBYTES(sp)
+    lw      x17, 17*REGBYTES(sp)
+    lw      x18, 18*REGBYTES(sp)
+    lw      x19, 19*REGBYTES(sp)
+    lw      x20, 20*REGBYTES(sp)
+    lw      x21, 21*REGBYTES(sp)
+    lw      x22, 22*REGBYTES(sp)
+    lw      x23, 23*REGBYTES(sp)
+    lw      x24, 24*REGBYTES(sp)
+    lw      x25, 25*REGBYTES(sp)
+    lw      x26, 26*REGBYTES(sp)
+    lw      x27, 27*REGBYTES(sp)
+    lw      x28, 28*REGBYTES(sp)
+    lw      x29, 29*REGBYTES(sp)
+    lw      x30, 30*REGBYTES(sp)
+    lw      x31, 31*REGBYTES(sp)
+
+    addi    sp, sp, 32*REGBYTES
+
+    mret
+
+
+.align 2
+trap_entry:
+    addi   sp,  sp, -32*REGBYTES
+    sw     x1,  2*REGBYTES(sp)
+    sw     x3,  3*REGBYTES(sp)
+    sw     x4,  4*REGBYTES(sp)
+    sw     x5,  5*REGBYTES(sp)
+    sw     x6,  6*REGBYTES(sp)
+    sw     x7,  7*REGBYTES(sp)
+    sw     x8,  8*REGBYTES(sp)
+    sw     x9,  9*REGBYTES(sp)
+    sw    x10, 10*REGBYTES(sp)
+    sw    x11, 11*REGBYTES(sp)
+    sw    x12, 12*REGBYTES(sp)
+    sw    x13, 13*REGBYTES(sp)
+    sw    x14, 14*REGBYTES(sp)
+    sw    x15, 15*REGBYTES(sp)
+    sw    x16, 16*REGBYTES(sp)
+    sw    x17, 17*REGBYTES(sp)
+    sw    x18, 18*REGBYTES(sp)
+    sw    x19, 19*REGBYTES(sp)
+    sw    x20, 20*REGBYTES(sp)
+    sw    x21, 21*REGBYTES(sp)
+    sw    x22, 22*REGBYTES(sp)
+    sw    x23, 23*REGBYTES(sp)
+    sw    x24, 24*REGBYTES(sp)
+    sw    x25, 25*REGBYTES(sp)
+    sw    x26, 26*REGBYTES(sp)
+    sw    x27, 27*REGBYTES(sp)
+    sw    x28, 28*REGBYTES(sp)
+    sw    x29, 29*REGBYTES(sp)
+    sw    x30, 30*REGBYTES(sp)
+    sw    x31, 31*REGBYTES(sp)
+
+    csrr    t0,  mepc
+    sw      t0,  0*REGBYTES(sp)
+
+    csrr    t0,  mstatus
+    sw      t0,  1*REGBYTES(sp)
+
+    call cpu_trap_entry
+1:
+    j 1b
diff --git a/arch/risc-v/rv32i/gcc/port.h b/arch/risc-v/rv32i/gcc/port.h
index a3da86ea..66772bd0 100644
--- a/arch/risc-v/rv32i/gcc/port.h
+++ b/arch/risc-v/rv32i/gcc/port.h
@@ -18,6 +18,8 @@
 #ifndef _PORT_H_
 #define _PORT_H_
 
+#ifndef __ASSEMBLER__
+
 __PORT__ void       port_int_disable(void);
 
 __PORT__ void       port_int_enable(void);
@@ -69,4 +71,9 @@ __PORT__ void       HardFault_Handler(void);
 __PORT__ void       port_fault_diagnosis(void);
 #endif
 
+#endif /* __ASSEMBLER__ */
+
+
+#define REGBYTES    4
+
 #endif /* _PORT_H_ */
diff --git a/arch/risc-v/rv32i/gcc/port_s.S b/arch/risc-v/rv32i/gcc/port_s.S
index dc4b9b27..c0e729ba 100644
--- a/arch/risc-v/rv32i/gcc/port_s.S
+++ b/arch/risc-v/rv32i/gcc/port_s.S
@@ -65,42 +65,23 @@ port_systick_pending_reset:
     csrc mip, t0
     ret
 
+.align 2
+.type port_sched_start, %function
+port_sched_start:
+    // enable timer interrupt
+    li      t0, MIE_MTIE
+    csrs    mie, t0
 
-.macro SAVE_CONTEXT
-    addi   sp, sp, -32*REGBYTES
-    sw     x1,  2*REGBYTES(sp)
-    sw     x3,  3*REGBYTES(sp)
-    sw     x4,  4*REGBYTES(sp)
-    sw     x5,  5*REGBYTES(sp)
-    sw     x6,  6*REGBYTES(sp)
-    sw     x7,  7*REGBYTES(sp)
-    sw     x8,  8*REGBYTES(sp)
-    sw     x9,  9*REGBYTES(sp)
-    sw    x10, 10*REGBYTES(sp)
-    sw    x11, 11*REGBYTES(sp)
-    sw    x12, 12*REGBYTES(sp)
-    sw    x13, 13*REGBYTES(sp)
-    sw    x14, 14*REGBYTES(sp)
-    sw    x15, 15*REGBYTES(sp)
-    sw    x16, 16*REGBYTES(sp)
-    sw    x17, 17*REGBYTES(sp)
-    sw    x18, 18*REGBYTES(sp)
-    sw    x19, 19*REGBYTES(sp)
-    sw    x20, 20*REGBYTES(sp)
-    sw    x21, 21*REGBYTES(sp)
-    sw    x22, 22*REGBYTES(sp)
-    sw    x23, 23*REGBYTES(sp)
-    sw    x24, 24*REGBYTES(sp)
-    sw    x25, 25*REGBYTES(sp)
-    sw    x26, 26*REGBYTES(sp)
-    sw    x27, 27*REGBYTES(sp)
-    sw    x28, 28*REGBYTES(sp)
-    sw    x29, 29*REGBYTES(sp)
-    sw    x30, 30*REGBYTES(sp)
-    sw    x31, 31*REGBYTES(sp)
-.endm
+    // load sp from k_curr_task->sp
+    la      t0, k_curr_task         // t0 = &k_curr_task
+    lw      t0, (t0)                // t0 = &(k_curr_task->sp)
+    lw      sp, (t0)                // sp = k_curr_task->sp
 
-.macro RESTORE_CONTEXT
+    // save sp to stack
+    addi    t1, sp, 32*REGBYTES
+    sw      t1, (t0)
+
+    // restore context
     lw      t0,   0*REGBYTES(sp)
     csrw    mepc, t0
 
@@ -139,25 +120,6 @@ port_systick_pending_reset:
     lw      x31, 31*REGBYTES(sp)
 
     addi    sp, sp, 32*REGBYTES
-.endm
-
-.align 2
-.type port_sched_start, %function
-port_sched_start:
-    // enable timer interrupt
-    li      t0, MIE_MTIE
-    csrs    mie, t0
-
-    // load sp from k_curr_task->sp
-    la      t0, k_curr_task         // t0 = &k_curr_task
-    lw      t0, (t0)                // t0 = &(k_curr_task->sp)
-    lw      sp, (t0)                // sp = k_curr_task->sp
-
-    // save sp to stack
-    addi    t1, sp, 32*REGBYTES
-    sw      t1, (t0)
-
-    RESTORE_CONTEXT
 
     mret
 
@@ -165,7 +127,38 @@ port_sched_start:
 .align 2
 .type port_context_switch, %function
 port_context_switch:
-    SAVE_CONTEXT
+    addi   sp, sp, -32*REGBYTES
+    sw     x1,  2*REGBYTES(sp)
+    sw     x3,  3*REGBYTES(sp)
+    sw     x4,  4*REGBYTES(sp)
+    sw     x5,  5*REGBYTES(sp)
+    sw     x6,  6*REGBYTES(sp)
+    sw     x7,  7*REGBYTES(sp)
+    sw     x8,  8*REGBYTES(sp)
+    sw     x9,  9*REGBYTES(sp)
+    sw    x10, 10*REGBYTES(sp)
+    sw    x11, 11*REGBYTES(sp)
+    sw    x12, 12*REGBYTES(sp)
+    sw    x13, 13*REGBYTES(sp)
+    sw    x14, 14*REGBYTES(sp)
+    sw    x15, 15*REGBYTES(sp)
+    sw    x16, 16*REGBYTES(sp)
+    sw    x17, 17*REGBYTES(sp)
+    sw    x18, 18*REGBYTES(sp)
+    sw    x19, 19*REGBYTES(sp)
+    sw    x20, 20*REGBYTES(sp)
+    sw    x21, 21*REGBYTES(sp)
+    sw    x22, 22*REGBYTES(sp)
+    sw    x23, 23*REGBYTES(sp)
+    sw    x24, 24*REGBYTES(sp)
+    sw    x25, 25*REGBYTES(sp)
+    sw    x26, 26*REGBYTES(sp)
+    sw    x27, 27*REGBYTES(sp)
+    sw    x28, 28*REGBYTES(sp)
+    sw    x29, 29*REGBYTES(sp)
+    sw    x30, 30*REGBYTES(sp)
+    sw    x31, 31*REGBYTES(sp)
+
 
     sw      ra,  0*REGBYTES(sp)
 
@@ -188,59 +181,44 @@ port_context_switch:
     // load new task sp
     lw      sp, (t1)
 
-    RESTORE_CONTEXT
-
-    mret
-
-.align 2
-.global trap_entry
-.global irq_entry
-trap_entry:
-irq_entry:
-    SAVE_CONTEXT
-
-    csrr    t0,  mepc
-    sw      t0,  0*REGBYTES(sp)
-
-    csrr    t0,  mstatus
-    sw      t0,  1*REGBYTES(sp)
-
-    // save sp to k_curr_task.sp
-    la      t0, k_curr_task         // t0 = &k_curr_task
-    lw      t1, (t0)
-    sw      sp, (t1)
-
-    csrr    a0,  mcause
-    mv      a1,  sp
-    bltz    a0,  irq
-    call    cpu_trap_entry
-    j       irq_restore
-
-irq:
-    slli    a0,  a0, 16
-    srli    a0,  a0, 16
-    call    cpu_irq_entry
-
-    la      t0,  k_task_irq_switch_flag 
-    lw      t1,  (t0)
-    beqz    t1,  irq_restore
-    sw      zero,(t0)
-
-    // save sp to k_curr_task.sp
-    la      t0, k_curr_task         // t0 = &k_curr_task
-    lw      t1, (t0)
-    sw      sp, (t1)
-
-    // switch task
-    // k_curr_task = k_next_task
-    la      t1, k_next_task         // t1 = &k_next_task
-    lw      t1, (t1)                // t1 = k_next_task
-    sw      t1, (t0)
-
-    // load new task sp
-    lw      sp, (t1)
-
-irq_restore:
-    RESTORE_CONTEXT
+    // restore context
+    lw      t0,   0*REGBYTES(sp)
+    csrw    mepc, t0
+
+    lw      t0,   1*REGBYTES(sp)
+    csrw    mstatus, t0
+
+    lw      x1,   2*REGBYTES(sp)
+    lw      x3,   3*REGBYTES(sp)
+    lw      x4,   4*REGBYTES(sp)
+    lw      x5,   5*REGBYTES(sp)
+    lw      x6,   6*REGBYTES(sp)
+    lw      x7,   7*REGBYTES(sp)
+    lw      x8,   8*REGBYTES(sp)
+    lw      x9,   9*REGBYTES(sp)
+    lw      x10, 10*REGBYTES(sp)
+    lw      x11, 11*REGBYTES(sp)
+    lw      x12, 12*REGBYTES(sp)
+    lw      x13, 13*REGBYTES(sp)
+    lw      x14, 14*REGBYTES(sp)
+    lw      x15, 15*REGBYTES(sp)
+    lw      x16, 16*REGBYTES(sp)
+    lw      x17, 17*REGBYTES(sp)
+    lw      x18, 18*REGBYTES(sp)
+    lw      x19, 19*REGBYTES(sp)
+    lw      x20, 20*REGBYTES(sp)
+    lw      x21, 21*REGBYTES(sp)
+    lw      x22, 22*REGBYTES(sp)
+    lw      x23, 23*REGBYTES(sp)
+    lw      x24, 24*REGBYTES(sp)
+    lw      x25, 25*REGBYTES(sp)
+    lw      x26, 26*REGBYTES(sp)
+    lw      x27, 27*REGBYTES(sp)
+    lw      x28, 28*REGBYTES(sp)
+    lw      x29, 29*REGBYTES(sp)
+    lw      x30, 30*REGBYTES(sp)
+    lw      x31, 31*REGBYTES(sp)
+
+    addi    sp, sp, 32*REGBYTES
 
     mret
diff --git a/arch/risc-v/spike/gcc/riscv_port_s.S b/arch/risc-v/spike/gcc/riscv_port_s.S
new file mode 100644
index 00000000..b32e8d82
--- /dev/null
+++ b/arch/risc-v/spike/gcc/riscv_port_s.S
@@ -0,0 +1,120 @@
+.equ    REGBYTES,           4
+
+.align 2
+.global rv32_trap_entry
+rv32_trap_entry:
+    addi   sp, sp, -32*REGBYTES
+    sw     x1,  2*REGBYTES(sp)
+    sw     x3,  3*REGBYTES(sp)
+    sw     x4,  4*REGBYTES(sp)
+    sw     x5,  5*REGBYTES(sp)
+    sw     x6,  6*REGBYTES(sp)
+    sw     x7,  7*REGBYTES(sp)
+    sw     x8,  8*REGBYTES(sp)
+    sw     x9,  9*REGBYTES(sp)
+    sw    x10, 10*REGBYTES(sp)
+    sw    x11, 11*REGBYTES(sp)
+    sw    x12, 12*REGBYTES(sp)
+    sw    x13, 13*REGBYTES(sp)
+    sw    x14, 14*REGBYTES(sp)
+    sw    x15, 15*REGBYTES(sp)
+    sw    x16, 16*REGBYTES(sp)
+    sw    x17, 17*REGBYTES(sp)
+    sw    x18, 18*REGBYTES(sp)
+    sw    x19, 19*REGBYTES(sp)
+    sw    x20, 20*REGBYTES(sp)
+    sw    x21, 21*REGBYTES(sp)
+    sw    x22, 22*REGBYTES(sp)
+    sw    x23, 23*REGBYTES(sp)
+    sw    x24, 24*REGBYTES(sp)
+    sw    x25, 25*REGBYTES(sp)
+    sw    x26, 26*REGBYTES(sp)
+    sw    x27, 27*REGBYTES(sp)
+    sw    x28, 28*REGBYTES(sp)
+    sw    x29, 29*REGBYTES(sp)
+    sw    x30, 30*REGBYTES(sp)
+    sw    x31, 31*REGBYTES(sp)
+
+    csrr    t0,  mepc
+    sw      t0,  0*REGBYTES(sp)
+
+    csrr    t0,  mstatus
+    sw      t0,  1*REGBYTES(sp)
+
+    // save sp to k_curr_task.sp
+    la      t0, k_curr_task         // t0 = &k_curr_task
+    lw      t1, (t0)
+    sw      sp, (t1)
+
+    csrr    a0,  mcause
+    mv      a1,  sp
+    bltz    a0,  handle_irq
+    call    cpu_trap_entry
+    j       irq_restore
+
+handle_irq:
+    slli    a0,  a0, 16
+    srli    a0,  a0, 16
+    call    cpu_irq_entry
+
+    la      t0,  k_task_irq_switch_flag
+    lw      t1,  (t0)
+    beqz    t1,  irq_restore
+    sw      zero,(t0)
+
+    // save sp to k_curr_task.sp
+    la      t0, k_curr_task         // t0 = &k_curr_task
+    lw      t1, (t0)
+    sw      sp, (t1)
+
+    // switch task
+    // k_curr_task = k_next_task
+    la      t1, k_next_task         // t1 = &k_next_task
+    lw      t1, (t1)                // t1 = k_next_task
+    sw      t1, (t0)
+
+    // load new task sp
+    lw      sp, (t1)
+
+irq_restore:
+    // restore context
+    lw      t0,   0*REGBYTES(sp)
+    csrw    mepc, t0
+
+    lw      t0,   1*REGBYTES(sp)
+    csrw    mstatus, t0
+
+    lw      x1,   2*REGBYTES(sp)
+    lw      x3,   3*REGBYTES(sp)
+    lw      x4,   4*REGBYTES(sp)
+    lw      x5,   5*REGBYTES(sp)
+    lw      x6,   6*REGBYTES(sp)
+    lw      x7,   7*REGBYTES(sp)
+    lw      x8,   8*REGBYTES(sp)
+    lw      x9,   9*REGBYTES(sp)
+    lw      x10, 10*REGBYTES(sp)
+    lw      x11, 11*REGBYTES(sp)
+    lw      x12, 12*REGBYTES(sp)
+    lw      x13, 13*REGBYTES(sp)
+    lw      x14, 14*REGBYTES(sp)
+    lw      x15, 15*REGBYTES(sp)
+    lw      x16, 16*REGBYTES(sp)
+    lw      x17, 17*REGBYTES(sp)
+    lw      x18, 18*REGBYTES(sp)
+    lw      x19, 19*REGBYTES(sp)
+    lw      x20, 20*REGBYTES(sp)
+    lw      x21, 21*REGBYTES(sp)
+    lw      x22, 22*REGBYTES(sp)
+    lw      x23, 23*REGBYTES(sp)
+    lw      x24, 24*REGBYTES(sp)
+    lw      x25, 25*REGBYTES(sp)
+    lw      x26, 26*REGBYTES(sp)
+    lw      x27, 27*REGBYTES(sp)
+    lw      x28, 28*REGBYTES(sp)
+    lw      x29, 29*REGBYTES(sp)
+    lw      x30, 30*REGBYTES(sp)
+    lw      x31, 31*REGBYTES(sp)
+
+    addi    sp, sp, 32*REGBYTES
+
+    mret
diff --git a/board/GD32VF103C_START/eclipse/hello_world/.cproject b/board/GD32VF103C_START/eclipse/hello_world/.cproject
index 33bcd505..75158d6b 100644
--- a/board/GD32VF103C_START/eclipse/hello_world/.cproject
+++ b/board/GD32VF103C_START/eclipse/hello_world/.cproject
@@ -104,6 +104,8 @@
                                     <listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/Application}&quot;"/>
                                     									
                                     <listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/GD32VF103_Firmware_Library/RISCV/drivers}&quot;"/>
+                                    									
+                                    <listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/TencentOS_tiny/arch/risc-v/rv32i}&quot;"/>
                                     								
                                 </option>
                                 								
diff --git a/board/GD32VF103C_START/eclipse/hello_world/main.c b/board/GD32VF103C_START/eclipse/hello_world/main.c
index d3e3cbe5..7e362a6a 100644
--- a/board/GD32VF103C_START/eclipse/hello_world/main.c
+++ b/board/GD32VF103C_START/eclipse/hello_world/main.c
@@ -27,7 +27,7 @@ void task2(void *pdata)
         share++;
         for(int i=0; i<5; i++) {
             printf("hello world from %s cnt: %08x\n", __func__, task_cnt2--);
-            tos_task_delay(10);
+            tos_task_delay(50);
         }
         tos_sem_post(&sem);
     }
diff --git a/board/QEMU_Spike/GCC/demo/Makefile b/board/QEMU_Spike/GCC/demo/Makefile
index bd74800b..703b6eaa 100644
--- a/board/QEMU_Spike/GCC/demo/Makefile
+++ b/board/QEMU_Spike/GCC/demo/Makefile
@@ -53,7 +53,8 @@ HAL_DRIVER_SRC =  \
 ASM_SOURCES = 
 
 ASM_SOURCES_S =  \
-$(TOP_DIR)/arch/risc-v/rv32i/gcc/port_s.S	\
+$(TOP_DIR)/arch/risc-v/rv32i/gcc/port_s.S		\
+$(TOP_DIR)/arch/risc-v/spike/gcc/riscv_port_s.S	\
 start.S
 
 
diff --git a/board/QEMU_Spike/GCC/demo/start.S b/board/QEMU_Spike/GCC/demo/start.S
index 727ce1d1..b4f89008 100644
--- a/board/QEMU_Spike/GCC/demo/start.S
+++ b/board/QEMU_Spike/GCC/demo/start.S
@@ -1,15 +1,12 @@
-// See LICENSE for license details.
-
-#include "riscv_encoding.h"
-
+.align 2
 .section .text.entry
     .globl _start
     .type _start,@function
 _start:
-    csrc mstatus, MSTATUS_MIE
+    csrc mstatus, 0x00000008 
     csrw mie, 0
 
-    la t0, trap_entry
+    la t0, rv32_trap_entry
     csrw mtvec, t0
 
     la sp, _stack_top
diff --git a/board/QEMU_Spike/eclipse/demo/start.S b/board/QEMU_Spike/eclipse/demo/start.S
index 727ce1d1..4a18fd96 100644
--- a/board/QEMU_Spike/eclipse/demo/start.S
+++ b/board/QEMU_Spike/eclipse/demo/start.S
@@ -1,15 +1,14 @@
-// See LICENSE for license details.
-
-#include "riscv_encoding.h"
+.extern rv32_trap_entry
 
+.align 2
 .section .text.entry
     .globl _start
     .type _start,@function
 _start:
-    csrc mstatus, MSTATUS_MIE
+    csrc mstatus, 0x00000008
     csrw mie, 0
 
-    la t0, trap_entry
+    la t0, rv32_trap_entry
     csrw mtvec, t0
 
     la sp, _stack_top