From 308ad78e444cba0878ea8b6757307dcb36afcd3d Mon Sep 17 00:00:00 2001 From: acevest Date: Wed, 9 Oct 2019 12:10:19 +0800 Subject: [PATCH] mtvec exception handler use 4byte alignment --- arch/risc-v/bumblebee/gcc/riscv_port_s.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/risc-v/bumblebee/gcc/riscv_port_s.S b/arch/risc-v/bumblebee/gcc/riscv_port_s.S index 1683a0b6..68e7ee00 100644 --- a/arch/risc-v/bumblebee/gcc/riscv_port_s.S +++ b/arch/risc-v/bumblebee/gcc/riscv_port_s.S @@ -7,6 +7,6 @@ irq_entry: j rv32_exception_entry -.align 6 +.align 2 trap_entry: j rv32_exception_entry