add cortex-v7a support
How To Run: see TencentOS-tiny\board\ALPHA_I.MX_emmc_256ddr\README.md TODO Next: 1. VFP support 2. fault diagnosis support 3. qemu vexpress ca9 support 4. raspberry pi support 5. SMP support
This commit is contained in:
202
arch/arm/arm-v7a/cortex-a7/gcc/exceptions.S
Normal file
202
arch/arm/arm-v7a/cortex-a7/gcc/exceptions.S
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@@ -0,0 +1,202 @@
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/* Fuchsia's code is nice here, so I learn from it(fine, almost copy). thanks */
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.syntax unified
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.text
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/* macros to align and unalign the stack on 8 byte boundary for ABI compliance */
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.macro stack_align, tempreg
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/* make sure the stack is aligned */
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mov \tempreg, sp
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tst sp, #4
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subeq sp, #4
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push { \tempreg }
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/* tempreg holds the original stack */
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.endm
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.macro stack_restore, tempreg
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/* restore the potentially unaligned stack */
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pop { \tempreg }
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mov sp, \tempreg
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.endm
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/* save and disable the vfp unit */
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.macro vfp_save, temp1
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/* save old fpexc */
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vmrs \temp1, fpexc
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push { \temp1 }
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/* hard disable the vfp unit */
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bic \temp1, #(1<<30)
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vmsr fpexc, \temp1
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.endm
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/* restore the vfp enable/disable state */
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.macro vfp_restore, temp1
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/* restore fpexc */
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pop { \temp1 }
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vmsr fpexc, \temp1
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.endm
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/* Save callee trashed registers.
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* At exit r0 contains a pointer to the register frame.
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*/
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.macro save
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/* save spsr and r14 onto the svc stack */
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srsdb #0x13!
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/* switch to svc mode, interrupts disabled */
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cpsid i, #0x13
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/* save callee trashed regs and lr */
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push { r0-r3, r12, lr }
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#if 0
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#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
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/* save and disable the vfp unit */
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vfp_save r0
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#endif
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#endif
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/* make sure the stack is 8 byte aligned */
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stack_align r0
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/* r0 now holds the pointer to the original iframe (before alignment) */
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.endm
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.macro save_offset, offset
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sub lr, \offset
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save
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.endm
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.macro restore
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/* undo the stack alignment we did before */
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stack_restore r0
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#if 0
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#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
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/* restore the old state of the vfp unit */
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vfp_restore r0
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#endif
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#endif
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pop { r0-r3, r12, lr }
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/* return to whence we came from */
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rfeia sp!
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.endm
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/* Save all registers.
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* At exit r0 contains a pointer to the register frame.
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*/
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.macro saveall
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/* save spsr and r14 onto the svc stack */
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srsdb #0x13!
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/* switch to svc mode, interrupts disabled */
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cpsid i,#0x13
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/* save all regs */
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push { r0-r12, lr }
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#if 0
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#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
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/* save and disable the vfp unit */
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vfp_save r0
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#endif
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#endif
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/* make sure the stack is 8 byte aligned */
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stack_align r0
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/* r0 now holds the pointer to the original iframe (before alignment) */
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.endm
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.macro saveall_offset, offset
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sub lr, \offset
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saveall
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.endm
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.macro restoreall
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/* undo the stack alignment we did before */
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stack_restore r0
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#if 0
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#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
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/* restore the old state of the vfp unit */
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vfp_restore r0
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#endif
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#endif
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pop { r0-r12, r14 }
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/* return to whence we came from */
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rfeia sp!
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.endm
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.extern tos_knl_irq_enter
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.extern tos_knl_irq_leave
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.global arm_undefined
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arm_undefined:
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save
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/* r0 now holds pointer to iframe */
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bl arm_undefined_handler
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restore
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.global arm_syscall
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arm_syscall:
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b .
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.global arm_prefetch_abort
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arm_prefetch_abort:
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saveall_offset #4
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/* r0 now holds pointer to iframe */
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bl arm_prefetch_abort_handler
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restoreall
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.global arm_data_abort
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arm_data_abort:
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saveall_offset #8
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/* r0 now holds pointer to iframe */
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bl arm_data_abort_handler
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restoreall
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.global arm_reserved
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arm_reserved:
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b .
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.global arm_irq
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arm_irq:
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saveall_offset #4
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/* r0 now holds pointer to iframe */
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bl tos_knl_irq_enter
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/* call into higher level code */
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bl interrupt_irq
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bl tos_knl_irq_leave
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restoreall
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.global arm_fiq
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arm_fiq:
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b .
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.end
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73
arch/arm/arm-v7a/cortex-a7/gcc/port.h
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73
arch/arm/arm-v7a/cortex-a7/gcc/port.h
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@@ -0,0 +1,73 @@
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/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
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*---------------------------------------------------------------------------*/
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#ifndef _PORT_H_
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#define _PORT_H_
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__PORT__ void port_int_disable(void);
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__PORT__ void port_int_enable(void);
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__PORT__ cpu_cpsr_t port_cpsr_save(void);
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__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr);
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__PORT__ void port_cpu_reset(void);
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__PORT__ void port_sched_start(void) __NO_RETURN__;
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__PORT__ void port_context_switch(void);
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__PORT__ void port_irq_context_switch(void);
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__PORT__ void port_systick_config(uint32_t cycle_per_tick);
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__PORT__ void port_systick_priority_set(uint32_t prio);
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#if TOS_CFG_TICKLESS_EN > 0u
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__PORT__ void port_systick_resume(void);
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__PORT__ void port_systick_suspend(void);
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__PORT__ void port_systick_reload(uint32_t cycle_per_tick);
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__PORT__ void port_systick_pending_reset(void);
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__PORT__ k_time_t port_systick_max_delay_millisecond(void);
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#endif
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#if TOS_CFG_PWR_MGR_EN > 0u
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__PORT__ void port_sleep_mode_enter(void);
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__PORT__ void port_stop_mode_enter(void);
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__PORT__ void port_standby_mode_enter(void);
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#endif
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#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
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__PORT__ void HardFault_Handler(void);
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__PORT__ void port_fault_diagnosis(void);
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#endif
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#endif /* _PORT_H_ */
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134
arch/arm/arm-v7a/cortex-a7/gcc/port_c.c
Normal file
134
arch/arm/arm-v7a/cortex-a7/gcc/port_c.c
Normal file
@@ -0,0 +1,134 @@
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/*----------------------------------------------------------------------------
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||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
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*---------------------------------------------------------------------------*/
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#include "tos_k.h"
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__PORT__ void port_cpu_reset(void)
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{
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}
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__PORT__ void port_systick_config(uint32_t cycle_per_tick)
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{
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}
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__PORT__ void port_systick_priority_set(uint32_t prio)
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{
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}
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#if TOS_CFG_TICKLESS_EN > 0u
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__PORT__ k_time_t port_systick_max_delay_millisecond(void)
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{
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}
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__PORT__ void port_systick_resume(void)
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{
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}
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__PORT__ void port_systick_suspend(void)
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{
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}
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__PORT__ void port_systick_reload(uint32_t cycle_per_tick)
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{
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}
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__PORT__ void port_systick_pending_reset(void)
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{
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}
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#endif
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#if TOS_CFG_PWR_MGR_EN > 0u
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__PORT__ void port_sleep_mode_enter(void)
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{
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#if 0
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#if 1
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HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
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#else
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HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
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#endif
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#endif
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}
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__PORT__ void port_stop_mode_enter(void)
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{
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#if 0
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HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
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#endif
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}
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__PORT__ void port_standby_mode_enter(void)
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{
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#if 0
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||||
HAL_PWR_EnterSTANDBYMode();
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#endif
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}
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#endif
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#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
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__PORT__ void port_fault_diagnosis(void)
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{
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// k_fault_log_writer("fault diagnosis does not supported in CORTEX M0\n");
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}
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||||
#if 0
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/*------------------ RealView Compiler -----------------*/
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/* V5 */
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#if defined(__CC_ARM)
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__PORT__ __ASM__ void HardFault_Handler(void)
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{
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IMPORT fault_backtrace
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MOV r0, lr
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TST lr, #0x04
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ITE EQ
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MRSEQ r1, MSP
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MRSNE r1, PSP
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BL fault_backtrace
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}
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||||
/*------------------ ARM Compiler V6 -------------------*/
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||||
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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__PORT__ void __NAKED__ HardFault_Handler(void)
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{
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||||
__ASM__ __VOLATILE__ (
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"MOV r0, lr\n\t"
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"TST lr, #0x04\n\t"
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"ITE EQ\n\t"
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"MRSEQ r1, MSP\n\t"
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"MRSNE r1, PSP\n\t"
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"BL fault_backtrace\n\t"
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);
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}
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||||
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#endif /* ARMCC VERSION */
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||||
#endif
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||||
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#endif /* TOS_CFG_FAULT_BACKTRACE_EN */
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|
35
arch/arm/arm-v7a/cortex-a7/gcc/port_config.h
Normal file
35
arch/arm/arm-v7a/cortex-a7/gcc/port_config.h
Normal file
@@ -0,0 +1,35 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef _PORT_CONFIG_H_
|
||||
#define _PORT_CONFIG_H_
|
||||
|
||||
#define TOS_CFG_CPU_ADDR_SIZE CPU_WORD_SIZE_32
|
||||
#define TOS_CFG_CPU_DATA_SIZE CPU_WORD_SIZE_32
|
||||
#define TOS_CFG_CPU_STK_GROWTH CPU_STK_GROWTH_DESCENDING
|
||||
// #define TOS_CFG_CPU_HRTIMER_SIZE CPU_WORD_SIZE_32
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||||
#define TOS_CFG_CPU_HRTIMER_EN 0u
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||||
#define TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT 0u
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||||
|
||||
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
|
||||
#define TOS_CFG_CPU_ARM_FPU_EN 1u
|
||||
#else
|
||||
#define TOS_CFG_CPU_ARM_FPU_EN 0u
|
||||
#endif
|
||||
|
||||
#endif /* _PORT_CONFIG_H_ */
|
||||
|
80
arch/arm/arm-v7a/cortex-a7/gcc/port_s.S
Normal file
80
arch/arm/arm-v7a/cortex-a7/gcc/port_s.S
Normal file
@@ -0,0 +1,80 @@
|
||||
.global port_int_disable
|
||||
.global port_int_enable
|
||||
.global port_cpsr_save
|
||||
.global port_cpsr_restore
|
||||
.global port_sched_start
|
||||
.global port_context_switch
|
||||
.global port_irq_context_switch
|
||||
|
||||
.extern k_curr_task
|
||||
.extern k_next_task
|
||||
|
||||
.syntax unified
|
||||
.align 2
|
||||
.text
|
||||
|
||||
.type port_int_disable, %function
|
||||
port_int_disable:
|
||||
CPSID I
|
||||
|
||||
.type port_int_enable, %function
|
||||
port_int_enable:
|
||||
CPSIE I
|
||||
|
||||
.type port_cpsr_save, %function
|
||||
port_cpsr_save:
|
||||
MRS R0, CPSR
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||||
CPSID I
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||||
BX LR
|
||||
|
||||
.type port_cpsr_restore, %function
|
||||
port_cpsr_restore:
|
||||
MSR CPSR, R0
|
||||
BX LR
|
||||
|
||||
.type port_sched_start, %function
|
||||
port_sched_start:
|
||||
B .L__context_restore
|
||||
|
||||
.type port_context_switch, %function
|
||||
port_context_switch:
|
||||
.L__context_save:
|
||||
STR R0, [SP, #-0xC] /* backup R0 */
|
||||
|
||||
MRS R0, CPSR
|
||||
TST LR, #0x01
|
||||
ORRNE R0, R0, 0x20 /* set thumb bit*/
|
||||
|
||||
STMFD SP!, { R0 } /* save CPSR */
|
||||
STMFD SP!, { LR } /* save PC */
|
||||
|
||||
LDR R0, [SP, #-0x4] /* restore R0 */
|
||||
STMFD SP!, { R0 - R12, LR }
|
||||
|
||||
/* k_curr_task->sp = SP */
|
||||
LDR R0, =k_curr_task
|
||||
LDR R0, [R0]
|
||||
STR SP, [R0]
|
||||
|
||||
.L__context_restore:
|
||||
/* k_curr_task = k_next_task */
|
||||
LDR R0, =k_next_task
|
||||
LDR R0, [R0]
|
||||
LDR R1, =k_curr_task
|
||||
STR R0, [R1]
|
||||
|
||||
/* SP = k_next_task->sp */
|
||||
LDR SP, [R0]
|
||||
|
||||
LDMFD SP!, { R0 - R12, LR }
|
||||
RFEIA SP!
|
||||
|
||||
.type port_irq_context_switch, %function
|
||||
port_irq_context_switch:
|
||||
/* we already store the k_curr_task's context onto its stack by arm_irq(see saveall_offset) */
|
||||
|
||||
/* ATTENTION: our kernel always runs in SVC mode even in user task,
|
||||
if one day we make the user task run in USR mode(although I cannot see any meaning to do this in RTOS),
|
||||
we must deal with more logic */
|
||||
B .L__context_restore /* magnificent */
|
||||
|
150
arch/arm/arm-v7a/cortex-a7/gcc/start.S
Normal file
150
arch/arm/arm-v7a/cortex-a7/gcc/start.S
Normal file
@@ -0,0 +1,150 @@
|
||||
.equ MODE_USR, 0x10
|
||||
.equ MODE_FIQ, 0x11
|
||||
.equ MODE_IRQ, 0x12
|
||||
.equ MODE_SVC, 0x13
|
||||
.equ MODE_ABT, 0x17
|
||||
.equ MODE_UND, 0x1B
|
||||
.equ MODE_SYS, 0x1F
|
||||
|
||||
.equ BIT_I, 0x80 @ when I bit is set, IRQ is disabled
|
||||
.equ BIT_F, 0x40 @ when F bit is set, FIQ is disabled
|
||||
|
||||
.equ STACK_SIZE_USR, 0x00000100
|
||||
.equ STACK_SIZE_FIQ, 0x00000100
|
||||
.equ STACK_SIZE_IRQ, 0x00001000
|
||||
.equ STACK_SIZE_ABT, 0x00000100
|
||||
.equ STACK_SIZE_UND, 0x00000100
|
||||
.equ STACK_SIZE_SYS, 0x00000800
|
||||
.equ STACK_SIZE_SVC, 0x00001000
|
||||
|
||||
.syntax unified
|
||||
|
||||
.section ".text.vector", "ax"
|
||||
.code 32
|
||||
.align 0
|
||||
.global _start
|
||||
_start:
|
||||
_vector:
|
||||
ldr pc, vector_reset
|
||||
ldr pc, vector_undefined
|
||||
ldr pc, vector_swi
|
||||
ldr pc, vector_prefetch_abort
|
||||
ldr pc, vector_data_abort
|
||||
ldr pc, vector_reserved
|
||||
ldr pc, vector_irq
|
||||
ldr pc, vector_fiq
|
||||
|
||||
.align 3
|
||||
|
||||
vector_reset:
|
||||
.word arm_reset
|
||||
|
||||
vector_undefined:
|
||||
.word arm_undefined
|
||||
|
||||
vector_swi:
|
||||
.word arm_syscall
|
||||
|
||||
vector_prefetch_abort:
|
||||
.word arm_prefetch_abort
|
||||
|
||||
vector_data_abort:
|
||||
.word arm_data_abort
|
||||
|
||||
vector_reserved:
|
||||
.word arm_reserved
|
||||
|
||||
vector_irq:
|
||||
.word arm_irq
|
||||
|
||||
vector_fiq:
|
||||
.word arm_fiq
|
||||
|
||||
.section ".text", "ax"
|
||||
.global arm_reset
|
||||
arm_reset:
|
||||
.L__cache_disable:
|
||||
mrc p15, 0, r12, c1, c0, 0 /* read SCTLR */
|
||||
bic r12, #(1 << 12) /* i-cache disable */
|
||||
bic r12, #(1 << 2 | 1 << 0) /* d-cache, mmu disable */
|
||||
mcr p15, 0, r12, c1, c0, 0 /* write SCTLR */
|
||||
|
||||
/* set up the stack */
|
||||
.L__stack_setup:
|
||||
cpsid i, #MODE_IRQ /* irq */
|
||||
ldr sp, =__irq_stack_limit
|
||||
|
||||
cpsid i, #MODE_FIQ /* fiq */
|
||||
ldr sp, =__fiq_stack_limit
|
||||
|
||||
cpsid i, #MODE_ABT /* abort */
|
||||
ldr sp, =__abt_stack_limit
|
||||
|
||||
cpsid i, #MODE_UND /* undefined */
|
||||
ldr sp, =__und_stack_limit
|
||||
|
||||
cpsid i, #MODE_SYS /* system */
|
||||
ldr sp, =__sys_stack_limit
|
||||
|
||||
cpsid i, #MODE_SVC /* supervisor */
|
||||
ldr sp, =__svc_stack_limit
|
||||
|
||||
/* init vector table */
|
||||
.L__vector_setup:
|
||||
dsb
|
||||
isb
|
||||
ldr r0, =_vector
|
||||
mcr p15, 0, r0, c12, c0, #0 /* write VBAR */
|
||||
dsb
|
||||
isb
|
||||
|
||||
/* clear bss */
|
||||
.L__bss_clear:
|
||||
ldr r0, =__bss_start__
|
||||
ldr r1, =__bss_end__
|
||||
mov r2, #0
|
||||
|
||||
.L__bss_loop:
|
||||
cmp r0, r1
|
||||
strlt r2, [r0], #4
|
||||
blt .L__bss_loop
|
||||
|
||||
bl main
|
||||
b .
|
||||
|
||||
.section ".bss.prebss.exc_stk", "wa"
|
||||
.bss
|
||||
.align 2
|
||||
|
||||
__usr_stack_base:
|
||||
.space STACK_SIZE_USR
|
||||
__usr_stack_limit:
|
||||
|
||||
__fiq_stack_base:
|
||||
.space STACK_SIZE_FIQ
|
||||
__fiq_stack_limit:
|
||||
|
||||
__irq_stack_base:
|
||||
.space STACK_SIZE_IRQ
|
||||
__irq_stack_limit:
|
||||
|
||||
__abt_stack_base:
|
||||
.space STACK_SIZE_ABT
|
||||
__abt_stack_limit:
|
||||
|
||||
__und_stack_base:
|
||||
.space STACK_SIZE_UND
|
||||
__und_stack_limit:
|
||||
|
||||
__sys_stack_base:
|
||||
.space STACK_SIZE_SYS
|
||||
__sys_stack_limit:
|
||||
|
||||
__svc_stack_base:
|
||||
.space STACK_SIZE_SVC
|
||||
__svc_stack_limit:
|
||||
|
||||
.size __usr_stack_base, . - __usr_stack_base
|
||||
|
||||
.end
|
||||
|
Reference in New Issue
Block a user