diff --git a/board/NUCLEO_STM32L053R8/BSP/.mxproject b/board/NUCLEO_STM32L053R8/BSP/.mxproject
new file mode 100644
index 00000000..e129474b
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/.mxproject
@@ -0,0 +1,14 @@
+[PreviousGenFiles]
+HeaderPath=C:/Users/supowang/Desktop/CubeMx/TencentOS_tiny/NUCLEO_STM32F053R8/Inc
+HeaderFiles=gpio.h;i2c.h;usart.h;stm32l0xx_it.h;stm32l0xx_hal_conf.h;main.h;
+SourcePath=C:/Users/supowang/Desktop/CubeMx/TencentOS_tiny/NUCLEO_STM32F053R8/Src
+SourceFiles=gpio.c;i2c.c;usart.c;stm32l0xx_it.c;stm32l0xx_hal_msp.c;main.c;
+
+[PreviousLibFiles]
+LibFiles=Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h;Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h;Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h;Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h;Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
+
+[PreviousUsedKeilFiles]
+SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\i2c.c;..\Src\usart.c;..\Src\stm32l0xx_it.c;..\Src\stm32l0xx_hal_msp.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;../\Src/system_stm32l0xx.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_pwr_ex.c;../Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c;../\Src/system_stm32l0xx.c;../Drivers/CMSIS/Device/ST/STM32L0xx/Source/Templates/system_stm32l0xx.c;null;
+HeaderPath=..\Drivers\STM32L0xx_HAL_Driver\Inc;..\Drivers\STM32L0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32L0xx\Include;..\Drivers\CMSIS\Include;..\Inc;
+CDefines=USE_HAL_DRIVER;STM32L053xx;USE_HAL_DRIVER;STM32L053xx;
+
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/gpio.h b/board/NUCLEO_STM32L053R8/BSP/Inc/gpio.h
new file mode 100644
index 00000000..40490539
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/gpio.h
@@ -0,0 +1,57 @@
+/**
+ ******************************************************************************
+ * File Name : gpio.h
+ * Description : This file contains all the functions prototypes for
+ * the gpio
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __gpio_H
+#define __gpio_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_GPIO_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ pinoutConfig_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/i2c.h b/board/NUCLEO_STM32L053R8/BSP/Inc/i2c.h
new file mode 100644
index 00000000..5b953f46
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/i2c.h
@@ -0,0 +1,58 @@
+/**
+ ******************************************************************************
+ * File Name : I2C.h
+ * Description : This file provides code for the configuration
+ * of the I2C instances.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __i2c_H
+#define __i2c_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern I2C_HandleTypeDef hi2c1;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_I2C1_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ i2c_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/main.h b/board/NUCLEO_STM32L053R8/BSP/Inc/main.h
new file mode 100644
index 00000000..73181627
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/main.h
@@ -0,0 +1,102 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l0xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define B1_Pin GPIO_PIN_13
+#define B1_GPIO_Port GPIOC
+#define B1_EXTI_IRQn EXTI4_15_IRQn
+#define LSM6DS3_INT1_Pin GPIO_PIN_1
+#define LSM6DS3_INT1_GPIO_Port GPIOA
+#define LSM6DS3_INT1_EXTI_IRQn EXTI0_1_IRQn
+#define USART_TX_Pin GPIO_PIN_2
+#define USART_TX_GPIO_Port GPIOA
+#define USART_RX_Pin GPIO_PIN_3
+#define USART_RX_GPIO_Port GPIOA
+#define LSM6DS3_INT2_Pin GPIO_PIN_4
+#define LSM6DS3_INT2_GPIO_Port GPIOA
+#define LSM6DS3_INT2_EXTI_IRQn EXTI4_15_IRQn
+#define LD2_Pin GPIO_PIN_5
+#define LD2_GPIO_Port GPIOA
+#define LIS3MDL_DRDY_Pin GPIO_PIN_6
+#define LIS3MDL_DRDY_GPIO_Port GPIOA
+#define LIS3MDL_INT1_Pin GPIO_PIN_7
+#define LIS3MDL_INT1_GPIO_Port GPIOA
+#define LIS3MDL_INT1_EXTI_IRQn EXTI4_15_IRQn
+#define LPS22HB_INT1_Pin GPIO_PIN_10
+#define LPS22HB_INT1_GPIO_Port GPIOB
+#define LPS22HB_INT1_EXTI_IRQn EXTI4_15_IRQn
+#define NRST_Pin GPIO_PIN_7
+#define NRST_GPIO_Port GPIOC
+#define HTS221_DRDY_Pin GPIO_PIN_8
+#define HTS221_DRDY_GPIO_Port GPIOA
+#define TMS_Pin GPIO_PIN_13
+#define TMS_GPIO_Port GPIOA
+#define TCK_Pin GPIO_PIN_14
+#define TCK_GPIO_Port GPIOA
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/mcu_init.h b/board/NUCLEO_STM32L053R8/BSP/Inc/mcu_init.h
new file mode 100644
index 00000000..98d5b948
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/mcu_init.h
@@ -0,0 +1,20 @@
+#ifndef __MCU_INIT_H
+#define __MCU_INIT_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "main.h"
+#include "stm32l0xx_hal.h"
+#include "usart.h"
+#include "i2c.h"
+#include "gpio.h"
+#include "tos.h"
+
+void board_init(void);
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ __MCU_INIT_H */
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_hal_conf.h b/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_hal_conf.h
new file mode 100644
index 00000000..224365ae
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_hal_conf.h
@@ -0,0 +1,302 @@
+/**
+ ******************************************************************************
+ * @file stm32l0xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration template file.
+ * This file should be copied to the application folder and renamed
+ * to stm32l0xx_hal_conf.h.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L0xx_HAL_CONF_H
+#define __STM32L0xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+ /*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_FIREWALL_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SPI_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_TSC_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+/*#define HAL_PCD_MODULE_ENABLED */
+/*#define HAL_EXTI_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE ((uint32_t)2097000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator for USB (HSI48) value.
+ */
+#if !defined (HSI48_VALUE)
+#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
+ The real value may vary depending on the variations
+ in voltage and temperature. */
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE ((uint32_t)37000U) /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define PREREAD_ENABLE 1U
+#define BUFFER_CACHE_DISABLE 0U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32l0xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32l0xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32l0xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32l0xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32l0xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32l0xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32l0xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32l0xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32l0xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32l0xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FIREWALL_MODULE_ENABLED
+ #include "stm32l0xx_hal_firewall.h"
+#endif /* HAL_FIREWALL_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32l0xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32l0xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32l0xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32l0xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32l0xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32l0xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32l0xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32l0xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32l0xx_hal_rtc.h"
+
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32l0xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32l0xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+ #include "stm32l0xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32l0xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32l0xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32l0xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32l0xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32l0xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32l0xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32l0xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t* file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L0xx_HAL_CONF_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_it.h b/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_it.h
new file mode 100644
index 00000000..5c0f68a9
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/stm32l0xx_it.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l0xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L0xx_IT_H
+#define __STM32L0xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void SVC_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void EXTI0_1_IRQHandler(void);
+void EXTI4_15_IRQHandler(void);
+void USART1_IRQHandler(void);
+void USART2_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L0xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Inc/usart.h b/board/NUCLEO_STM32L053R8/BSP/Inc/usart.h
new file mode 100644
index 00000000..011f71cf
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Inc/usart.h
@@ -0,0 +1,60 @@
+/**
+ ******************************************************************************
+ * File Name : USART.h
+ * Description : This file provides code for the configuration
+ * of the USART instances.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __usart_H
+#define __usart_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart2;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_USART1_UART_Init(void);
+void MX_USART2_UART_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ usart_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/NUCLEO_STM32L053R8.ioc b/board/NUCLEO_STM32L053R8/BSP/NUCLEO_STM32L053R8.ioc
new file mode 100644
index 00000000..82022c23
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/NUCLEO_STM32L053R8.ioc
@@ -0,0 +1,222 @@
+#MicroXplorer Configuration settings - do not modify
+File.Version=6
+I2C1.IPParameters=Timing
+I2C1.Timing=0x00707CBB
+KeepUserPlacement=true
+Mcu.Family=STM32L0
+Mcu.IP0=I2C1
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=USART1
+Mcu.IP5=USART2
+Mcu.IPNb=6
+Mcu.Name=STM32L053R(6-8)Tx
+Mcu.Package=LQFP64
+Mcu.Pin0=PC13
+Mcu.Pin1=PC14-OSC32_IN
+Mcu.Pin10=PA6
+Mcu.Pin11=PA7
+Mcu.Pin12=PB10
+Mcu.Pin13=PC7
+Mcu.Pin14=PA8
+Mcu.Pin15=PA9
+Mcu.Pin16=PA10
+Mcu.Pin17=PA13
+Mcu.Pin18=PA14
+Mcu.Pin19=PB8
+Mcu.Pin2=PC15-OSC32_OUT
+Mcu.Pin20=PB9
+Mcu.Pin21=VP_SYS_VS_Systick
+Mcu.Pin3=PH0-OSC_IN
+Mcu.Pin4=PH1-OSC_OUT
+Mcu.Pin5=PA1
+Mcu.Pin6=PA2
+Mcu.Pin7=PA3
+Mcu.Pin8=PA4
+Mcu.Pin9=PA5
+Mcu.PinsNb=22
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32L053R8Tx
+MxCube.Version=5.3.0
+MxDb.Version=DB.5.0.30
+NVIC.EXTI0_1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.EXTI4_15_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true
+NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+PA1.GPIOParameters=GPIO_Label
+PA1.GPIO_Label=LSM6DS3_INT1
+PA1.Locked=true
+PA1.Signal=GPXTI1
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA13.GPIOParameters=GPIO_Label
+PA13.GPIO_Label=TMS
+PA13.Locked=true
+PA13.Mode=Serial_Wire
+PA13.Signal=SYS_SWDIO
+PA14.GPIOParameters=GPIO_Label
+PA14.GPIO_Label=TCK
+PA14.Locked=true
+PA14.Mode=Serial_Wire
+PA14.Signal=SYS_SWCLK
+PA2.GPIOParameters=GPIO_Label
+PA2.GPIO_Label=USART_TX
+PA2.Locked=true
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.GPIOParameters=GPIO_Label
+PA3.GPIO_Label=USART_RX
+PA3.Locked=true
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PA4.GPIOParameters=GPIO_Label
+PA4.GPIO_Label=LSM6DS3_INT2
+PA4.Locked=true
+PA4.Signal=GPXTI4
+PA5.GPIOParameters=GPIO_Label
+PA5.GPIO_Label=LD2 [Green Led]
+PA5.Locked=true
+PA5.Signal=GPIO_Output
+PA6.GPIOParameters=GPIO_Label
+PA6.GPIO_Label=LIS3MDL_DRDY
+PA6.Locked=true
+PA6.Signal=GPIO_Output
+PA7.GPIOParameters=GPIO_Label
+PA7.GPIO_Label=LIS3MDL_INT1
+PA7.Locked=true
+PA7.Signal=GPXTI7
+PA8.GPIOParameters=GPIO_Label
+PA8.GPIO_Label=HTS221_DRDY
+PA8.Locked=true
+PA8.Signal=GPIO_Output
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PB10.GPIOParameters=GPIO_Label
+PB10.GPIO_Label=LPS22HB_INT1
+PB10.Locked=true
+PB10.Signal=GPXTI10
+PB8.Locked=true
+PB8.Mode=I2C
+PB8.Signal=I2C1_SCL
+PB9.Locked=true
+PB9.Mode=I2C
+PB9.Signal=I2C1_SDA
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=B1 [Blue PushButton]
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
+PC13.Locked=true
+PC13.Signal=GPXTI13
+PC14-OSC32_IN.Locked=true
+PC14-OSC32_IN.Mode=LSE-External-Oscillator
+PC14-OSC32_IN.Signal=RCC_OSC32_IN
+PC15-OSC32_OUT.Locked=true
+PC15-OSC32_OUT.Mode=LSE-External-Oscillator
+PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
+PC7.GPIOParameters=GPIO_Label
+PC7.GPIO_Label=NRST
+PC7.Locked=true
+PC7.Signal=GPIO_Output
+PCC.Checker=true
+PCC.Line=STM32L0x3
+PCC.MCU=STM32L053R(6-8)Tx
+PCC.PartNumber=STM32L053R8Tx
+PCC.Seq0=0
+PCC.Series=STM32L0
+PCC.Temperature=25
+PCC.Vdd=3.0
+PH0-OSC_IN.Locked=true
+PH0-OSC_IN.Mode=HSE-External-Clock-Source
+PH0-OSC_IN.Signal=RCC_OSC_IN
+PH1-OSC_OUT.Locked=true
+PH1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=true
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32L053R8Tx
+ProjectManager.FirmwarePackage=STM32Cube FW_L0 V1.11.2
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=NUCLEO_STM32F053R8.ioc
+ProjectManager.ProjectName=NUCLEO_STM32F053R8
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=MDK-ARM V5
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_I2C1_Init-I2C1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true
+RCC.48CLKFreq_Value=32000000
+RCC.48RNGFreq_Value=32000000
+RCC.48USBFreq_Value=32000000
+RCC.AHBFreq_Value=32000000
+RCC.APB1Freq_Value=32000000
+RCC.APB1TimFreq_Value=32000000
+RCC.APB2Freq_Value=32000000
+RCC.APB2TimFreq_Value=32000000
+RCC.FCLKCortexFreq_Value=32000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=32000000
+RCC.HSE_VALUE=8000000
+RCC.HSI16_VALUE=16000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=32000000
+RCC.IPParameters=48CLKFreq_Value,48RNGFreq_Value,48USBFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI16_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,LCDFreq_Value,LPTIMFreq_Value,LPUARTFreq_Value,LSI_VALUE,MCOPinFreq_Value,MSI_VALUE,PLLCLKFreq_Value,PLLMUL,PLLSourceVirtual,PWRFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIMFreq_Value,TimerFreq_Value,USART1Freq_Value,USART2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,WatchDogFreq_Value
+RCC.LCDFreq_Value=37000
+RCC.LPTIMFreq_Value=32000000
+RCC.LPUARTFreq_Value=32000000
+RCC.LSI_VALUE=37000
+RCC.MCOPinFreq_Value=32000000
+RCC.MSI_VALUE=2097000
+RCC.PLLCLKFreq_Value=32000000
+RCC.PLLMUL=RCC_PLLMUL_8
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.PWRFreq_Value=32000000
+RCC.RTCFreq_Value=37000
+RCC.RTCHSEDivFreq_Value=4000000
+RCC.SYSCLKFreq_VALUE=32000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.TIMFreq_Value=32000000
+RCC.TimerFreq_Value=32000000
+RCC.USART1Freq_Value=32000000
+RCC.USART2Freq_Value=32000000
+RCC.VCOInputFreq_Value=8000000
+RCC.VCOOutputFreq_Value=64000000
+RCC.WatchDogFreq_Value=37000
+SH.GPXTI1.0=GPIO_EXTI1
+SH.GPXTI1.ConfNb=1
+SH.GPXTI10.0=GPIO_EXTI10
+SH.GPXTI10.ConfNb=1
+SH.GPXTI13.0=GPIO_EXTI13
+SH.GPXTI13.ConfNb=1
+SH.GPXTI4.0=GPIO_EXTI4
+SH.GPXTI4.ConfNb=1
+SH.GPXTI7.0=GPIO_EXTI7
+SH.GPXTI7.ConfNb=1
+USART1.IPParameters=VirtualMode-Asynchronous
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USART2.IPParameters=VirtualMode-Asynchronous
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=NUCLEO-L053R8
+boardIOC=true
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/gpio.c b/board/NUCLEO_STM32L053R8/BSP/Src/gpio.c
new file mode 100644
index 00000000..49062c57
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/gpio.c
@@ -0,0 +1,102 @@
+/**
+ ******************************************************************************
+ * File Name : gpio.c
+ * Description : This file provides code for the configuration
+ * of all used GPIO pins.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins as
+ * Analog
+ * Input
+ * Output
+ * EVENT_OUT
+ * EXTI
+*/
+void MX_GPIO_Init(void)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOA, LD2_Pin|LIS3MDL_DRDY_Pin|HTS221_DRDY_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(NRST_GPIO_Port, NRST_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = B1_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : PAPin PAPin PAPin */
+ GPIO_InitStruct.Pin = LSM6DS3_INT1_Pin|LSM6DS3_INT2_Pin|LIS3MDL_INT1_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : PAPin PAPin PAPin */
+ GPIO_InitStruct.Pin = LD2_Pin|LIS3MDL_DRDY_Pin|HTS221_DRDY_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = LPS22HB_INT1_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(LPS22HB_INT1_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PtPin */
+ GPIO_InitStruct.Pin = NRST_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(NRST_GPIO_Port, &GPIO_InitStruct);
+
+ /* EXTI interrupt init*/
+ HAL_NVIC_SetPriority(EXTI0_1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(EXTI0_1_IRQn);
+
+ HAL_NVIC_SetPriority(EXTI4_15_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(EXTI4_15_IRQn);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/i2c.c b/board/NUCLEO_STM32L053R8/BSP/Src/i2c.c
new file mode 100644
index 00000000..c1f674d9
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/i2c.c
@@ -0,0 +1,118 @@
+/**
+ ******************************************************************************
+ * File Name : I2C.c
+ * Description : This file provides code for the configuration
+ * of the I2C instances.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "i2c.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+I2C_HandleTypeDef hi2c1;
+
+/* I2C1 init function */
+void MX_I2C1_Init(void)
+{
+
+ hi2c1.Instance = I2C1;
+ hi2c1.Init.Timing = 0x00707CBB;
+ hi2c1.Init.OwnAddress1 = 0;
+ hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ hi2c1.Init.OwnAddress2 = 0;
+ hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+ hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure Analogue filter
+ */
+ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure Digital filter
+ */
+ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+}
+
+void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(i2cHandle->Instance==I2C1)
+ {
+ /* USER CODE BEGIN I2C1_MspInit 0 */
+
+ /* USER CODE END I2C1_MspInit 0 */
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**I2C1 GPIO Configuration
+ PB8 ------> I2C1_SCL
+ PB9 ------> I2C1_SDA
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* I2C1 clock enable */
+ __HAL_RCC_I2C1_CLK_ENABLE();
+ /* USER CODE BEGIN I2C1_MspInit 1 */
+
+ /* USER CODE END I2C1_MspInit 1 */
+ }
+}
+
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
+{
+
+ if(i2cHandle->Instance==I2C1)
+ {
+ /* USER CODE BEGIN I2C1_MspDeInit 0 */
+
+ /* USER CODE END I2C1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_I2C1_CLK_DISABLE();
+
+ /**I2C1 GPIO Configuration
+ PB8 ------> I2C1_SCL
+ PB9 ------> I2C1_SDA
+ */
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
+
+ /* USER CODE BEGIN I2C1_MspDeInit 1 */
+
+ /* USER CODE END I2C1_MspDeInit 1 */
+ }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/main.c b/board/NUCLEO_STM32L053R8/BSP/Src/main.c
new file mode 100644
index 00000000..5be45d86
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/main.c
@@ -0,0 +1,24 @@
+#include "mcu_init.h"
+#include "cmsis_os.h"
+
+#define APPLICATION_TASK_STK_SIZE 256
+extern void application_entry(void *arg);
+osThreadDef(application_entry, osPriorityNormal, 1, APPLICATION_TASK_STK_SIZE);
+
+__weak void application_entry(void *arg)
+{
+ while (1) {
+ printf("This is a demo task,please use your task entry!\r\n");
+ tos_task_delay(1000);
+ }
+}
+
+int main(void)
+{
+ board_init();
+ printf("Welcome to TencentOS tiny\r\n");
+ osKernelInitialize();
+ osThreadCreate(osThread(application_entry), NULL);
+ osKernelStart();
+}
+
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/mcu_init.c b/board/NUCLEO_STM32L053R8/BSP/Src/mcu_init.c
new file mode 100644
index 00000000..9dcec5ec
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/mcu_init.c
@@ -0,0 +1,123 @@
+#include "mcu_init.h"
+
+int fputc(int ch, FILE *f)
+{
+ if (ch == '\n') {
+ HAL_UART_Transmit(&huart2, (void *)"\r", 1,30000);
+ }
+ HAL_UART_Transmit(&huart2, (uint8_t *)&ch, 1, 0xFFFF);
+ return ch;
+}
+
+int _write(int fd, char *ptr, int len)
+{
+ (void)HAL_UART_Transmit(&huart2, (uint8_t *)ptr, len, 0xFFFF);
+ return len;
+}
+
+int fgetc(FILE *f)
+{
+ /* Place your implementation of fgetc here */
+ /* e.g. readwrite a character to the USART2 and Loop until the end of transmission */
+ uint8_t ch = 0;
+ //uint32_t recv_size;
+ HAL_UART_Receive(&huart2, &ch, 1,30000);
+ return ch;
+}
+
+
+void board_init(void)
+{
+
+ HAL_Init();
+ SystemClock_Config();
+ MX_GPIO_Init();
+ MX_I2C1_Init();
+ //MX_USART1_UART_Init();
+ MX_USART2_UART_Init();
+
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ /** Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_8;
+ RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
+ |RCC_PERIPHCLK_I2C1;
+ PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+ PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+
+ /* USER CODE END Error_Handler_Debug */
+}
+
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_hal_msp.c b/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_hal_msp.c
new file mode 100644
index 00000000..f5a6c2b7
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_hal_msp.c
@@ -0,0 +1,84 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * File Name : stm32l0xx_hal_msp.c
+ * Description : This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_it.c b/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_it.c
new file mode 100644
index 00000000..5e2096c3
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/stm32l0xx_it.c
@@ -0,0 +1,212 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l0xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l0xx_it.h"
+#include "tos.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef huart1;
+extern UART_HandleTypeDef huart2;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M0+ Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVC_IRQn 0 */
+
+ /* USER CODE END SVC_IRQn 0 */
+ /* USER CODE BEGIN SVC_IRQn 1 */
+
+ /* USER CODE END SVC_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+__weak void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ if(tos_knl_is_running())
+ {
+ tos_knl_irq_enter();
+ tos_tick_handler();
+ tos_knl_irq_leave();
+ }
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L0xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32l0xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles EXTI line 0 and line 1 interrupts.
+ */
+void EXTI0_1_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI0_1_IRQn 0 */
+
+ /* USER CODE END EXTI0_1_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+ /* USER CODE BEGIN EXTI0_1_IRQn 1 */
+
+ /* USER CODE END EXTI0_1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles EXTI line 4 to 15 interrupts.
+ */
+void EXTI4_15_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI4_15_IRQn 0 */
+
+ /* USER CODE END EXTI4_15_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
+ /* USER CODE BEGIN EXTI4_15_IRQn 1 */
+
+ /* USER CODE END EXTI4_15_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
+ */
+void USART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART1_IRQn 0 */
+
+ /* USER CODE END USART1_IRQn 0 */
+ HAL_UART_IRQHandler(&huart1);
+ /* USER CODE BEGIN USART1_IRQn 1 */
+
+ /* USER CODE END USART1_IRQn 1 */
+}
+
+/**
+ * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
+ */
+void USART2_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART2_IRQn 0 */
+
+ /* USER CODE END USART2_IRQn 0 */
+ HAL_UART_IRQHandler(&huart2);
+ /* USER CODE BEGIN USART2_IRQn 1 */
+
+ /* USER CODE END USART2_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/system_stm32l0xx.c b/board/NUCLEO_STM32L053R8/BSP/Src/system_stm32l0xx.c
new file mode 100644
index 00000000..814b0c75
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/system_stm32l0xx.c
@@ -0,0 +1,279 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l0xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File.
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l0xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright(c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32l0xx_system
+ * @{
+ */
+
+/** @addtogroup STM32L0xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32l0xx.h"
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_Defines
+ * @{
+ */
+/************************* Miscellaneous Configuration ************************/
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x100. */
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_Variables
+ * @{
+ */
+ /* This variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = 2097152U; /* 32.768 kHz * 2^6 */
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+ const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L0xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+/*!< Set MSION bit */
+ RCC->CR |= (uint32_t)0x00000100U;
+
+ /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
+ RCC->CFGR &= (uint32_t) 0x88FF400CU;
+
+ /*!< Reset HSION, HSIDIVEN, HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFF6U;
+
+ /*!< Reset HSI48ON bit */
+ RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
+
+ /*!< Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFFU;
+
+ /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
+ RCC->CFGR &= (uint32_t)0xFF02FFFFU;
+
+ /*!< Disable all interrupts */
+ RCC->CIER = 0x00000000U;
+
+ /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+ SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+ SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock according to Clock Register Values
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
+ * value as defined by the MSI range.
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) HSI_VALUE is a constant defined in stm32l0xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSE_VALUE is a constant defined in stm32l0xx_hal.h file (default value
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ * @param None
+ * @retval None
+ */
+void SystemCoreClockUpdate (void)
+{
+ uint32_t tmp = 0U, pllmul = 0U, plldiv = 0U, pllsource = 0U, msirange = 0U;
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+ switch (tmp)
+ {
+ case 0x00U: /* MSI used as system clock */
+ msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> RCC_ICSCR_MSIRANGE_Pos;
+ SystemCoreClock = (32768U * (1U << (msirange + 1U)));
+ break;
+ case 0x04U: /* HSI used as system clock */
+ if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
+ {
+ SystemCoreClock = HSI_VALUE / 4U;
+ }
+ else
+ {
+ SystemCoreClock = HSI_VALUE;
+ }
+ break;
+ case 0x08U: /* HSE used as system clock */
+ SystemCoreClock = HSE_VALUE;
+ break;
+ default: /* PLL used as system clock */
+ /* Get PLL clock source and multiplication factor ----------------------*/
+ pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
+ plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
+ pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];
+ plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;
+
+ pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
+
+ if (pllsource == 0x00U)
+ {
+ /* HSI oscillator clock selected as PLL clock entry */
+ if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
+ {
+ SystemCoreClock = (((HSI_VALUE / 4U) * pllmul) / plldiv);
+ }
+ else
+ {
+ SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
+ }
+ }
+ else
+ {
+ /* HSE selected as PLL clock entry */
+ SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
+ }
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/BSP/Src/usart.c b/board/NUCLEO_STM32L053R8/BSP/Src/usart.c
new file mode 100644
index 00000000..963e661e
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/BSP/Src/usart.c
@@ -0,0 +1,182 @@
+/**
+ ******************************************************************************
+ * File Name : USART.c
+ * Description : This file provides code for the configuration
+ * of the USART instances.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart2;
+
+/* USART1 init function */
+
+void MX_USART1_UART_Init(void)
+{
+
+ huart1.Instance = USART1;
+ huart1.Init.BaudRate = 9600;
+ huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ huart1.Init.StopBits = UART_STOPBITS_1;
+ huart1.Init.Parity = UART_PARITY_NONE;
+ huart1.Init.Mode = UART_MODE_TX_RX;
+ huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+ huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ if (HAL_UART_Init(&huart1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+}
+/* USART2 init function */
+
+void MX_USART2_UART_Init(void)
+{
+
+ huart2.Instance = USART2;
+ huart2.Init.BaudRate = 115200;
+ huart2.Init.WordLength = UART_WORDLENGTH_8B;
+ huart2.Init.StopBits = UART_STOPBITS_1;
+ huart2.Init.Parity = UART_PARITY_NONE;
+ huart2.Init.Mode = UART_MODE_TX_RX;
+ huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart2.Init.OverSampling = UART_OVERSAMPLING_16;
+ huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ if (HAL_UART_Init(&huart2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+}
+
+void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
+{
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(uartHandle->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspInit 0 */
+
+ /* USER CODE END USART1_MspInit 0 */
+ /* USART1 clock enable */
+ __HAL_RCC_USART1_CLK_ENABLE();
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**USART1 GPIO Configuration
+ PA9 ------> USART1_TX
+ PA10 ------> USART1_RX
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USART1 interrupt Init */
+ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspInit 1 */
+
+ /* USER CODE END USART1_MspInit 1 */
+ }
+ else if(uartHandle->Instance==USART2)
+ {
+ /* USER CODE BEGIN USART2_MspInit 0 */
+
+ /* USER CODE END USART2_MspInit 0 */
+ /* USART2 clock enable */
+ __HAL_RCC_USART2_CLK_ENABLE();
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**USART2 GPIO Configuration
+ PA2 ------> USART2_TX
+ PA3 ------> USART2_RX
+ */
+ GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF4_USART2;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USART2 interrupt Init */
+ HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(USART2_IRQn);
+ /* USER CODE BEGIN USART2_MspInit 1 */
+
+ /* USER CODE END USART2_MspInit 1 */
+ }
+}
+
+void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
+{
+
+ if(uartHandle->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+ /* USER CODE END USART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART1_CLK_DISABLE();
+
+ /**USART1 GPIO Configuration
+ PA9 ------> USART1_TX
+ PA10 ------> USART1_RX
+ */
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
+
+ /* USART1 interrupt Deinit */
+ HAL_NVIC_DisableIRQ(USART1_IRQn);
+ /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+ /* USER CODE END USART1_MspDeInit 1 */
+ }
+ else if(uartHandle->Instance==USART2)
+ {
+ /* USER CODE BEGIN USART2_MspDeInit 0 */
+
+ /* USER CODE END USART2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART2_CLK_DISABLE();
+
+ /**USART2 GPIO Configuration
+ PA2 ------> USART2_TX
+ PA3 ------> USART2_RX
+ */
+ HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
+
+ /* USART2 interrupt Deinit */
+ HAL_NVIC_DisableIRQ(USART2_IRQn);
+ /* USER CODE BEGIN USART2_MspDeInit 1 */
+
+ /* USER CODE END USART2_MspDeInit 1 */
+ }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvoptx b/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvoptx
new file mode 100644
index 00000000..d99887a8
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvoptx
@@ -0,0 +1,832 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ NUCLEO_STM32L053R8
+ 0x4
+ ARM-ADS
+
+ 32000000
+
+ 1
+ 1
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+
+
+ 1
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+
+
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+
+
+
+
+
+
+
+
+
+
+ STLink\ST-LINKIII-KEIL_SWO.dll
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L0xx_64 -FS08000000 -FL010000 -FP0($$Device:STM32L053R8Tx$CMSIS\Flash\STM32L0xx_64.FLM))
+
+
+ 0
+ ST-LINKIII-KEIL_SWO
+ -U-O2254 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L0xx_64.FLM -FS08000000 -FL010000 -FP0($$Device:STM32L053R8Tx$CMSIS\Flash\STM32L0xx_64.FLM)
+
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+ Application/MDK-ARM
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+
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+ tos_queue.c
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+
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+ tos_robin.c
+ 0
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+
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+ tos_sched.c
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+
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+ tos_sem.c
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+ tos_task.c
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+
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+ 1
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+ 0
+ ..\..\..\..\kernel\core\tos_tick.c
+ tos_tick.c
+ 0
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+
+ 6
+ 45
+ 1
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+ ..\..\..\..\kernel\core\tos_time.c
+ tos_time.c
+ 0
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+
+
+ 6
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+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\kernel\core\tos_timer.c
+ tos_timer.c
+ 0
+ 0
+
+
+
+
+ tos/cmsis
+ 0
+ 0
+ 0
+ 0
+
+ 7
+ 47
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\osal\cmsis_os\cmsis_os.c
+ cmsis_os.c
+ 0
+ 0
+
+
+
+
+ examples
+ 1
+ 0
+ 0
+ 0
+
+ 8
+ 48
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\examples\hello_world\hello_world.c
+ hello_world.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
diff --git a/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvprojx b/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvprojx
new file mode 100644
index 00000000..07daf1ad
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/hello_world/NUCLEO_STM32L053R8.uvprojx
@@ -0,0 +1,682 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ NUCLEO_STM32L053R8
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32L053R8Tx
+ STMicroelectronics
+ Keil.STM32L0xx_DFP.2.0.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000-0x20001FFF) IROM(0x8000000-0x800FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+")
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ $$Device:STM32L053R8Tx$CMSIS\SVD\STM32L053x.svd
+ 0
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+
+ 0
+
+
+ SARMCM3.DLL
+ -REMAP
+ DARMCM1.DLL
+ -pCM0+
+ SARMCM3.DLL
+
+ TARMCM1.DLL
+ -pCM0+
+
+
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+
+
+
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+ 1
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+
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+ STLink\ST-LINKIII-KEIL_SWO.dll
+ "" ()
+
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+
+
+ USE_HAL_DRIVER,STM32L053xx,USE_HAL_DRIVER,STM32L053xx
+
+ ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L0xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\TOS_CONFIG;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os
+
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+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32l053xx.s
+ 2
+ startup_stm32l053xx.s
+
+
+
+
+ Application/User
+
+
+ gpio.c
+ 1
+ ..\..\BSP\Src\gpio.c
+
+
+ i2c.c
+ 1
+ ..\..\BSP\Src\i2c.c
+
+
+ main.c
+ 1
+ ..\..\BSP\Src\main.c
+
+
+ mcu_init.c
+ 1
+ ..\..\BSP\Src\mcu_init.c
+
+
+ stm32l0xx_hal_msp.c
+ 1
+ ..\..\BSP\Src\stm32l0xx_hal_msp.c
+
+
+ stm32l0xx_it.c
+ 1
+ ..\..\BSP\Src\stm32l0xx_it.c
+
+
+ usart.c
+ 1
+ ..\..\BSP\Src\usart.c
+
+
+
+
+ Drivers/STM32L0xx_HAL_Driver
+
+
+ stm32l0xx_hal.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.c
+
+
+ stm32l0xx_hal_cortex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.c
+
+
+ stm32l0xx_hal_dma.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.c
+
+
+ stm32l0xx_hal_flash.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.c
+
+
+ stm32l0xx_hal_flash_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.c
+
+
+ stm32l0xx_hal_flash_ramfunc.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ramfunc.c
+
+
+ stm32l0xx_hal_gpio.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.c
+
+
+ stm32l0xx_hal_i2c.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_i2c.c
+
+
+ stm32l0xx_hal_i2c_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_i2c_ex.c
+
+
+ stm32l0xx_hal_pwr.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr.c
+
+
+ stm32l0xx_hal_pwr_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr_ex.c
+
+
+ stm32l0xx_hal_rcc.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.c
+
+
+ stm32l0xx_hal_rcc_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.c
+
+
+ stm32l0xx_hal_tim.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.c
+
+
+ stm32l0xx_hal_tim_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.c
+
+
+ stm32l0xx_hal_uart.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.c
+
+
+ stm32l0xx_hal_uart_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32l0xx.c
+ 1
+ ..\..\BSP\Src\system_stm32l0xx.c
+
+
+
+
+ tos/arch
+
+
+ port_c.c
+ 1
+ ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_c.c
+
+
+ port_s.S
+ 2
+ ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_s.S
+
+
+ tos_cpu.c
+ 1
+ ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c
+
+
+
+
+ tos/kernel
+
+
+ tos_event.c
+ 1
+ ..\..\..\..\kernel\core\tos_event.c
+
+
+ tos_fifo.c
+ 1
+ ..\..\..\..\kernel\core\tos_fifo.c
+
+
+ tos_global.c
+ 1
+ ..\..\..\..\kernel\core\tos_global.c
+
+
+ tos_mmblk.c
+ 1
+ ..\..\..\..\kernel\core\tos_mmblk.c
+
+
+ tos_mmheap.c
+ 1
+ ..\..\..\..\kernel\core\tos_mmheap.c
+
+
+ tos_msg.c
+ 1
+ ..\..\..\..\kernel\core\tos_msg.c
+
+
+ tos_mutex.c
+ 1
+ ..\..\..\..\kernel\core\tos_mutex.c
+
+
+ tos_pend.c
+ 1
+ ..\..\..\..\kernel\core\tos_pend.c
+
+
+ tos_queue.c
+ 1
+ ..\..\..\..\kernel\core\tos_queue.c
+
+
+ tos_robin.c
+ 1
+ ..\..\..\..\kernel\core\tos_robin.c
+
+
+ tos_sched.c
+ 1
+ ..\..\..\..\kernel\core\tos_sched.c
+
+
+ tos_sem.c
+ 1
+ ..\..\..\..\kernel\core\tos_sem.c
+
+
+ tos_sys.c
+ 1
+ ..\..\..\..\kernel\core\tos_sys.c
+
+
+ tos_task.c
+ 1
+ ..\..\..\..\kernel\core\tos_task.c
+
+
+ tos_tick.c
+ 1
+ ..\..\..\..\kernel\core\tos_tick.c
+
+
+ tos_time.c
+ 1
+ ..\..\..\..\kernel\core\tos_time.c
+
+
+ tos_timer.c
+ 1
+ ..\..\..\..\kernel\core\tos_timer.c
+
+
+
+
+ tos/cmsis
+
+
+ cmsis_os.c
+ 1
+ ..\..\..\..\osal\cmsis_os\cmsis_os.c
+
+
+
+
+ examples
+
+
+ hello_world.c
+ 1
+ ..\..\..\..\examples\hello_world\hello_world.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/board/NUCLEO_STM32L053R8/KEIL/hello_world/startup_stm32l053xx.s b/board/NUCLEO_STM32L053R8/KEIL/hello_world/startup_stm32l053xx.s
new file mode 100644
index 00000000..94ae556e
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/hello_world/startup_stm32l053xx.s
@@ -0,0 +1,258 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name : startup_stm32l053xx.s
+;* Author : MCD Application Team
+;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M0+ processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;* 1. Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the following disclaimer.
+;* 2. Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the following disclaimer in the documentation
+;* and/or other materials provided with the distribution.
+;* 3. Neither the name of STMicroelectronics nor the names of its contributors
+;* may be used to endorse or promote products derived from this software
+;* without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window Watchdog
+ DCD PVD_IRQHandler ; PVD through EXTI Line detect
+ DCD RTC_IRQHandler ; RTC through EXTI Line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_CRS_IRQHandler ; RCC and CRS
+ DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
+ DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
+ DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
+ DCD TSC_IRQHandler ; TSC
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
+ DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
+ DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
+ DCD LPTIM1_IRQHandler ; LPTIM1
+ DCD 0 ; Reserved
+ DCD TIM2_IRQHandler ; TIM2
+ DCD 0 ; Reserved
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD TIM21_IRQHandler ; TIM21
+ DCD 0 ; Reserved
+ DCD TIM22_IRQHandler ; TIM22
+ DCD I2C1_IRQHandler ; I2C1
+ DCD I2C2_IRQHandler ; I2C2
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
+ DCD LCD_IRQHandler ; LCD
+ DCD USB_IRQHandler ; USB
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler routine
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT __main
+ IMPORT SystemInit
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_CRS_IRQHandler [WEAK]
+ EXPORT EXTI0_1_IRQHandler [WEAK]
+ EXPORT EXTI2_3_IRQHandler [WEAK]
+ EXPORT EXTI4_15_IRQHandler [WEAK]
+ EXPORT TSC_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
+ EXPORT ADC1_COMP_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM21_IRQHandler [WEAK]
+ EXPORT TIM22_IRQHandler [WEAK]
+ EXPORT I2C1_IRQHandler [WEAK]
+ EXPORT I2C2_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT RNG_LPUART1_IRQHandler [WEAK]
+ EXPORT LCD_IRQHandler [WEAK]
+ EXPORT USB_IRQHandler [WEAK]
+
+
+WWDG_IRQHandler
+PVD_IRQHandler
+RTC_IRQHandler
+FLASH_IRQHandler
+RCC_CRS_IRQHandler
+EXTI0_1_IRQHandler
+EXTI2_3_IRQHandler
+EXTI4_15_IRQHandler
+TSC_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_3_IRQHandler
+DMA1_Channel4_5_6_7_IRQHandler
+ADC1_COMP_IRQHandler
+LPTIM1_IRQHandler
+TIM2_IRQHandler
+TIM6_DAC_IRQHandler
+TIM21_IRQHandler
+TIM22_IRQHandler
+I2C1_IRQHandler
+I2C2_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+RNG_LPUART1_IRQHandler
+LCD_IRQHandler
+USB_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvoptx b/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvoptx
new file mode 100644
index 00000000..0aadb90b
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvoptx
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diff --git a/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvprojx b/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvprojx
new file mode 100644
index 00000000..3fa9e4f4
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/lorawan/NUCLEO_STM32L053R8.uvprojx
@@ -0,0 +1,722 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ NUCLEO_STM32L053R8
+ 0x4
+ ARM-ADS
+ 5060750::V5.06 update 6 (build 750)::ARMCC
+ 0
+
+
+ STM32L053R8Tx
+ STMicroelectronics
+ Keil.STM32L0xx_DFP.2.0.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000-0x20001FFF) IROM(0x8000000-0x800FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+")
+
+
+
+
+
+
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+
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+
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+ USE_HAL_DRIVER,STM32L053xx,USE_HAL_DRIVER,STM32L053xx
+
+ ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L0xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\TOS_CONFIG;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\devices\rhf76_lora;..\..\..\..\kernel\hal\include;..\..\..\..\net\at\include;..\..\..\..\net\lora_module_wrapper
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+
+
+
+ 1
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x08000000
+ 0x20000000
+
+
+
+
+
+
+
+
+
+
+
+
+ Application/MDK-ARM
+
+
+ startup_stm32l053xx.s
+ 2
+ startup_stm32l053xx.s
+
+
+
+
+ Application/User
+
+
+ gpio.c
+ 1
+ ..\..\BSP\Src\gpio.c
+
+
+ i2c.c
+ 1
+ ..\..\BSP\Src\i2c.c
+
+
+ main.c
+ 1
+ ..\..\BSP\Src\main.c
+
+
+ mcu_init.c
+ 1
+ ..\..\BSP\Src\mcu_init.c
+
+
+ stm32l0xx_hal_msp.c
+ 1
+ ..\..\BSP\Src\stm32l0xx_hal_msp.c
+
+
+ stm32l0xx_it.c
+ 1
+ ..\..\BSP\Src\stm32l0xx_it.c
+
+
+ usart.c
+ 1
+ ..\..\BSP\Src\usart.c
+
+
+
+
+ Drivers/STM32L0xx_HAL_Driver
+
+
+ stm32l0xx_hal.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal.c
+
+
+ stm32l0xx_hal_cortex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_cortex.c
+
+
+ stm32l0xx_hal_dma.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_dma.c
+
+
+ stm32l0xx_hal_flash.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash.c
+
+
+ stm32l0xx_hal_flash_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex.c
+
+
+ stm32l0xx_hal_flash_ramfunc.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ramfunc.c
+
+
+ stm32l0xx_hal_gpio.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_gpio.c
+
+
+ stm32l0xx_hal_i2c.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_i2c.c
+
+
+ stm32l0xx_hal_i2c_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_i2c_ex.c
+
+
+ stm32l0xx_hal_pwr.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr.c
+
+
+ stm32l0xx_hal_pwr_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_pwr_ex.c
+
+
+ stm32l0xx_hal_rcc.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc.c
+
+
+ stm32l0xx_hal_rcc_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_rcc_ex.c
+
+
+ stm32l0xx_hal_tim.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim.c
+
+
+ stm32l0xx_hal_tim_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_tim_ex.c
+
+
+ stm32l0xx_hal_uart.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart.c
+
+
+ stm32l0xx_hal_uart_ex.c
+ 1
+ ..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_uart_ex.c
+
+
+
+
+ Drivers/CMSIS
+
+
+ system_stm32l0xx.c
+ 1
+ ..\..\BSP\Src\system_stm32l0xx.c
+
+
+
+
+ tos/arch
+
+
+ port_c.c
+ 1
+ ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_c.c
+
+
+ port_s.S
+ 2
+ ..\..\..\..\arch\arm\arm-v7m\cortex-m0+\armcc\port_s.S
+
+
+ tos_cpu.c
+ 1
+ ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c
+
+
+
+
+ tos/kernel
+
+
+ tos_event.c
+ 1
+ ..\..\..\..\kernel\core\tos_event.c
+
+
+ tos_fifo.c
+ 1
+ ..\..\..\..\kernel\core\tos_fifo.c
+
+
+ tos_global.c
+ 1
+ ..\..\..\..\kernel\core\tos_global.c
+
+
+ tos_mmblk.c
+ 1
+ ..\..\..\..\kernel\core\tos_mmblk.c
+
+
+ tos_mmheap.c
+ 1
+ ..\..\..\..\kernel\core\tos_mmheap.c
+
+
+ tos_msg.c
+ 1
+ ..\..\..\..\kernel\core\tos_msg.c
+
+
+ tos_mutex.c
+ 1
+ ..\..\..\..\kernel\core\tos_mutex.c
+
+
+ tos_pend.c
+ 1
+ ..\..\..\..\kernel\core\tos_pend.c
+
+
+ tos_queue.c
+ 1
+ ..\..\..\..\kernel\core\tos_queue.c
+
+
+ tos_robin.c
+ 1
+ ..\..\..\..\kernel\core\tos_robin.c
+
+
+ tos_sched.c
+ 1
+ ..\..\..\..\kernel\core\tos_sched.c
+
+
+ tos_sem.c
+ 1
+ ..\..\..\..\kernel\core\tos_sem.c
+
+
+ tos_sys.c
+ 1
+ ..\..\..\..\kernel\core\tos_sys.c
+
+
+ tos_task.c
+ 1
+ ..\..\..\..\kernel\core\tos_task.c
+
+
+ tos_tick.c
+ 1
+ ..\..\..\..\kernel\core\tos_tick.c
+
+
+ tos_time.c
+ 1
+ ..\..\..\..\kernel\core\tos_time.c
+
+
+ tos_timer.c
+ 1
+ ..\..\..\..\kernel\core\tos_timer.c
+
+
+
+
+ tos/cmsis
+
+
+ cmsis_os.c
+ 1
+ ..\..\..\..\osal\cmsis_os\cmsis_os.c
+
+
+
+
+ examples
+
+
+ lora_demo.c
+ 1
+ ..\..\..\..\examples\LoRaWAN\lora_demo.c
+
+
+
+
+ devices
+
+
+ RHF76.c
+ 1
+ ..\..\..\..\devices\rhf76_lora\RHF76.c
+
+
+
+
+ hal
+
+
+ tos_hal_uart.c
+ 1
+ ..\..\..\..\platform\hal\st\stm32l0xx\src\tos_hal_uart.c
+
+
+
+
+ at
+
+
+ tos_at.c
+ 1
+ ..\..\..\..\net\at\src\tos_at.c
+
+
+ tos_at_utils.c
+ 1
+ ..\..\..\..\net\at\src\tos_at_utils.c
+
+
+ lora_module_wrapper.c
+ 1
+ ..\..\..\..\net\lora_module_wrapper\lora_module_wrapper.c
+
+
+
+
+ ::CMSIS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/board/NUCLEO_STM32L053R8/KEIL/lorawan/startup_stm32l053xx.s b/board/NUCLEO_STM32L053R8/KEIL/lorawan/startup_stm32l053xx.s
new file mode 100644
index 00000000..27683c25
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/KEIL/lorawan/startup_stm32l053xx.s
@@ -0,0 +1,258 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name : startup_stm32l053xx.s
+;* Author : MCD Application Team
+;* Description : STM32l053xx Devices vector table for MDK-ARM toolchain.
+;* This module performs:
+;* - Set the initial SP
+;* - Set the initial PC == Reset_Handler
+;* - Set the vector table entries with the exceptions ISR address
+;* - Branches to __main in the C library (which eventually
+;* calls main()).
+;* After Reset the Cortex-M0+ processor is in Thread mode,
+;* priority is Privileged, and the Stack is set to Main.
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;* 1. Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the following disclaimer.
+;* 2. Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the following disclaimer in the documentation
+;* and/or other materials provided with the distribution.
+;* 3. Neither the name of STMicroelectronics nor the names of its contributors
+;* may be used to endorse or promote products derived from this software
+;* without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x100
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x0
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; NMI Handler
+ DCD HardFault_Handler ; Hard Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; SVCall Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; PendSV Handler
+ DCD SysTick_Handler ; SysTick Handler
+
+ ; External Interrupts
+ DCD WWDG_IRQHandler ; Window Watchdog
+ DCD PVD_IRQHandler ; PVD through EXTI Line detect
+ DCD RTC_IRQHandler ; RTC through EXTI Line
+ DCD FLASH_IRQHandler ; FLASH
+ DCD RCC_CRS_IRQHandler ; RCC and CRS
+ DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
+ DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
+ DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
+ DCD TSC_IRQHandler ; TSC
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
+ DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
+ DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
+ DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
+ DCD LPTIM1_IRQHandler ; LPTIM1
+ DCD 0 ; Reserved
+ DCD TIM2_IRQHandler ; TIM2
+ DCD 0 ; Reserved
+ DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD TIM21_IRQHandler ; TIM21
+ DCD 0 ; Reserved
+ DCD TIM22_IRQHandler ; TIM22
+ DCD I2C1_IRQHandler ; I2C1
+ DCD I2C2_IRQHandler ; I2C2
+ DCD SPI1_IRQHandler ; SPI1
+ DCD SPI2_IRQHandler ; SPI2
+ DCD USART1_IRQHandler ; USART1
+ DCD USART2_IRQHandler ; USART2
+ DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1
+ DCD LCD_IRQHandler ; LCD
+ DCD USB_IRQHandler ; USB
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+; Reset handler routine
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT __main
+ IMPORT SystemInit
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT WWDG_IRQHandler [WEAK]
+ EXPORT PVD_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT FLASH_IRQHandler [WEAK]
+ EXPORT RCC_CRS_IRQHandler [WEAK]
+ EXPORT EXTI0_1_IRQHandler [WEAK]
+ EXPORT EXTI2_3_IRQHandler [WEAK]
+ EXPORT EXTI4_15_IRQHandler [WEAK]
+ EXPORT TSC_IRQHandler [WEAK]
+ EXPORT DMA1_Channel1_IRQHandler [WEAK]
+ EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
+ EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
+ EXPORT ADC1_COMP_IRQHandler [WEAK]
+ EXPORT LPTIM1_IRQHandler [WEAK]
+ EXPORT TIM2_IRQHandler [WEAK]
+ EXPORT TIM6_DAC_IRQHandler [WEAK]
+ EXPORT TIM21_IRQHandler [WEAK]
+ EXPORT TIM22_IRQHandler [WEAK]
+ EXPORT I2C1_IRQHandler [WEAK]
+ EXPORT I2C2_IRQHandler [WEAK]
+ EXPORT SPI1_IRQHandler [WEAK]
+ EXPORT SPI2_IRQHandler [WEAK]
+ EXPORT USART1_IRQHandler [WEAK]
+ EXPORT USART2_IRQHandler [WEAK]
+ EXPORT RNG_LPUART1_IRQHandler [WEAK]
+ EXPORT LCD_IRQHandler [WEAK]
+ EXPORT USB_IRQHandler [WEAK]
+
+
+WWDG_IRQHandler
+PVD_IRQHandler
+RTC_IRQHandler
+FLASH_IRQHandler
+RCC_CRS_IRQHandler
+EXTI0_1_IRQHandler
+EXTI2_3_IRQHandler
+EXTI4_15_IRQHandler
+TSC_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_3_IRQHandler
+DMA1_Channel4_5_6_7_IRQHandler
+ADC1_COMP_IRQHandler
+LPTIM1_IRQHandler
+TIM2_IRQHandler
+TIM6_DAC_IRQHandler
+TIM21_IRQHandler
+TIM22_IRQHandler
+I2C1_IRQHandler
+I2C2_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+RNG_LPUART1_IRQHandler
+LCD_IRQHandler
+USB_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/board/NUCLEO_STM32L053R8/TOS_CONFIG/tos_config.h b/board/NUCLEO_STM32L053R8/TOS_CONFIG/tos_config.h
new file mode 100644
index 00000000..ef6d78d3
--- /dev/null
+++ b/board/NUCLEO_STM32L053R8/TOS_CONFIG/tos_config.h
@@ -0,0 +1,45 @@
+#ifndef _TOS_CONFIG_H_
+#define _TOS_CONFIG_H_
+
+#include "stm32l0xx.h"
+
+#define TOS_CFG_TASK_PRIO_MAX 10u
+
+#define TOS_CFG_ROUND_ROBIN_EN 1u
+
+#define TOS_CFG_OBJECT_VERIFY_EN 0u
+
+#define TOS_CFG_EVENT_EN 1u
+
+#define TOS_CFG_MMBLK_EN 1u
+
+#define TOS_CFG_MMHEAP_EN 1u
+
+#define TOS_CFG_MMHEAP_POOL_SIZE 0x100
+
+#define TOS_CFG_MUTEX_EN 1u
+
+#define TOS_CFG_QUEUE_EN 1u
+
+#define TOS_CFG_TIMER_EN 1u
+
+#define TOS_CFG_SEM_EN 1u
+
+#if (TOS_CFG_QUEUE_EN > 0u)
+#define TOS_CFG_MSG_EN 1u
+#else
+#define TOS_CFG_MSG_EN 0u
+#endif
+
+#define TOS_CFG_MSG_POOL_SIZE 10u
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE 128u
+
+#define TOS_CFG_CPU_TICK_PER_SECOND 1000u
+
+#define TOS_CFG_CPU_CLOCK (SystemCoreClock)
+
+#define TOS_CFG_TIMER_AS_PROC 1u
+
+#endif
+
diff --git a/devices/rhf76_lora/RHF76.c b/devices/rhf76_lora/RHF76.c
index 6a125b86..32d98446 100644
--- a/devices/rhf76_lora/RHF76.c
+++ b/devices/rhf76_lora/RHF76.c
@@ -249,8 +249,8 @@ __STATIC__ void __asciistr2hex(char *in, uint8_t *out, int len) {
}
}
-__STATIC__ char incoming_data_buffer[512];
-__STATIC__ uint8_t hex_stream[256];
+__STATIC__ char incoming_data_buffer[128];
+__STATIC__ uint8_t hex_stream[128];
__STATIC__ void rhf76_incoming_data_process(void)
{
diff --git a/examples/LoRaWAN/lora_demo.c b/examples/LoRaWAN/lora_demo.c
index 5a09b2dd..29c02105 100644
--- a/examples/LoRaWAN/lora_demo.c
+++ b/examples/LoRaWAN/lora_demo.c
@@ -5,13 +5,13 @@ void lorawan_demo(void)
int count = 1;
extern int rhf76_lora_init(hal_uart_port_t uart_port);
- rhf76_lora_init(HAL_UART_PORT_0);
+ rhf76_lora_init(HAL_UART_PORT_1);
tos_lora_module_join();
while (1) {
if (count % 20 == 0) {
- // printf("############task1 count is %d \r\n",count++);
+ printf("############task1 count is %d \r\n",count++);
tos_lora_module_send("test data",sizeof("test data"));
}
count++;
diff --git a/platform/hal/st/stm32l0xx/src/tos_hal_uart.c b/platform/hal/st/stm32l0xx/src/tos_hal_uart.c
new file mode 100644
index 00000000..55b0e359
--- /dev/null
+++ b/platform/hal/st/stm32l0xx/src/tos_hal_uart.c
@@ -0,0 +1,72 @@
+#include "tos.h"
+#include "tos_hal.h"
+#include "stm32l0xx_hal.h"
+#include "usart.h"
+
+__API__ int tos_hal_uart_init(hal_uart_t *uart, hal_uart_port_t port)
+{
+ if (!uart) {
+ return -1;
+ }
+ if (port == HAL_UART_PORT_1) {
+ uart->private_uart = &huart1;
+ MX_USART1_UART_Init();
+ } else if (port == HAL_UART_PORT_2) {
+ uart->private_uart = &huart2;
+ MX_USART2_UART_Init();
+ }
+ return 0;
+}
+
+__API__ int tos_hal_uart_write(hal_uart_t *uart, const uint8_t *buf, size_t size, uint32_t timeout)
+{
+ HAL_StatusTypeDef hal_status;
+ UART_HandleTypeDef *uart_handle;
+
+ if (!uart || !buf) {
+ return -1;
+ }
+
+ if (!uart->private_uart) {
+ return -1;
+ }
+
+ uart_handle = (UART_HandleTypeDef *)uart->private_uart;
+
+ hal_status = HAL_UART_Transmit(uart_handle, (uint8_t *)buf, size, timeout);
+ if (hal_status != HAL_OK) {
+ return -1;
+ }
+ return 0;
+}
+
+__API__ int tos_hal_uart_read(hal_uart_t *uart, const uint8_t *buf, size_t size, uint32_t timeout)
+{
+ return 0;
+}
+
+__API__ int tos_hal_uart_deinit(hal_uart_t *uart)
+{
+ HAL_StatusTypeDef hal_status;
+ UART_HandleTypeDef *uart_handle;
+
+ if (!uart) {
+ return -1;
+ }
+
+ if (!uart->private_uart) {
+ return -1;
+ }
+
+ uart_handle = (UART_HandleTypeDef *)uart->private_uart;
+
+ hal_status = HAL_UART_DeInit(uart_handle);
+ HAL_UART_MspDeInit(uart_handle);
+
+ if (hal_status != HAL_OK) {
+ return -1;
+ }
+
+ return 0;
+}
+