diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c index 1e3327ff..2bb9f734 100644 --- a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c @@ -1,14 +1,6 @@ -#include "tos_kv.h" #include "stm32l4xx.h" -#define ONCHIP_FLASH_ADDR_START 0x08000000 // start address for onchip flash for stm32l431RCTX -#define ONCHIP_FLASH_ADDR_MAX 0x0803FFFF // 256K flash addr for stm32l431RCTX - #define SECTOR_SIZE 2048 // sector size for stm32l431RCTX -#define SECTOR_SIZE_LOG2 11 // 2 ^ 11 = 2048 - -#define FOR_KV_FLASH_SIZE (2 * SECTOR_SIZE) // storage for kv -#define FOR_KV_FLASH_START 0x803d000 int stm32l4_norflash_onchip_read(uint32_t addr, void *buf, size_t len) { @@ -63,16 +55,3 @@ int stm32l4_norflash_onchip_erase(uint32_t addr, size_t size) return 0; } -kv_flash_drv_t stm32l4_norflash_onchip_drv = { - .write = stm32l4_norflash_onchip_write, - .read = stm32l4_norflash_onchip_read, - .erase = stm32l4_norflash_onchip_erase, -}; - -kv_flash_prop_t stm32l4_norflash_onchip_prop = { - .sector_size_log2 = SECTOR_SIZE_LOG2, - .pgm_type = KV_FLASH_PROGRAM_TYPE_DOUBLEWORD, - .flash_start = FOR_KV_FLASH_START, - .flash_size = FOR_KV_FLASH_SIZE, -}; - diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h new file mode 100644 index 00000000..a718d31e --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h @@ -0,0 +1,13 @@ +#ifndef __ONCHIP_FLASH_H__ +#define __ONCHIP_FLASH_H__ + +#include "stdint.h" + +int stm32l4_norflash_onchip_read(uint32_t addr, void *buf, size_t len); + +int stm32l4_norflash_onchip_write(uint32_t addr, const void *buf, size_t len); + +int stm32l4_norflash_onchip_erase(uint32_t addr, size_t size); + +#endif /* __ONCHIP_FLASH_H__ */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c new file mode 100644 index 00000000..10ced8bd --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c @@ -0,0 +1,25 @@ +#include "tos_kv.h" +#include "onchip_flash.h" + +#define ONCHIP_FLASH_ADDR_START 0x08000000 // start address for onchip flash for stm32l431RCTX +#define ONCHIP_FLASH_ADDR_MAX 0x0803FFFF // 256K flash addr for stm32l431RCTX + +#define SECTOR_SIZE 2048 // sector size for stm32l431RCTX +#define SECTOR_SIZE_LOG2 11 // 2 ^ 11 = 2048 + +#define FOR_KV_FLASH_SIZE (2 * SECTOR_SIZE) // storage for kv +#define FOR_KV_FLASH_START 0x803d000 + +kv_flash_drv_t stm32l4_norflash_onchip_drv = { + .write = stm32l4_norflash_onchip_write, + .read = stm32l4_norflash_onchip_read, + .erase = stm32l4_norflash_onchip_erase, +}; + +kv_flash_prop_t stm32l4_norflash_onchip_prop = { + .sector_size_log2 = SECTOR_SIZE_LOG2, + .pgm_type = KV_FLASH_PROGRAM_TYPE_DOUBLEWORD, + .flash_start = FOR_KV_FLASH_START, + .flash_size = FOR_KV_FLASH_SIZE, +}; + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c new file mode 100644 index 00000000..4d214fcc --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c @@ -0,0 +1,25 @@ +#include "tos_ota_download.h" +#include "onchip_flash.h" + +#define ONCHIP_FLASH_ADDR_START 0x08000000 // start address for onchip flash for stm32l431RCTX +#define ONCHIP_FLASH_ADDR_MAX 0x0803FFFF // 256K flash addr for stm32l431RCTX + +#define SECTOR_SIZE 2048 // sector size for stm32l431RCTX +#define SECTOR_SIZE_LOG2 11 // 2 ^ 11 = 2048 + +#define FOR_OTA_FLASH_SIZE (2 * SECTOR_SIZE) // storage for OTA +#define FOR_OTA_FLASH_START 0x803d000 + +ota_flash_drv_t stm32l4_norflash_onchip_drv_ota = { + .write = stm32l4_norflash_onchip_write, + .read = stm32l4_norflash_onchip_read, + .erase = stm32l4_norflash_onchip_erase, +}; + +ota_flash_prop_t stm32l4_norflash_onchip_prop_ota = { + .sector_size_log2 = SECTOR_SIZE_LOG2, + .pgm_type = OTA_FLASH_PROGRAM_TYPE_DOUBLEWORD, + .flash_start = FOR_OTA_FLASH_START, + .flash_size = FOR_OTA_FLASH_SIZE, +}; + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/TencentOS_tiny.uvoptx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/TencentOS_tiny.uvoptx new file mode 100644 index 00000000..8d518802 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/TencentOS_tiny.uvoptx @@ -0,0 +1,1224 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
+ + + + TencentOS_tiny + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32L431RCTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.0.0 + http://www.keil.com/pack + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") + + + + + + + + + + + + + + + $$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin --output=@L.bin !L + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4101 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8008000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER,USE_ESP8266 + + ..\..\..\BSP\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\..\kernel\core\include;..\..\..\TOS-CONFIG;..\..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\..\kernel\pm\include;..\..\..\..\..\osal\cmsis_os;..\..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\BSP\Hardware\DHT11;..\..\..\BSP\Hardware\OLED;..\..\..\BSP\Hardware\BH1750;..\..\..\..\..\examples\helloworld + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l431xx.s + 2 + startup_stm32l431xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\..\BSP\Src\mcu_init.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\..\BSP\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\..\..\BSP\Src\stm32l4xx_it.c + + + usart.c + 1 + ..\..\..\BSP\Src\usart.c + + + adc.c + 1 + ..\..\..\BSP\Src\adc.c + + + dac.c + 1 + ..\..\..\BSP\Src\dac.c + + + i2c.c + 1 + ..\..\..\BSP\Src\i2c.c + + + spi.c + 1 + ..\..\..\BSP\Src\spi.c + + + + + examples + + + hello_world.c + 1 + ..\..\..\..\..\examples\hello_world\hello_world.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + .\system_stm32l4xx.c + + + + + Hardware + + + DHT11_BUS.c + 1 + ..\..\..\BSP\Hardware\DHT11\DHT11_BUS.c + + + oled.c + 1 + ..\..\..\BSP\Hardware\OLED\oled.c + + + tim.c + 1 + ..\..\..\BSP\Src\tim.c + + + + + kernel + + + tos_binary_heap.c + 1 + ..\..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_event.c + 1 + ..\..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\..\kernel\core\tos_global.c + + + tos_mail_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_message_queue.c + + + tos_mmblk.c + 1 + ..\..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\..\kernel\core\tos_pend.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_robin.c + 1 + ..\..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\..\kernel\core\tos_timer.c + + + + + cpu + + + port_s.S + 2 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + tos_cpu.c + 1 + ..\..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + + + cmsis + + + cmsis_os.c + 1 + ..\..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + config + + + tos_config.h + 5 + ..\..\..\TOS-CONFIG\tos_config.h + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/startup_stm32l431xx.s b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/startup_stm32l431xx.s new file mode 100644 index 00000000..6a5c15a5 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/startup_stm32l431xx.s @@ -0,0 +1,404 @@ +;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** +;* File Name : startup_stm32l431xx.s +;* Author : MCD Application Team +;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x100 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x100 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_IRQHandler ; ADC1 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD 0 ; Reserved + DCD SPI3_IRQHandler ; SPI3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD 0 ; Reserved + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD 0 ; Reserved + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +SDMMC1_IRQHandler +SPI3_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/system_stm32l4xx.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/system_stm32l4xx.c new file mode 100644 index 00000000..70e973e9 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/application/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x8000 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/common.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/common.h new file mode 100644 index 00000000..f29b0277 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/common.h @@ -0,0 +1,71 @@ +/** + ****************************************************************************** + * @file IAP_Main/Inc/common.h + * @author MCD Application Team + * @version 1.0.0 + * @date 8-April-2015 + * @brief This file provides all the headers of the common functions. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __COMMON_H +#define __COMMON_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx.h" + +/* Exported types ------------------------------------------------------------*/ +extern UART_HandleTypeDef huart2; +/* Exported constants --------------------------------------------------------*/ +/* Constants used by Serial Command Line Mode */ +#define TX_TIMEOUT ((uint32_t)100) +#define RX_TIMEOUT HAL_MAX_DELAY + +/* Exported macro ------------------------------------------------------------*/ +#define IS_CAP_LETTER(c) (((c) >= 'A') && ((c) <= 'F')) +#define IS_LC_LETTER(c) (((c) >= 'a') && ((c) <= 'f')) +#define IS_09(c) (((c) >= '0') && ((c) <= '9')) +#define ISVALIDHEX(c) (IS_CAP_LETTER(c) || IS_LC_LETTER(c) || IS_09(c)) +#define ISVALIDDEC(c) IS_09(c) +#define CONVERTDEC(c) (c - '0') + +#define CONVERTHEX_ALPHA(c) (IS_CAP_LETTER(c) ? ((c) - 'A'+10) : ((c) - 'a'+10)) +#define CONVERTHEX(c) (IS_09(c) ? ((c) - '0') : CONVERTHEX_ALPHA(c)) + +/* Exported functions ------------------------------------------------------- */ +void Int2Str(uint8_t *p_str, uint32_t intnum); +uint32_t Str2Int(uint8_t *inputstr, uint32_t *intnum); +void Serial_PutString(uint8_t *p_string); +HAL_StatusTypeDef Serial_PutByte(uint8_t param); + +#endif /* __COMMON_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/flash_if.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/flash_if.h new file mode 100644 index 00000000..88c23962 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/flash_if.h @@ -0,0 +1,97 @@ +/** + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __FLASH_IF_H +#define __FLASH_IF_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + + +/* Error code */ +enum +{ + FLASHIF_OK = 0, + FLASHIF_ERASEKO, + FLASHIF_WRITINGCTRL_ERROR, + FLASHIF_WRITING_ERROR, + FLASHIF_PROTECTION_ERRROR +}; + +/* protection type */ +enum{ + FLASHIF_PROTECTION_NONE = 0, + FLASHIF_PROTECTION_PCROPENABLED = 0x1, + FLASHIF_PROTECTION_WRPENABLED = 0x2, + FLASHIF_PROTECTION_RDPENABLED = 0x4, +}; + +/* protection update */ +enum { + FLASHIF_WRP_ENABLE, + FLASHIF_WRP_DISABLE +}; + +/* Define the address from where user application will be loaded. +Note: this area is reserved for the IAP code */ +#define FLASH_PAGE_STEP FLASH_PAGE_SIZE /* Size of page : 2 Kbytes */ +#define APPLICATION_ADDRESS (uint32_t)0x08008000 /* Start user code address: ADDR_FLASH_PAGE_8 */ + +/* Notable Flash addresses */ +#define USER_FLASH_END_ADDRESS 0x08100000 + +/* Define the user application size */ +#define USER_FLASH_SIZE ((uint32_t)0x00003000) /* Small default template application */ + + +/* Exported macro ------------------------------------------------------------*/ +/* ABSoulute value */ +#define ABS_RETURN(x,y) ((x) < (y)) ? ((y)-(x)) : ((x)-(y)) + +/* Get the number of sectors from where the user program will be loaded */ +#define FLASH_SECTOR_NUMBER ((uint32_t)(ABS_RETURN(APPLICATION_ADDRESS,FLASH_START_BANK1))>>12) + +/* Compute the mask to test if the Flash memory, where the user program will be + loaded, is write protected */ +#define FLASH_PROTECTED_SECTORS (~(uint32_t)((1 << FLASH_SECTOR_NUMBER) - 1)) +/* Exported functions ------------------------------------------------------- */ +void FLASH_If_Init(void); +uint32_t FLASH_If_Erase(uint32_t StartSector); +uint32_t FLASH_If_GetWriteProtectionStatus(void); +uint32_t FLASH_If_Write(uint32_t destination, uint32_t *p_source, uint32_t length); +uint32_t FLASH_If_WriteProtectionConfig(uint32_t protectionstate); + +#endif /* __FLASH_IF_H */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/main.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/main.h new file mode 100644 index 00000000..4cac9efc --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/main.h @@ -0,0 +1,74 @@ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ +extern UART_HandleTypeDef *iap_uart; +extern CRC_HandleTypeDef hcrc; +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define LED_Pin GPIO_PIN_13 +#define LED_GPIO_Port GPIOC +#define KEY1_Pin GPIO_PIN_2 +#define KEY1_GPIO_Port GPIOB +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/menu.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/menu.h new file mode 100644 index 00000000..a0dba480 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/menu.h @@ -0,0 +1,53 @@ +/** + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MENU_H +#define __MENU_H + +/* Includes ------------------------------------------------------------------*/ +#include "flash_if.h" +#include "ymodem.h" + +/* Imported variables --------------------------------------------------------*/ +extern uint8_t aFileName[FILE_NAME_LENGTH]; + +/* Private variables ---------------------------------------------------------*/ +typedef void (*pFunction)(void); + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void Main_Menu(void); + +#endif /* __MENU_H */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_hal_conf.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 00000000..96c68cbc --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,450 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_HAL_CONF_H +#define __STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +#define HAL_CRC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DFSDM_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" + #include "stm32l4xx_hal_rcc_ex.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" + #include "stm32l4xx_hal_dma_ex.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32l4xx_hal_pka.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_it.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_it.h new file mode 100644 index 00000000..1bedbf68 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/stm32l4xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_IT_H +#define __STM32L4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/ymodem.h b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/ymodem.h new file mode 100644 index 00000000..7530df66 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Inc/ymodem.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __YMODEM_H_ +#define __YMODEM_H_ + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ + +/** + * @brief Comm status structures definition + */ +typedef enum +{ + COM_OK = 0x00, + COM_ERROR = 0x01, + COM_ABORT = 0x02, + COM_TIMEOUT = 0x03, + COM_DATA = 0x04, + COM_LIMIT = 0x05 +} COM_StatusTypeDef; + +/* Exported constants --------------------------------------------------------*/ +/* Packet structure defines */ +#define PACKET_HEADER_SIZE ((uint32_t)3) +#define PACKET_DATA_INDEX ((uint32_t)4) +#define PACKET_START_INDEX ((uint32_t)1) +#define PACKET_NUMBER_INDEX ((uint32_t)2) +#define PACKET_CNUMBER_INDEX ((uint32_t)3) +#define PACKET_TRAILER_SIZE ((uint32_t)2) +#define PACKET_OVERHEAD_SIZE (PACKET_HEADER_SIZE + PACKET_TRAILER_SIZE - 1) +#define PACKET_SIZE ((uint32_t)128) +#define PACKET_1K_SIZE ((uint32_t)1024) + +/* /-------- Packet in IAP memory ------------------------------------------\ + * | 0 | 1 | 2 | 3 | 4 | ... | n+4 | n+5 | n+6 | + * |------------------------------------------------------------------------| + * | unused | start | number | !num | data[0] | ... | data[n] | crc0 | crc1 | + * \------------------------------------------------------------------------/ + * the first byte is left unused for memory alignment reasons */ + +#define FILE_NAME_LENGTH ((uint32_t)64) +#define FILE_SIZE_LENGTH ((uint32_t)16) + +#define SOH ((uint8_t)0x01) /* start of 128-byte data packet */ +#define STX ((uint8_t)0x02) /* start of 1024-byte data packet */ +#define EOT ((uint8_t)0x04) /* end of transmission */ +#define ACK ((uint8_t)0x06) /* acknowledge */ +#define NAK ((uint8_t)0x15) /* negative acknowledge */ +#define CA ((uint32_t)0x18) /* two of these in succession aborts transfer */ +#define CRC16 ((uint8_t)0x43) /* 'C' == 0x43, request 16-bit CRC */ +#define NEGATIVE_BYTE ((uint8_t)0xFF) + +#define ABORT1 ((uint8_t)0x41) /* 'A' == 0x41, abort by user */ +#define ABORT2 ((uint8_t)0x61) /* 'a' == 0x61, abort by user */ + +#define NAK_TIMEOUT ((uint32_t)0x100000) +#define DOWNLOAD_TIMEOUT ((uint32_t)10000) /* One second retry delay */ +#define MAX_ERRORS ((uint32_t)5) + +/* Exported functions ------------------------------------------------------- */ +COM_StatusTypeDef Ymodem_Receive(uint32_t *p_size); +COM_StatusTypeDef Ymodem_Transmit(uint8_t *p_buf, const uint8_t *p_file_name, uint32_t file_size); + +#endif /* __YMODEM_H_ */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvoptx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvoptx new file mode 100644 index 00000000..085eea09 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvoptx @@ -0,0 +1,719 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + bootloader + 0x4 + ARM-ADS + + 80000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\list\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32L431RCTx$CMSIS\Flash\STM32L4xx_256.FLM)) + + + 0 + ST-LINKIII-KEIL_SWO + -U303030303030303030303031 -O10446 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_256.FLM -FS08000000 -FL040000 -FP0($$Device:STM32L431RCTx$CMSIS\Flash\STM32L4xx_256.FLM) + + + + + + 0 + 1 + tos_next_task + + + 1 + 1 + tos_rdyq.highest_prio + + + 2 + 1 + task_list + + + 3 + 1 + 0x20000280 + + + 4 + 1 + tos_rdyq.highest_prio + + + 5 + 1 + owner + + + 6 + 1 + tos_curr_task + + + 7 + 1 + highest_pending_prio + + + 8 + 1 + task + + + + + 1 + 0 + 0x200016F4 + 0 + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 1 + 0 + 2 + 10000000 + + + + + + Application/MDK-ARM + 0 + 0 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + startup_stm32l431xx.s + startup_stm32l431xx.s + 0 + 0 + + + + + Drivers/STM32L4xx_HAL_Driver + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + stm32l4xx_hal_tim.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + stm32l4xx_hal_tim_ex.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + stm32l4xx_hal_uart.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + stm32l4xx_hal_uart_ex.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + stm32l4xx_hal.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + stm32l4xx_hal_i2c.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + stm32l4xx_hal_i2c_ex.c + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + stm32l4xx_hal_rcc.c + 0 + 0 + + + 2 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + stm32l4xx_hal_rcc_ex.c + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + stm32l4xx_hal_flash.c + 0 + 0 + + + 2 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + stm32l4xx_hal_flash_ex.c + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + stm32l4xx_hal_flash_ramfunc.c + 0 + 0 + + + 2 + 14 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + stm32l4xx_hal_gpio.c + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + stm32l4xx_hal_dma.c + 0 + 0 + + + 2 + 16 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + stm32l4xx_hal_dma_ex.c + 0 + 0 + + + 2 + 17 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + stm32l4xx_hal_pwr.c + 0 + 0 + + + 2 + 18 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + stm32l4xx_hal_pwr_ex.c + 0 + 0 + + + 2 + 19 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + stm32l4xx_hal_cortex.c + 0 + 0 + + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + stm32l4xx_hal_adc_ex.c + 0 + 0 + + + 2 + 21 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + stm32l4xx_hal_adc.c + 0 + 0 + + + 2 + 22 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + stm32l4xx_hal_dac.c + 0 + 0 + + + 2 + 23 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + stm32l4xx_hal_dac_ex.c + 0 + 0 + + + 2 + 24 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + stm32l4xx_hal_spi.c + 0 + 0 + + + 2 + 25 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + stm32l4xx_hal_spi_ex.c + 0 + 0 + + + 2 + 26 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + stm32l4xx_hal_crc.c + 0 + 0 + + + 2 + 27 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + stm32l4xx_hal_crc_ex.c + 0 + 0 + + + + + Drivers/CMSIS + 0 + 0 + 0 + 0 + + 3 + 28 + 1 + 0 + 0 + 0 + ..\Src\system_stm32l4xx.c + system_stm32l4xx.c + 0 + 0 + + + + + Application/User + 0 + 0 + 0 + 0 + + 4 + 29 + 1 + 0 + 0 + 0 + ..\Src\common.c + common.c + 0 + 0 + + + 4 + 30 + 1 + 0 + 0 + 0 + ..\Src\flash_if.c + flash_if.c + 0 + 0 + + + 4 + 31 + 1 + 0 + 0 + 0 + ..\Src\main.c + main.c + 0 + 0 + + + 4 + 32 + 1 + 0 + 0 + 0 + ..\Src\menu.c + menu.c + 0 + 0 + + + 4 + 33 + 1 + 0 + 0 + 0 + ..\Src\stm32l4xx_hal_msp.c + stm32l4xx_hal_msp.c + 0 + 0 + + + 4 + 34 + 1 + 0 + 0 + 0 + ..\Src\stm32l4xx_it.c + stm32l4xx_it.c + 0 + 0 + + + 4 + 35 + 1 + 0 + 0 + 0 + ..\Src\ymodem.c + ymodem.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvprojx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvprojx new file mode 100644 index 00000000..40604355 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/bootloader.uvprojx @@ -0,0 +1,597 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + bootloader + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32L431RCTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.0.0 + http://www.keil.com/pack + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") + + + + + + + + + + + + + + + $$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4107 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER,STM32L431xx, + + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\Inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l431xx.s + 2 + startup_stm32l431xx.s + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + stm32l4xx_hal_crc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + stm32l4xx_hal_crc_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\Src\system_stm32l4xx.c + + + + + Application/User + + + common.c + 1 + ..\Src\common.c + + + flash_if.c + 1 + ..\Src\flash_if.c + + + main.c + 1 + ..\Src\main.c + + + menu.c + 1 + ..\Src\menu.c + + + stm32l4xx_hal_msp.c + 1 + ..\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\Src\stm32l4xx_it.c + + + ymodem.c + 1 + ..\Src\ymodem.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/startup_stm32l431xx.s b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/startup_stm32l431xx.s new file mode 100644 index 00000000..6a5c15a5 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/MDK-ARM/startup_stm32l431xx.s @@ -0,0 +1,404 @@ +;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** +;* File Name : startup_stm32l431xx.s +;* Author : MCD Application Team +;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x100 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x100 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_IRQHandler ; ADC1 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD 0 ; Reserved + DCD SPI3_IRQHandler ; SPI3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD 0 ; Reserved + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD 0 ; Reserved + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +SDMMC1_IRQHandler +SPI3_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/common.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/common.c new file mode 100644 index 00000000..564ecbef --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/common.c @@ -0,0 +1,190 @@ +/** + ****************************************************************************** + * @file IAP_Main/Src/common.c + * @author MCD Application Team + * @version 1.0.0 + * @date 8-April-2015 + * @brief This file provides all the common functions. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup STM32L4xx_IAP_Main + * @{ + */ + +/* Includes ------------------------------------------------------------------*/ +#include "common.h" +#include "main.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Convert an Integer to a string + * @param p_str: The string output pointer + * @param intnum: The integer to be converted + * @retval None + */ +void Int2Str(uint8_t *p_str, uint32_t intnum) +{ + uint32_t i, divider = 1000000000, pos = 0, status = 0; + + for (i = 0; i < 10; i++) + { + p_str[pos++] = (intnum / divider) + 48; + + intnum = intnum % divider; + divider /= 10; + if ((p_str[pos-1] == '0') & (status == 0)) + { + pos = 0; + } + else + { + status++; + } + } +} + +/** + * @brief Convert a string to an integer + * @param p_inputstr: The string to be converted + * @param p_intnum: The integer value + * @retval 1: Correct + * 0: Error + */ +uint32_t Str2Int(uint8_t *p_inputstr, uint32_t *p_intnum) +{ + uint32_t i = 0, res = 0; + uint32_t val = 0; + + if ((p_inputstr[0] == '0') && ((p_inputstr[1] == 'x') || (p_inputstr[1] == 'X'))) + { + i = 2; + while ( ( i < 11 ) && ( p_inputstr[i] != '\0' ) ) + { + if (ISVALIDHEX(p_inputstr[i])) + { + val = (val << 4) + CONVERTHEX(p_inputstr[i]); + } + else + { + /* Return 0, Invalid input */ + res = 0; + break; + } + i++; + } + + /* valid result */ + if (p_inputstr[i] == '\0') + { + *p_intnum = val; + res = 1; + } + } + else /* max 10-digit decimal input */ + { + while ( ( i < 11 ) && ( res != 1 ) ) + { + if (p_inputstr[i] == '\0') + { + *p_intnum = val; + /* return 1 */ + res = 1; + } + else if (((p_inputstr[i] == 'k') || (p_inputstr[i] == 'K')) && (i > 0)) + { + val = val << 10; + *p_intnum = val; + res = 1; + } + else if (((p_inputstr[i] == 'm') || (p_inputstr[i] == 'M')) && (i > 0)) + { + val = val << 20; + *p_intnum = val; + res = 1; + } + else if (ISVALIDDEC(p_inputstr[i])) + { + val = val * 10 + CONVERTDEC(p_inputstr[i]); + } + else + { + /* return 0, Invalid input */ + res = 0; + break; + } + i++; + } + } + + return res; +} + +/** + * @brief Print a string on the HyperTerminal + * @param p_string: The string to be printed + * @retval None + */ +void Serial_PutString(uint8_t *p_string) +{ + uint16_t length = 0; + + while (p_string[length] != '\0') + { + length++; + } + HAL_UART_Transmit(iap_uart, p_string, length, TX_TIMEOUT); +} + +/** + * @brief Transmit a byte to the HyperTerminal + * @param param The byte to be sent + * @retval HAL_StatusTypeDef HAL_OK if OK + */ +HAL_StatusTypeDef Serial_PutByte( uint8_t param ) +{ + /* May be timeouted... */ + if ( iap_uart->gState == HAL_UART_STATE_TIMEOUT ) + { + iap_uart->gState = HAL_UART_STATE_READY; + } + return HAL_UART_Transmit(iap_uart, ¶m, 1, TX_TIMEOUT); +} +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/flash_if.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/flash_if.c new file mode 100644 index 00000000..535f4159 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/flash_if.c @@ -0,0 +1,347 @@ +/** + ****************************************************************************** + * @file IAP_Main/Src/flash_if.c + * @author MCD Application Team + * @version 1.0.0 + * @date 8-April-2015 + * @brief This file provides all the memory related operation functions. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup STM32L4xx_IAP + * @{ + */ + +/* Includes ------------------------------------------------------------------*/ +#include "flash_if.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* 1M0 flash 1 * 1024 * 1024 */ +#define FLASH_START_ADRESS 0x08000000 +#define FLASH_PAGE_NBPERBANK 256 +#define FLASH_BANK_NUMBER 2 + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Unlocks Flash for write access + * @param None + * @retval None + */ +void FLASH_If_Init(void) +{ + /* Unlock the Program memory */ + HAL_FLASH_Unlock(); + + /* Clear all FLASH flags */ + __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_PGSERR | FLASH_FLAG_WRPERR | FLASH_FLAG_OPTVERR); + /* Unlock the Program memory */ + HAL_FLASH_Lock(); +} + +/** + * @brief This function does an erase of all user flash area + * @param start: start of user flash area + * @retval FLASHIF_OK : user flash area successfully erased + * FLASHIF_ERASEKO : error occurred + */ +uint32_t FLASH_If_Erase(uint32_t start) +{ + uint32_t NbrOfPages = 0; + uint32_t PageError = 0; + FLASH_EraseInitTypeDef pEraseInit; + HAL_StatusTypeDef status = HAL_OK; + + /* Unlock the Flash to enable the flash control register access *************/ + HAL_FLASH_Unlock(); + + /* Get the number of page to erase */ + NbrOfPages = (FLASH_START_ADRESS + FLASH_SIZE); + NbrOfPages = (NbrOfPages - start) / FLASH_PAGE_SIZE; + + if(NbrOfPages > FLASH_PAGE_NBPERBANK) + { + pEraseInit.Banks = FLASH_BANK_1; + pEraseInit.NbPages = NbrOfPages % FLASH_PAGE_NBPERBANK; + pEraseInit.Page = FLASH_PAGE_NBPERBANK - pEraseInit.NbPages; + pEraseInit.TypeErase = FLASH_TYPEERASE_PAGES; + status = HAL_FLASHEx_Erase(&pEraseInit, &PageError); + + NbrOfPages = FLASH_PAGE_NBPERBANK; + } + + /* stm32l431rct6 no bank2 */ + if(status == HAL_OK) + { + pEraseInit.Banks = FLASH_BANK_1; + pEraseInit.NbPages = NbrOfPages; + pEraseInit.Page = FLASH_PAGE_NBPERBANK - pEraseInit.NbPages; + pEraseInit.TypeErase = FLASH_TYPEERASE_PAGES; + status = HAL_FLASHEx_Erase(&pEraseInit, &PageError); + } + + /* Lock the Flash to disable the flash control register access (recommended + to protect the FLASH memory against possible unwanted operation) *********/ + HAL_FLASH_Lock(); + + if (status != HAL_OK) + { + /* Error occurred while page erase */ + return FLASHIF_ERASEKO; + } + + return FLASHIF_OK; +} + +/* Public functions ---------------------------------------------------------*/ +/** + * @brief This function writes a data buffer in flash (data are 32-bit aligned). + * @note After writing data buffer, the flash content is checked. + * @param destination: start address for target location + * @param p_source: pointer on buffer with data to write + * @param length: length of data buffer (unit is 32-bit word) + * @retval uint32_t 0: Data successfully written to Flash memory + * 1: Error occurred while writing data in Flash memory + * 2: Written Data in flash memory is different from expected one + */ +uint32_t FLASH_If_Write(uint32_t destination, uint32_t *p_source, uint32_t length) +{ + uint32_t status = FLASHIF_OK; + uint32_t i = 0; + + /* Unlock the Flash to enable the flash control register access *************/ + HAL_FLASH_Unlock(); + + /* DataLength must be a multiple of 64 bit */ + for (i = 0; (i < length/2) && (destination <= (USER_FLASH_END_ADDRESS-8)); i++) + { + /* Device voltage range supposed to be [2.7V to 3.6V], the operation will + be done by word */ + if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, destination, *((uint64_t *)(p_source+2*i))) == HAL_OK) + { + /* Check the written value */ + if (*(uint64_t*)destination != *(uint64_t *)(p_source+2*i)) + { + /* Flash content doesn't match SRAM content */ + status = FLASHIF_WRITINGCTRL_ERROR; + break; + } + /* Increment FLASH destination address */ + destination += 8; + } + else + { + /* Error occurred while writing data in Flash memory */ + status = FLASHIF_WRITING_ERROR; + break; + } + } + + /* Lock the Flash to disable the flash control register access (recommended + to protect the FLASH memory against possible unwanted operation) *********/ + HAL_FLASH_Lock(); + + return status; +} + +/** + * @brief Returns the write protection status of application flash area. + * @param None + * @retval If a sector in application area is write-protected returned value is a combinaison + of the possible values : FLASHIF_PROTECTION_WRPENABLED, FLASHIF_PROTECTION_PCROPENABLED, ... + * If no sector is write-protected FLASHIF_PROTECTION_NONE is returned. + */ +uint32_t FLASH_If_GetWriteProtectionStatus(void) +{ + uint32_t ProtectedPAGE = FLASHIF_PROTECTION_NONE; + FLASH_OBProgramInitTypeDef OptionsBytesStruct1, OptionsBytesStruct2, OptionsBytesStruct3, OptionsBytesStruct4; + + /* Unlock the Flash to enable the flash control register access *************/ + HAL_FLASH_Unlock(); + + OptionsBytesStruct1.WRPArea = OB_WRPAREA_BANK1_AREAA; + OptionsBytesStruct1.PCROPConfig = FLASH_BANK_1; + OptionsBytesStruct2.WRPArea = OB_WRPAREA_BANK1_AREAB; + OptionsBytesStruct2.PCROPConfig = FLASH_BANK_1; + /* stm32l431rct6 no bank2 */ +// OptionsBytesStruct3.WRPArea = OB_WRPAREA_BANK2_AREAA; +// OptionsBytesStruct3.PCROPConfig = FLASH_BANK_2; +// OptionsBytesStruct4.WRPArea = OB_WRPAREA_BANK2_AREAB; +// OptionsBytesStruct4.PCROPConfig = FLASH_BANK_2; + + /* Check if there are write protected sectors inside the user flash area ***/ + HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct1); + HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct2); + HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct3); + HAL_FLASHEx_OBGetConfig(&OptionsBytesStruct4); + + /* Lock the Flash to disable the flash control register access (recommended + to protect the FLASH memory against possible unwanted operation) *********/ + HAL_FLASH_Lock(); + + /* Check PCROP areas */ + if(OptionsBytesStruct1.PCROPEndAddr > OptionsBytesStruct1.PCROPStartAddr) + { + /* check if user area are included inside this range */ + if(OptionsBytesStruct1.PCROPStartAddr > APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_PCROPENABLED; + } + } + + if(OptionsBytesStruct2.PCROPEndAddr > OptionsBytesStruct2.PCROPStartAddr) + { + /* check if user area are included inside this range */ + if(OptionsBytesStruct1.PCROPStartAddr > APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_PCROPENABLED; + } + } + + /* check WRP */ + if(OptionsBytesStruct1.WRPEndOffset > OptionsBytesStruct1.WRPStartOffset) + { + /* check if area is inside the WRP Range */ + if((OptionsBytesStruct1.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED; + } + } + + if(OptionsBytesStruct2.WRPEndOffset > OptionsBytesStruct2.WRPStartOffset) + { + /* check if area is inside the WRP Range */ + if((OptionsBytesStruct2.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED; + } + } + + if(OptionsBytesStruct3.WRPEndOffset > OptionsBytesStruct3.WRPStartOffset) + { + /* check if area is inside the WRP Range */ + if((OptionsBytesStruct3.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED; + } + } + + if(OptionsBytesStruct4.WRPEndOffset > OptionsBytesStruct4.WRPStartOffset) + { + /* check if area is inside the WRP Range */ + if((OptionsBytesStruct4.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APPLICATION_ADDRESS) + { + ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED; + } + } + + if(OptionsBytesStruct4.RDPLevel == 1) + { + ProtectedPAGE|= FLASHIF_PROTECTION_RDPENABLED; + } + + return ProtectedPAGE; +} + +/** + * @brief Configure the write protection status of user flash area. + * @param protectionstate : FLASHIF_WRP_DISABLE or FLASHIF_WRP_ENABLE the protection + * @retval uint32_t FLASHIF_OK if change is applied. + */ +uint32_t FLASH_If_WriteProtectionConfig(uint32_t protectionstate) +{ + FLASH_OBProgramInitTypeDef OptionsBytesStruct1; + HAL_StatusTypeDef retr; + + /* Unlock the Flash to enable the flash control register access *************/ + retr = HAL_FLASH_Unlock(); + + /* Unlock the Options Bytes *************************************************/ + retr|= HAL_FLASH_OB_Unlock(); + + OptionsBytesStruct1.OptionType = OPTIONBYTE_WRP; + OptionsBytesStruct1.WRPArea = OB_WRPAREA_BANK1_AREAA; + if( protectionstate == FLASHIF_WRP_ENABLE) + { + /* Enable the WRP protection for all flash BANK1 */ + OptionsBytesStruct1.WRPEndOffset = FLASH_PAGE_NBPERBANK - 1; + OptionsBytesStruct1.WRPStartOffset = 0x00; + } + else + { + /* Remove all WRP protection */ + OptionsBytesStruct1.WRPEndOffset = 0x00; + OptionsBytesStruct1.WRPStartOffset = 0xFF; + } + retr|= HAL_FLASHEx_OBProgram(&OptionsBytesStruct1); + + OptionsBytesStruct1.RDPLevel = OB_RDP_LEVEL_0; // add rdp + OptionsBytesStruct1.OptionType = OPTIONBYTE_WRP; + OptionsBytesStruct1.WRPArea = OB_WRPAREA_BANK1_AREAB; + OptionsBytesStruct1.WRPEndOffset = 0x00; + OptionsBytesStruct1.WRPStartOffset = 0xFF; + retr|= HAL_FLASHEx_OBProgram(&OptionsBytesStruct1); + + /* stm32l431rct6 no bank2 */ +// OptionsBytesStruct1.OptionType = OPTIONBYTE_WRP; +// OptionsBytesStruct1.WRPArea = OB_WRPAREA_BANK2_AREAA; +// if( protectionstate == FLASHIF_WRP_ENABLE) +// { +// /* Enable the WRP protection for all flash BANK1 */ +// OptionsBytesStruct1.WRPEndOffset = FLASH_PAGE_NBPERBANK - 1; +// OptionsBytesStruct1.WRPStartOffset = 0x00; +// } +// else +// { +// /* Remove all WRP protection */ +// OptionsBytesStruct1.WRPEndOffset = 0x00; +// OptionsBytesStruct1.WRPStartOffset = 0xFF; +// } +// retr|= HAL_FLASHEx_OBProgram(&OptionsBytesStruct1); +// +// OptionsBytesStruct1.RDPLevel = OB_RDP_LEVEL_0; +// OptionsBytesStruct1.OptionType = OPTIONBYTE_WRP; +// OptionsBytesStruct1.WRPArea = OB_WRPAREA_BANK2_AREAB; +// OptionsBytesStruct1.WRPEndOffset = 0x00; +// OptionsBytesStruct1.WRPStartOffset = 0xFF; +// retr|= HAL_FLASHEx_OBProgram(&OptionsBytesStruct1); + + return (retr == HAL_OK ? FLASHIF_OK: FLASHIF_PROTECTION_ERRROR); +} +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/main.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/main.c new file mode 100644 index 00000000..f6577927 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/main.c @@ -0,0 +1,286 @@ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "menu.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +CRC_HandleTypeDef hcrc; + +UART_HandleTypeDef huart2; +UART_HandleTypeDef hlpuart1; + +/* USER CODE BEGIN PV */ +extern pFunction JumpToApplication; +extern uint32_t JumpAddress; +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_CRC_Init(void); +static void MX_USART2_UART_Init(void); + +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ + +UART_HandleTypeDef *iap_uart = NULL; + +int main(void) +{ + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* Configure the system clock */ + SystemClock_Config(); + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_CRC_Init(); + + MX_USART2_UART_Init(); + iap_uart = &huart2; + + /* Test if Key2 push-button on EVB_MX+ Board is pressed */ + if (HAL_GPIO_ReadPin(KEY1_GPIO_Port, KEY1_Pin) == GPIO_PIN_RESET) + { + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_SET); + /* Initialise Flash */ + FLASH_If_Init(); + /* Display main menu */ + Main_Menu(); + } + /* Keep the user application running */ + else + { + /* Test if user code is programmed starting from address "APPLICATION_ADDRESS" */ + if (((*(__IO uint32_t*)APPLICATION_ADDRESS) & 0x2FFE0000 ) == 0x20000000) + { + /* Jump to user application */ + JumpAddress = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); + JumpToApplication = (pFunction) JumpAddress; + /* Initialize user application's Stack Pointer */ + __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); + JumpToApplication(); + } + } + + while (1) { + ; + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 20; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief CRC Initialization Function + * @param None + * @retval None + */ +static void MX_CRC_Init(void) +{ + hcrc.Instance = CRC; + hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE; + hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; + hcrc.Init.GeneratingPolynomial = 4129; + hcrc.Init.CRCLength = CRC_POLYLENGTH_16B; + hcrc.Init.InitValue = 0; + hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE; + hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE; + hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; + if (HAL_CRC_Init(&hcrc) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART2_UART_Init(void) +{ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; +#if 0 + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +#else + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT; + huart2.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; +#endif + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : LED_Pin */ + GPIO_InitStruct.Pin = LED_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : KEY1_Pin */ + GPIO_InitStruct.Pin = KEY1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLUP; + HAL_GPIO_Init(KEY1_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, +tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/menu.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/menu.c new file mode 100644 index 00000000..aa517d88 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/menu.c @@ -0,0 +1,223 @@ +/** + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2015 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "common.h" +#include "flash_if.h" +#include "menu.h" +#include "ymodem.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +pFunction JumpToApplication; +uint32_t JumpAddress; +uint32_t FlashProtection = 0; +uint8_t aFileName[FILE_NAME_LENGTH]; + +/* Private function prototypes -----------------------------------------------*/ +void SerialDownload(void); +void SerialUpload(void); + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Download a file via serial port + * @param None + * @retval None + */ +void SerialDownload(void) +{ + uint8_t number[11] = {0}; + uint32_t size = 0; + COM_StatusTypeDef result; + + Serial_PutString((uint8_t *)"Waiting for the file to be sent ... (press 'a' to abort)\n\r"); + result = Ymodem_Receive( &size ); + if (result == COM_OK) + { + Serial_PutString((uint8_t *)"\n\n\r Programming Completed Successfully!\n\r--------------------------------\r\n Name: "); + Serial_PutString(aFileName); + Int2Str(number, size); + Serial_PutString((uint8_t *)"\n\r Size: "); + Serial_PutString(number); + Serial_PutString((uint8_t *)" Bytes\r\n"); + Serial_PutString((uint8_t *)"-------------------\n"); + } + else if (result == COM_LIMIT) + { + Serial_PutString((uint8_t *)"\n\n\rThe image size is higher than the allowed space memory!\n\r"); + } + else if (result == COM_DATA) + { + Serial_PutString((uint8_t *)"\n\n\rVerification failed!\n\r"); + } + else if (result == COM_ABORT) + { + Serial_PutString((uint8_t *)"\r\n\nAborted by user.\n\r"); + } + else + { + Serial_PutString((uint8_t *)"\n\rFailed to receive the file!\n\r"); + } +} + +/** + * @brief Upload a file via serial port. + * @param None + * @retval None + */ +void SerialUpload(void) +{ + uint8_t status = 0; + + Serial_PutString((uint8_t *)"\n\n\rSelect Receive File\n\r"); + + HAL_UART_Receive(iap_uart, &status, 1, RX_TIMEOUT); + if ( status == CRC16) + { + /* Transmit the flash image through ymodem protocol */ + status = Ymodem_Transmit((uint8_t*)APPLICATION_ADDRESS, (const uint8_t*)"UploadedFlashImage.bin", USER_FLASH_SIZE); + + if (status != 0) + { + Serial_PutString((uint8_t *)"\n\rError Occurred while Transmitting File\n\r"); + } + else + { + Serial_PutString((uint8_t *)"\n\rFile uploaded successfully \n\r"); + } + } +} + +/** + * @brief Display the Main Menu on HyperTerminal + * @param None + * @retval None + */ +void Main_Menu(void) +{ + uint8_t key = 0; + + /* Test if any sector of Flash memory where user application will be loaded is write protected */ + FlashProtection = FLASH_If_GetWriteProtectionStatus(); + + while (1) + { + + Serial_PutString((uint8_t *)"\r\n=================== Main Menu ============================\r\n\n"); + Serial_PutString((uint8_t *)" Download image to the internal Flash ----------------- 1\r\n\n"); + Serial_PutString((uint8_t *)" Upload image from the internal Flash ----------------- 2\r\n\n"); + Serial_PutString((uint8_t *)" Execute the loaded application ----------------------- 3\r\n\n"); + + + if(FlashProtection != FLASHIF_PROTECTION_NONE) + { + Serial_PutString((uint8_t *)" Disable the write protection ------------------------- 4\r\n\n"); + if((FlashProtection & (FLASHIF_PROTECTION_PCROPENABLED | FLASHIF_PROTECTION_RDPENABLED)) != 0x0) + { + Serial_PutString((uint8_t *)" The write protection disable will erase all the flash\r\n"); + Serial_PutString((uint8_t *)" Please use STlink utility to disable the protection \r\n\n"); + while(1); + } + } + else + { + Serial_PutString((uint8_t *)" Enable the write protection -------------------------- 4\r\n\n"); + } + Serial_PutString((uint8_t *)"==========================================================\r\n\n"); + + /* Clean the input path */ + __HAL_UART_FLUSH_DRREGISTER(iap_uart); + + /* Receive key */ + HAL_UART_Receive(iap_uart, &key, 1, RX_TIMEOUT); + + switch (key) + { + case '1' : + /* Download user application in the Flash */ + SerialDownload(); + break; + case '2' : + /* Upload user application from the Flash */ + SerialUpload(); + break; + case '3' : + Serial_PutString((uint8_t *)"Start program execution......\r\n\n"); + /* execute the new program */ + JumpAddress = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4); + /* Jump to user application */ + JumpToApplication = (pFunction) JumpAddress; + /* Initialize user application's Stack Pointer */ + __set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS); + JumpToApplication(); + break; + case '4' : + if (FlashProtection != FLASHIF_PROTECTION_NONE) + { + /* Disable the write protection */ + if (FLASH_If_WriteProtectionConfig(FLASHIF_WRP_DISABLE) == FLASHIF_OK) + { + Serial_PutString((uint8_t *)"Write Protection disabled...\r\n"); + Serial_PutString((uint8_t *)"System will now restart...\r\n"); + /* Launch the option byte loading */ + HAL_FLASH_OB_Launch(); + } + else + { + Serial_PutString((uint8_t *)"Error: Flash write un-protection failed...\r\n"); + } + } + else + { + if (FLASH_If_WriteProtectionConfig(FLASHIF_WRP_ENABLE) == FLASHIF_OK) + { + Serial_PutString((uint8_t *)"Write Protection enabled...\r\n"); + Serial_PutString((uint8_t *)"System will now restart...\r\n"); + /* Launch the option byte loading */ + HAL_FLASH_OB_Launch(); + } + else + { + Serial_PutString((uint8_t *)"Error: Flash write protection failed...\r\n"); + } + } + break; + default: + Serial_PutString((uint8_t *)"Invalid Number ! ==> The number should be either 1, 2, 3 or 4\r"); + break; + } + } +} + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_hal_msp.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_hal_msp.c new file mode 100644 index 00000000..8230fa8c --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,193 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32l4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief CRC MSP Initialization +* This function configures the hardware resources used in this example +* @param hcrc: CRC handle pointer +* @retval None +*/ +void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc) +{ + if(hcrc->Instance==CRC) + { + /* USER CODE BEGIN CRC_MspInit 0 */ + + /* USER CODE END CRC_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_CRC_CLK_ENABLE(); + /* USER CODE BEGIN CRC_MspInit 1 */ + + /* USER CODE END CRC_MspInit 1 */ + } + +} + +/** +* @brief CRC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hcrc: CRC handle pointer +* @retval None +*/ +void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc) +{ + if(hcrc->Instance==CRC) + { + /* USER CODE BEGIN CRC_MspDeInit 0 */ + + /* USER CODE END CRC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_CRC_CLK_DISABLE(); + /* USER CODE BEGIN CRC_MspDeInit 1 */ + + /* USER CODE END CRC_MspDeInit 1 */ + } + +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_it.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_it.c new file mode 100644 index 00000000..8f827e48 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/stm32l4xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/system_stm32l4xx.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/system_stm32l4xx.c new file mode 100644 index 00000000..26bd5179 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/ymodem.c b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/ymodem.c new file mode 100644 index 00000000..4ec2abdd --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/iap/bootloader/Src/ymodem.c @@ -0,0 +1,641 @@ +/** + ****************************************************************************** + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "flash_if.h" +#include "common.h" +#include "ymodem.h" +#include "string.h" +#include "main.h" +#include "menu.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#define CRC16_F /* activate the CRC16 integrity */ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* @note ATTENTION - please keep this variable 32bit alligned */ +uint8_t aPacketData[PACKET_1K_SIZE + PACKET_DATA_INDEX + PACKET_TRAILER_SIZE]; + +/* Private function prototypes -----------------------------------------------*/ +static void PrepareIntialPacket(uint8_t *p_data, const uint8_t *p_file_name, uint32_t length); +static void PreparePacket(uint8_t *p_source, uint8_t *p_packet, uint8_t pkt_nr, uint32_t size_blk); +static HAL_StatusTypeDef ReceivePacket(uint8_t *p_data, uint32_t *p_length, uint32_t timeout); +uint16_t UpdateCRC16(uint16_t crc_in, uint8_t byte); +uint16_t Cal_CRC16(const uint8_t* p_data, uint32_t size); +uint8_t CalcChecksum(const uint8_t *p_data, uint32_t size); + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Receive a packet from sender + * @param data + * @param length + * 0: end of transmission + * 2: abort by sender + * >0: packet length + * @param timeout + * @retval HAL_OK: normally return + * HAL_BUSY: abort by user + */ +static HAL_StatusTypeDef ReceivePacket(uint8_t *p_data, uint32_t *p_length, uint32_t timeout) +{ + uint32_t crc; + uint32_t packet_size = 0; + HAL_StatusTypeDef status; + uint8_t char1; + + *p_length = 0; + status = HAL_UART_Receive(iap_uart, &char1, 1, timeout); + + if (status == HAL_OK) + { + switch (char1) + { + case SOH: + packet_size = PACKET_SIZE; + break; + case STX: + packet_size = PACKET_1K_SIZE; + break; + case EOT: + break; + case CA: + if ((HAL_UART_Receive(iap_uart, &char1, 1, timeout) == HAL_OK) && (char1 == CA)) + { + packet_size = 2; + } + else + { + status = HAL_ERROR; + } + break; + case ABORT1: + case ABORT2: + status = HAL_BUSY; + break; + default: + status = HAL_ERROR; + break; + } + *p_data = char1; + + if (packet_size >= PACKET_SIZE ) + { + status = HAL_UART_Receive(iap_uart, &p_data[PACKET_NUMBER_INDEX], packet_size + PACKET_OVERHEAD_SIZE, timeout); + + /* Simple packet sanity check */ + if (status == HAL_OK ) + { + if (p_data[PACKET_NUMBER_INDEX] != ((p_data[PACKET_CNUMBER_INDEX]) ^ NEGATIVE_BYTE)) + { + packet_size = 0; + status = HAL_ERROR; + } + else + { + /* Check packet CRC */ + crc = p_data[ packet_size + PACKET_DATA_INDEX ] << 8; + crc += p_data[ packet_size + PACKET_DATA_INDEX + 1 ]; + if (HAL_CRC_Calculate(&hcrc, (uint32_t*)&p_data[PACKET_DATA_INDEX], packet_size) != crc ) + { + packet_size = 0; + status = HAL_ERROR; + } + } + } + else + { + packet_size = 0; + } + } + } + *p_length = packet_size; + return status; +} + +/** + * @brief Prepare the first block + * @param p_data: output buffer + * @param p_file_name: name of the file to be sent + * @param length: length of the file to be sent in bytes + * @retval None + */ +static void PrepareIntialPacket(uint8_t *p_data, const uint8_t *p_file_name, uint32_t length) +{ + uint32_t i, j = 0; + uint8_t astring[10]; + + /* first 3 bytes are constant */ + p_data[PACKET_START_INDEX] = SOH; + p_data[PACKET_NUMBER_INDEX] = 0x00; + p_data[PACKET_CNUMBER_INDEX] = 0xff; + + /* Filename written */ + for (i = 0; (p_file_name[i] != '\0') && (i < FILE_NAME_LENGTH); i++) + { + p_data[i + PACKET_DATA_INDEX] = p_file_name[i]; + } + + p_data[i + PACKET_DATA_INDEX] = 0x00; + + /* file size written */ + Int2Str (astring, length); + i = i + PACKET_DATA_INDEX + 1; + while (astring[j] != '\0') + { + p_data[i++] = astring[j++]; + } + + /* padding with zeros */ + for (j = i; j < PACKET_SIZE + PACKET_DATA_INDEX; j++) + { + p_data[j] = 0; + } +} + +/** + * @brief Prepare the data packet + * @param p_source: pointer to the data to be sent + * @param p_packet: pointer to the output buffer + * @param pkt_nr: number of the packet + * @param size_blk: length of the block to be sent in bytes + * @retval None + */ +static void PreparePacket(uint8_t *p_source, uint8_t *p_packet, uint8_t pkt_nr, uint32_t size_blk) +{ + uint8_t *p_record; + uint32_t i, size, packet_size; + + /* Make first three packet */ + packet_size = size_blk >= PACKET_1K_SIZE ? PACKET_1K_SIZE : PACKET_SIZE; + size = size_blk < packet_size ? size_blk : packet_size; + if (packet_size == PACKET_1K_SIZE) + { + p_packet[PACKET_START_INDEX] = STX; + } + else + { + p_packet[PACKET_START_INDEX] = SOH; + } + p_packet[PACKET_NUMBER_INDEX] = pkt_nr; + p_packet[PACKET_CNUMBER_INDEX] = (~pkt_nr); + p_record = p_source; + + /* Filename packet has valid data */ + for (i = PACKET_DATA_INDEX; i < size + PACKET_DATA_INDEX;i++) + { + p_packet[i] = *p_record++; + } + if ( size <= packet_size) + { + for (i = size + PACKET_DATA_INDEX; i < packet_size + PACKET_DATA_INDEX; i++) + { + p_packet[i] = 0x1A; /* EOF (0x1A) or 0x00 */ + } + } +} + +/** + * @brief Update CRC16 for input byte + * @param crc_in input value + * @param input byte + * @retval None + */ +uint16_t UpdateCRC16(uint16_t crc_in, uint8_t byte) +{ + uint32_t crc = crc_in; + uint32_t in = byte | 0x100; + + do + { + crc <<= 1; + in <<= 1; + if(in & 0x100) + ++crc; + if(crc & 0x10000) + crc ^= 0x1021; + } + + while(!(in & 0x10000)); + + return crc & 0xffffu; +} + +/** + * @brief Cal CRC16 for YModem Packet + * @param data + * @param length + * @retval None + */ +uint16_t Cal_CRC16(const uint8_t* p_data, uint32_t size) +{ + uint32_t crc = 0; + const uint8_t* dataEnd = p_data+size; + + while(p_data < dataEnd) + crc = UpdateCRC16(crc, *p_data++); + + crc = UpdateCRC16(crc, 0); + crc = UpdateCRC16(crc, 0); + + return crc&0xffffu; +} + +/** + * @brief Calculate Check sum for YModem Packet + * @param p_data Pointer to input data + * @param size length of input data + * @retval uint8_t checksum value + */ +uint8_t CalcChecksum(const uint8_t *p_data, uint32_t size) +{ + uint32_t sum = 0; + const uint8_t *p_data_end = p_data + size; + + while (p_data < p_data_end ) + { + sum += *p_data++; + } + + return (sum & 0xffu); +} + +/* Public functions ---------------------------------------------------------*/ +/** + * @brief Receive a file using the ymodem protocol with CRC16. + * @param p_size The size of the file. + * @retval COM_StatusTypeDef result of reception/programming + */ +COM_StatusTypeDef Ymodem_Receive ( uint32_t *p_size ) +{ + uint32_t i, packet_length, session_done = 0, file_done, errors = 0, session_begin = 0; + uint32_t flashdestination, ramsource, filesize; + uint8_t *file_ptr; + uint8_t file_size[FILE_SIZE_LENGTH], tmp, packets_received; + COM_StatusTypeDef result = COM_OK; + + /* Initialize flashdestination variable */ + flashdestination = APPLICATION_ADDRESS; + + while ((session_done == 0) && (result == COM_OK)) + { + packets_received = 0; + file_done = 0; + while ((file_done == 0) && (result == COM_OK)) + { + switch (ReceivePacket(aPacketData, &packet_length, DOWNLOAD_TIMEOUT)) + { + case HAL_OK: + errors = 0; + switch (packet_length) + { + case 2: + /* Abort by sender */ + Serial_PutByte(ACK); + result = COM_ABORT; + break; + case 0: + /* End of transmission */ + Serial_PutByte(ACK); + file_done = 1; + break; + default: + /* Normal packet */ + if (aPacketData[PACKET_NUMBER_INDEX] != packets_received) + { + Serial_PutByte(NAK); + } + else + { + if (packets_received == 0) + { + /* File name packet */ + if (aPacketData[PACKET_DATA_INDEX] != 0) + { + /* File name extraction */ + i = 0; + file_ptr = aPacketData + PACKET_DATA_INDEX; + while ( (*file_ptr != 0) && (i < FILE_NAME_LENGTH)) + { + aFileName[i++] = *file_ptr++; + } + + /* File size extraction */ + aFileName[i++] = '\0'; + i = 0; + file_ptr ++; + while ( (*file_ptr != ' ') && (i < FILE_SIZE_LENGTH)) + { + file_size[i++] = *file_ptr++; + } + file_size[i++] = '\0'; + Str2Int(file_size, &filesize); + + /* Test the size of the image to be sent */ + /* Image size is greater than Flash size */ + if (*p_size > (USER_FLASH_SIZE + 1)) + { + /* End session */ + tmp = CA; + HAL_UART_Transmit(iap_uart, &tmp, 1, NAK_TIMEOUT); + HAL_UART_Transmit(iap_uart, &tmp, 1, NAK_TIMEOUT); + result = COM_LIMIT; + } + /* erase user application area */ + FLASH_If_Erase(APPLICATION_ADDRESS); + *p_size = filesize; + + Serial_PutByte(ACK); + Serial_PutByte(CRC16); + } + /* File header packet is empty, end session */ + else + { + Serial_PutByte(ACK); + file_done = 1; + session_done = 1; + break; + } + } + else /* Data packet */ + { + ramsource = (uint32_t) & aPacketData[PACKET_DATA_INDEX]; + + /* Write received data in Flash */ + if (FLASH_If_Write(flashdestination, (uint32_t*) ramsource, packet_length/4) == FLASHIF_OK) + { + flashdestination += packet_length; + Serial_PutByte(ACK); + } + else /* An error occurred while writing to Flash memory */ + { + /* End session */ + Serial_PutByte(CA); + Serial_PutByte(CA); + result = COM_DATA; + } + } + packets_received ++; + session_begin = 1; + } + break; + } + break; + case HAL_BUSY: /* Abort actually */ + Serial_PutByte(CA); + Serial_PutByte(CA); + result = COM_ABORT; + break; + default: + if (session_begin > 0) + { + errors ++; + } + if (errors > MAX_ERRORS) + { + /* Abort communication */ + Serial_PutByte(CA); + Serial_PutByte(CA); + } + else + { + Serial_PutByte(CRC16); /* Ask for a packet */ + } + break; + } + } + } + return result; +} + +/** + * @brief Transmit a file using the ymodem protocol + * @param p_buf: Address of the first byte + * @param p_file_name: Name of the file sent + * @param file_size: Size of the transmission + * @retval COM_StatusTypeDef result of the communication + */ +COM_StatusTypeDef Ymodem_Transmit (uint8_t *p_buf, const uint8_t *p_file_name, uint32_t file_size) +{ + uint32_t errors = 0, ack_recpt = 0, size = 0, pkt_size; + uint8_t *p_buf_int; + COM_StatusTypeDef result = COM_OK; + uint32_t blk_number = 1; + uint8_t a_rx_ctrl[2]; + uint8_t i; +#ifdef CRC16_F + uint32_t temp_crc; +#else /* CRC16_F */ + uint8_t temp_chksum; +#endif /* CRC16_F */ + + /* Prepare first block - header */ + PrepareIntialPacket(aPacketData, p_file_name, file_size); + + while (( !ack_recpt ) && ( result == COM_OK )) + { + /* Send Packet */ + HAL_UART_Transmit(iap_uart, &aPacketData[PACKET_START_INDEX], PACKET_SIZE + PACKET_HEADER_SIZE, NAK_TIMEOUT); + + /* Send CRC or Check Sum based on CRC16_F */ +#ifdef CRC16_F + temp_crc = HAL_CRC_Calculate(&hcrc, (uint32_t*)&aPacketData[PACKET_DATA_INDEX], PACKET_SIZE); + Serial_PutByte(temp_crc >> 8); + Serial_PutByte(temp_crc & 0xFF); +#else /* CRC16_F */ + temp_chksum = CalcChecksum (&aPacketData[PACKET_DATA_INDEX], PACKET_SIZE); + Serial_PutByte(temp_chksum); +#endif /* CRC16_F */ + + /* Wait for Ack and 'C' */ + if (HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) + { + if (a_rx_ctrl[0] == ACK) + { + ack_recpt = 1; + } + else if (a_rx_ctrl[0] == CA) + { + if ((HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) && (a_rx_ctrl[0] == CA)) + { + HAL_Delay( 2 ); + __HAL_UART_FLUSH_DRREGISTER(iap_uart); + result = COM_ABORT; + } + } + } + else + { + errors++; + } + if (errors >= MAX_ERRORS) + { + result = COM_ERROR; + } + } + + p_buf_int = p_buf; + size = file_size; + + /* Here 1024 bytes length is used to send the packets */ + while ((size) && (result == COM_OK )) + { + /* Prepare next packet */ + PreparePacket(p_buf_int, aPacketData, blk_number, size); + ack_recpt = 0; + a_rx_ctrl[0] = 0; + errors = 0; + + /* Resend packet if NAK for few times else end of communication */ + while (( !ack_recpt ) && ( result == COM_OK )) + { + /* Send next packet */ + if (size >= PACKET_1K_SIZE) + { + pkt_size = PACKET_1K_SIZE; + } + else + { + pkt_size = PACKET_SIZE; + } + + HAL_UART_Transmit(iap_uart, &aPacketData[PACKET_START_INDEX], pkt_size + PACKET_HEADER_SIZE, NAK_TIMEOUT); + + /* Send CRC or Check Sum based on CRC16_F */ +#ifdef CRC16_F + temp_crc = HAL_CRC_Calculate(&hcrc, (uint32_t*)&aPacketData[PACKET_DATA_INDEX], pkt_size); + Serial_PutByte(temp_crc >> 8); + Serial_PutByte(temp_crc & 0xFF); +#else /* CRC16_F */ + temp_chksum = CalcChecksum (&aPacketData[PACKET_DATA_INDEX], pkt_size); + Serial_PutByte(temp_chksum); +#endif /* CRC16_F */ + + /* Wait for Ack */ + if ((HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) && (a_rx_ctrl[0] == ACK)) + { + ack_recpt = 1; + if (size > pkt_size) + { + p_buf_int += pkt_size; + size -= pkt_size; + if (blk_number == (USER_FLASH_SIZE / PACKET_1K_SIZE)) + { + result = COM_LIMIT; /* boundary error */ + } + else + { + blk_number++; + } + } + else + { + p_buf_int += pkt_size; + size = 0; + } + } + else + { + errors++; + } + + /* Resend packet if NAK for a count of 10 else end of communication */ + if (errors >= MAX_ERRORS) + { + result = COM_ERROR; + } + } + } + + /* Sending End Of Transmission char */ + ack_recpt = 0; + a_rx_ctrl[0] = 0x00; + errors = 0; + while (( !ack_recpt ) && ( result == COM_OK )) + { + Serial_PutByte(EOT); + + /* Wait for Ack */ + if (HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) + { + if (a_rx_ctrl[0] == ACK) + { + ack_recpt = 1; + } + else if (a_rx_ctrl[0] == CA) + { + if ((HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) && (a_rx_ctrl[0] == CA)) + { + HAL_Delay( 2 ); + __HAL_UART_FLUSH_DRREGISTER(iap_uart); + result = COM_ABORT; + } + } + } + else + { + errors++; + } + + if (errors >= MAX_ERRORS) + { + result = COM_ERROR; + } + } + + /* Empty packet sent - some terminal emulators need this to close session */ + if ( result == COM_OK ) + { + /* Preparing an empty packet */ + aPacketData[PACKET_START_INDEX] = SOH; + aPacketData[PACKET_NUMBER_INDEX] = 0; + aPacketData[PACKET_CNUMBER_INDEX] = 0xFF; + for (i = PACKET_DATA_INDEX; i < (PACKET_SIZE + PACKET_DATA_INDEX); i++) + { + aPacketData [i] = 0x00; + } + + /* Send Packet */ + HAL_UART_Transmit(iap_uart, &aPacketData[PACKET_START_INDEX], PACKET_SIZE + PACKET_HEADER_SIZE, NAK_TIMEOUT); + + /* Send CRC or Check Sum based on CRC16_F */ +#ifdef CRC16_F + temp_crc = HAL_CRC_Calculate(&hcrc, (uint32_t*)&aPacketData[PACKET_DATA_INDEX], PACKET_SIZE); + Serial_PutByte(temp_crc >> 8); + Serial_PutByte(temp_crc & 0xFF); +#else /* CRC16_F */ + temp_chksum = CalcChecksum (&aPacketData[PACKET_DATA_INDEX], PACKET_SIZE); + Serial_PutByte(temp_chksum); +#endif /* CRC16_F */ + + /* Wait for Ack and 'C' */ + if (HAL_UART_Receive(iap_uart, &a_rx_ctrl[0], 1, NAK_TIMEOUT) == HAL_OK) + { + if (a_rx_ctrl[0] == CA) + { + HAL_Delay( 2 ); + __HAL_UART_FLUSH_DRREGISTER(iap_uart); + result = COM_ABORT; + } + } + } + + return result; /* file transmitted successfully */ +} + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvoptx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvoptx index 6a1bd3c4..6c84d7a4 100644 --- a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvoptx +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvoptx @@ -287,7 +287,7 @@ Application/User - 1 + 0 0 0 0 @@ -851,6 +851,18 @@ 0 0 + + 6 + 46 + 1 + 0 + 0 + 0 + ..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash_kv.c + onchip_flash_kv.c + 0 + 0 + @@ -861,7 +873,7 @@ 0 7 - 46 + 47 1 0 0 @@ -873,7 +885,7 @@ 7 - 47 + 48 1 0 0 @@ -885,7 +897,7 @@ 7 - 48 + 49 1 0 0 @@ -897,7 +909,7 @@ 7 - 49 + 50 1 0 0 @@ -909,7 +921,7 @@ 7 - 50 + 51 1 0 0 @@ -921,7 +933,7 @@ 7 - 51 + 52 1 0 0 @@ -933,7 +945,7 @@ 7 - 52 + 53 1 0 0 @@ -945,7 +957,7 @@ 7 - 53 + 54 1 0 0 @@ -957,7 +969,7 @@ 7 - 54 + 55 1 0 0 @@ -969,7 +981,7 @@ 7 - 55 + 56 1 0 0 @@ -981,7 +993,7 @@ 7 - 56 + 57 1 0 0 @@ -993,7 +1005,7 @@ 7 - 57 + 58 1 0 0 @@ -1005,7 +1017,7 @@ 7 - 58 + 59 1 0 0 @@ -1017,7 +1029,7 @@ 7 - 59 + 60 1 0 0 @@ -1029,7 +1041,7 @@ 7 - 60 + 61 1 0 0 @@ -1041,7 +1053,7 @@ 7 - 61 + 62 1 0 0 @@ -1053,7 +1065,7 @@ 7 - 62 + 63 1 0 0 @@ -1065,7 +1077,7 @@ 7 - 63 + 64 1 0 0 @@ -1077,7 +1089,7 @@ 7 - 64 + 65 1 0 0 @@ -1089,7 +1101,7 @@ 7 - 65 + 66 1 0 0 @@ -1101,7 +1113,7 @@ 7 - 66 + 67 1 0 0 @@ -1113,7 +1125,7 @@ 7 - 67 + 68 1 0 0 @@ -1125,7 +1137,7 @@ 7 - 68 + 69 1 0 0 @@ -1137,7 +1149,7 @@ 7 - 69 + 70 1 0 0 @@ -1157,7 +1169,7 @@ 0 8 - 70 + 71 2 0 0 @@ -1169,7 +1181,7 @@ 8 - 71 + 72 1 0 0 @@ -1181,7 +1193,7 @@ 8 - 72 + 73 1 0 0 @@ -1201,7 +1213,7 @@ 0 9 - 73 + 74 1 0 0 @@ -1221,7 +1233,7 @@ 0 10 - 74 + 75 5 0 0 @@ -1241,7 +1253,7 @@ 0 11 - 75 + 76 1 0 0 diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvprojx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvprojx index cc77d63e..88f2e7fd 100644 --- a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvprojx +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/kv/TencentOS_tiny.uvprojx @@ -16,7 +16,7 @@ STM32L431RCTx STMicroelectronics - Keil.STM32L4xx_DFP.2.2.0 + Keil.STM32L4xx_DFP.2.0.0 http://www.keil.com/pack IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") @@ -632,6 +632,11 @@ 1 ..\..\BSP\Hardware\QSPI_FLASH\qspi_flash_kv.c + + onchip_flash_kv.c + 1 + ..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash_kv.c + diff --git a/components/fs/kv/tos_kv.c b/components/fs/kv/tos_kv.c index f259c24b..682af76b 100644 --- a/components/fs/kv/tos_kv.c +++ b/components/fs/kv/tos_kv.c @@ -25,12 +25,12 @@ __STATIC__ uint8_t kv_checksum_crc8(uint8_t *buf, int nbyte) uint8_t crc = 0; #define POLY 0x31 -#define BIT_PER_BYTE 8 +#define WIDTH 8 #define TOP_BIT 0x80 while (nbyte--) { crc ^= *buf++; - for (i = 0; i < BIT_PER_BYTE; ++i) { + for (i = 0; i < WIDTH; ++i) { if (crc & TOP_BIT) { crc = (crc << 1) ^ POLY; } else { diff --git a/devices/esp8266/esp8266.c b/devices/esp8266/esp8266.c index 6d986320..bfbc1c4e 100644 --- a/devices/esp8266/esp8266.c +++ b/devices/esp8266/esp8266.c @@ -389,12 +389,11 @@ static int esp8266_init(void) return 0; } -__STATIC__ uint8_t incoming_data_buffer[512]; - __STATIC__ void esp8266_incoming_data_process(void) { uint8_t data; - int channel_id = 0, data_len = 0; + int channel_id = 0, data_len = 0, read_len; + static uint8_t buffer[128]; /* +IPD,0,44:1234... @@ -426,15 +425,19 @@ __STATIC__ void esp8266_incoming_data_process(void) data_len = data_len * 10 + (data - '0'); } - if (data_len > sizeof(incoming_data_buffer)) { - data_len = sizeof(incoming_data_buffer); - } + do { +#define MIN(a, b) ((a) < (b) ? (a) : (b)) + read_len = MIN(data_len, sizeof(buffer)); + if (tos_at_uart_read(buffer, read_len) != read_len) { + return; + } - if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) { - return; - } + if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) { + return; + } - tos_at_channel_write(channel_id, incoming_data_buffer, data_len); + data_len -= read_len; + } while (data_len > 0); } at_event_t esp8266_at_event[] = { diff --git a/devices/sim7600ce/sim7600ce.c b/devices/sim7600ce/sim7600ce.c index efe1c6a2..36ce1089 100644 --- a/devices/sim7600ce/sim7600ce.c +++ b/devices/sim7600ce/sim7600ce.c @@ -141,7 +141,7 @@ static int sim7600ce_net_open(void) static int sim7600ce_init(void) { printf("Init sim7600ce ...\n" ); - + if (sim7600ce_echo_close() != 0) { printf("echo close failed\n"); return -1; @@ -150,7 +150,7 @@ static int sim7600ce_init(void) printf("apn set FAILED\n"); return -1; } - + if (sim7600ce_signal_quality_check() != 0) { printf("signal quality check status failed\n"); return -1; @@ -174,13 +174,13 @@ static int sim7600ce_init(void) if (sim7600ce_csocksetpn() != 0) { printf("sim7600ce_net_open FAILED\n"); return -1; - } - + } + if (sim7600ce_send_mode_set(SAL_SEND_MODE_NORMAL) != 0) { printf("send mode set FAILED\n"); return -1; - } - + } + if (sim7600ce_net_open() != 0) { printf("sim7600ce_net_open FAILED\n"); return -1; @@ -310,13 +310,12 @@ static int sim7600ce_parse_domain(const char *host_name, char *host_ip, size_t h return 0; } -__STATIC__ uint8_t incoming_data_buffer[512]; - __STATIC__ void sim7600ce_incoming_data_process(void) { uint8_t data; uint8_t str[2]; - int channel_id = 0, data_len = 0; + int channel_id = 0, data_len = 0, read_len; + static uint8_t buffer[128]; /* +RECEIVE,0,44:1234... @@ -347,15 +346,19 @@ __STATIC__ void sim7600ce_incoming_data_process(void) data_len = data_len * 10 + (data - '0'); } - if (data_len > sizeof(incoming_data_buffer)) { - data_len = sizeof(incoming_data_buffer); - } + do { +#define MIN(a, b) ((a) < (b) ? (a) : (b)) + read_len = MIN(data_len, sizeof(buffer)); + if (tos_at_uart_read(buffer, read_len) != read_len) { + return; + } - if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) { - return; - } + if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) { + return; + } - tos_at_channel_write(channel_id, incoming_data_buffer, data_len); + data_len -= read_len; + } while (data_len > 0); } at_event_t sim7600ce_at_event[] = { diff --git a/devices/sim800a/sim800a.c b/devices/sim800a/sim800a.c index 86e17ce4..cb288873 100644 --- a/devices/sim800a/sim800a.c +++ b/devices/sim800a/sim800a.c @@ -255,12 +255,11 @@ static int sim800a_parse_domain(const char *host_name, char *host_ip, size_t hos return 0; } -__STATIC__ uint8_t incoming_data_buffer[512]; - __STATIC__ void sim800a_incoming_data_process(void) { uint8_t data; - int channel_id = 0, data_len = 0; + int channel_id = 0, data_len = 0, read_len; + static uint8_t buffer[128]; /* +IPD,0,44:1234... @@ -291,15 +290,19 @@ __STATIC__ void sim800a_incoming_data_process(void) data_len = data_len * 10 + (data - '0'); } - if (data_len > sizeof(incoming_data_buffer)) { - data_len = sizeof(incoming_data_buffer); - } + do { +#define MIN(a, b) ((a) < (b) ? (a) : (b)) + read_len = MIN(data_len, sizeof(buffer)); + if (tos_at_uart_read(buffer, read_len) != read_len) { + return; + } - if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) { - return; - } + if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) { + return; + } - tos_at_channel_write(channel_id, incoming_data_buffer, data_len); + data_len -= read_len; + } while (data_len > 0); } at_event_t sim800a_at_event[] = { diff --git a/doc/20.In_Application_Programming_based_EVB_MX_Plus.md b/doc/20.In_Application_Programming_based_EVB_MX_Plus.md new file mode 100644 index 00000000..29b41731 --- /dev/null +++ b/doc/20.In_Application_Programming_based_EVB_MX_Plus.md @@ -0,0 +1,146 @@ +# 基于TencentOS tiny官方EVB MX+开发板的IAP + +## 1. 什么是IAP + +以下内容引自正点原子《STM32F429开发指南-HAL库版本_v1.1》第五十七章，如侵权请联系删除。 + +> ​ IAP（ In Application Programming）即在应用编程， IAP 是用户自己的程序在运行过程中对User Flash 的部分区域进行烧写，目的是为了在产品发布后可以方便地通过预留的通信口对产品中的固件程序进行更新升级。 通常实现 IAP 功能时，即用户程序运行中作自身的更新操作，需要在设计固件程序时编写两个项目代码，第一个项目程序不执行正常的功能操作，而只是通过某种通信方式(如 USB、 USART)接收程序或数据，执行对第二部分代码的更新；第二个项目代码才是真正的功能代码。这两部分项目代码都同时烧录在 User Flash 中，当芯片上电后，首先是第一个项目代码开始运行，它作如下操作： +> ​ 1）检查是否需要对第二部分代码进行更新 +> ​ 2）如果不需要更新则转到 4） +> ​ 3）执行更新操作 +> ​ 4）跳转到第二部分代码执行 +> ​ 第一部分代码必须通过其它手段，如 JTAG 或 ISP 烧入；第二部分代码可以使用第一部分代码 IAP 功能烧入，也可以和第一部分代码一起烧入，以后需要程序更新时再通过第一部分 IAP代码更新。 +> +> ​ 我们将第一个项目代码称之为 Bootloader 程序，第二个项目代码称之为 APP 程序，他们存放在 STM32F429 FLASH 的不同地址范围，一般从最低地址区开始存放 Bootloader，紧跟其后的就是 APP 程序。 + + + +## 2. TencentOS tiny的IAP程序 + +### 2.1 BootLoader程序 + +​ 如第一章所言，一个IAP例程一般由BootLoader及APP两部分构成，其中BootLoader起引导板子启动并提供APP下载烧录选项。 + +​ 基于TencentOS tiny官方EVB MX+开发板，提供了官方IAP BootLoader程序，对应的keil工程位于： + +``` +board\TencentOS_tiny_EVB_MX_Plus\KEIL\iap\bootloader +``` + +​ 与正常的应用程序编译烧写流程一致，双击打开keil工程后，将BootLoader烧写进开发板。 + +​ 按下复位键后，BootLoader会直接进入加载并运行APP的流程。 + +​ 这里为了演示IAP流程，让BootLoader进入APP升级模式，具体的做法是按住板上F2按键的同时，再按下复位键： + +![EVB_MX](image\IAP\EVB_MX.png) + + + +​ 将microUSB（板上USART2）接到电脑上，打开串口调试助手，并将波特率选为115200，可以看到BootLoader的菜单： + +![bootloader_usart_output](image\IAP\bootloader_usart_output.png) + +​ BootLoader的四个菜单选项分别是： + +1. 通过串口ymodem协议下载APP镜像到板子内部FLASH + +2. 通过串口ymodem协议上传板子内部FLASH上的APP镜像 +3. 执行APP +4. 使能内部FLASH写保护 + +## 2.2 APP程序 + +​ 基于TencentOS tiny官方EVB MX+开发板，提供了官方示例APP程序，由hello world示例修改而来，对应的keil工程位于： + +``` +board\TencentOS_tiny_EVB_MX_Plus\KEIL\iap\application +``` + +​ 因为IAP中的APP是由BootLoader来跳转执行的，BootLoader只能跳转执行bin格式的APP程序，因此需要添加将APP程序转成bin格式的流程： + +### ![application_after_build](image\IAP\application_after_build.png) + +​ 同时，要确保system_stm32l4xx.c中的VECT_TAB_OFFSET宏被定义成0x8000： + +``` +#define VECT_TAB_OFFSET 0x8000 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +``` + +​ 编译application程序，在board\TencentOS_tiny_EVB_MX_Plus\KEIL\iap\application目录下会生成TencentOS_tiny.bin，这个就是在IAP升级中要传输并烧录进开发板的APP镜像。 + +## 3. IAP APP升级演示 + +### 3.1 基于xshell与普通串口的APP升级 + +​ 因为APP传输到开发板上是通过ymodem协议，普通的串口调试工具没有集成ymodem协议，这里通过xshell来演示APP的ymodem协议。实际上，通过SecureCRT等其他集成有ymodem及串口协议的终端皆可。 + +​ 用xshell连接到开发板串口上，并按住开发板F2键同时复位开发板进入BootLoader升级模式，在BootLoader菜单提示下，xshell中输入“1”进入APP下载及升级模式。 + +​ 此时开发板会进入等待串口通过ymodem发送APP的状态。在xshell的文件——传输——YMODEM(Y)——用YMODEM发送(S)： + +![ymodem_bin_send](image\IAP\ymodem_bin_send.png) + +​ 在弹出的对话框中，选择2.2节中编译生成的bin格式的APP： + +``` +board\TencentOS_tiny_EVB_MX_Plus\KEIL\iap\application\TencentOS_tiny.bin +``` + +​ ![ymodem_done](image\IAP\ymodem_done.png) + +​ 开发板接收完毕后会将接收到的APP bin写入内部FLASH，写入完成后会打印提示： + +![image_write_done](D:\TOS\TencentOS-tiny\doc\image\IAP\image_write_done.png) + +​ 此时BootLoader会再次进入菜单模式，在菜单模式下输入3即可执行刚刚写入的APP bin： + +![application_run](image\IAP\application_run.png) + +### 3.2 基于小程序与BLE透传串口的APP升级 + +​ 除了3.1节的传统串口升级，TencentOS tiny官方另外提供了基于BLE透传串口的IAP APP升级配套小程序。 + +​ 这里基于HC-08蓝牙透传模块讲解如何使用小程序进行IAP APP升级。 + +​ 我假设你的HC-08（或其他相似的蓝牙透传串口）波特率为115200，如果不是，可以通过查阅相关产品资料手册将波特率修改为115200；或者改动BootLoader及application中USART2的波特率为你的模块的波特率。 + +​ HC-08与开发板的接线参考下图： + +![hc08](image\IAP\hc08.jpg) + +| HC-08 | EVB MX+ | +| ----- | ------- | +| RXD | U2_TX | +| TXD | U2_RX | +| GND | GND | +| VCC | V5.0 | + +​ 打开tools\Mini_Program\iap目录中的小程序，用微信扫码开始使用小程序： + +1. 打开手机蓝牙 + +2. 搜索连接HC-08的蓝牙广播 + + ![1](image\IAP\mini_program\1.jpg) + +3. 按住F2复位开发板可以在小程序中的串口输出中收到开发板的BootLoader菜单 + + ![2](image\IAP\mini_program\2.jpg) + +4. 在固件升级中，点击菜单选项“1”，再点击"选择固件"，通过文件传输助手选择TencentOS_tiny.bin + +![3](D:\TOS\TencentOS-tiny\doc\image\IAP\mini_program\3.jpg) + +5. 点击“上传固件”，等待APP传输并烧写完毕： + + ![4](image\IAP\mini_program\4.jpg) + +6. 等待镜像传输并烧写完毕后，在BootLoader的菜单选项下，点击菜单选项“4”执行刚才烧录的APP： + + ![5](image\IAP\mini_program\5.jpg) + + + +![6](image\IAP\mini_program\6.jpg) \ No newline at end of file diff --git a/doc/image/IAP/EVB_MX.png b/doc/image/IAP/EVB_MX.png new file mode 100644 index 00000000..1c231bb0 Binary files /dev/null and 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b/doc/image/IAP/mini_program/5.jpg differ diff --git a/doc/image/IAP/mini_program/6.jpg b/doc/image/IAP/mini_program/6.jpg new file mode 100644 index 00000000..82b4f4ab Binary files /dev/null and b/doc/image/IAP/mini_program/6.jpg differ diff --git a/doc/image/IAP/ymodem_bin_send.png b/doc/image/IAP/ymodem_bin_send.png new file mode 100644 index 00000000..6b0d3e7f Binary files /dev/null and b/doc/image/IAP/ymodem_bin_send.png differ diff --git a/doc/image/IAP/ymodem_done.png b/doc/image/IAP/ymodem_done.png new file mode 100644 index 00000000..83937f7b Binary files /dev/null and b/doc/image/IAP/ymodem_done.png differ diff --git a/examples/iap/readme.md b/examples/iap/readme.md new file mode 100644 index 00000000..6d795e0d --- /dev/null +++ b/examples/iap/readme.md @@ -0,0 +1 @@ +请阅读 doc/20.In_Application_Programming_based_EVB_MX_Plus.md \ No newline at end of file diff --git a/kernel/core/include/tos_mmheap.h b/kernel/core/include/tos_mmheap.h index 2faa605a..76de1725 100644 --- a/kernel/core/include/tos_mmheap.h +++ b/kernel/core/include/tos_mmheap.h @@ -262,6 +262,13 @@ __KNL__ k_err_t mmheap_init(void); __KNL__ k_err_t mmheap_init_with_pool(void *pool_start, size_t pool_size); +#else /* if mmheap is not enabled, use libc instead */ + +#define tos_mmheap_alloc malloc +#define tos_mmheap_calloc calloc +#define tos_mmheap_realloc realloc +#define tos_mmheap_free free + #endif __CDECLS_END