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add at device ml302 && ml302 test demo && modify bearpi bsp bug

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This commit is contained in:
morixinguan
2021-03-23 15:15:12 +08:00
parent 04f980f0c3
commit 620bdd623b
18 changed files with 3300 additions and 2126 deletions
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2
board/BearPi_STM32L431RC/BSP/Hardware/BH1750/BH1750.c
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@@ -40,7 +40,7 @@ void BH1750_Start(void)
* <20><> <20><>: <20><>
* <20><> <20><> ֵ: <20><>ǿֵ
***************************************************************/
float BH1750_Convert(void)
__weak float BH1750_Convert(void)
{
BH1750_Start();
HAL_Delay(180);

2
board/BearPi_STM32L431RC/BSP/Hardware/BH1750/bh1750.h
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@@ -30,7 +30,7 @@ typedef struct
void BH1750_Init(void); //IO<49><4F>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
void BH1750_Start(void); //<2F>ϵ磬<CFB5><E7A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD>
//void BH1750_Read(void); //<2F><><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡ<EFBFBD>ڲ<EFBFBD><DAB2>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
float BH1750_Convert(void);
__weak float BH1750_Convert(void);
#endif

97
board/BearPi_STM32L431RC/KEIL/hello_world/DebugConfig/TencentOS_tiny_STM32L431RCTx.dbgconf
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@@ -1,97 +0,0 @@
// File: STM32L43x_44x_45x_46x.dbgconf
// Version: 1.0.0
// Note: refer to STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference manual (RM0394)
// refer to STM32L431xx, STM32L432xx, STM32L433xx, STM32L442xx, STM32L443xx, STM32L451xx, STM32L452xx, STM32L462xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o0.2> DBG_STANDBY
// <i> Debug Standby mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.1> DBG_STOP
// <i> Debug Stop mode
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
// <o0.0> DBG_SLEEP
// <i> Debug Sleep mode
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
// <o0.31> DBG_LPTIM1_STOP
// <i> LPTIM1 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
// <o0.25> DBG_CAN_STOP
// <i> bxCAN1 stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The bxCAN1 receive registers are frozen
// <o0.23> DBG_I2C3_STOP
// <i> I2C3 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C3 SMBus timeout is frozen
// <o0.22> DBG_I2C2_STOP
// <i> I2C2 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C2 SMBus timeout is frozen
// <o0.21> DBG_I2C1_STOP
// <i> I2C1 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C1 SMBus timeout is frozen
// <o0.12> DBG_IWDG_STOP
// <i> Independent watchdog counter stopped when core is halted
// <i> 0: The independent watchdog counter clock continues even if the core is halted
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
// <o0.11> DBG_WWDG_STOP
// <i> Window watchdog counter stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_RTC_STOP
// <i> RTC counter stopped when core is halted
// <i> 0: The clock of the RTC counter is fed even if the core is halted
// <i> 1: The clock of the RTC counter is stopped when the core is halted
// <o0.5> DBG_TIM7_STOP
// <i> TIM7 counter stopped when core is halted
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
// <o0.4> DBG_TIM6_STOP
// <i> TIM6 counter stopped when core is halted
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
// <o0.0> DBG_TIM2_STOP
// <i> TIM2 counter stopped when core is halted
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz1 = 0x00000000;
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
// <o0.5> DBG_LPTIM2_STOP
// <i> LPTIM2 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz2 = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
// <o0.17> DBG_TIM16_STOP
// <i> TIM16 counter stopped when core is halted
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
// <o0.16> DBG_TIM15_STOP
// <i> TIM15 counter stopped when core is halted
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
// <o0.11> DBG_TIM1_STOP
// <i> TIM1 counter stopped when core is halted
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// </h>
// <<< end of configuration section >>>

20
board/BearPi_STM32L431RC/KEIL/hello_world/RTE/_TencentOS_tiny/RTE_Components.h
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@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'BearPi_STM32L31RC'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

16
board/BearPi_STM32L431RC/KEIL/hello_world/obj/TencentOS_tiny.sct
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@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00040000 { ; load region size_region
ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
}

1268
board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvoptx Normal file
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File diff suppressed because it is too large Load Diff

837
board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/BearPi_STM32L31RC.uvprojx Normal file
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@@ -0,0 +1,837 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>TencentOS_tiny</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060960::V5.06 update 7 (build 960)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32L431RCTx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32L4xx_DFP.2.1.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\obj\</OutputDirectory>
<OutputName>TencentOS_tiny</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\list\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments>-MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4107</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x10000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x40000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER</Define>
<Undefine></Undefine>
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\LCD_ST7789;..\..\BSP\Hardware\BH1750;..\..\..\..\net\at\include;..\..\..\..\net\sal_module_wrapper;..\..\..\..\kernel\hal\include;..\..\..\..\devices\ml302</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Application/MDK-ARM</GroupName>
<Files>
<File>
<FileName>startup_stm32l431xx.s</FileName>
<FileType>2</FileType>
<FilePath>startup_stm32l431xx.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Application/User</GroupName>
<Files>
<File>
<FileName>gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\gpio.c</FilePath>
</File>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\main.c</FilePath>
</File>
<File>
<FileName>mcu_init.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_msp.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
</File>
<File>
<FileName>usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\usart.c</FilePath>
</File>
<File>
<FileName>adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\adc.c</FilePath>
</File>
<File>
<FileName>i2c.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\i2c.c</FilePath>
</File>
<File>
<FileName>spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\spi.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_it_module.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\stm32l4xx_it_module.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>examples</GroupName>
<Files>
<File>
<FileName>tcp_through_module.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\examples\tcp_through_ml302_4g_cat_1_module\tcp_through_module.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
<Files>
<File>
<FileName>stm32l4xx_hal_tim.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_tim_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_uart_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_i2c_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_rcc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_rcc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_flash.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_flash_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dma.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_pwr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_cortex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dac.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/CMSIS</GroupName>
<Files>
<File>
<FileName>system_stm32l4xx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Hardware</GroupName>
<Files>
<File>
<FileName>BH1750.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\BH1750\BH1750.c</FilePath>
</File>
<File>
<FileName>lcd_spi2_drv.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\LCD_ST7789\lcd_spi2_drv.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>kernel</GroupName>
<Files>
<File>
<FileName>tos_mmblk.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
</File>
<File>
<FileName>tos_mmheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
</File>
<File>
<FileName>tos_mutex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mutex.c</FilePath>
</File>
<File>
<FileName>tos_sched.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_sched.c</FilePath>
</File>
<File>
<FileName>tos_sem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_sem.c</FilePath>
</File>
<File>
<FileName>tos_sys.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_sys.c</FilePath>
</File>
<File>
<FileName>tos_task.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_task.c</FilePath>
</File>
<File>
<FileName>tos_tick.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_tick.c</FilePath>
</File>
<File>
<FileName>tos_time.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_time.c</FilePath>
</File>
<File>
<FileName>tos_timer.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
</File>
<File>
<FileName>tos_event.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
</File>
<File>
<FileName>tos_global.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
</File>
<File>
<FileName>tos_pend.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
</File>
<File>
<FileName>tos_robin.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_robin.c</FilePath>
</File>
<File>
<FileName>tos_binary_heap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
</File>
<File>
<FileName>tos_char_fifo.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
</File>
<File>
<FileName>tos_completion.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
</File>
<File>
<FileName>tos_countdownlatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
</File>
<File>
<FileName>tos_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_mail_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_message_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
</File>
<File>
<FileName>tos_priority_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
</File>
<File>
<FileName>tos_ring_queue.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
<File>
<FileName>tos_stopwatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_stopwatch.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cpu</GroupName>
<Files>
<File>
<FileName>port_s.S</FileName>
<FileType>2</FileType>
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
</File>
<File>
<FileName>tos_cpu.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
</File>
<File>
<FileName>port_c.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cmsis</GroupName>
<Files>
<File>
<FileName>cmsis_os.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>config</GroupName>
<Files>
<File>
<FileName>tos_config.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>hal</GroupName>
<Files>
<File>
<FileName>tos_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>at</GroupName>
<Files>
<File>
<FileName>tos_at.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\net\at\src\tos_at.c</FilePath>
</File>
<File>
<FileName>sal_module_wrapper.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>device</GroupName>
<Files>
<File>
<FileName>ml302.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\devices\ml302\ml302.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="TencentOS_tiny"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>BearPi_STM32L31RC</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

404
board/BearPi_STM32L431RC/KEIL/tcp_through_ml302_4g_cat_1_module/startup_stm32l431xx.s Normal file
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@@ -0,0 +1,404 @@
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
;* File Name : startup_stm32l431xx.s
;* Author : MCD Application Team
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;*
;* Redistribution and use in source and binary forms, with or without modification,
;* are permitted provided that the following conditions are met:
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
;* may be used to endorse or promote products derived from this software
;* without specific prior written permission.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;*
;*******************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x100
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x100
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_IRQHandler ; ADC1
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SDMMC1_IRQHandler ; SDMMC1
DCD 0 ; Reserved
DCD SPI3_IRQHandler ; SPI3
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD COMP_IRQHandler ; COMP Interrupt
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
DCD 0 ; Reserved
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
DCD LPUART1_IRQHandler ; LP UART1 interrupt
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
DCD 0 ; Reserved
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD RNG_IRQHandler ; RNG global interrupt
DCD FPU_IRQHandler ; FPU
DCD CRS_IRQHandler ; CRS interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_PVM_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT SDMMC1_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_IRQHandler [WEAK]
EXPORT DMA2_Channel5_IRQHandler [WEAK]
EXPORT COMP_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT DMA2_Channel6_IRQHandler [WEAK]
EXPORT DMA2_Channel7_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT QUADSPI_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT SAI1_IRQHandler [WEAK]
EXPORT SWPMI1_IRQHandler [WEAK]
EXPORT TSC_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT CRS_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_PVM_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM15_IRQHandler
TIM1_UP_TIM16_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
SDMMC1_IRQHandler
SPI3_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_IRQHandler
DMA2_Channel5_IRQHandler
COMP_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
DMA2_Channel6_IRQHandler
DMA2_Channel7_IRQHandler
LPUART1_IRQHandler
QUADSPI_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
SAI1_IRQHandler
SWPMI1_IRQHandler
TSC_IRQHandler
RNG_IRQHandler
FPU_IRQHandler
CRS_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

40
board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvoptx
View File

@@ -10,7 +10,7 @@
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<tExt>*.txt; *.h; *.inc; *.md</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
@@ -1087,6 +1087,18 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>63</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\kernel\core\tos_stopwatch.c</PathWithFileName>
<FilenameWithoutPath>tos_stopwatch.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
@@ -1097,7 +1109,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>63</FileNumber>
<FileNumber>64</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1109,7 +1121,7 @@
</File>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>64</FileNumber>
<FileNumber>65</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1121,7 +1133,7 @@
</File>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>65</FileNumber>
<FileNumber>66</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1141,7 +1153,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>9</GroupNumber>
<FileNumber>66</FileNumber>
<FileNumber>67</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1161,7 +1173,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>10</GroupNumber>
<FileNumber>67</FileNumber>
<FileNumber>68</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1181,7 +1193,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>11</GroupNumber>
<FileNumber>68</FileNumber>
<FileNumber>69</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1201,7 +1213,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>12</GroupNumber>
<FileNumber>69</FileNumber>
<FileNumber>70</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -1211,18 +1223,6 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>12</GroupNumber>
<FileNumber>70</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\net\at\src\tos_at_utils.c</PathWithFileName>
<FilenameWithoutPath>tos_at_utils.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>12</GroupNumber>
<FileNumber>71</FileNumber>

26
board/BearPi_STM32L431RC/KEIL/tcp_through_module/BearPi_STM32L31RC.uvprojx
View File

@@ -10,13 +10,13 @@
<TargetName>TencentOS_tiny</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<pCCUsed>5060960::V5.06 update 7 (build 960)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32L431RCTx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
<PackID>Keil.STM32L4xx_DFP.2.1.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
@@ -185,6 +185,7 @@
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
@@ -351,7 +352,7 @@
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
@@ -722,6 +723,11 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
</File>
<File>
<FileName>tos_stopwatch.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\core\tos_stopwatch.c</FilePath>
</File>
</Files>
</Group>
<Group>
@@ -782,11 +788,6 @@
<FileType>1</FileType>
<FilePath>..\..\..\..\net\at\src\tos_at.c</FilePath>
</File>
<File>
<FileName>tos_at_utils.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\net\at\src\tos_at_utils.c</FilePath>
</File>
<File>
<FileName>sal_module_wrapper.c</FileName>
<FileType>1</FileType>
@@ -824,4 +825,13 @@
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>BearPi_STM32L31RC</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

1896
board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/BearPi_STM32L31RC.uvguix.Administrator
View File

File diff suppressed because one or more lines are too long

21
board/BearPi_STM32L431RC/KEIL/tencent_os_guilite_demo/RTE/_TencentOS_tiny/RTE_Components.h
View File

@@ -1,21 +0,0 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'BearPi_STM32L31RC'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

21
board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/RTE/_TencentOS_tiny/RTE_Components.h
View File

@@ -1,21 +0,0 @@
/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'BearPi_STM32L31RC'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

25
board/BearPi_STM32L431RC/KEIL/tencent_os_stemwin_demo/STemWin_Config/OS/GUI_X_TOS.c
View File

@@ -54,20 +54,13 @@ Purpose : This file provides emWin Interface with FreeRTOS
/* Includes ------------------------------------------------------------------*/
#include "GUI.h"
/* RT-Thread include files */
//#include "cmsis_os.h"
#include "tos_k.h"
/*********************************************************************
*
* Global data
*/
//static osMutexId osMutex;
//static osSemaphoreId osSemaphore;
/*<2A><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
static k_mutex_t osMutex ;
/*<2A><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ź<EFBFBD><C5BA><EFBFBD>*/
static k_sem_t osSemaphore ;
/*********************************************************************
*
@@ -82,13 +75,11 @@ and delay function. Default time unit (tick), normally is
int GUI_X_GetTime(void)
{
//return ((int) xTaskGetTickCount());
return (int)tos_systick_get();
}
void GUI_X_Delay(int ms)
{
//vTaskDelay( ms );
tos_sleep_ms(ms);
}
@@ -140,51 +131,35 @@ void GUI_X_ExecIdle(void) {
#include <stdio.h>
void GUI_X_InitOS(void)
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD><C5BA><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>*/
//osMutex = rt_mutex_create("osMutex", RT_IPC_FLAG_FIFO);
//RT_ASSERT(osMutex != RT_NULL);
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD><C5BA><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>*/
//osSemaphore = rt_sem_create("osSem", 0, RT_IPC_FLAG_FIFO);
//RT_ASSERT(osSemaphore != RT_NULL);
tos_mutex_create(&osMutex);
tos_sem_create(&osSemaphore,1);
}
void GUI_X_Unlock(void)
{
//osMutexRelease(osMutex);
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
tos_mutex_post(&osMutex);
}
void GUI_X_Lock(void)
{
//osMutexWait(osMutex , osWaitForever) ;
//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
tos_mutex_pend(&osMutex);
}
/* Get Task handle */
U32 GUI_X_GetTaskId(void)
{
//return ((U32) osThreadGetId());
/*<2A><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD>߳̾<DFB3><CCBE><EFBFBD>*/
return (U32) tos_task_curr_task_get();
}
void GUI_X_WaitEvent (void)
{
// osSemaphoreWait(osSemaphore , osWaitForever) ;
/*<2A><>ȡ<EFBFBD>ź<EFBFBD><C5BA><EFBFBD>*/
tos_sem_pend(&osSemaphore,TOS_TIME_FOREVER);
}
void GUI_X_SignalEvent (void)
{
//osMutexRelease(osSemaphore);
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ź<EFBFBD><C5BA><EFBFBD>*/
tos_sem_post(&osSemaphore);
}

36
devices/ml302/Makefile Normal file
View File

@@ -0,0 +1,36 @@
###################################################################
#automatic detection QTOP and LOCALDIR
CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
echo $$QTOP;\
else\
cd $(CUR_DIR); while /usr/bin/test ! -d qmk ; do \
dir=`cd ../;pwd`; \
if [ "$$dir" = "/" ] ; then \
echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
exit 1; \
fi ; \
cd $$dir; \
done ; \
pwd; \
fi)
QTOP ?= $(realpath ${TRYQTOP})
ifeq ($(QTOP),)
$(error Please run this in a tree)
endif
LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
####################################################################
TREE_LIB_ENABLE=0
lib=
subdirs=
CFGFLAGS += -I$(QTOP)/net/at/include
CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
include ${QTOP}/qmk/generic/Make.tpl

517
devices/ml302/ml302.c Normal file
View File

@@ -0,0 +1,517 @@
#include "tos_at.h"
#include "ml302.h"
#include "sal_module_wrapper.h"
#include "main.h"
#include <stdio.h>
#include <stdbool.h>
#include <ctype.h>
static int ml302_wait_ok(void)
{
int try = 0;
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
while (try++ < 10)
{
tos_at_cmd_exec(&echo, 1000, "AT\r\n");
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
}
return -1;
}
static int ml302_echo_close(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 1000, "ATE0\r\n");
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
return -1;
}
static int ml302_pin_ready(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, "+CPIN: READY");
tos_at_cmd_exec(&echo, 1000, "AT+CPIN?\r\n");
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
return -1;
}
static int ml302_gsm_network_check(void)
{
int stat;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CFUN?\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
str = strstr(echo.buffer, "+CFUN:");
if (!str)
{
return -1;
}
sscanf(str, "+CFUN:%d", &stat);
if (stat == 1)
{
return 0;
}
}
return -1;
}
static int ml302_signal_quality_check(void)
{
int rssi, ber;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
str = strstr(echo.buffer, "+CSQ:");
if (!str)
{
return -1;
}
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
if (rssi != 99)
{
return 0;
}
}
return -1;
}
static int ml302_set_gprs_apn(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CGDCONT=1,\"IP\",\"CMIOT\"\r\n");
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
return -1 ;
}
static int ml302_activate(void)
{
int n, stat;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 6000, "AT+CGACT=1,1\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
str = strstr(echo.buffer, "+CGACT:");
if (!str)
{
return -1;
}
sscanf(str, "+CGACT:%d,%d", &n, &stat);
if (stat == 1)
{
return 0;
}
}
return -1;
}
static int ml302_connect(const char *ip, const char *port, sal_proto_t proto)
{
int id;
at_echo_t echo;
char except_str[16];
id = tos_at_channel_alloc(ip, port);
if (id == -1)
{
return -1;
}
sprintf(except_str, "%d,CONNECT OK", id);
tos_at_echo_create(&echo, NULL, 0, except_str);
tos_at_cmd_exec_until(&echo, 6000, "AT+MIPOPEN=%d,\"%s\",\"%s\",%d\r\n",
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
if (echo.status != AT_ECHO_STATUS_EXPECT )
{
tos_at_channel_free(id);
return -1;
}
return id;
}
static int ml302_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
{
return tos_at_channel_read_timed(id, buf, len, timeout);
}
static int ml302_recv(int id, void *buf, size_t len)
{
return ml302_recv_timeout(id, buf, len, (uint32_t)4000);
}
int ml302_recvfrom_timeout(int id, void *buf, size_t len, uint32_t timeout)
{
return tos_at_channel_read_timed(id, buf, len, timeout);
}
int ml302_recvfrom(int id, void *buf, size_t len)
{
return ml302_recvfrom_timeout(id, buf, len, (uint32_t)4000);
}
int ml302_sendto(int id, char *ip, char *port, const void *buf, size_t len)
{
at_echo_t echo;
if (tos_at_global_lock_pend() != 0)
{
return -1;
}
tos_at_echo_create(&echo, NULL, 0, ">");
tos_at_cmd_exec_until(&echo, 1000, "AT+MIPSEND=%d,%d\r\n", id, len);
if (echo.status != AT_ECHO_STATUS_EXPECT)
{
tos_at_global_lock_post();
return -1;
}
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
if (echo.status != AT_ECHO_STATUS_EXPECT)
{
tos_at_global_lock_post();
return -1;
}
tos_at_global_lock_post();
return len;
}
int ml302_send(int id, const void *buf, size_t len)
{
at_echo_t echo;
if (tos_at_global_lock_pend() != 0)
{
return -1;
}
tos_at_echo_create(&echo, NULL, 0, ">");
tos_at_cmd_exec(&echo, 1000,
"AT+MIPSEND=%d,%d\r\n",
id, len);
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
{
tos_at_global_lock_post();
return -1;
}
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT)
{
tos_at_global_lock_post();
return -1;
}
tos_at_global_lock_post();
return 0 ;
}
static void ml302_transparent_mode_exit(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(NULL, 500, "+++");
}
static int ml302_close(int id)
{
at_echo_t echo;
ml302_transparent_mode_exit();
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 1000, "AT+MIPCLOSE=%d\r\n", id);
tos_at_channel_free(id);
return 0;
}
static int ml302_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
{
char *str;
at_echo_t echo;
char echo_buffer[64];
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 2000, "AT+MDNSGIP=\"%s\"\r\n", host_name);
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
/*
+MDNSGIP: 0,"www.baidu.com","39.156.66.14","39.156.66.18"
*/
int seg1, seg2, seg3, seg4;
str = strstr(echo.buffer, "+MDNSGIP: 0,");
if (!str)
{
return -1;
}
str += strlen("+MDNSGIP: 0,\"") + strlen(host_name) + 3;
sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
host_ip[host_ip_len - 1] = '\0';
printf("GOT IP: %s\n", host_ip);
return 0;
}
static int ml302_init(void)
{
printf("Init ML302 ...\n" );
if (ml302_wait_ok() != 0)
{
printf("ml302 start FAILED\n");
return -1;
}
if (ml302_echo_close() != 0)
{
printf("ml302 echo close FAILED\n");
return -1;
}
if (ml302_pin_ready() != 0)
{
printf("ml302 pin not ready\n");
return -1;
}
if(ml302_gsm_network_check() != 0)
{
printf("ml302 GSM network register status check fail\n");
return -1 ;
}
if (ml302_signal_quality_check() != 0)
{
printf("ml302 signal quality check status failed\n");
return -1;
}
if (ml302_set_gprs_apn() != 0)
{
printf("ml302 set gprs_apn failed\n");
return -1;
}
if (ml302_activate())
{
printf("ml302 activate FAILED\n");
return -1;
}
printf("Init ML302 Done\n" );
return 0;
}
__STATIC__ void ml302_incoming_data_process(void)
{
uint8_t data;
int channel_id = 0, data_len = 0, read_len;
uint8_t buffer[128];
/*
+MIPURC: "recv",<sockid>,<datalen>
<data content>
*/
while (1)
{
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
if (data == ',')
{
break;
}
channel_id = channel_id * 10 + (data - '0');
}
while (1)
{
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
if (data == '\r')
{
break;
}
data_len = data_len * 10 + (data - '0');
}
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
do
{
#define MIN(a, b) ((a) < (b) ? (a) : (b))
read_len = MIN(data_len, sizeof(buffer));
if (tos_at_uart_read(buffer, read_len) != read_len)
{
return;
}
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0)
{
return;
}
data_len -= read_len;
}
while (data_len > 0);
return;
}
at_event_t ml302_at_event[] =
{
{ "+MIPURC: \"recv\",", ml302_incoming_data_process },
};
sal_module_t sal_module_ml302 =
{
.init = ml302_init,
.connect = ml302_connect,
.send = ml302_send,
.recv = ml302_recv,
.recv_timeout = ml302_recv_timeout,
.sendto = ml302_sendto,
.recvfrom = ml302_recvfrom,
.recvfrom_timeout = ml302_recvfrom_timeout,
.close = ml302_close,
.parse_domain = ml302_parse_domain,
};
int ml302_sal_init(hal_uart_port_t uart_port)
{
if (tos_at_init(uart_port, ml302_at_event,
sizeof(ml302_at_event) / sizeof(ml302_at_event[0])) != 0)
{
return -1;
}
if (tos_sal_module_register(&sal_module_ml302) != 0)
{
return -1;
}
if (tos_sal_module_init() != 0)
{
return -1;
}
return 0;
}

25
devices/ml302/ml302.h Normal file
View File

@@ -0,0 +1,25 @@
/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef __ML302_H_
#define __ML302_H_
#include "tos_hal.h"
int ml302_sal_init(hal_uart_port_t uart_port);
#endif /* __ML302_H_ */

173
examples/tcp_through_ml302_4g_cat_1_module/tcp_through_module.c Normal file
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@@ -0,0 +1,173 @@
#include "mcu_init.h"
#include "sal_module_wrapper.h"
#include "cmsis_os.h"
#include "ml302.h"
#define ML302_RESET_Pin GPIO_PIN_14
#define ML302_RESET_GPIO_Port GPIOB
#define ML302_ENABLE_Pin GPIO_PIN_15
#define ML302_ENABLE_GPIO_Port GPIOA
float BH1750_Convert(void);
void MX_ML302_GPIO_Init(void);
static void ml302_power_on(void);
static void ml302_power_off(void);
static void ml302_hardware_reset(void);
int socket_id_0 = -1;
#define RECV_LEN 1024
uint8_t recv_data_0[RECV_LEN];
#define TCP_TEST_TASK0_STK_SIZE 4096
void tcp_test0(void);
osThreadDef(tcp_test0, osPriorityNormal, 1, TCP_TEST_TASK0_STK_SIZE);
#define ONENET_SERVER_IP "183.230.40.33"
#define ONENET_SERVER_PORT "80"
#define ONENET_DEVICE_ID "604618155"
#define ONENET_API_KEY "NGSRfMY43gLebqieuaX4UfPgoac="
#define http_uploader_head \
"POST /devices/%s/datapoints?type=3 HTTP/1.1\r\n" \
"api-key:%s\r\n" \
"Host:api.heclouds.com\r\n" \
"Content-Length:%d\r\n\r\n"
#define http_uploader_data \
"{\"lux\":%d}"
char buf[512] = {0};
char buf_data[120] = {0};
int OneNet_Packet_Send(const char *device_id, const char *api_key, int lux)
{
int len = 0 ;
int ret = -1 ;
sprintf(buf_data, http_uploader_data, lux);
len = strlen(buf_data);
sprintf(buf, http_uploader_head, device_id, api_key, len);
strcat(buf, buf_data);
memset(recv_data_0, 0, RECV_LEN);
/*1.<2E><><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD>*/
socket_id_0 = tos_sal_module_connect(ONENET_SERVER_IP, ONENET_SERVER_PORT, TOS_SAL_PROTO_TCP);
if (socket_id_0 < 0)
{
printf("<EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>===>id:%d\n", socket_id_0);
return -1;
}
/*2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>JSON<4F><4E>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>:\n");
printf("%s", buf);
ret = tos_sal_module_send(socket_id_0, buf, strlen(buf));
if(ret < 0)
{
printf("<EFBFBD><EFBFBD><EFBFBD>շ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD>!\n");
return -2;
}
/*3<><33><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
ret = tos_sal_module_recv_timeout(socket_id_0, recv_data_0, 203, 4000);
if (ret < 0)
{
printf("<EFBFBD><EFBFBD><EFBFBD>շ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD>!\n");
return -3 ;
}
printf("<EFBFBD>ѽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ķ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:\n%s\n", recv_data_0);
recv_data_0[ret] = 0;
/*4<><34><EFBFBD>ر<EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD>*/
tos_sal_module_close(socket_id_0);
return 0 ;
}
void tcp_test0(void)
{
float e53_sc1_lux = 0.0 ;
while (1)
{
e53_sc1_lux = BH1750_Convert();
OneNet_Packet_Send(ONENET_DEVICE_ID, ONENET_API_KEY, (int)e53_sc1_lux);
tos_sleep_ms(1000);
}
}
static void ml302_hardware_reset(void)
{
HAL_GPIO_WritePin(ML302_RESET_GPIO_Port, ML302_RESET_Pin, GPIO_PIN_RESET);
}
static void ml302_power_off(void)
{
HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_RESET);
}
static void ml302_power_on(void)
{
HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_SET);
}
void MX_ML302_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(ML302_RESET_GPIO_Port, ML302_RESET_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(ML302_ENABLE_GPIO_Port, ML302_ENABLE_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = ML302_RESET_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(ML302_RESET_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = ML302_ENABLE_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(ML302_ENABLE_GPIO_Port, &GPIO_InitStruct);
}
extern float result_lx;
extern uint8_t BUF[2];
extern int result;
float BH1750_Convert(void)
{
BH1750_Start();
HAL_Delay(180);
HAL_I2C_Master_Receive(&hi2c1, BH1750_Addr+1,BUF,2,0xff);
result=BUF[0];
result=(result<<8)+BUF[1]; //<2F>ϳ<EFBFBD><CFB3><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
result_lx=(float)(result/1.2);
return result_lx;
}
void application_entry(void *arg)
{
BH1750_Init();
MX_ML302_GPIO_Init();
ml302_power_off();
osDelay(500);
ml302_power_on();
ml302_hardware_reset();
ml302_sal_init(HAL_UART_PORT_0);
osThreadCreate(osThread(tcp_test0), NULL);
while(1)
{
HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
osDelay(500);
}
}