PowLu/TencentOS-tiny
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

delete some project files

Browse Source 
fix some project and delete some files
This commit is contained in:
supowang
2019-09-17 17:32:51 +08:00
parent afecd880b0
commit 65ce348b0e
287 changed files with 602 additions and 323463 deletions
Download Patch File Download Diff File Expand all files Collapse all files

211
board/NUCLEO_STM32F746ZG/BSP/Src/stm32f7xx_it_noeth.c Normal file
View File

@@ -0,0 +1,211 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f7xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f7xx_it.h"
#include "tos.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern ETH_HandleTypeDef heth;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M7 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
__weak void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
if(tos_knl_is_running()) //OS?a<><61>o??<3F><>1<EFBFBD><31><EFBFBD><EFBFBD>?,2????DD?y3?<3F><>|<7C><>?|<7C><>???<3F><><EFBFBD><EFBFBD>??|<7C><><EFBFBD>衧a
{
tos_knl_irq_enter(); //??<3F><><EFBFBD><EFBFBD>??D??
tos_tick_handler(); //|<7C><>??<3F><>??TencentOS tiny|<7C><>?<3F><>o?<3F><>?<3F><>??<3F><>t??3<><33>?D<><44><EFBFBD><EFBFBD>
tos_knl_irq_leave(); //??<3F><><EFBFBD><EFBFBD>?<3F><>?<3F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>????D??<3F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>a?D??
}
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F7xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f7xx.s). */
/******************************************************************************/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

122
board/NUCLEO_STM32F746ZG/KEIL/hello_world/NUCLEO_STM32F746ZG.uvoptx
View File

@@ -77,7 +77,7 @@
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
@@ -203,7 +203,7 @@
<Group>
<GroupName>Application/User</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
@@ -214,18 +214,6 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\BSP\Src\eth.c</PathWithFileName>
<FilenameWithoutPath>eth.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\BSP\Src\gpio.c</PathWithFileName>
<FilenameWithoutPath>gpio.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
@@ -233,7 +221,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -245,7 +233,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>5</FileNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -257,7 +245,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>6</FileNumber>
<FileNumber>5</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -269,19 +257,19 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>7</FileNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\BSP\Src\stm32f7xx_it.c</PathWithFileName>
<FilenameWithoutPath>stm32f7xx_it.c</FilenameWithoutPath>
<PathWithFileName>..\..\BSP\Src\stm32f7xx_it_noeth.c</PathWithFileName>
<FilenameWithoutPath>stm32f7xx_it_noeth.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>8</FileNumber>
<FileNumber>7</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -293,7 +281,7 @@
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>9</FileNumber>
<FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -313,7 +301,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>10</FileNumber>
<FileNumber>9</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -325,7 +313,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>11</FileNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -337,7 +325,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>12</FileNumber>
<FileNumber>11</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -349,7 +337,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>13</FileNumber>
<FileNumber>12</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -361,7 +349,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>14</FileNumber>
<FileNumber>13</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -373,7 +361,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>15</FileNumber>
<FileNumber>14</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -385,7 +373,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>16</FileNumber>
<FileNumber>15</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -397,7 +385,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>17</FileNumber>
<FileNumber>16</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -409,7 +397,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>18</FileNumber>
<FileNumber>17</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -421,7 +409,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>19</FileNumber>
<FileNumber>18</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -433,7 +421,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>20</FileNumber>
<FileNumber>19</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -445,7 +433,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>21</FileNumber>
<FileNumber>20</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -457,7 +445,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>22</FileNumber>
<FileNumber>21</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -469,7 +457,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>23</FileNumber>
<FileNumber>22</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -481,7 +469,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>24</FileNumber>
<FileNumber>23</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -493,7 +481,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>25</FileNumber>
<FileNumber>24</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -505,7 +493,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>26</FileNumber>
<FileNumber>25</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -517,7 +505,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>27</FileNumber>
<FileNumber>26</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -529,7 +517,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>28</FileNumber>
<FileNumber>27</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -541,7 +529,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>29</FileNumber>
<FileNumber>28</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -553,7 +541,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>30</FileNumber>
<FileNumber>29</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -565,7 +553,7 @@
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>31</FileNumber>
<FileNumber>30</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -585,7 +573,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>32</FileNumber>
<FileNumber>31</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -605,7 +593,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>33</FileNumber>
<FileNumber>32</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -617,7 +605,7 @@
</File>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>34</FileNumber>
<FileNumber>33</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -629,7 +617,7 @@
</File>
<File>
<GroupNumber>5</GroupNumber>
<FileNumber>35</FileNumber>
<FileNumber>34</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -649,7 +637,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>36</FileNumber>
<FileNumber>35</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -661,7 +649,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>37</FileNumber>
<FileNumber>36</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -673,7 +661,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>38</FileNumber>
<FileNumber>37</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -685,7 +673,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>39</FileNumber>
<FileNumber>38</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -697,7 +685,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>40</FileNumber>
<FileNumber>39</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -709,7 +697,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>41</FileNumber>
<FileNumber>40</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -721,7 +709,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>42</FileNumber>
<FileNumber>41</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -733,7 +721,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>43</FileNumber>
<FileNumber>42</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -745,7 +733,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>44</FileNumber>
<FileNumber>43</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -757,7 +745,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>45</FileNumber>
<FileNumber>44</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -769,7 +757,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>46</FileNumber>
<FileNumber>45</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -781,7 +769,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>47</FileNumber>
<FileNumber>46</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -793,7 +781,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>48</FileNumber>
<FileNumber>47</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -805,7 +793,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>49</FileNumber>
<FileNumber>48</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -817,7 +805,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>50</FileNumber>
<FileNumber>49</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -829,7 +817,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>51</FileNumber>
<FileNumber>50</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -841,7 +829,7 @@
</File>
<File>
<GroupNumber>6</GroupNumber>
<FileNumber>52</FileNumber>
<FileNumber>51</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -861,7 +849,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>7</GroupNumber>
<FileNumber>53</FileNumber>
<FileNumber>52</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
@@ -881,7 +869,7 @@
<RteFlg>0</RteFlg>
<File>
<GroupNumber>8</GroupNumber>
<FileNumber>54</FileNumber>
<FileNumber>53</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>

11
board/NUCLEO_STM32F746ZG/KEIL/hello_world/NUCLEO_STM32F746ZG.uvprojx
View File

@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32F746xx,USE_HAL_DRIVER,STM32F746xx</Define>
<Undefine></Undefine>
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F7xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F7xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32F7xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m7\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG</IncludePath>
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F7xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32F7xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32F7xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m7\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\net\lwip\3rdparty\src\include;..\..\..\..\net\lwip\port\include</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -392,11 +392,6 @@
<Group>
<GroupName>Application/User</GroupName>
<Files>
<File>
<FileName>eth.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\eth.c</FilePath>
</File>
<File>
<FileName>gpio.c</FileName>
<FileType>1</FileType>
@@ -418,9 +413,9 @@
<FilePath>..\..\BSP\Src\stm32f7xx_hal_msp.c</FilePath>
</File>
<File>
<FileName>stm32f7xx_it.c</FileName>
<FileName>stm32f7xx_it_noeth.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\stm32f7xx_it.c</FilePath>
<FilePath>..\..\BSP\Src\stm32f7xx_it_noeth.c</FilePath>
</File>
<File>
<FileName>usart.c</FileName>

76
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/DebugConfig/NUCLEO_STM32F746ZG_STM32F746ZGTx_2.0.0.dbgconf
View File

@@ -1,76 +0,0 @@
// File: STM32F74x_75x.dbgconf
// Version: 1.0.0
// Note: refer to STM32F75xxx STM32F74xxx reference manual (RM0385)
// refer to STM32F75xxx STM32F74xxx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> Debug CAN1 stopped when core is halted
// <o.24> DBG_I2C4_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.9> DBG_LPTIM1_STOP <i> LPTMI1 counter stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <h> TPIU Pin Routing (TRACECLK fixed on Pin PE2)
// <i> TRACECLK: Pin PE2
// <o1> TRACED0
// <i> ETM Trace Data 0
// <0x00040003=> Pin PE3
// <0x00020001=> Pin PC1
// <0x0006000D=> Pin PG13
// <o2> TRACED1
// <i> ETM Trace Data 1
// <0x00040004=> Pin PE4
// <0x00020008=> Pin PC8
// <0x0006000E=> Pin PG14
// <o3> TRACED2
// <i> ETM Trace Data 2
// <0x00040005=> Pin PE5
// <0x00030002=> Pin PD2
// <o4> TRACED3
// <i> ETM Trace Data 3
// <0x00040006=> Pin PE6
// <0x0002000C=> Pin PC12
// </h>
TraceClk_Pin = 0x00040002;
TraceD0_Pin = 0x00040003;
TraceD1_Pin = 0x00040004;
TraceD2_Pin = 0x00040005;
TraceD3_Pin = 0x00040006;
// <<< end of configuration section >>>

9
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/EventRecorderStub.scvd
View File

@@ -1,9 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

3696
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/NUCLEO_STM32F746ZG.uvguix.sheldondai
View File

File diff suppressed because one or more lines are too long

1874
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/NUCLEO_STM32F746ZG.uvguix.supowang
View File

File diff suppressed because one or more lines are too long

63
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.build_log.htm
View File

@@ -1,63 +0,0 @@
<html>
<body>
<pre>
<h1><EFBFBD>Vision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: <20><>Vision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\Code\tencentos_tiny\temp_develop\TencentOS-tiny\board\NUCLEO_STM32F746ZG\KEIL\tcp_server_base_lwip\NUCLEO_STM32F746ZG.uvprojx
Project File Date: 09/09/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'NUCLEO_STM32F746ZG'
compiling tcp_server.c...
..\..\..\..\examples\tcp_udp_base_lwip\tcp_server\tcp_server.c(20): warning: #223-D: function "MX_LWIP_Init" declared implicitly
MX_LWIP_Init();
..\..\..\..\examples\tcp_udp_base_lwip\tcp_server\tcp_server.c: 1 warning, 0 errors
linking...
Program Size: Code=82072 RO-data=1536 RW-data=360 ZI-data=179288
FromELF: creating hex file...
"NUCLEO_STM32F746ZG\NUCLEO_STM32F746ZG.axf" - 0 Error(s), 1 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.4.0.pack
ARM.CMSIS.5.4.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.1.2
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.11.0.pack
Keil.STM32F7xx_DFP.2.11.0
STMicroelectronics STM32F7 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_NUCLEO_STM32F746ZG
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F7xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.1.2
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

6255
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.htm
View File

File diff suppressed because it is too large Load Diff

16
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.sct
View File

@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00050000 { ; RW data
.ANY (+RW +ZI)
}
}

20
board/NUCLEO_STM32F746ZG/KEIL/tcp_server_base_lwip/RTE/_NUCLEO_STM32F746ZG/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'NUCLEO_STM32F746ZG'
* Target: 'NUCLEO_STM32F746ZG'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f7xx.h"
#endif /* RTE_COMPONENTS_H */

76
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/DebugConfig/NUCLEO_STM32F746ZG_STM32F746ZGTx_2.0.0.dbgconf
View File

@@ -1,76 +0,0 @@
// File: STM32F74x_75x.dbgconf
// Version: 1.0.0
// Note: refer to STM32F75xxx STM32F74xxx reference manual (RM0385)
// refer to STM32F75xxx STM32F74xxx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> Debug CAN1 stopped when core is halted
// <o.24> DBG_I2C4_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.9> DBG_LPTIM1_STOP <i> LPTMI1 counter stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <h> TPIU Pin Routing (TRACECLK fixed on Pin PE2)
// <i> TRACECLK: Pin PE2
// <o1> TRACED0
// <i> ETM Trace Data 0
// <0x00040003=> Pin PE3
// <0x00020001=> Pin PC1
// <0x0006000D=> Pin PG13
// <o2> TRACED1
// <i> ETM Trace Data 1
// <0x00040004=> Pin PE4
// <0x00020008=> Pin PC8
// <0x0006000E=> Pin PG14
// <o3> TRACED2
// <i> ETM Trace Data 2
// <0x00040005=> Pin PE5
// <0x00030002=> Pin PD2
// <o4> TRACED3
// <i> ETM Trace Data 3
// <0x00040006=> Pin PE6
// <0x0002000C=> Pin PC12
// </h>
TraceClk_Pin = 0x00040002;
TraceD0_Pin = 0x00040003;
TraceD1_Pin = 0x00040004;
TraceD2_Pin = 0x00040005;
TraceD3_Pin = 0x00040006;
// <<< end of configuration section >>>

9
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/EventRecorderStub.scvd
View File

@@ -1,9 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

3741
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG.uvguix.sheldondai
View File

File diff suppressed because one or more lines are too long

1874
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG.uvguix.supowang
View File

File diff suppressed because one or more lines are too long

2
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG.uvoptx
View File

@@ -240,7 +240,7 @@
<Group>
<GroupName>Application/User</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>

67
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.build_log.htm
View File

@@ -1,67 +0,0 @@
<html>
<body>
<pre>
<h1><EFBFBD>Vision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: <20><>Vision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\Code\tencentos_tiny\temp_develop\TencentOS-tiny\board\NUCLEO_STM32F746ZG\KEIL\tencent_cloud_sdk_data_template_base_lwip\NUCLEO_STM32F746ZG.uvprojx
Project File Date: 09/10/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'NUCLEO_STM32F746ZG'
compiling tencent_cloud_sdk_explorer.c...
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c(19): warning: #223-D: function "dns_init" declared implicitly
dns_init();
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c(20): warning: #223-D: function "MX_LWIP_Init" declared implicitly
MX_LWIP_Init();
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c(35): warning: #223-D: function "data_template_light_thread" declared implicitly
data_template_light_thread();
..\..\..\..\examples\tencent_cloud_sdk_data_template\tencent_cloud_sdk_explorer.c: 3 warnings, 0 errors
linking...
Program Size: Code=190736 RO-data=17512 RW-data=444 ZI-data=177884
FromELF: creating hex file...
"NUCLEO_STM32F746ZG\NUCLEO_STM32F746ZG.axf" - 0 Error(s), 3 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.4.0.pack
ARM.CMSIS.5.4.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.1.2
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.11.0.pack
Keil.STM32F7xx_DFP.2.11.0
STMicroelectronics STM32F7 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_NUCLEO_STM32F746ZG
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F7xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.1.2
Build Time Elapsed: 00:00:02
</pre>
</body>
</html>

13196
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.htm
View File

File diff suppressed because it is too large Load Diff

16
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.sct
View File

@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00050000 { ; RW data
.ANY (+RW +ZI)
}
}

20
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_data_template_base_lwip/RTE/_NUCLEO_STM32F746ZG/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'NUCLEO_STM32F746ZG'
* Target: 'NUCLEO_STM32F746ZG'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f7xx.h"
#endif /* RTE_COMPONENTS_H */

76
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/DebugConfig/NUCLEO_STM32F746ZG_STM32F746ZGTx_2.0.0.dbgconf
View File

@@ -1,76 +0,0 @@
// File: STM32F74x_75x.dbgconf
// Version: 1.0.0
// Note: refer to STM32F75xxx STM32F74xxx reference manual (RM0385)
// refer to STM32F75xxx STM32F74xxx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> Debug CAN1 stopped when core is halted
// <o.24> DBG_I2C4_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.9> DBG_LPTIM1_STOP <i> LPTMI1 counter stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <h> TPIU Pin Routing (TRACECLK fixed on Pin PE2)
// <i> TRACECLK: Pin PE2
// <o1> TRACED0
// <i> ETM Trace Data 0
// <0x00040003=> Pin PE3
// <0x00020001=> Pin PC1
// <0x0006000D=> Pin PG13
// <o2> TRACED1
// <i> ETM Trace Data 1
// <0x00040004=> Pin PE4
// <0x00020008=> Pin PC8
// <0x0006000E=> Pin PG14
// <o3> TRACED2
// <i> ETM Trace Data 2
// <0x00040005=> Pin PE5
// <0x00030002=> Pin PD2
// <o4> TRACED3
// <i> ETM Trace Data 3
// <0x00040006=> Pin PE6
// <0x0002000C=> Pin PC12
// </h>
TraceClk_Pin = 0x00040002;
TraceD0_Pin = 0x00040003;
TraceD1_Pin = 0x00040004;
TraceD2_Pin = 0x00040005;
TraceD3_Pin = 0x00040006;
// <<< end of configuration section >>>

9
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/EventRecorderStub.scvd
View File

@@ -1,9 +0,0 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

3723
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/NUCLEO_STM32F746ZG.uvguix.sheldondai
View File

File diff suppressed because one or more lines are too long

1874
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/NUCLEO_STM32F746ZG.uvguix.supowang
View File

File diff suppressed because one or more lines are too long

66
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.build_log.htm
View File

@@ -1,66 +0,0 @@
<html>
<body>
<pre>
<h1><EFBFBD>Vision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: <20><>Vision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DCM.DLL V1.17.2.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TCM.DLL V1.36.1.0
<h2>Project:</h2>
D:\Code\tencentos_tiny\temp_develop\TencentOS-tiny\board\NUCLEO_STM32F746ZG\KEIL\tencent_cloud_sdk_mqtt_base_lwip\NUCLEO_STM32F746ZG.uvprojx
Project File Date: 09/10/2019
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'NUCLEO_STM32F746ZG'
compiling tencent_cloud_sdk_mqtt.c...
..\..\..\..\examples\tencent_cloud_sdk_mqtt\tencent_cloud_sdk_mqtt.c(21): warning: #223-D: function "dns_init" declared implicitly
dns_init();
..\..\..\..\examples\tencent_cloud_sdk_mqtt\tencent_cloud_sdk_mqtt.c(22): warning: #223-D: function "MX_LWIP_Init" declared implicitly
MX_LWIP_Init();
..\..\..\..\examples\tencent_cloud_sdk_mqtt\tencent_cloud_sdk_mqtt.c: 2 warnings, 0 errors
compiling mqtt_sample.c...
linking...
Program Size: Code=176836 RO-data=15808 RW-data=444 ZI-data=173524
FromELF: creating hex file...
"NUCLEO_STM32F746ZG\NUCLEO_STM32F746ZG.axf" - 0 Error(s), 2 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.4.0.pack
ARM.CMSIS.5.4.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.1.2
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F7xx_DFP.2.11.0.pack
Keil.STM32F7xx_DFP.2.11.0
STMicroelectronics STM32F7 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_NUCLEO_STM32F746ZG
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32F7xx_DFP\2.11.0\Drivers\CMSIS\Device\ST\STM32F7xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.1.2
Build Time Elapsed: 00:00:03
</pre>
</body>
</html>

12121
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.htm
View File

File diff suppressed because it is too large Load Diff

16
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/NUCLEO_STM32F746ZG/NUCLEO_STM32F746ZG.sct
View File

@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00050000 { ; RW data
.ANY (+RW +ZI)
}
}

20
board/NUCLEO_STM32F746ZG/KEIL/tencent_cloud_sdk_mqtt_base_lwip/RTE/_NUCLEO_STM32F746ZG/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'NUCLEO_STM32F746ZG'
* Target: 'NUCLEO_STM32F746ZG'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f7xx.h"
#endif /* RTE_COMPONENTS_H */