a very simple shell framework
simple, clear, easy to DIY
This commit is contained in:
daishengdong
@@ -31,13 +31,15 @@
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/* USER CODE END Includes */
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_USART1_UART_Init(void);
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void MX_USART2_UART_Init(void);
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void MX_USART3_UART_Init(void);
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/* USER CODE BEGIN Prototypes */
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||||
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/* USER CODE END Prototypes */
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@@ -2,11 +2,17 @@
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int fputc(int ch, FILE *f)
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{
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#if 0
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if (ch == '\n') {
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HAL_UART_Transmit(&huart1, (void *)"\r", 1,30000);
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}
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HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, 0xFFFF);
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return ch;
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#else
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while ((USART1->SR & 0X40) == 0);//ѭ<><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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USART1->DR = (uint8_t)ch;
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return ch;
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#endif
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}
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int _write(int fd, char *ptr, int len)
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306
board/ALIENTEK_STM32F429/BSP/Src/stm32f4xx_it_shell.c
Normal file
306
board/ALIENTEK_STM32F429/BSP/Src/stm32f4xx_it_shell.c
Normal file
@@ -0,0 +1,306 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Ultimate Liberty license
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* SLA0044, the "License"; You may not use this file except in compliance with
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* the License. You may obtain a copy of the License at:
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* www.st.com/SLA0044
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f4xx_it.h"
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#include "tos_k.h"
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#include "tos_shell.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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||||
|
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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||||
|
||||
/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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||||
|
||||
/* USER CODE END PD */
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||||
|
||||
/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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|
||||
/* USER CODE END PM */
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||||
|
||||
/* Private variables ---------------------------------------------------------*/
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||||
/* USER CODE BEGIN PV */
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||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
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||||
|
||||
/* USER CODE END PFP */
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||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
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||||
|
||||
/* USER CODE END 0 */
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||||
|
||||
/* External variables --------------------------------------------------------*/
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extern UART_HandleTypeDef huart1;
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/* USER CODE BEGIN EV */
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|
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/* USER CODE END EV */
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/******************************************************************************/
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||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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||||
/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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||||
/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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__weak void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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if(tos_knl_is_running())
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{
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tos_knl_irq_enter();
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tos_tick_handler();
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tos_knl_irq_leave();
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}
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//HAL_SYSTICK_IRQHandler();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles EXTI line0 interrupt.
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*/
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void EXTI0_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI0_IRQn 0 */
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/* USER CODE END EXTI0_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
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/* USER CODE BEGIN EXTI0_IRQn 1 */
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/* USER CODE END EXTI0_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line2 interrupt.
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*/
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void EXTI2_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI2_IRQn 0 */
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/* USER CODE END EXTI2_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
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/* USER CODE BEGIN EXTI2_IRQn 1 */
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/* USER CODE END EXTI2_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line3 interrupt.
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*/
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void EXTI3_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI3_IRQn 0 */
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/* USER CODE END EXTI3_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
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/* USER CODE BEGIN EXTI3_IRQn 1 */
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/* USER CODE END EXTI3_IRQn 1 */
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}
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extern uint8_t data;
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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#if 0
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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tos_knl_irq_enter();
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HAL_UART_IRQHandler(&huart1);
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tos_knl_irq_leave();
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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#else
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uint32_t timeout = 0, max_delay = 0x1FFFF;
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tos_knl_irq_enter();
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HAL_UART_IRQHandler(&huart1);
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timeout = 0;
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while (HAL_UART_GetState(&huart1) != HAL_UART_STATE_READY) {
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++timeout;
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if (timeout > max_delay) {
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break;
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}
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}
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timeout = 0;
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while (HAL_UART_Receive_IT(&huart1, &data, 1) != HAL_OK) {
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++timeout;
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if (timeout > max_delay) {
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break;
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}
|
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}
|
||||
|
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tos_knl_irq_leave();
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#endif
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}
|
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|
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/**
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* @brief This function handles EXTI line[15:10] interrupts.
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*/
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void EXTI15_10_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI15_10_IRQn 0 */
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/* USER CODE END EXTI15_10_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
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/* USER CODE BEGIN EXTI15_10_IRQn 1 */
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||||
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/* USER CODE END EXTI15_10_IRQn 1 */
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}
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||||
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart->Instance == USART1) {
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||||
tos_shell_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -24,8 +24,11 @@
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
uint8_t data;
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
UART_HandleTypeDef huart2;
|
||||
UART_HandleTypeDef huart3;
|
||||
/* USART1 init function */
|
||||
|
||||
void MX_USART1_UART_Init(void)
|
||||
@@ -44,6 +47,17 @@ void MX_USART1_UART_Init(void)
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
HAL_UART_Receive_IT(&huart1, &data, 1);
|
||||
}
|
||||
|
||||
void MX_USART2_UART_Init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void MX_USART3_UART_Init(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
||||
|
||||
@@ -0,0 +1,48 @@
|
||||
// File: STM32F405_415_407_417_427_437_429_439.dbgconf
|
||||
// Version: 1.0.0
|
||||
// Note: refer to STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 reference manual (RM0090)
|
||||
// refer to STM32F40x STM32F41x datasheets
|
||||
// refer to STM32F42x STM32F43x datasheets
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o.2> DBG_STANDBY <i> Debug Standby Mode
|
||||
// <o.1> DBG_STOP <i> Debug Stop Mode
|
||||
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000007;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.26> DBG_CAN2_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.25> DBG_CAN1_STOP <i> CAN2 stopped when core is halted
|
||||
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS timeout mode stopped when core is halted
|
||||
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS timeout mode stopped when core is halted
|
||||
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout mode stopped when core is halted
|
||||
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
|
||||
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
|
||||
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
|
||||
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
|
||||
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
|
||||
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
|
||||
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
|
||||
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
|
||||
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
|
||||
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
|
||||
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
|
||||
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
|
||||
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
|
||||
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB2_Fz = 0x00000000;
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
@@ -0,0 +1,9 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
|
||||
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
|
||||
|
||||
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
|
||||
<events>
|
||||
</events>
|
||||
|
||||
</component_viewer>
|
||||
@@ -0,0 +1,60 @@
|
||||
<html>
|
||||
<body>
|
||||
<pre>
|
||||
<h1><EFBFBD>Vision Build Log</h1>
|
||||
<h2>Tool Versions:</h2>
|
||||
IDE-Version: <20><>Vision V5.26.2.0
|
||||
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
|
||||
|
||||
Tool Versions:
|
||||
Toolchain: MDK-ARM Professional Version: 5.26.2.0
|
||||
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
|
||||
C Compiler: Armcc.exe V5.06 update 6 (build 750)
|
||||
Assembler: Armasm.exe V5.06 update 6 (build 750)
|
||||
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
|
||||
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
|
||||
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
|
||||
CPU DLL: SARMCM3.DLL V5.26.2.0
|
||||
Dialog DLL: DCM.DLL V1.17.2.0
|
||||
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
|
||||
Dialog DLL: TCM.DLL V1.36.1.0
|
||||
|
||||
<h2>Project:</h2>
|
||||
D:\github\lorawan\TencentOS-tiny\board\ALIENTEK_STM32F429\KEIL\shell\TencentOS_tiny.uvprojx
|
||||
Project File Date: 01/07/2020
|
||||
|
||||
<h2>Output:</h2>
|
||||
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
|
||||
Build target 'TencentOS_tiny'
|
||||
compiling shell_sample.c...
|
||||
linking...
|
||||
Program Size: Code=20668 RO-data=788 RW-data=140 ZI-data=35156
|
||||
FromELF: creating hex file...
|
||||
".\Obj\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
|
||||
|
||||
<h2>Software Packages used:</h2>
|
||||
|
||||
Package Vendor: ARM
|
||||
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
|
||||
ARM.CMSIS.5.6.0
|
||||
CMSIS (Cortex Microcontroller Software Interface Standard)
|
||||
* Component: CORE Version: 5.3.0
|
||||
|
||||
Package Vendor: Keil
|
||||
http://www.keil.com/pack/Keil.STM32F4xx_DFP.2.13.0.pack
|
||||
Keil.STM32F4xx_DFP.2.13.0
|
||||
STMicroelectronics STM32F4 Series Device Support, Drivers and Examples
|
||||
|
||||
<h2>Collection of Component include folders:</h2>
|
||||
.\RTE\_TencentOS_tiny
|
||||
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
|
||||
C:\Keil_v5\ARM\PACK\Keil\STM32F4xx_DFP\2.13.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include
|
||||
|
||||
<h2>Collection of Component Files used:</h2>
|
||||
|
||||
* Component: ARM::CMSIS:CORE:5.3.0
|
||||
Build Time Elapsed: 00:00:01
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
2851
board/ALIENTEK_STM32F429/KEIL/shell/Obj/TencentOS_tiny.htm
Normal file
2851
board/ALIENTEK_STM32F429/KEIL/shell/Obj/TencentOS_tiny.htm
Normal file
File diff suppressed because it is too large
Load Diff
16
board/ALIENTEK_STM32F429/KEIL/shell/Obj/TencentOS_tiny.sct
Normal file
16
board/ALIENTEK_STM32F429/KEIL/shell/Obj/TencentOS_tiny.sct
Normal file
@@ -0,0 +1,16 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00030000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'TencentOS_tiny'
|
||||
* Target: 'TencentOS_tiny'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "stm32f4xx.h"
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
1142
board/ALIENTEK_STM32F429/KEIL/shell/TencentOS_tiny.uvoptx
Normal file
1142
board/ALIENTEK_STM32F429/KEIL/shell/TencentOS_tiny.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
792
board/ALIENTEK_STM32F429/KEIL/shell/TencentOS_tiny.uvprojx
Normal file
792
board/ALIENTEK_STM32F429/KEIL/shell/TencentOS_tiny.uvprojx
Normal file
@@ -0,0 +1,792 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F429IGTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F4xx_DFP.2.13.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2002FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F429IGTx$CMSIS\SVD\STM32F429x.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4101</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x30000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x30000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x10000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32F429xx,WITH_TOS_NET_ADAPTER,USE_ESP8266,MBEDTLS_CONFIG_FILE=<tos_mbedtls_psk_config.h></Define>
|
||||
<Undefine></Undefine>
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
463
board/ALIENTEK_STM32F429/KEIL/shell/startup_stm32f429xx.s
Normal file
463
board/ALIENTEK_STM32F429/KEIL/shell/startup_stm32f429xx.s
Normal file
@@ -0,0 +1,463 @@
|
||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f429xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32F429x devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
|
||||
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
|
||||
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDIO_IRQHandler ; SDIO
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD CAN2_TX_IRQHandler ; CAN2 TX
|
||||
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
||||
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
||||
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD 0 ; Reserved
|
||||
DCD HASH_RNG_IRQHandler ; Hash and Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDIO_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT CAN2_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN2_SCE_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT HASH_RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM9_IRQHandler
|
||||
TIM1_UP_TIM10_IRQHandler
|
||||
TIM1_TRG_COM_TIM11_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDIO_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
CAN2_TX_IRQHandler
|
||||
CAN2_RX0_IRQHandler
|
||||
CAN2_RX1_IRQHandler
|
||||
CAN2_SCE_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
HASH_RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
@@ -300,7 +300,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == LPUART1) {
|
||||
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -363,7 +363,7 @@ int tos_at_raw_data_send_until(at_echo_t *echo, uint32_t timeout, const uint8_t
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void tos_at_uart_write_byte(uint8_t data);
|
||||
void tos_at_uart_input_byte(uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief A global lock provided by at framework.
|
||||
|
||||
@@ -257,7 +257,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == USART2) {
|
||||
HAL_UART_Receive_IT(&huart2, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -100,7 +100,7 @@ void SysTick_Handler(void) {
|
||||
|
||||
void AT_UART_DataParse(char byte)
|
||||
{
|
||||
tos_at_uart_write_byte(byte);
|
||||
tos_at_uart_input_byte(byte);
|
||||
}
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
|
||||
@@ -182,7 +182,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == USART1) {
|
||||
HAL_UART_Receive_IT(&huart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -253,7 +253,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == USART2) {
|
||||
HAL_UART_Receive_IT(&huart2, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -279,10 +279,10 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == USART3) {
|
||||
HAL_UART_Receive_IT(&huart3, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
} else if (huart->Instance == USART2) {
|
||||
HAL_UART_Receive_IT(&huart2, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -262,10 +262,10 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == USART3) {
|
||||
HAL_UART_Receive_IT(&huart3, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
} else if (huart->Instance == USART2) {
|
||||
HAL_UART_Receive_IT(&huart2, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -296,7 +296,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == LPUART1) {
|
||||
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -300,7 +300,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == LPUART1) {
|
||||
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -2,11 +2,17 @@
|
||||
|
||||
int fputc(int ch, FILE *f)
|
||||
{
|
||||
#if 0
|
||||
if (ch == '\n') {
|
||||
HAL_UART_Transmit(&huart2, (void *)"\r", 1,30000);
|
||||
HAL_UART_Transmit(&huart2, (void *)"\r", 1, 30000);
|
||||
}
|
||||
HAL_UART_Transmit(&huart2, (uint8_t *)&ch, 1, 0xFFFF);
|
||||
return ch;
|
||||
#else
|
||||
while ((USART2->ISR & 0X40) == 0);
|
||||
USART2->TDR = (uint8_t)ch;
|
||||
return ch;
|
||||
#endif
|
||||
}
|
||||
|
||||
int _write(int fd, char *ptr, int len)
|
||||
|
||||
@@ -296,7 +296,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == LPUART1) {
|
||||
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
@@ -300,7 +300,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
extern uint8_t data;
|
||||
if (huart->Instance == LPUART1) {
|
||||
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
|
||||
tos_at_uart_write_byte(data);
|
||||
tos_at_uart_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
|
||||
337
board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_it_shell.c
Normal file
337
board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/stm32l4xx_it_shell.c
Normal file
@@ -0,0 +1,337 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l4xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32l4xx_it.h"
|
||||
#include "tos_k.h"
|
||||
#include "tos_shell.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern UART_HandleTypeDef hlpuart1;
|
||||
extern UART_HandleTypeDef huart2;
|
||||
extern UART_HandleTypeDef huart3;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Prefetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
__weak void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
if (tos_knl_is_running())
|
||||
{
|
||||
tos_knl_irq_enter();
|
||||
tos_tick_handler();
|
||||
tos_knl_irq_leave();
|
||||
}
|
||||
//HAL_SYSTICK_IRQHandler();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32L4xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32l4xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line1 interrupt.
|
||||
*/
|
||||
void EXTI1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI1_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI1_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
|
||||
/* USER CODE BEGIN EXTI1_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line2 interrupt.
|
||||
*/
|
||||
void EXTI2_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI2_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI2_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
|
||||
/* USER CODE BEGIN EXTI2_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI2_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line3 interrupt.
|
||||
*/
|
||||
void EXTI3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
|
||||
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 1 */
|
||||
}
|
||||
|
||||
extern uint8_t data;
|
||||
|
||||
/**
|
||||
* @brief This function handles USART2 global interrupt.
|
||||
*/
|
||||
void USART2_IRQHandler(void)
|
||||
{
|
||||
#if 0
|
||||
/* USER CODE BEGIN USART2_IRQn 0 */
|
||||
|
||||
/* USER CODE END USART2_IRQn 0 */
|
||||
tos_knl_irq_enter();
|
||||
HAL_UART_IRQHandler(&huart2);
|
||||
tos_knl_irq_leave();
|
||||
/* USER CODE BEGIN USART2_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART2_IRQn 1 */
|
||||
#else
|
||||
|
||||
uint32_t timeout = 0, max_delay = 0x1FFFF;
|
||||
|
||||
tos_knl_irq_enter();
|
||||
|
||||
HAL_UART_IRQHandler(&huart2);
|
||||
|
||||
timeout = 0;
|
||||
while (HAL_UART_GetState(&huart2) != HAL_UART_STATE_READY) {
|
||||
++timeout;
|
||||
if (timeout > max_delay) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
timeout = 0;
|
||||
while (HAL_UART_Receive_IT(&huart2, &data, 1) != HAL_OK) {
|
||||
++timeout;
|
||||
if (timeout > max_delay) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
tos_knl_irq_leave();
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USART3 global interrupt.
|
||||
*/
|
||||
void USART3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USART3_IRQn 0 */
|
||||
|
||||
/* USER CODE END USART3_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart3);
|
||||
/* USER CODE BEGIN USART3_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles LPUART1 global interrupt.
|
||||
*/
|
||||
void LPUART1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN LPUART1_IRQn 0 */
|
||||
|
||||
/* USER CODE END LPUART1_IRQn 0 */
|
||||
tos_knl_irq_enter();
|
||||
HAL_UART_IRQHandler(&hlpuart1);
|
||||
tos_knl_irq_leave();
|
||||
/* USER CODE BEGIN LPUART1_IRQn 1 */
|
||||
|
||||
/* USER CODE END LPUART1_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
{
|
||||
if (huart->Instance == USART2) {
|
||||
tos_shell_input_byte(data);
|
||||
}
|
||||
}
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -74,7 +74,6 @@ void MX_USART1_UART_Init(void)
|
||||
|
||||
void MX_USART2_UART_Init(void)
|
||||
{
|
||||
|
||||
huart2.Instance = USART2;
|
||||
huart2.Init.BaudRate = 115200;
|
||||
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
@@ -85,11 +84,13 @@ void MX_USART2_UART_Init(void)
|
||||
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||
|
||||
if (HAL_UART_Init(&huart2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
HAL_UART_Receive_IT(&huart2, &data, 1);//(uint8_t *)aRxBuffer, 1);
|
||||
}
|
||||
/* USART3 init function */
|
||||
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
// File: STM32L43x_44x_45x_46x.dbgconf
|
||||
// Version: 1.0.0
|
||||
// Note: refer to STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference manual (RM0394)
|
||||
// refer to STM32L431xx, STM32L432xx, STM32L433xx, STM32L442xx, STM32L443xx, STM32L451xx, STM32L452xx, STM32L462xx datasheets
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o0.2> DBG_STANDBY
|
||||
// <i> Debug Standby mode
|
||||
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
|
||||
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
|
||||
// <o0.1> DBG_STOP
|
||||
// <i> Debug Stop mode
|
||||
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
|
||||
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
|
||||
// <o0.0> DBG_SLEEP
|
||||
// <i> Debug Sleep mode
|
||||
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
|
||||
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000007;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
|
||||
// <o0.31> DBG_LPTIM1_STOP
|
||||
// <i> LPTIM1 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
|
||||
// <o0.25> DBG_CAN_STOP
|
||||
// <i> bxCAN1 stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The bxCAN1 receive registers are frozen
|
||||
// <o0.23> DBG_I2C3_STOP
|
||||
// <i> I2C3 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C3 SMBus timeout is frozen
|
||||
// <o0.22> DBG_I2C2_STOP
|
||||
// <i> I2C2 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C2 SMBus timeout is frozen
|
||||
// <o0.21> DBG_I2C1_STOP
|
||||
// <i> I2C1 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C1 SMBus timeout is frozen
|
||||
// <o0.12> DBG_IWDG_STOP
|
||||
// <i> Independent watchdog counter stopped when core is halted
|
||||
// <i> 0: The independent watchdog counter clock continues even if the core is halted
|
||||
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
|
||||
// <o0.11> DBG_WWDG_STOP
|
||||
// <i> Window watchdog counter stopped when core is halted
|
||||
// <i> 0: The window watchdog counter clock continues even if the core is halted
|
||||
// <i> 1: The window watchdog counter clock is stopped when the core is halted
|
||||
// <o0.10> DBG_RTC_STOP
|
||||
// <i> RTC counter stopped when core is halted
|
||||
// <i> 0: The clock of the RTC counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the RTC counter is stopped when the core is halted
|
||||
// <o0.5> DBG_TIM7_STOP
|
||||
// <i> TIM7 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
|
||||
// <o0.4> DBG_TIM6_STOP
|
||||
// <i> TIM6 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
|
||||
// <o0.0> DBG_TIM2_STOP
|
||||
// <i> TIM2 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz1 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
|
||||
// <o0.5> DBG_LPTIM2_STOP
|
||||
// <i> LPTIM2 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz2 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
|
||||
// <o0.17> DBG_TIM16_STOP
|
||||
// <i> TIM16 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
|
||||
// <o0.16> DBG_TIM15_STOP
|
||||
// <i> TIM15 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
|
||||
// <o0.11> DBG_TIM1_STOP
|
||||
// <i> TIM1 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
|
||||
// </h>
|
||||
DbgMCU_APB2_Fz = 0x00000000;
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
@@ -0,0 +1,9 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
|
||||
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
|
||||
|
||||
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
|
||||
<events>
|
||||
</events>
|
||||
|
||||
</component_viewer>
|
||||
@@ -0,0 +1,20 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'TencentOS_tiny'
|
||||
* Target: 'TencentOS_tiny'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "stm32l4xx.h"
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
1259
board/TencentOS_tiny_EVB_MX_Plus/KEIL/shell/TencentOS_tiny.uvoptx
Normal file
1259
board/TencentOS_tiny_EVB_MX_Plus/KEIL/shell/TencentOS_tiny.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,817 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>TencentOS_tiny</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32L431RCTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>TencentOS_tiny</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\list\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Size>0x0</Size>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Size>0x0</Size>
|
||||
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|
||||
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|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
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|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
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|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
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|
||||
<Size>0x0</Size>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Type>1</Type>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
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|
||||
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|
||||
<Type>1</Type>
|
||||
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|
||||
<Size>0x0</Size>
|
||||
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|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
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|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER,USE_ESP8266</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\helloworld;..\..\..\..\components\shell\include;..\..\..\..\kernel\hal\include</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<SwStkChk>0</SwStkChk>
|
||||
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|
||||
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|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Application/MDK-ARM</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_stm32l431xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>startup_stm32l431xx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Application/User</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mcu_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_msp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_it_shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\stm32l4xx_it_shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\spi.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>examples</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>shell_sample.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\examples\shell\shell_sample.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_tim_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_uart_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_i2c_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_rcc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dma_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_pwr_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers/CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>system_stm32l4xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Hardware</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>DHT11_BUS.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>oled.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_binary_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_char_fifo.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_countdownlatch.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_event.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_global.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmblk.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mmheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_mutex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_mutex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_pend.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_mail_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_message_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_priority_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_ring_queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_robin.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_robin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sched.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sched.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_sys.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_sys.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_task.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_task.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_tick.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_tick.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_time.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>port_s.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port_c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>shell</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\shell\tos_shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tos_shell_commands.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\components\shell\tos_shell_commands.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>hal</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cmsis</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmsis_os.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\..\osal\cmsis_os\cmsis_os.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>tos_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="TencentOS_tiny"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,60 @@
|
||||
<html>
|
||||
<body>
|
||||
<pre>
|
||||
<h1><EFBFBD>Vision Build Log</h1>
|
||||
<h2>Tool Versions:</h2>
|
||||
IDE-Version: <20><>Vision V5.26.2.0
|
||||
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
|
||||
|
||||
Tool Versions:
|
||||
Toolchain: MDK-ARM Professional Version: 5.26.2.0
|
||||
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
|
||||
C Compiler: Armcc.exe V5.06 update 6 (build 750)
|
||||
Assembler: Armasm.exe V5.06 update 6 (build 750)
|
||||
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
|
||||
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
|
||||
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
|
||||
CPU DLL: SARMCM3.DLL V5.26.2.0
|
||||
Dialog DLL: DCM.DLL V1.17.2.0
|
||||
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
|
||||
Dialog DLL: TCM.DLL V1.36.1.0
|
||||
|
||||
<h2>Project:</h2>
|
||||
D:\github\lorawan\TencentOS-tiny\board\TencentOS_tiny_EVB_MX_Plus\KEIL\shell\TencentOS_tiny.uvprojx
|
||||
Project File Date: 01/06/2020
|
||||
|
||||
<h2>Output:</h2>
|
||||
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
|
||||
Build target 'TencentOS_tiny'
|
||||
compiling tos_shell_commands.c...
|
||||
linking...
|
||||
Program Size: Code=24760 RO-data=2876 RW-data=332 ZI-data=43308
|
||||
FromELF: creating hex file...
|
||||
".\obj\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
|
||||
|
||||
<h2>Software Packages used:</h2>
|
||||
|
||||
Package Vendor: ARM
|
||||
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
|
||||
ARM.CMSIS.5.6.0
|
||||
CMSIS (Cortex Microcontroller Software Interface Standard)
|
||||
* Component: CORE Version: 5.3.0
|
||||
|
||||
Package Vendor: Keil
|
||||
http://www.keil.com/pack/Keil.STM32L4xx_DFP.2.0.0.pack
|
||||
Keil.STM32L4xx_DFP.2.0.0
|
||||
STMicroelectronics STM32L4 Series Device Support, Drivers and Examples
|
||||
|
||||
<h2>Collection of Component include folders:</h2>
|
||||
.\RTE\_TencentOS_tiny
|
||||
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
|
||||
C:\Keil_v5\ARM\PACK\Keil\STM32L4xx_DFP\2.0.0\Drivers\CMSIS\Device\ST\STM32L4xx\Include
|
||||
|
||||
<h2>Collection of Component Files used:</h2>
|
||||
|
||||
* Component: ARM::CMSIS:CORE:5.3.0
|
||||
Build Time Elapsed: 00:00:02
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
2975
board/TencentOS_tiny_EVB_MX_Plus/KEIL/shell/obj/TencentOS_tiny.htm
Normal file
2975
board/TencentOS_tiny_EVB_MX_Plus/KEIL/shell/obj/TencentOS_tiny.htm
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,16 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00010000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,404 @@
|
||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
||||
;* File Name : startup_stm32l431xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x100
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x100
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD COMP_IRQHandler ; COMP Interrupt
|
||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; RNG global interrupt
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD CRS_IRQHandler ; CRS interrupt
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TSC_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_PVM_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM15_IRQHandler
|
||||
TIM1_UP_TIM16_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
COMP_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
DMA2_Channel6_IRQHandler
|
||||
DMA2_Channel7_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TSC_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
CRS_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
59
components/shell/include/tos_shell.h
Normal file
59
components/shell/include/tos_shell.h
Normal file
@@ -0,0 +1,59 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef _TOS_SHELL_H_
|
||||
#define _TOS_SHELL_H_
|
||||
|
||||
#include "tos_k.h"
|
||||
#include "tos_shell_command.h"
|
||||
|
||||
#define SHELL_CMD_ARGV_MAX 16
|
||||
#define SHELL_OUTPUT_MAX 256
|
||||
#define SHELL_PARSER_TASK_STACK_SIZE 1024
|
||||
#define SHELL_PARSER_TASK_PRIO 3
|
||||
|
||||
typedef void (*shell_output_t)(const char *str);
|
||||
|
||||
typedef struct shell_control_st {
|
||||
k_task_t parser;
|
||||
|
||||
shell_output_t output;
|
||||
|
||||
char *cmd_buffer;
|
||||
int cmd_buffer_size;
|
||||
|
||||
k_sem_t shell_rx_sem;
|
||||
k_chr_fifo_t shell_rx_fifo;
|
||||
uint8_t *shell_rx_fifo_buffer;
|
||||
} shell_ctl_t;
|
||||
|
||||
#define SHELL_CTL ((shell_ctl_t *)(&shell_ctl))
|
||||
|
||||
__API__ int tos_shell_init(char *cmd_buf, int cmd_buf_size, shell_output_t output, shell_cmd_set_t *custom_cmd_set);
|
||||
|
||||
__API__ void tos_shell_deinit(void);
|
||||
|
||||
__API__ int tos_shell_cmd_set_regiser(const shell_cmd_set_t *cmd_set);
|
||||
|
||||
__API__ int tos_shell_cmd_set_unregiser(const shell_cmd_set_t *cmd_set);
|
||||
|
||||
__API__ void tos_shell_printf(const char *format, ...);
|
||||
|
||||
__API__ void tos_shell_input_byte(uint8_t data);
|
||||
|
||||
#endif /* _TOS_SHELL_H_ */
|
||||
|
||||
45
components/shell/include/tos_shell_command.h
Normal file
45
components/shell/include/tos_shell_command.h
Normal file
@@ -0,0 +1,45 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef _TOS_SHELL_COMMAND_H_
|
||||
#define _TOS_SHELL_COMMAND_H_
|
||||
|
||||
#include "tos_k.h"
|
||||
|
||||
typedef int (*shell_cmd_handler_t)(int argc, char *argv[]);
|
||||
|
||||
typedef struct shell_command_st {
|
||||
const char *name;
|
||||
shell_cmd_handler_t handler;
|
||||
const char *help;
|
||||
} shell_cmd_t;
|
||||
|
||||
typedef struct shell_command_set_st {
|
||||
k_slist_t list;
|
||||
const shell_cmd_t *const commands;
|
||||
} shell_cmd_set_t;
|
||||
|
||||
__KERNEL__ int shell_cmd_set_regiser(const shell_cmd_set_t *cmd_set);
|
||||
|
||||
__KERNEL__ int shell_cmd_set_unregiser(const shell_cmd_set_t *cmd_set);
|
||||
|
||||
__KERNEL__ const shell_cmd_t *shell_cmd_find(const char *name);
|
||||
|
||||
__KERNEL__ void shell_cmd_init(shell_cmd_set_t *custom_cmd_set);
|
||||
|
||||
#endif /* _TOS_SHELL_COMMAND_H_ */
|
||||
|
||||
220
components/shell/tos_shell.c
Normal file
220
components/shell/tos_shell.c
Normal file
@@ -0,0 +1,220 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "tos_shell.h"
|
||||
|
||||
__STATIC__ shell_ctl_t shell_ctl;
|
||||
|
||||
__STATIC__ k_stack_t shell_parser_task_stack[SHELL_PARSER_TASK_STACK_SIZE];
|
||||
|
||||
__STATIC__ int shell_getchar(void)
|
||||
{
|
||||
uint8_t chr;
|
||||
k_err_t err;
|
||||
|
||||
if (tos_sem_pend(&SHELL_CTL->shell_rx_sem, TOS_TIME_FOREVER) != K_ERR_NONE) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
err = tos_chr_fifo_pop(&SHELL_CTL->shell_rx_fifo, &chr);
|
||||
|
||||
return err == K_ERR_NONE ? chr : -1;
|
||||
}
|
||||
|
||||
__STATIC__ int shell_readline(void)
|
||||
{
|
||||
int chr, last_chr = 0;
|
||||
char *buf = SHELL_CTL->cmd_buffer;
|
||||
|
||||
while (K_TRUE) {
|
||||
if (buf - SHELL_CTL->cmd_buffer >= (SHELL_CTL->cmd_buffer_size - 1)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
chr = shell_getchar();
|
||||
if (chr < 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (chr == '\n' && last_chr == '\r') {
|
||||
*--buf = '\0';
|
||||
return 0;
|
||||
} else if (chr == '\n') {
|
||||
*buf = '\0';
|
||||
return 0;
|
||||
}
|
||||
|
||||
*buf++ = chr;
|
||||
last_chr = chr;
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ void shell_cmd_do_process(int argc, char *argv[])
|
||||
{
|
||||
const shell_cmd_t *cmd;
|
||||
static const char *cmd_not_found = "command not found\n";
|
||||
|
||||
cmd = shell_cmd_find(argv[0]);
|
||||
if (!cmd) {
|
||||
tos_shell_printf(cmd_not_found);
|
||||
} else {
|
||||
cmd->handler(argc, argv);
|
||||
}
|
||||
}
|
||||
|
||||
__STATIC__ void shell_cmd_process(void)
|
||||
{
|
||||
int argc = 0;
|
||||
static char *argv[SHELL_CMD_ARGV_MAX];
|
||||
char *pos = SHELL_CTL->cmd_buffer;
|
||||
|
||||
printf("%s\n", pos);
|
||||
|
||||
// left strip
|
||||
while (*pos == ' ' || *pos == '\t') {
|
||||
++pos;
|
||||
}
|
||||
|
||||
if (!*pos) {
|
||||
return;
|
||||
}
|
||||
|
||||
/* cmd_demo arg0 arg1 arg2 */
|
||||
/* simple, ugly, but works */
|
||||
while (*pos) {
|
||||
argv[argc] = pos;
|
||||
while (*pos != ' ' && *pos != '\t' && *pos) {
|
||||
++pos;
|
||||
}
|
||||
|
||||
while ((*pos == ' ' || *pos == '\t') && *pos) {
|
||||
*pos++ = '\0';
|
||||
}
|
||||
|
||||
++argc;
|
||||
}
|
||||
|
||||
shell_cmd_do_process(argc, argv);
|
||||
}
|
||||
|
||||
__STATIC__ void shell_prompt(void)
|
||||
{
|
||||
tos_shell_printf("> ");
|
||||
}
|
||||
|
||||
__STATIC__ void shell_parser(void *arg)
|
||||
{
|
||||
int rc;
|
||||
|
||||
shell_prompt();
|
||||
|
||||
while (K_TRUE) {
|
||||
rc = shell_readline();
|
||||
|
||||
if (!rc) {
|
||||
shell_cmd_process();
|
||||
}
|
||||
|
||||
shell_prompt();
|
||||
}
|
||||
}
|
||||
|
||||
__API__ int tos_shell_init(char *cmd_buf, int cmd_buf_size, shell_output_t output, shell_cmd_set_t *custom_cmd_set)
|
||||
{
|
||||
void *buffer = K_NULL;
|
||||
|
||||
TOS_PTR_SANITY_CHECK_RC(cmd_buf, -1);
|
||||
TOS_PTR_SANITY_CHECK_RC(output, -1);
|
||||
|
||||
memset(SHELL_CTL, 0, sizeof(shell_ctl_t));
|
||||
|
||||
SHELL_CTL->cmd_buffer = cmd_buf;
|
||||
SHELL_CTL->cmd_buffer_size = cmd_buf_size;
|
||||
SHELL_CTL->output = output;
|
||||
|
||||
shell_cmd_init(custom_cmd_set);
|
||||
|
||||
buffer = tos_mmheap_alloc(cmd_buf_size * 2);
|
||||
if (!buffer) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
SHELL_CTL->shell_rx_fifo_buffer = (uint8_t *)buffer;
|
||||
tos_chr_fifo_create(&SHELL_CTL->shell_rx_fifo, buffer, cmd_buf_size * 2);
|
||||
|
||||
if (tos_sem_create(&SHELL_CTL->shell_rx_sem, (k_sem_cnt_t)0u) != K_ERR_NONE) {
|
||||
goto errout0;
|
||||
}
|
||||
|
||||
if (tos_task_create(&SHELL_CTL->parser, "shell_parser", shell_parser,
|
||||
K_NULL, SHELL_PARSER_TASK_PRIO, shell_parser_task_stack,
|
||||
SHELL_PARSER_TASK_STACK_SIZE, 0) != K_ERR_NONE) {
|
||||
goto errout1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
errout1:
|
||||
tos_sem_destroy(&SHELL_CTL->shell_rx_sem);
|
||||
|
||||
errout0:
|
||||
tos_mmheap_free(SHELL_CTL->shell_rx_fifo_buffer);
|
||||
SHELL_CTL->shell_rx_fifo_buffer = K_NULL;
|
||||
tos_chr_fifo_destroy(&SHELL_CTL->shell_rx_fifo);
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
__API__ void tos_shell_deinit(void)
|
||||
{
|
||||
tos_task_destroy(&SHELL_CTL->parser);
|
||||
tos_sem_destroy(&SHELL_CTL->shell_rx_sem);
|
||||
|
||||
tos_mmheap_free(SHELL_CTL->shell_rx_fifo_buffer);
|
||||
SHELL_CTL->shell_rx_fifo_buffer = K_NULL;
|
||||
tos_chr_fifo_destroy(&SHELL_CTL->shell_rx_fifo);
|
||||
}
|
||||
|
||||
__API__ int tos_shell_cmd_set_regiser(const shell_cmd_set_t *cmd_set)
|
||||
{
|
||||
return shell_cmd_set_regiser(cmd_set);
|
||||
}
|
||||
|
||||
__API__ int tos_shell_cmd_set_unregiser(const shell_cmd_set_t *cmd_set)
|
||||
{
|
||||
return shell_cmd_set_unregiser(cmd_set);
|
||||
}
|
||||
|
||||
__API__ void tos_shell_printf(const char *format, ...)
|
||||
{
|
||||
va_list args;
|
||||
static char buffer[SHELL_OUTPUT_MAX];
|
||||
|
||||
va_start(args, format);
|
||||
vsnprintf(buffer, sizeof(buffer), format, args);
|
||||
va_end(args);
|
||||
|
||||
(SHELL_CTL->output)(buffer);
|
||||
}
|
||||
|
||||
__API__ void tos_shell_input_byte(uint8_t data)
|
||||
{
|
||||
if (tos_chr_fifo_push(&SHELL_CTL->shell_rx_fifo, data) == K_ERR_NONE) {
|
||||
tos_sem_post(&SHELL_CTL->shell_rx_sem);
|
||||
}
|
||||
}
|
||||
|
||||
101
components/shell/tos_shell_commands.c
Normal file
101
components/shell/tos_shell_commands.c
Normal file
@@ -0,0 +1,101 @@
|
||||
/*----------------------------------------------------------------------------
|
||||
* Tencent is pleased to support the open source community by making TencentOS
|
||||
* available.
|
||||
*
|
||||
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
|
||||
* If you have downloaded a copy of the TencentOS binary from Tencent, please
|
||||
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
|
||||
*
|
||||
* If you have downloaded a copy of the TencentOS source code from Tencent,
|
||||
* please note that TencentOS source code is licensed under the BSD 3-Clause
|
||||
* License, except for the third-party components listed below which are
|
||||
* subject to different license terms. Your integration of TencentOS into your
|
||||
* own projects may require compliance with the BSD 3-Clause License, as well
|
||||
* as the other licenses applicable to the third-party components included
|
||||
* within TencentOS.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "tos_shell.h"
|
||||
#include "tos_shell_command.h"
|
||||
|
||||
__STATIC__ TOS_SLIST_DEFINE(cmd_set_list);
|
||||
|
||||
__STATIC__ int cmd_help(int argc, char *argv[])
|
||||
{
|
||||
shell_cmd_set_t *cmd_set;
|
||||
const shell_cmd_t *cmd;
|
||||
|
||||
TOS_SLIST_FOR_EACH_ENTRY(cmd_set, shell_cmd_set_t, list, &cmd_set_list) {
|
||||
for (cmd = cmd_set->commands; cmd->name; ++cmd) {
|
||||
tos_shell_printf("%-8s: %s\n", cmd->name, cmd->help);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ int cmd_ps(int argc, char *argv[])
|
||||
{
|
||||
tos_task_info_display();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
__STATIC__ const shell_cmd_t builtin_shell_cmds[] = {
|
||||
{ "help", cmd_help, "show help" },
|
||||
{ "ps", cmd_ps, "show tasks" },
|
||||
{ K_NULL, K_NULL, K_NULL },
|
||||
};
|
||||
|
||||
__STATIC__ shell_cmd_set_t buildin_shell_cmd_set = {
|
||||
.list = TOS_SLIST_NODE(dummy),
|
||||
.commands = builtin_shell_cmds,
|
||||
};
|
||||
|
||||
__KERNEL__ int shell_cmd_set_regiser(const shell_cmd_set_t *cmd_set)
|
||||
{
|
||||
if (tos_slist_contains((k_slist_t *)&cmd_set->list, &cmd_set_list)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_slist_add_head((k_slist_t *)&cmd_set->list, &cmd_set_list);
|
||||
return 0;
|
||||
}
|
||||
|
||||
__KERNEL__ int shell_cmd_set_unregiser(const shell_cmd_set_t *cmd_set)
|
||||
{
|
||||
if (!tos_slist_contains((k_slist_t *)&cmd_set->list, &cmd_set_list)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
tos_slist_del((k_slist_t *)&cmd_set->list, &cmd_set_list);
|
||||
return 0;
|
||||
}
|
||||
|
||||
__KERNEL__ const shell_cmd_t *shell_cmd_find(const char *name)
|
||||
{
|
||||
const shell_cmd_t *cmd;
|
||||
const shell_cmd_set_t *cmd_set;
|
||||
|
||||
TOS_SLIST_FOR_EACH_ENTRY(cmd_set, const shell_cmd_set_t, list, &cmd_set_list) {
|
||||
for (cmd = cmd_set->commands; cmd->name; ++cmd) {
|
||||
if (!strcmp(cmd->name, name)) {
|
||||
return cmd;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return K_NULL;
|
||||
}
|
||||
|
||||
__KERNEL__ void shell_cmd_init(shell_cmd_set_t *custom_cmd_set)
|
||||
{
|
||||
tos_slist_init(&cmd_set_list);
|
||||
|
||||
tos_slist_add_head(&buildin_shell_cmd_set.list, &cmd_set_list);
|
||||
|
||||
if (custom_cmd_set) {
|
||||
tos_slist_add_head(&custom_cmd_set->list, &cmd_set_list);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -334,7 +334,7 @@ int tos_at_raw_data_send(at_echo_t *echo, uint32_t timeout, const uint8_t *buf,
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void tos_at_uart_write_byte(uint8_t data);
|
||||
void tos_at_uart_input_byte(uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief Read data from the uart.
|
||||
|
||||
@@ -594,7 +594,7 @@ __API__ void tos_at_deinit(void)
|
||||
|
||||
/* To completely decouple the uart intterupt and at agent, we need a more powerful
|
||||
hal(driver framework), that would be a huge work, we place it in future plans. */
|
||||
__API__ void tos_at_uart_write_byte(uint8_t data)
|
||||
__API__ void tos_at_uart_input_byte(uint8_t data)
|
||||
{
|
||||
if (tos_chr_fifo_push(&AT_AGENT->uart_rx_fifo, data) == K_ERR_NONE) {
|
||||
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_UART_INCOMING);
|
||||
|
||||
88
examples/shell/shell_sample.c
Normal file
88
examples/shell/shell_sample.c
Normal file
@@ -0,0 +1,88 @@
|
||||
#include "tos_shell.h"
|
||||
#include "tos_hal.h"
|
||||
|
||||
#define CMD_LEN_MAX 128
|
||||
char cmd_buf[CMD_LEN_MAX];
|
||||
|
||||
hal_uart_t shell_uart;
|
||||
|
||||
void uart_output(const char *str)
|
||||
{
|
||||
tos_hal_uart_write(&shell_uart, (const uint8_t *)str, strlen(str), 0xFF);
|
||||
|
||||
#if 0
|
||||
/* if using c lib printf through uart, a simpler one is: */
|
||||
printf(str);
|
||||
#endif
|
||||
}
|
||||
|
||||
__STATIC__ int cmd_test00(int argc, char *argv[])
|
||||
{
|
||||
int i = 0;
|
||||
tos_shell_printf("test00:\n");
|
||||
|
||||
for (i = 0; i < argc; ++i) {
|
||||
tos_shell_printf("argv[%d]: %s\n", i, argv[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ int cmd_test01(int argc, char *argv[])
|
||||
{
|
||||
tos_shell_printf("test01:\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ int cmd_test10(int argc, char *argv[])
|
||||
{
|
||||
int i = 0;
|
||||
tos_shell_printf("test10:\n");
|
||||
|
||||
for (i = 0; i < argc; ++i) {
|
||||
tos_shell_printf("argv[%d]: %s\n", i, argv[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ int cmd_test11(int argc, char *argv[])
|
||||
{
|
||||
tos_shell_printf("test11:\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
__STATIC__ const shell_cmd_t custom_shell_cmds0[] = {
|
||||
{ "test00", cmd_test00, "test00 cmd" },
|
||||
{ "test01", cmd_test01, "test01 cmd" },
|
||||
{ K_NULL, K_NULL, K_NULL }, /* never forget this!!!*/
|
||||
};
|
||||
|
||||
__STATIC__ shell_cmd_set_t custom_shell_cmd_set0 = {
|
||||
.list = TOS_SLIST_NODE(dummy),
|
||||
.commands = custom_shell_cmds0,
|
||||
};
|
||||
|
||||
__STATIC__ const shell_cmd_t custom_shell_cmds1[] = {
|
||||
{ "test10", cmd_test10, "test10 cmd" },
|
||||
{ "test11", cmd_test11, "test11 cmd" },
|
||||
{ K_NULL, K_NULL, K_NULL }, /* never forget this!!!*/
|
||||
};
|
||||
|
||||
__STATIC__ shell_cmd_set_t custom_shell_cmd_set1 = {
|
||||
.list = TOS_SLIST_NODE(dummy),
|
||||
.commands = custom_shell_cmds1,
|
||||
};
|
||||
|
||||
void application_entry(void *arg)
|
||||
{
|
||||
/* if test on ALIENTEK_STM32F429, switch HAL_UART_PORT_2 to HAL_UART_PORT_1 */
|
||||
tos_hal_uart_init(&shell_uart, HAL_UART_PORT_2);
|
||||
|
||||
tos_shell_init(cmd_buf, sizeof(cmd_buf), uart_output, &custom_shell_cmd_set0);
|
||||
|
||||
tos_shell_cmd_set_regiser(&custom_shell_cmd_set1);
|
||||
|
||||
while (1) {
|
||||
tos_task_delay(1000);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -51,6 +51,10 @@
|
||||
} while(0)
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
|
||||
#define TOS_OBJ_INIT(obj, obj_type) knl_object_init(&obj->knl_obj, obj_type)
|
||||
#define TOS_OBJ_DEINIT(obj) knl_object_deinit(&obj->knl_obj)
|
||||
|
||||
#define TOS_OBJ_VERIFY(obj, obj_type) \
|
||||
do { \
|
||||
if (!knl_object_verify(&obj->knl_obj, obj_type)) { \
|
||||
@@ -66,8 +70,12 @@
|
||||
} while (0)
|
||||
|
||||
#else
|
||||
|
||||
#define TOS_OBJ_INIT(obj, obj_type)
|
||||
#define TOS_OBJ_DEINIT(obj)
|
||||
#define TOS_OBJ_VERIFY(obj, obj_type)
|
||||
#define TOS_OBJ_VERIFY_RC(obj, obj_type, return_code)
|
||||
|
||||
#endif
|
||||
|
||||
#if TOS_CFG_LIBC_PRINTF_EN > 0u
|
||||
|
||||
@@ -22,7 +22,7 @@ typedef struct k_slist_node_st {
|
||||
struct k_slist_node_st *next;
|
||||
} k_slist_t;
|
||||
|
||||
#define TOS_SLIST_NODE(node) \
|
||||
#define TOS_SLIST_NODE(dummy) \
|
||||
{ K_NULL }
|
||||
|
||||
#define TOS_SLIST_DEFINE(slist) \
|
||||
@@ -164,6 +164,18 @@ __API__ __STATIC_INLINE__ int tos_slist_length(k_slist_t *slist)
|
||||
return len;
|
||||
}
|
||||
|
||||
__API__ __STATIC_INLINE__ int tos_slist_contains(k_slist_t *node, k_slist_t *slist)
|
||||
{
|
||||
while (slist->next) {
|
||||
if (slist->next == node) {
|
||||
return K_TRUE;
|
||||
}
|
||||
|
||||
slist = slist->next;
|
||||
}
|
||||
|
||||
return K_FALSE;
|
||||
}
|
||||
__API__ __STATIC_INLINE__ int tos_slist_empty(k_slist_t *slist)
|
||||
{
|
||||
return !slist->next;
|
||||
|
||||
@@ -120,19 +120,17 @@ __API__ k_err_t tos_bin_heap_create(k_bin_heap_t *bin_heap, void *pool, size_t i
|
||||
TOS_PTR_SANITY_CHECK(pool);
|
||||
TOS_PTR_SANITY_CHECK(cmp);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&bin_heap->knl_obj, KNL_OBJ_TYPE_BINARY_HEAP);
|
||||
#endif
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&bin_heap->knl_obj);
|
||||
#endif
|
||||
|
||||
bin_heap->total = 0;
|
||||
bin_heap->cmp = cmp;
|
||||
bin_heap->item_size = item_size;
|
||||
bin_heap->item_cnt = item_cnt;
|
||||
bin_heap->pool = (uint8_t *)pool;
|
||||
|
||||
TOS_OBJ_INIT(bin_heap, KNL_OBJ_TYPE_BINARY_HEAP);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&bin_heap->knl_obj);
|
||||
#endif
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
@@ -153,9 +151,7 @@ __API__ k_err_t tos_bin_heap_destroy(k_bin_heap_t *bin_heap)
|
||||
bin_heap->item_cnt = 0;
|
||||
bin_heap->pool = K_NULL;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&bin_heap->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(bin_heap);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&bin_heap->knl_obj);
|
||||
#endif
|
||||
@@ -183,9 +179,7 @@ __API__ k_err_t tos_bin_heap_create_dyn(k_bin_heap_t *bin_heap, size_t item_cnt,
|
||||
bin_heap->item_cnt = item_cnt;
|
||||
bin_heap->pool = (uint8_t *)pool;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&bin_heap->knl_obj, KNL_OBJ_TYPE_BINARY_HEAP);
|
||||
#endif
|
||||
TOS_OBJ_INIT(bin_heap, KNL_OBJ_TYPE_BINARY_HEAP);
|
||||
knl_object_alloc_set_dynamic(&bin_heap->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -208,9 +202,7 @@ __API__ k_err_t tos_bin_heap_destroy_dyn(k_bin_heap_t *bin_heap)
|
||||
bin_heap->item_cnt = 0;
|
||||
bin_heap->pool = K_NULL;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&bin_heap->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(bin_heap);
|
||||
knl_object_alloc_reset(&bin_heap->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
|
||||
@@ -29,9 +29,7 @@ __API__ k_err_t tos_chr_fifo_create(k_chr_fifo_t *chr_fifo, void *buffer, size_t
|
||||
return err;
|
||||
}
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&chr_fifo->knl_obj, KNL_OBJ_TYPE_CHAR_FIFO);
|
||||
#endif
|
||||
TOS_OBJ_INIT(chr_fifo, KNL_OBJ_TYPE_CHAR_FIFO);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&chr_fifo->knl_obj);
|
||||
#endif
|
||||
@@ -57,9 +55,7 @@ __API__ k_err_t tos_chr_fifo_destroy(k_chr_fifo_t *chr_fifo)
|
||||
return err;
|
||||
}
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&chr_fifo->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(chr_fifo);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&chr_fifo->knl_obj);
|
||||
#endif
|
||||
@@ -80,9 +76,7 @@ __API__ k_err_t tos_chr_fifo_create_dyn(k_chr_fifo_t *chr_fifo, size_t fifo_size
|
||||
return err;
|
||||
}
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&chr_fifo->knl_obj, KNL_OBJ_TYPE_CHAR_FIFO);
|
||||
#endif
|
||||
TOS_OBJ_INIT(chr_fifo, KNL_OBJ_TYPE_CHAR_FIFO);
|
||||
knl_object_alloc_set_dynamic(&chr_fifo->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -104,9 +98,7 @@ __API__ k_err_t tos_chr_fifo_destroy_dyn(k_chr_fifo_t *chr_fifo)
|
||||
return err;
|
||||
}
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&chr_fifo->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(chr_fifo);
|
||||
knl_object_alloc_reset(&chr_fifo->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
|
||||
@@ -23,12 +23,9 @@ __API__ k_err_t tos_completion_create(k_completion_t *completion)
|
||||
{
|
||||
TOS_PTR_SANITY_CHECK(completion);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&completion->knl_obj, KNL_OBJ_TYPE_COMPLETION);
|
||||
#endif
|
||||
|
||||
pend_object_init(&completion->pend_obj);
|
||||
completion->done = (completion_done_t)0u;
|
||||
pend_object_init(&completion->pend_obj);
|
||||
TOS_OBJ_INIT(completion, KNL_OBJ_TYPE_COMPLETION);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
@@ -48,9 +45,7 @@ __API__ k_err_t tos_completion_destroy(k_completion_t *completion)
|
||||
|
||||
pend_object_deinit(&completion->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&completion->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(completion);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
knl_sched();
|
||||
|
||||
@@ -23,12 +23,9 @@ __API__ k_err_t tos_countdownlatch_create(k_countdownlatch_t *countdownlatch, k_
|
||||
{
|
||||
TOS_PTR_SANITY_CHECK(countdownlatch);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&countdownlatch->knl_obj, KNL_OBJ_TYPE_COUNTDOWNLATCH);
|
||||
#endif
|
||||
|
||||
pend_object_init(&countdownlatch->pend_obj);
|
||||
countdownlatch->count = count;
|
||||
pend_object_init(&countdownlatch->pend_obj);
|
||||
TOS_OBJ_INIT(countdownlatch, KNL_OBJ_TYPE_COUNTDOWNLATCH);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
@@ -48,9 +45,7 @@ __API__ k_err_t tos_countdownlatch_destroy(k_countdownlatch_t *countdownlatch)
|
||||
|
||||
pend_object_deinit(&countdownlatch->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&countdownlatch->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(countdownlatch);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
knl_sched();
|
||||
|
||||
@@ -23,12 +23,10 @@ __API__ k_err_t tos_event_create(k_event_t *event, k_event_flag_t init_flag)
|
||||
{
|
||||
TOS_PTR_SANITY_CHECK(event);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&event->knl_obj, KNL_OBJ_TYPE_EVENT);
|
||||
#endif
|
||||
|
||||
pend_object_init(&event->pend_obj);
|
||||
event->flag = init_flag;
|
||||
pend_object_init(&event->pend_obj);
|
||||
TOS_OBJ_INIT(event, KNL_OBJ_TYPE_EVENT);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
@@ -45,12 +43,11 @@ __API__ k_err_t tos_event_destroy(k_event_t *event)
|
||||
pend_wakeup_all(&event->pend_obj, PEND_STATE_DESTROY);
|
||||
}
|
||||
|
||||
pend_object_deinit(&event->pend_obj);
|
||||
event->flag = (k_event_flag_t)0u;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&event->knl_obj);
|
||||
#endif
|
||||
pend_object_deinit(&event->pend_obj);
|
||||
|
||||
TOS_OBJ_DEINIT(event);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
knl_sched();
|
||||
|
||||
@@ -32,9 +32,7 @@ __API__ k_err_t tos_mail_q_create(k_mail_q_t *mail_q, void *pool, size_t mail_cn
|
||||
|
||||
pend_object_init(&mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&mail_q->knl_obj, KNL_OBJ_TYPE_MAIL_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(mail_q, KNL_OBJ_TYPE_MAIL_QUEUE);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&mail_q->knl_obj);
|
||||
#endif
|
||||
@@ -70,9 +68,7 @@ __API__ k_err_t tos_mail_q_destroy(k_mail_q_t *mail_q)
|
||||
|
||||
pend_object_deinit(&mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&mail_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(mail_q);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&mail_q->knl_obj);
|
||||
#endif
|
||||
@@ -98,9 +94,7 @@ __API__ k_err_t tos_mail_q_create_dyn(k_mail_q_t *mail_q, size_t mail_cnt, size_
|
||||
|
||||
pend_object_init(&mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&mail_q->knl_obj, KNL_OBJ_TYPE_MAIL_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(mail_q, KNL_OBJ_TYPE_MAIL_QUEUE);
|
||||
knl_object_alloc_set_dynamic(&mail_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -132,9 +126,7 @@ __API__ k_err_t tos_mail_q_destroy_dyn(k_mail_q_t *mail_q)
|
||||
|
||||
pend_object_deinit(&mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&mail_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(mail_q);
|
||||
knl_object_alloc_reset(&mail_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
|
||||
@@ -33,9 +33,7 @@ __API__ k_err_t tos_msg_q_create(k_msg_q_t *msg_q, void *pool, size_t msg_cnt)
|
||||
|
||||
pend_object_init(&msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&msg_q->knl_obj, KNL_OBJ_TYPE_MESSAGE_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(msg_q, KNL_OBJ_TYPE_MESSAGE_QUEUE);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&msg_q->knl_obj);
|
||||
#endif
|
||||
@@ -71,9 +69,7 @@ __API__ k_err_t tos_msg_q_destroy(k_msg_q_t *msg_q)
|
||||
|
||||
pend_object_deinit(&msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&msg_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(msg_q);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&msg_q->knl_obj);
|
||||
#endif
|
||||
@@ -99,9 +95,7 @@ __API__ k_err_t tos_msg_q_create_dyn(k_msg_q_t *msg_q, size_t msg_cnt)
|
||||
|
||||
pend_object_init(&msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&msg_q->knl_obj, KNL_OBJ_TYPE_MESSAGE_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(msg_q, KNL_OBJ_TYPE_MESSAGE_QUEUE);
|
||||
knl_object_alloc_set_dynamic(&msg_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -133,9 +127,7 @@ __API__ k_err_t tos_msg_q_destroy_dyn(k_msg_q_t *msg_q)
|
||||
|
||||
pend_object_deinit(&msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&msg_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(msg_q);
|
||||
knl_object_alloc_reset(&msg_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
|
||||
@@ -46,15 +46,14 @@ __API__ k_err_t tos_mmblk_pool_create(k_mmblk_pool_t *mbp, void *pool_start, siz
|
||||
}
|
||||
*(void **)blk_next = K_NULL;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&mbp->knl_obj, KNL_OBJ_TYPE_MMBLK_POOL);
|
||||
#endif
|
||||
|
||||
mbp->pool_start = pool_start;
|
||||
mbp->free_list = pool_start;
|
||||
mbp->blk_free = blk_num;
|
||||
mbp->blk_max = blk_num;
|
||||
mbp->blk_size = blk_size;
|
||||
|
||||
TOS_OBJ_INIT(mbp, KNL_OBJ_TYPE_MMBLK_POOL);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
@@ -69,9 +68,7 @@ __API__ k_err_t tos_mmblk_pool_destroy(k_mmblk_pool_t *mbp)
|
||||
mbp->blk_max = 0;
|
||||
mbp->blk_size = 0;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&mbp->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(mbp);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
@@ -72,16 +72,14 @@ __API__ k_err_t tos_mutex_create(k_mutex_t *mutex)
|
||||
TOS_IN_IRQ_CHECK();
|
||||
TOS_PTR_SANITY_CHECK(mutex);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&mutex->knl_obj, KNL_OBJ_TYPE_MUTEX);
|
||||
#endif
|
||||
|
||||
pend_object_init(&mutex->pend_obj);
|
||||
mutex->pend_nesting = (k_nesting_t)0u;
|
||||
mutex->owner = K_NULL;
|
||||
mutex->owner_orig_prio = K_TASK_PRIO_INVALID;
|
||||
tos_list_init(&mutex->owner_anchor);
|
||||
|
||||
TOS_OBJ_INIT(mutex, KNL_OBJ_TYPE_MUTEX);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
@@ -105,9 +103,7 @@ __API__ k_err_t tos_mutex_destroy(k_mutex_t *mutex)
|
||||
|
||||
pend_object_deinit(&mutex->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&mutex->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(mutex);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
knl_sched();
|
||||
|
||||
@@ -40,9 +40,7 @@ __API__ k_err_t tos_prio_mail_q_create(k_prio_mail_q_t *prio_mail_q, void *pool,
|
||||
prio_mail_q->prio_q_mgr_array = prio_q_mgr_array;
|
||||
pend_object_init(&prio_mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&prio_mail_q->knl_obj, KNL_OBJ_TYPE_PRIORITY_MAIL_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(prio_mail_q, KNL_OBJ_TYPE_PRIORITY_MAIL_QUEUE);
|
||||
knl_object_alloc_set_static(&prio_mail_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -77,9 +75,7 @@ __API__ k_err_t tos_prio_mail_q_destroy(k_prio_mail_q_t *prio_mail_q)
|
||||
|
||||
pend_object_deinit(&prio_mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_mail_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_mail_q);
|
||||
knl_object_alloc_reset(&prio_mail_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
@@ -101,9 +97,7 @@ __API__ k_err_t tos_prio_mail_q_create_dyn(k_prio_mail_q_t *prio_mail_q, size_t
|
||||
|
||||
pend_object_init(&prio_mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&prio_mail_q->knl_obj, KNL_OBJ_TYPE_PRIORITY_MAIL_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(prio_mail_q, KNL_OBJ_TYPE_PRIORITY_MAIL_QUEUE);
|
||||
knl_object_alloc_set_dynamic(&prio_mail_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -135,9 +129,7 @@ __API__ k_err_t tos_prio_mail_q_destroy_dyn(k_prio_mail_q_t *prio_mail_q)
|
||||
|
||||
pend_object_deinit(&prio_mail_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_mail_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_mail_q);
|
||||
knl_object_alloc_reset(&prio_mail_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
|
||||
@@ -40,9 +40,7 @@ __API__ k_err_t tos_prio_msg_q_create(k_prio_msg_q_t *prio_msg_q, void *pool, si
|
||||
prio_msg_q->prio_q_mgr_array = prio_q_mgr_array;
|
||||
pend_object_init(&prio_msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&prio_msg_q->knl_obj, KNL_OBJ_TYPE_PRIORITY_MESSAGE_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(prio_msg_q, KNL_OBJ_TYPE_PRIORITY_MESSAGE_QUEUE);
|
||||
knl_object_alloc_set_static(&prio_msg_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -77,9 +75,7 @@ __API__ k_err_t tos_prio_msg_q_destroy(k_prio_msg_q_t *prio_msg_q)
|
||||
|
||||
pend_object_deinit(&prio_msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_msg_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_msg_q);
|
||||
knl_object_alloc_reset(&prio_msg_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
@@ -101,9 +97,7 @@ __API__ k_err_t tos_prio_msg_q_create_dyn(k_prio_msg_q_t *prio_msg_q, size_t msg
|
||||
|
||||
pend_object_init(&prio_msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&prio_msg_q->knl_obj, KNL_OBJ_TYPE_PRIORITY_MESSAGE_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(prio_msg_q, KNL_OBJ_TYPE_PRIORITY_MESSAGE_QUEUE);
|
||||
knl_object_alloc_set_dynamic(&prio_msg_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -138,9 +132,7 @@ __API__ k_err_t tos_prio_msg_q_destroy_dyn(k_prio_msg_q_t *prio_msg_q)
|
||||
|
||||
pend_object_deinit(&prio_msg_q->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_msg_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_msg_q);
|
||||
knl_object_alloc_reset(&prio_msg_q->knl_obj);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
|
||||
@@ -179,9 +179,7 @@ __API__ k_err_t tos_prio_q_create(k_prio_q_t *prio_q, void *mgr_array, void *poo
|
||||
prio_q->mgr_pool = (uint8_t *)mgr_array;
|
||||
prio_q->data_pool = (uint8_t *)pool;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&prio_q->knl_obj, KNL_OBJ_TYPE_PRIORITY_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(prio_q, KNL_OBJ_TYPE_PRIORITY_QUEUE);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&prio_q->knl_obj);
|
||||
#endif
|
||||
@@ -209,9 +207,7 @@ __API__ k_err_t tos_prio_q_destroy(k_prio_q_t *prio_q)
|
||||
prio_q->mgr_pool = K_NULL;
|
||||
prio_q->data_pool = K_NULL;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_q);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&prio_q->knl_obj);
|
||||
#endif
|
||||
@@ -271,9 +267,7 @@ __API__ k_err_t tos_prio_q_destroy_dyn(k_prio_q_t *prio_q)
|
||||
prio_q->mgr_pool = K_NULL;
|
||||
prio_q->data_pool = K_NULL;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&prio_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(prio_q);
|
||||
knl_object_alloc_reset(&prio_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
|
||||
@@ -55,9 +55,7 @@ __STATIC_INLINE__ void ring_q_item_decrease(k_ring_q_t *ring_q)
|
||||
ring_q->item_size = item_size;
|
||||
ring_q->item_cnt = item_cnt;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&ring_q->knl_obj, KNL_OBJ_TYPE_RING_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(ring_q, KNL_OBJ_TYPE_RING_QUEUE);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_set_static(&ring_q->knl_obj);
|
||||
#endif
|
||||
@@ -84,9 +82,7 @@ __API__ k_err_t tos_ring_q_destroy(k_ring_q_t *ring_q)
|
||||
ring_q->item_size = 0u;
|
||||
ring_q->item_cnt = 0u;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&ring_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(ring_q);
|
||||
#if TOS_CFG_MMHEAP_EN > 0u
|
||||
knl_object_alloc_reset(&ring_q->knl_obj);
|
||||
#endif
|
||||
@@ -115,9 +111,7 @@ __API__ k_err_t tos_ring_q_destroy(k_ring_q_t *ring_q)
|
||||
ring_q->item_size = item_size;
|
||||
ring_q->item_cnt = item_cnt;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&ring_q->knl_obj, KNL_OBJ_TYPE_RING_QUEUE);
|
||||
#endif
|
||||
TOS_OBJ_INIT(ring_q, KNL_OBJ_TYPE_RING_QUEUE);
|
||||
knl_object_alloc_set_dynamic(&ring_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
@@ -142,9 +136,7 @@ __API__ k_err_t tos_ring_q_destroy_dyn(k_ring_q_t *ring_q)
|
||||
ring_q->item_size = 0u;
|
||||
ring_q->item_cnt = 0u;
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&ring_q->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(ring_q);
|
||||
knl_object_alloc_reset(&ring_q->knl_obj);
|
||||
|
||||
return K_ERR_NONE;
|
||||
|
||||
@@ -23,13 +23,10 @@ __API__ k_err_t tos_sem_create_max(k_sem_t *sem, k_sem_cnt_t init_count, k_sem_c
|
||||
{
|
||||
TOS_PTR_SANITY_CHECK(sem);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&sem->knl_obj, KNL_OBJ_TYPE_SEMAPHORE);
|
||||
#endif
|
||||
|
||||
pend_object_init(&sem->pend_obj);
|
||||
sem->count = init_count;
|
||||
sem->count_max = max_count;
|
||||
pend_object_init(&sem->pend_obj);
|
||||
TOS_OBJ_INIT(sem, KNL_OBJ_TYPE_SEMAPHORE);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
@@ -54,9 +51,7 @@ __API__ k_err_t tos_sem_destroy(k_sem_t *sem)
|
||||
|
||||
pend_object_deinit(&sem->pend_obj);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&sem->knl_obj);
|
||||
#endif
|
||||
TOS_OBJ_DEINIT(sem);
|
||||
|
||||
TOS_CPU_INT_ENABLE();
|
||||
knl_sched();
|
||||
|
||||
@@ -19,10 +19,6 @@
|
||||
|
||||
__STATIC_INLINE__ void task_reset(k_task_t *task)
|
||||
{
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&task->knl_obj);
|
||||
#endif
|
||||
|
||||
#if TOS_CFG_TASK_DYNAMIC_CREATE_EN > 0u
|
||||
knl_object_alloc_reset(&task->knl_obj);
|
||||
|
||||
@@ -49,6 +45,7 @@ __STATIC_INLINE__ void task_reset(k_task_t *task)
|
||||
task->mail_size = 0;
|
||||
#endif
|
||||
|
||||
TOS_OBJ_DEINIT(task);
|
||||
}
|
||||
|
||||
__STATIC__ void task_exit(void)
|
||||
@@ -114,10 +111,7 @@ __API__ k_err_t tos_task_create(k_task_t *task,
|
||||
task_reset(task);
|
||||
tos_list_add(&task->stat_list, &k_stat_list);
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&task->knl_obj, KNL_OBJ_TYPE_TASK);
|
||||
#endif
|
||||
|
||||
TOS_OBJ_INIT(task, KNL_OBJ_TYPE_TASK);
|
||||
#if TOS_CFG_TASK_DYNAMIC_CREATE_EN > 0u
|
||||
knl_object_alloc_set_static(&task->knl_obj);
|
||||
#endif
|
||||
|
||||
@@ -82,10 +82,6 @@ __STATIC__ void timer_takeoff(k_timer_t *tmr)
|
||||
|
||||
__STATIC_INLINE__ void timer_reset(k_timer_t *tmr)
|
||||
{
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_deinit(&tmr->knl_obj);
|
||||
#endif
|
||||
|
||||
tmr->state = TIMER_STATE_UNUSED;
|
||||
tmr->delay = (k_tick_t)0u;
|
||||
tmr->expires = (k_tick_t)0u;
|
||||
@@ -94,6 +90,8 @@ __STATIC_INLINE__ void timer_reset(k_timer_t *tmr)
|
||||
tmr->cb = K_NULL;
|
||||
tmr->cb_arg = K_NULL;
|
||||
tos_list_init(&tmr->list);
|
||||
|
||||
TOS_OBJ_DEINIT(tmr);
|
||||
}
|
||||
|
||||
__API__ k_err_t tos_timer_create(k_timer_t *tmr,
|
||||
@@ -127,10 +125,6 @@ __API__ k_err_t tos_timer_create(k_timer_t *tmr,
|
||||
return K_ERR_TIMER_PERIOD_FOREVER;
|
||||
}
|
||||
|
||||
#if TOS_CFG_OBJECT_VERIFY_EN > 0u
|
||||
knl_object_init(&tmr->knl_obj, KNL_OBJ_TYPE_TIMER);
|
||||
#endif
|
||||
|
||||
tmr->state = TIMER_STATE_STOPPED;
|
||||
tmr->delay = delay;
|
||||
tmr->expires = (k_tick_t)0u;
|
||||
@@ -139,6 +133,9 @@ __API__ k_err_t tos_timer_create(k_timer_t *tmr,
|
||||
tmr->cb = callback;
|
||||
tmr->cb_arg = cb_arg;
|
||||
tos_list_init(&tmr->list);
|
||||
|
||||
TOS_OBJ_INIT(tmr, KNL_OBJ_TYPE_TIMER);
|
||||
|
||||
return K_ERR_NONE;
|
||||
}
|
||||
|
||||
|
||||
@@ -362,7 +362,7 @@ __API__ int tos_at_raw_data_send_until(at_echo_t *echo, uint32_t timeout, const
|
||||
* @param[in] data uart received data.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
*/
|
||||
__API__ void tos_at_uart_input_byte(uint8_t data);
|
||||
|
||||
/**
|
||||
|
||||
@@ -907,7 +907,7 @@ __API__ void tos_at_deinit(void)
|
||||
|
||||
/* To completely decouple the uart intterupt and at agent, we need a more powerful
|
||||
hal(driver framework), that would be a huge work, we place it in future plans. */
|
||||
__API__ void tos_at_uart_write_byte(uint8_t data)
|
||||
__API__ void tos_at_uart_input_byte(uint8_t data)
|
||||
{
|
||||
if (tos_chr_fifo_push(&AT_AGENT->uart_rx_fifo, data) == K_ERR_NONE) {
|
||||
tos_sem_post(&AT_AGENT->uart_rx_sem);
|
||||
|
||||
@@ -35,12 +35,13 @@ __API__ int tos_hal_uart_write(hal_uart_t *uart, const uint8_t *buf, size_t size
|
||||
}
|
||||
|
||||
uart_handle = (UART_HandleTypeDef *)uart->private_uart;
|
||||
(void)HAL_UART_Transmit(uart_handle, buf, size, timeout);
|
||||
(void)HAL_UART_Transmit(uart_handle, (uint8_t *)buf, size, timeout);
|
||||
return 0;
|
||||
}
|
||||
|
||||
__API__ int tos_hal_uart_read(hal_uart_t *uart, const uint8_t *buf, size_t size, uint32_t timeout)
|
||||
{
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
__API__ int tos_hal_uart_deinit(hal_uart_t *uart)
|
||||
|
||||
Reference in New Issue
Block a user