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add ch32v307 risc-v support,IDE is MounRiver Studio

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supowang
2022-03-04 14:16:19 +08:00
parent 9de2090de9
commit 7375f16efc
88 changed files with 31620 additions and 0 deletions
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173
arch/risc-v/risc-v3a/common/include/tos_cpu.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _TOS_CPU_H_
#define _TOS_CPU_H_
#include "port_config.h"
typedef struct cpu_context_st {
cpu_data_t mepc;
cpu_data_t mstatus;
union { cpu_data_t x1, ra; };
union { cpu_data_t x3, gp; };
union { cpu_data_t x4, tp; };
union { cpu_data_t x5, t0; };
union { cpu_data_t x6, t1; };
union { cpu_data_t x7, t2; };
union { cpu_data_t x8, s0, fp; };
union { cpu_data_t x9, s1; };
union { cpu_data_t x10, a0; };
union { cpu_data_t x11, a1; };
union { cpu_data_t x12, a2; };
union { cpu_data_t x13, a3; };
union { cpu_data_t x14, a4; };
union { cpu_data_t x15, a5; };
union { cpu_data_t x16, a6; };
union { cpu_data_t x17, a7; };
union { cpu_data_t x18, s2; };
union { cpu_data_t x19, s3; };
union { cpu_data_t x20, s4; };
union { cpu_data_t x21, s5; };
union { cpu_data_t x22, s6; };
union { cpu_data_t x23, s7; };
union { cpu_data_t x24, s8; };
union { cpu_data_t x25, s9; };
union { cpu_data_t x26, s10; };
union { cpu_data_t x27, s11; };
union { cpu_data_t x28, t3; };
union { cpu_data_t x29, t4; };
union { cpu_data_t x30, t5; };
union { cpu_data_t x31, t6; };
#if ARCH_RISCV_FPU
/* float reg table */
union { cpu_data_t f0, ft0; };
union { cpu_data_t f1, ft1; };
union { cpu_data_t f2, ft2; };
union { cpu_data_t f3, ft3; };
union { cpu_data_t f4, ft4; };
union { cpu_data_t f5, ft5; };
union { cpu_data_t f6, ft6; };
union { cpu_data_t f7, ft7; };
union { cpu_data_t f8, fs0; };
union { cpu_data_t f9, fs1; };
union { cpu_data_t f10, fa0; };
union { cpu_data_t f11, fa1; };
union { cpu_data_t f12, fa2; };
union { cpu_data_t f13, fa3; };
union { cpu_data_t f14, fa4; };
union { cpu_data_t f15, fa5; };
union { cpu_data_t f16, fa6; };
union { cpu_data_t f17, fa7; };
union { cpu_data_t f18, fs2; };
union { cpu_data_t f19, fs3; };
union { cpu_data_t f20, fs4; };
union { cpu_data_t f21, fs5; };
union { cpu_data_t f22, fs6; };
union { cpu_data_t f23, fs7; };
union { cpu_data_t f24, fs8; };
union { cpu_data_t f25, fs9; };
union { cpu_data_t f26, fs10; };
union { cpu_data_t f27, fs11; };
union { cpu_data_t f28, ft8; };
union { cpu_data_t f29, ft9; };
union { cpu_data_t f30, ft10;};
union { cpu_data_t f31, ft11;};
#endif
} cpu_context_t;
__API__ uint32_t tos_cpu_clz(uint32_t val);
__API__ void tos_cpu_int_disable(void);
__API__ void tos_cpu_int_enable(void);
__API__ cpu_cpsr_t tos_cpu_cpsr_save(void);
__API__ void tos_cpu_cpsr_restore(cpu_cpsr_t cpsr);
__KNL__ void cpu_init(void);
__KNL__ void cpu_reset(void);
__KNL__ void cpu_systick_init(k_cycle_t cycle_per_tick);
__KNL__ void cpu_sched_start(void);
__KNL__ void cpu_context_switch(void);
__KNL__ void cpu_irq_context_switch(void);
__KNL__ k_stack_t *cpu_task_stk_init(void *entry,
void *arg,
void *exit,
k_stack_t *stk_base,
size_t stk_size);
#if TOS_CFG_TICKLESS_EN > 0u
__KNL__ void cpu_systick_resume(void);
__KNL__ void cpu_systick_suspend(void);
__KNL__ void cpu_systick_reload_reset(void);
__KNL__ void cpu_systick_pending_reset(void);
__KNL__ k_time_t cpu_systick_max_delay_millisecond(void);
__KNL__ void cpu_systick_expires_set(k_time_t millisecond);
__KNL__ void cpu_systick_reset(void);
#endif
#if TOS_CFG_PWR_MGR_EN > 0u
__KNL__ void cpu_sleep_mode_enter(void);
__KNL__ void cpu_stop_mode_enter(void);
__KNL__ void cpu_standby_mode_enter(void);
#endif
#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
#error "unsupport now"
#endif
/* Allocates CPU status register word. */
#define TOS_CPU_CPSR_ALLOC() cpu_cpsr_t cpu_cpsr = (cpu_cpsr_t)0u
/* Save CPU status word & disable interrupts.*/
#define TOS_CPU_INT_DISABLE() \
do { \
cpu_cpsr = tos_cpu_cpsr_save(); \
} while (0)
/* Restore CPU status word. */
#define TOS_CPU_INT_ENABLE() \
do { \
tos_cpu_cpsr_restore(cpu_cpsr); \
} while (0)
#endif /* _TOS_CPU_H_ */

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arch/risc-v/risc-v3a/common/include/tos_cpu_def.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _TOS_CPU_DEF_H_
#define _TOS_CPU_DEF_H_
#define CPU_WORD_SIZE_08 1
#define CPU_WORD_SIZE_16 2
#define CPU_WORD_SIZE_32 3
#define CPU_WORD_SIZE_64 4
#define CPU_STK_GROWTH_ASCENDING 1
#define CPU_STK_GROWTH_DESCENDING 2
#define CPU_BYTE_ORDER_LITTLE_ENDIAN 1
#define CPU_BYTE_ORDER_BIG_ENDIAN 2
#endif /* _TOS_CPU_DEF_H_ */

55
arch/risc-v/risc-v3a/common/include/tos_cpu_types.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _TOS_CPU_TYPES_H_
#define _TOS_CPU_TYPES_H_
/* CPU address type based on address bus size. */
#if (TOS_CFG_CPU_ADDR_SIZE == CPU_WORD_SIZE_32)
typedef uint32_t cpu_addr_t;
#elif (TOS_CFG_CPU_ADDR_SIZE == CPU_WORD_SIZE_16)
typedef uint16_t cpu_addr_t;
#else
typedef uint8_t cpu_addr_t;
#endif
/* CPU data type based on data bus size. */
#if (TOS_CFG_CPU_DATA_SIZE == CPU_WORD_SIZE_32)
typedef uint32_t cpu_data_t;
#elif (TOS_CFG_CPU_DATA_SIZE == CPU_WORD_SIZE_16)
typedef uint16_t cpu_data_t;
#else
typedef uint8_t cpu_data_t;
#endif
#if (TOS_CFG_CPU_HRTIMER_EN > 0)
#if (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_08)
typedef uint8_t cpu_hrtimer_t;
#elif (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_16)
typedef uint16_t cpu_hrtimer_t;
#elif (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_64)
typedef uint64_t cpu_hrtimer_t;
#else
typedef uint32_t cpu_hrtimer_t;
#endif
#else
typedef uint32_t cpu_hrtimer_t;
#endif
typedef cpu_addr_t cpu_cpsr_t;
#endif

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arch/risc-v/risc-v3a/common/include/tos_fault.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _TOS_FAULT_H_
#define _TOS_FAULT_H_
#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
#error "unsupport now"
#endif
#endif /* _TOS_FAULT_H_ */

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arch/risc-v/risc-v3a/common/tos_cpu.c Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#include <tos_k.h>
#ifndef TOS_CFG_IRQ_STK_SIZE
#warning "did not specify the irq stack size, use default value"
#define TOS_CFG_IRQ_STK_SIZE 128
#endif
__aligned(4) k_stack_t k_irq_stk[TOS_CFG_IRQ_STK_SIZE];
k_stack_t *k_irq_stk_top = k_irq_stk + TOS_CFG_IRQ_STK_SIZE;
__API__ void tos_cpu_int_disable(void)
{
port_int_disable();
}
__API__ void tos_cpu_int_enable(void)
{
port_int_enable();
}
__API__ cpu_cpsr_t tos_cpu_cpsr_save(void)
{
return port_cpsr_save();
}
__API__ void tos_cpu_cpsr_restore(cpu_cpsr_t cpsr)
{
port_cpsr_restore(cpsr);
}
__KNL__ void cpu_context_switch(void)
{
port_context_switch();
}
__KNL__ void cpu_irq_context_switch(void)
{
port_irq_context_switch();
}
__KNL__ void cpu_sched_start(void)
{
port_sched_start();
}
__KNL__ void cpu_systick_init(k_cycle_t cycle_per_tick)
{
port_systick_priority_set(TOS_CFG_CPU_SYSTICK_PRIO);
port_systick_config(cycle_per_tick);
}
__KNL__ void cpu_init(void) {
// reserve storage space for sp registers
k_irq_stk_top = (k_stack_t *)(((cpu_addr_t) k_irq_stk_top) - sizeof(cpu_data_t));
k_irq_stk_top = (k_stack_t *)(((cpu_addr_t) k_irq_stk_top) & 0xFFFFFFFC);
k_cpu_cycle_per_tick = TOS_CFG_CPU_CLOCK / k_cpu_tick_per_second;
cpu_systick_init(k_cpu_cycle_per_tick);
port_cpu_init();
}
/*
Inx Offset Register
31 124 x31 t6
32 120 x30 t5
29 116 x29 t4
28 112 x28 t3
27 108 x27 s11
26 104 x26 s10
25 100 x25 s9
24 096 x24 s8
23 092 x23 s7
22 088 x22 s6
21 084 x21 s5
20 080 x20 s4
19 076 x19 s3
18 072 x18 s2
17 068 x17 a7
16 064 x16 a6
15 060 x15 a5
14 056 x14 a4
13 052 x13 a3
12 048 x12 a2
11 044 x11 a1
10 040 x10 a0
09 036 x9 s1
08 032 x8 s0/fp
07 028 x7 t2
06 024 x6 t1
05 020 x5 t0
04 016 x4 tp
03 012 x3 gp
02 008 x1 ra
01 004 mstatus
00 000 mepc
*/
__KNL__ k_stack_t *cpu_task_stk_init(void *entry,
void *arg,
void *exit,
k_stack_t *stk_base,
size_t stk_size)
{
cpu_data_t *sp = 0;
cpu_context_t *regs = 0;
sp = (cpu_data_t *)&stk_base[stk_size];
sp = (cpu_data_t *)((cpu_addr_t)(sp) & 0xFFFFFFFC);
sp -= (sizeof(cpu_context_t)/sizeof(cpu_data_t));
regs = (cpu_context_t*) sp;
for(int i=1; i<(sizeof(cpu_context_t)/sizeof(cpu_data_t)); i++) {
*(sp + i) = 0xACEADD00 | ((i / 10) << 4) | (i % 10);
}
cpu_data_t gp = 0;
__ASM__ __VOLATILE__ ("mv %0, gp":"=r"(gp));
regs->gp = (cpu_data_t)gp; // global pointer
regs->a0 = (cpu_data_t)arg; // argument
regs->ra = (cpu_data_t)exit; // return address
regs->mstatus = (cpu_data_t)0x00007880; // return to machine mode and enable interrupt
regs->mepc = (cpu_data_t)entry; // task entry
return (k_stack_t*)sp;
}
__API__ uint32_t tos_cpu_clz(uint32_t val)
{
uint32_t nbr_lead_zeros = 0;
if (!(val & 0xFFFF0000)) {
val <<= 16;
nbr_lead_zeros += 16;
}
if (!(val & 0xFF000000)) {
val <<= 8;
nbr_lead_zeros += 8;
}
if (!(val & 0xF0000000)) {
val <<= 4;
nbr_lead_zeros += 4;
}
if (!(val & 0xC0000000)) {
val <<= 2;
nbr_lead_zeros += 2;
}
if (!(val & 0x80000000)) {
nbr_lead_zeros += 1;
}
if (!val) {
nbr_lead_zeros += 1;
}
return (nbr_lead_zeros);
}

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arch/risc-v/risc-v3a/rv32i/gcc/port.h Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _PORT_H_
#define _PORT_H_
#ifndef __ASSEMBLER__
/* defined by wch */
#define GET_INT_SP() {asm("mv t0, sp");asm("lw sp, k_irq_stk_top");asm("sw t0,0(sp)");}
#define FREE_INT_SP() {asm("lw sp,0(sp)");}
__PORT__ void sw_clearpend(void);
__PORT__ void port_int_disable(void); //at port.s
__PORT__ void port_int_enable(void); //at port.s
/* risc-v <20><>cpsr<73><72><EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD>ȡmstatus,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MIE */
__PORT__ cpu_cpsr_t port_cpsr_save(void); //at port.s
/* risc-v <20><>cpsr,<2C>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD>mstatus<75><73>ֵ */
__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr); //at port.s
__PORT__ void port_cpu_reset(void); //at port.c
__PORT__ void port_sched_start(void) __NO_RETURN__; //at port.s
__PORT__ void port_context_switch(void); //at port.c
__PORT__ void port_irq_context_switch(void); //at port.c
__PORT__ void port_systick_config(uint32_t cycle_per_tick); //at port.c
__PORT__ void port_systick_priority_set(uint32_t prio); //at port.c
__PORT__ void port_cpu_init(); //at port.c
#if TOS_CFG_TICKLESS_EN > 0u
__PORT__ void port_systick_resume(void);
__PORT__ void port_systick_suspend(void);
__PORT__ void port_systick_reload(uint32_t cycle_per_tick);
__PORT__ void port_systick_pending_reset(void);
__PORT__ k_time_t port_systick_max_delay_millisecond(void);
#endif
#if TOS_CFG_PWR_MGR_EN > 0u
__PORT__ void port_sleep_mode_enter(void);
__PORT__ void port_stop_mode_enter(void);
__PORT__ void port_standby_mode_enter(void);
#endif
#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
__PORT__ void HardFault_Handler(void);
__PORT__ void port_fault_diagnosis(void);
#endif
#endif /* __ASSEMBLER__ */
#define REGBYTES 4
#endif /* _PORT_H_ */

148
arch/risc-v/risc-v3a/rv32i/gcc/port_c.c Normal file
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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#include <tos_k.h>
#include "ch32v30x.h"
#include "core_riscv.h"
__PORT__ void port_cpu_reset(void)
{
NVIC_SystemReset();
}
/* clear soft interrupt */
__PORT__ void sw_clearpend(void)
{
SysTick->CTLR &= ~(1<<31);
}
/* trigger software interrupt */
__PORT__ void port_context_switch(void)
{
SysTick->CTLR |= (1<<31);
}
/* trigger software interrupt */
__PORT__ void port_irq_context_switch(void)
{
SysTick->CTLR |= (1<<31);
}
__PORT__ void port_systick_config(uint32_t cycle_per_tick)
{
SysTick->CTLR=0;
SysTick->SR=0;
SysTick->CNT=0;
SysTick->CMP=cycle_per_tick-1;
SysTick->CTLR=0xF;
}
__PORT__ void port_systick_priority_set(uint32_t prio)
{
NVIC_SetPriority(SysTicK_IRQn, prio);
}
__PORT__ void port_cpu_init()
{
NVIC_SetPriority(Software_IRQn,0xf0);
NVIC_EnableIRQ(SysTicK_IRQn);
NVIC_EnableIRQ(Software_IRQn);
}
void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void SysTick_Handler(void)
{
GET_INT_SP(); /* <20>л<EFBFBD><D0BB>ж<EFBFBD>ջ */
if (tos_knl_is_running())
{
tos_knl_irq_enter();
SysTick->SR=0;
tos_tick_handler();
tos_knl_irq_leave();
}
FREE_INT_SP(); /* <20>ͷ<EFBFBD><CDB7>ж<EFBFBD>ջ */
}
#if TOS_CFG_TICKLESS_EN > 0u
__PORT__ k_time_t port_systick_max_delay_millisecond(void)
{
k_time_t max_millisecond;
uint32_t max_cycle;
max_cycle = 0xffffffff; // systick <20><>64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>32λ
max_millisecond = (k_time_t)((uint64_t)max_cycle * K_TIME_MILLISEC_PER_SEC / TOS_CFG_CPU_CLOCK); // CLOCK: cycle per second
return max_millisecond;
}
__PORT__ void port_systick_resume(void)
{
SysTick->CTLR |= (3<<0);
}
__PORT__ void port_systick_suspend(void)
{
SysTick->CTLR &= ~(3<<0);
}
__PORT__ k_cycle_t port_systick_max_reload_cycle(void)
{
return 0xffffffff;
}
__PORT__ void port_systick_reload(uint32_t cycle_per_tick)
{
port_systick_config(cycle_per_tick);
}
__PORT__ void port_systick_pending_reset(void)
{
PFIC->IPRR[0] |= (1<<12); //clear pend
}
#endif
#if TOS_CFG_PWR_MGR_EN > 0u
__PORT__ void port_sleep_mode_enter(void)
{
/* only CPU sleep */
PFIC->SCTLR |= (1<<2);
__WFI();
PFIC->SCTLR &= ~(1<<2);
}
__PORT__ void port_stop_mode_enter(void)
{
PWR_EnterSTOPMode(PWR_Regulator_ON, PWR_STOPEntry_WFI);
}
__PORT__ void port_standby_mode_enter(void)
{
PWR_EnterSTANDBYMode();
}
#endif

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/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _PORT_CONFIG_H_
#define _PORT_CONFIG_H_
/* FPU is used */
#define ARCH_RISCV_FPU 0u
#define TOS_CFG_CPU_ADDR_SIZE CPU_WORD_SIZE_32
#define TOS_CFG_CPU_DATA_SIZE CPU_WORD_SIZE_32
#define TOS_CFG_CPU_STK_GROWTH CPU_STK_GROWTH_DESCENDING
#define TOS_CFG_CPU_HRTIMER_EN 0u
#define TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT 0u
#define TOS_CFG_CPU_BYTE_ORDER CPU_BYTE_ORDER_LITTLE_ENDIAN
/* int reg offset table */
#define __reg_mepc_OFFSET 0x00
#define __reg_mstatus_OFFSET 0x04
#define __reg_x1_OFFSET 0x08
#define __reg_x3_OFFSET 0x0C
#define __reg_x4_OFFSET 0x10
#define __reg_x5_OFFSET 0x14
#define __reg_x6_OFFSET 0x18
#define __reg_x7_OFFSET 0x1C
#define __reg_x8_OFFSET 0x20
#define __reg_x9_OFFSET 0x24
#define __reg_x10_OFFSET 0x28
#define __reg_x11_OFFSET 0x2C
#define __reg_x12_OFFSET 0x30
#define __reg_x13_OFFSET 0x34
#define __reg_x14_OFFSET 0x38
#define __reg_x15_OFFSET 0x3C
#define __reg_x16_OFFSET 0x40
#define __reg_x17_OFFSET 0x44
#define __reg_x18_OFFSET 0x48
#define __reg_x19_OFFSET 0x4C
#define __reg_x20_OFFSET 0x50
#define __reg_x21_OFFSET 0x54
#define __reg_x22_OFFSET 0x58
#define __reg_x23_OFFSET 0x5C
#define __reg_x24_OFFSET 0x60
#define __reg_x25_OFFSET 0x64
#define __reg_x26_OFFSET 0x68
#define __reg_x27_OFFSET 0x6C
#define __reg_x28_OFFSET 0x70
#define __reg_x29_OFFSET 0x74
#define __reg_x30_OFFSET 0x78
#define __reg_x31_OFFSET 0x7C
#define __reg_mepc__OFFSET __reg_mepc_OFFSET
#define __reg_mstatus__OFFSET __reg_mstatus_OFFSET
#define __reg_ra__OFFSET __reg_x1_OFFSET
#define __reg_gp__OFFSET __reg_x3_OFFSET
#define __reg_tp__OFFSET __reg_x4_OFFSET
#define __reg_t0__OFFSET __reg_x5_OFFSET
#define __reg_t1__OFFSET __reg_x6_OFFSET
#define __reg_t2__OFFSET __reg_x7_OFFSET
#define __reg_s0__OFFSET __reg_x8_OFFSET
#define __reg_fp__OFFSET __reg_x8_OFFSET
#define __reg_s1__OFFSET __reg_x9_OFFSET
#define __reg_a0__OFFSET __reg_x10_OFFSET
#define __reg_a1__OFFSET __reg_x11_OFFSET
#define __reg_a2__OFFSET __reg_x12_OFFSET
#define __reg_a3__OFFSET __reg_x13_OFFSET
#define __reg_a4__OFFSET __reg_x14_OFFSET
#define __reg_a5__OFFSET __reg_x15_OFFSET
#define __reg_a6__OFFSET __reg_x16_OFFSET
#define __reg_a7__OFFSET __reg_x17_OFFSET
#define __reg_s2__OFFSET __reg_x18_OFFSET
#define __reg_s3__OFFSET __reg_x19_OFFSET
#define __reg_s4__OFFSET __reg_x20_OFFSET
#define __reg_s5__OFFSET __reg_x21_OFFSET
#define __reg_s6__OFFSET __reg_x22_OFFSET
#define __reg_s7__OFFSET __reg_x23_OFFSET
#define __reg_s8__OFFSET __reg_x24_OFFSET
#define __reg_s9__OFFSET __reg_x25_OFFSET
#define __reg_s10__OFFSET __reg_x26_OFFSET
#define __reg_s11__OFFSET __reg_x27_OFFSET
#define __reg_t3__OFFSET __reg_x28_OFFSET
#define __reg_t4__OFFSET __reg_x29_OFFSET
#define __reg_t5__OFFSET __reg_x30_OFFSET
#define __reg_t6__OFFSET __reg_x31_OFFSET
#if ARCH_RISCV_FPU
/* float reg offset table */
#define __reg_f0_OFFSET 0x00
#define __reg_f1_OFFSET 0x04
#define __reg_f2_OFFSET 0x08
#define __reg_f3_OFFSET 0x0C
#define __reg_f4_OFFSET 0x10
#define __reg_f5_OFFSET 0x14
#define __reg_f6_OFFSET 0x18
#define __reg_f7_OFFSET 0x1C
#define __reg_f8_OFFSET 0x20
#define __reg_f9_OFFSET 0x24
#define __reg_f10_OFFSET 0x28
#define __reg_f11_OFFSET 0x2C
#define __reg_f12_OFFSET 0x30
#define __reg_f13_OFFSET 0x34
#define __reg_f14_OFFSET 0x38
#define __reg_f15_OFFSET 0x3C
#define __reg_f16_OFFSET 0x40
#define __reg_f17_OFFSET 0x44
#define __reg_f18_OFFSET 0x48
#define __reg_f19_OFFSET 0x4C
#define __reg_f20_OFFSET 0x50
#define __reg_f21_OFFSET 0x54
#define __reg_f22_OFFSET 0x58
#define __reg_f23_OFFSET 0x5C
#define __reg_f24_OFFSET 0x60
#define __reg_f25_OFFSET 0x64
#define __reg_f26_OFFSET 0x68
#define __reg_f27_OFFSET 0x6C
#define __reg_f28_OFFSET 0x70
#define __reg_f29_OFFSET 0x74
#define __reg_f30_OFFSET 0x78
#define __reg_f31_OFFSET 0x7C
#endif
#endif /* _PORT_CONFIG_H_ */

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arch/risc-v/risc-v3a/rv32i/gcc/port_s.S Normal file
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@@ -0,0 +1,322 @@
/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#include "port_config.h"
.global port_int_disable
.global port_int_enable
.global port_cpsr_save
.global port_cpsr_restore
.global port_sched_start
.extern k_curr_task
.extern k_next_task
.text
.align 2
.type port_int_disable, %function
port_int_disable:
csrci mstatus, 0x8
ret
.type port_int_enable, %function
port_int_enable:
csrsi mstatus, 0x8
ret
.type port_cpsr_save, %function
port_cpsr_save:
csrrci a0, mstatus, 0x8
ret
.type port_cpsr_restore, %function
port_cpsr_restore:
csrw mstatus, a0
ret
.align 2
.type port_sched_start, %function
port_sched_start:
/* load sp from k_curr_task->sp */
lw t0, k_curr_task
/* sp = k_curr_task->sp */
lw sp, (t0)
j restore_context
.align 2
.type restore_context, %function
restore_context:
// restore context
lw t0, __reg_mepc_OFFSET(sp)
csrw mepc, t0
lw t0, __reg_mstatus_OFFSET(sp)
csrw mstatus, t0
lw x1, __reg_x1_OFFSET(sp)
lw x3, __reg_x3_OFFSET(sp)
lw x4, __reg_x4_OFFSET(sp)
lw x5, __reg_x5_OFFSET(sp)
lw x6, __reg_x6_OFFSET(sp)
lw x7, __reg_x7_OFFSET(sp)
lw x8, __reg_x8_OFFSET(sp)
lw x9, __reg_x9_OFFSET(sp)
lw x10, __reg_x10_OFFSET(sp)
lw x11, __reg_x11_OFFSET(sp)
lw x12, __reg_x12_OFFSET(sp)
lw x13, __reg_x13_OFFSET(sp)
lw x14, __reg_x14_OFFSET(sp)
lw x15, __reg_x15_OFFSET(sp)
lw x16, __reg_x16_OFFSET(sp)
lw x17, __reg_x17_OFFSET(sp)
lw x18, __reg_x18_OFFSET(sp)
lw x19, __reg_x19_OFFSET(sp)
lw x20, __reg_x20_OFFSET(sp)
lw x21, __reg_x21_OFFSET(sp)
lw x22, __reg_x22_OFFSET(sp)
lw x23, __reg_x23_OFFSET(sp)
lw x24, __reg_x24_OFFSET(sp)
lw x25, __reg_x25_OFFSET(sp)
lw x26, __reg_x26_OFFSET(sp)
lw x27, __reg_x27_OFFSET(sp)
lw x28, __reg_x28_OFFSET(sp)
lw x29, __reg_x29_OFFSET(sp)
lw x30, __reg_x30_OFFSET(sp)
lw x31, __reg_x31_OFFSET(sp)
addi sp, sp, 128
#if ARCH_RISCV_FPU
flw f0, __reg_f0_OFFSET(sp)
flw f1, __reg_f1_OFFSET(sp)
flw f2, __reg_f2_OFFSET(sp)
flw f3, __reg_f3_OFFSET(sp)
flw f4, __reg_f4_OFFSET(sp)
flw f5, __reg_f5_OFFSET(sp)
flw f6, __reg_f6_OFFSET(sp)
flw f7, __reg_f7_OFFSET(sp)
flw f8, __reg_f8_OFFSET(sp)
flw f9, __reg_f9_OFFSET(sp)
flw f10, __reg_f10_OFFSET(sp)
flw f11, __reg_f11_OFFSET(sp)
flw f12, __reg_f12_OFFSET(sp)
flw f13, __reg_f13_OFFSET(sp)
flw f14, __reg_f14_OFFSET(sp)
flw f15, __reg_f15_OFFSET(sp)
flw f16, __reg_f16_OFFSET(sp)
flw f17, __reg_f17_OFFSET(sp)
flw f18, __reg_f18_OFFSET(sp)
flw f19, __reg_f19_OFFSET(sp)
flw f20, __reg_f20_OFFSET(sp)
flw f21, __reg_f21_OFFSET(sp)
flw f22, __reg_f22_OFFSET(sp)
flw f23, __reg_f23_OFFSET(sp)
flw f24, __reg_f24_OFFSET(sp)
flw f25, __reg_f25_OFFSET(sp)
flw f26, __reg_f26_OFFSET(sp)
flw f27, __reg_f27_OFFSET(sp)
flw f28, __reg_f28_OFFSET(sp)
flw f29, __reg_f29_OFFSET(sp)
flw f30, __reg_f30_OFFSET(sp)
flw f31, __reg_f31_OFFSET(sp)
addi sp, sp, 128
#endif
mret
/* just switch at Software interrupt */
.align 2
.global SW_handler
SW_handler:
#if ARCH_RISCV_FPU
addi sp, sp, -128
fsw f0, __reg_f0_OFFSET(sp)
fsw f1, __reg_f1_OFFSET(sp)
fsw f2, __reg_f2_OFFSET(sp)
fsw f3, __reg_f3_OFFSET(sp)
fsw f4, __reg_f4_OFFSET(sp)
fsw f5, __reg_f5_OFFSET(sp)
fsw f6, __reg_f6_OFFSET(sp)
fsw f7, __reg_f7_OFFSET(sp)
fsw f8, __reg_f8_OFFSET(sp)
fsw f9, __reg_f9_OFFSET(sp)
fsw f10, __reg_f10_OFFSET(sp)
fsw f11, __reg_f11_OFFSET(sp)
fsw f12, __reg_f12_OFFSET(sp)
fsw f13, __reg_f13_OFFSET(sp)
fsw f14, __reg_f14_OFFSET(sp)
fsw f15, __reg_f15_OFFSET(sp)
fsw f16, __reg_f16_OFFSET(sp)
fsw f17, __reg_f17_OFFSET(sp)
fsw f18, __reg_f18_OFFSET(sp)
fsw f19, __reg_f19_OFFSET(sp)
fsw f20, __reg_f20_OFFSET(sp)
fsw f21, __reg_f21_OFFSET(sp)
fsw f22, __reg_f22_OFFSET(sp)
fsw f23, __reg_f23_OFFSET(sp)
fsw f24, __reg_f24_OFFSET(sp)
fsw f25, __reg_f25_OFFSET(sp)
fsw f26, __reg_f26_OFFSET(sp)
fsw f27, __reg_f27_OFFSET(sp)
fsw f28, __reg_f28_OFFSET(sp)
fsw f29, __reg_f29_OFFSET(sp)
fsw f30, __reg_f30_OFFSET(sp)
fsw f31, __reg_f31_OFFSET(sp)
#endif
addi sp, sp, -128
sw t0, __reg_x5_OFFSET(sp)
/* disable HPE */
li t0, 0x20
csrs 0x804, t0
csrr t0, mstatus
sw t0, __reg_mstatus_OFFSET(sp)
csrr t0, mepc
sw t0, __reg_mepc_OFFSET(sp)
sw x1, __reg_x1_OFFSET(sp)
sw x3, __reg_x3_OFFSET(sp)
sw x4, __reg_x4_OFFSET(sp)
sw x6, __reg_x6_OFFSET(sp)
sw x7, __reg_x7_OFFSET(sp)
sw x8, __reg_x8_OFFSET(sp)
sw x9, __reg_x9_OFFSET(sp)
sw x10, __reg_x10_OFFSET(sp)
sw x11, __reg_x11_OFFSET(sp)
sw x12, __reg_x12_OFFSET(sp)
sw x13, __reg_x13_OFFSET(sp)
sw x14, __reg_x14_OFFSET(sp)
sw x15, __reg_x15_OFFSET(sp)
sw x16, __reg_x16_OFFSET(sp)
sw x17, __reg_x17_OFFSET(sp)
sw x18, __reg_x18_OFFSET(sp)
sw x19, __reg_x19_OFFSET(sp)
sw x20, __reg_x20_OFFSET(sp)
sw x21, __reg_x21_OFFSET(sp)
sw x22, __reg_x22_OFFSET(sp)
sw x23, __reg_x23_OFFSET(sp)
sw x24, __reg_x24_OFFSET(sp)
sw x25, __reg_x25_OFFSET(sp)
sw x26, __reg_x26_OFFSET(sp)
sw x27, __reg_x27_OFFSET(sp)
sw x28, __reg_x28_OFFSET(sp)
sw x29, __reg_x29_OFFSET(sp)
sw x30, __reg_x30_OFFSET(sp)
sw x31, __reg_x31_OFFSET(sp)
/* switch to irq stk */
mv t0, sp
lw sp, k_irq_stk_top /* cpu_init<EFBFBD>м<EFBFBD>ȥһ<EFBFBD><EFBFBD><EFBFBD>ֿռ<EFBFBD> */
sw t0, 0(sp)
/* clear software interrupt */
call sw_clearpend
/* resume sp */
lw sp, 0(sp)
la t0, k_curr_task // t0 = &k_curr_task
la t1, k_next_task // t1 = &k_next_task
// save sp to k_curr_task.sp
lw t2, (t0)
sw sp, (t2)
# switch task
# k_curr_task = k_next_task
lw t1, (t1)
sw t1, (t0)
# load new task sp
lw sp, (t1)
/* new thread restore */
lw t0, __reg_mstatus_OFFSET(sp)
csrw mstatus, t0
lw t0, __reg_mepc_OFFSET(sp)
csrw mepc, t0
lw x1, __reg_x1_OFFSET(sp)
lw x3, __reg_x3_OFFSET(sp)
lw x4, __reg_x4_OFFSET(sp)
lw x5, __reg_x5_OFFSET(sp)
lw x6, __reg_x6_OFFSET(sp)
lw x7, __reg_x7_OFFSET(sp)
lw x8, __reg_x8_OFFSET(sp)
lw x9, __reg_x9_OFFSET(sp)
lw x10, __reg_x10_OFFSET(sp)
lw x11, __reg_x11_OFFSET(sp)
lw x12, __reg_x12_OFFSET(sp)
lw x13, __reg_x13_OFFSET(sp)
lw x14, __reg_x14_OFFSET(sp)
lw x15, __reg_x15_OFFSET(sp)
lw x16, __reg_x16_OFFSET(sp)
lw x17, __reg_x17_OFFSET(sp)
lw x18, __reg_x18_OFFSET(sp)
lw x19, __reg_x19_OFFSET(sp)
lw x20, __reg_x20_OFFSET(sp)
lw x21, __reg_x21_OFFSET(sp)
lw x22, __reg_x22_OFFSET(sp)
lw x23, __reg_x23_OFFSET(sp)
lw x24, __reg_x24_OFFSET(sp)
lw x25, __reg_x25_OFFSET(sp)
lw x26, __reg_x26_OFFSET(sp)
lw x27, __reg_x27_OFFSET(sp)
lw x28, __reg_x28_OFFSET(sp)
lw x29, __reg_x29_OFFSET(sp)
lw x30, __reg_x30_OFFSET(sp)
lw x31, __reg_x31_OFFSET(sp)
addi sp, sp, 128
#if ARCH_RISCV_FPU
flw f0, __reg_f0_OFFSET(sp)
flw f1, __reg_f1_OFFSET(sp)
flw f2, __reg_f2_OFFSET(sp)
flw f3, __reg_f3_OFFSET(sp)
flw f4, __reg_f4_OFFSET(sp)
flw f5, __reg_f5_OFFSET(sp)
flw f6, __reg_f6_OFFSET(sp)
flw f7, __reg_f7_OFFSET(sp)
flw f8, __reg_f8_OFFSET(sp)
flw f9, __reg_f9_OFFSET(sp)
flw f10, __reg_f10_OFFSET(sp)
flw f11, __reg_f11_OFFSET(sp)
flw f12, __reg_f12_OFFSET(sp)
flw f13, __reg_f13_OFFSET(sp)
flw f14, __reg_f14_OFFSET(sp)
flw f15, __reg_f15_OFFSET(sp)
flw f16, __reg_f16_OFFSET(sp)
flw f17, __reg_f17_OFFSET(sp)
flw f18, __reg_f18_OFFSET(sp)
flw f19, __reg_f19_OFFSET(sp)
flw f20, __reg_f20_OFFSET(sp)
flw f21, __reg_f21_OFFSET(sp)
flw f22, __reg_f22_OFFSET(sp)
flw f23, __reg_f23_OFFSET(sp)
flw f24, __reg_f24_OFFSET(sp)
flw f25, __reg_f25_OFFSET(sp)
flw f26, __reg_f26_OFFSET(sp)
flw f27, __reg_f27_OFFSET(sp)
flw f28, __reg_f28_OFFSET(sp)
flw f29, __reg_f29_OFFSET(sp)
flw f30, __reg_f30_OFFSET(sp)
flw f31, __reg_f31_OFFSET(sp)
addi sp, sp, 128
#endif
mret