add ch32v307 risc-v support,IDE is MounRiver Studio
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148
arch/risc-v/risc-v3a/rv32i/gcc/port_c.c
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148
arch/risc-v/risc-v3a/rv32i/gcc/port_c.c
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/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
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* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
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* note that the TencentOS binary is licensed under the BSD 3-Clause License.
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*
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* If you have downloaded a copy of the TencentOS source code from Tencent,
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* please note that TencentOS source code is licensed under the BSD 3-Clause
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* License, except for the third-party components listed below which are
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* subject to different license terms. Your integration of TencentOS into your
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* own projects may require compliance with the BSD 3-Clause License, as well
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* as the other licenses applicable to the third-party components included
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* within TencentOS.
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*---------------------------------------------------------------------------*/
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#include <tos_k.h>
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#include "ch32v30x.h"
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#include "core_riscv.h"
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__PORT__ void port_cpu_reset(void)
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{
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NVIC_SystemReset();
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}
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/* clear soft interrupt */
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__PORT__ void sw_clearpend(void)
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{
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SysTick->CTLR &= ~(1<<31);
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}
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/* trigger software interrupt */
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__PORT__ void port_context_switch(void)
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{
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SysTick->CTLR |= (1<<31);
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}
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/* trigger software interrupt */
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__PORT__ void port_irq_context_switch(void)
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{
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SysTick->CTLR |= (1<<31);
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}
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__PORT__ void port_systick_config(uint32_t cycle_per_tick)
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{
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SysTick->CTLR=0;
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SysTick->SR=0;
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SysTick->CNT=0;
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SysTick->CMP=cycle_per_tick-1;
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SysTick->CTLR=0xF;
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}
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__PORT__ void port_systick_priority_set(uint32_t prio)
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{
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NVIC_SetPriority(SysTicK_IRQn, prio);
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}
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__PORT__ void port_cpu_init()
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{
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NVIC_SetPriority(Software_IRQn,0xf0);
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NVIC_EnableIRQ(SysTicK_IRQn);
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NVIC_EnableIRQ(Software_IRQn);
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}
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void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void SysTick_Handler(void)
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{
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GET_INT_SP(); /* <20>л<EFBFBD><D0BB>ж<EFBFBD>ջ */
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if (tos_knl_is_running())
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{
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tos_knl_irq_enter();
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SysTick->SR=0;
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tos_tick_handler();
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tos_knl_irq_leave();
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}
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FREE_INT_SP(); /* <20>ͷ<EFBFBD><CDB7>ж<EFBFBD>ջ */
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}
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#if TOS_CFG_TICKLESS_EN > 0u
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__PORT__ k_time_t port_systick_max_delay_millisecond(void)
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{
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k_time_t max_millisecond;
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uint32_t max_cycle;
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max_cycle = 0xffffffff; // systick <20><>64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>32λ
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max_millisecond = (k_time_t)((uint64_t)max_cycle * K_TIME_MILLISEC_PER_SEC / TOS_CFG_CPU_CLOCK); // CLOCK: cycle per second
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return max_millisecond;
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}
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__PORT__ void port_systick_resume(void)
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{
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SysTick->CTLR |= (3<<0);
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}
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__PORT__ void port_systick_suspend(void)
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{
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SysTick->CTLR &= ~(3<<0);
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}
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__PORT__ k_cycle_t port_systick_max_reload_cycle(void)
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{
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return 0xffffffff;
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}
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__PORT__ void port_systick_reload(uint32_t cycle_per_tick)
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{
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port_systick_config(cycle_per_tick);
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}
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__PORT__ void port_systick_pending_reset(void)
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{
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PFIC->IPRR[0] |= (1<<12); //clear pend
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}
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#endif
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#if TOS_CFG_PWR_MGR_EN > 0u
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__PORT__ void port_sleep_mode_enter(void)
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{
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/* only CPU sleep */
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PFIC->SCTLR |= (1<<2);
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__WFI();
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PFIC->SCTLR &= ~(1<<2);
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}
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__PORT__ void port_stop_mode_enter(void)
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{
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PWR_EnterSTOPMode(PWR_Regulator_ON, PWR_STOPEntry_WFI);
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}
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__PORT__ void port_standby_mode_enter(void)
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{
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PWR_EnterSTANDBYMode();
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}
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#endif
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