From 7f4b0b2582b0457456fad85569b2b04960249059 Mon Sep 17 00:00:00 2001 From: daishengdong Date: Tue, 2 Jun 2020 21:31:11 +0800 Subject: [PATCH] add fatfs through vfs for EVB plus 1. see board\TencentOS_tiny_EVB_MX_Plus\KEIL\fatfs_through_vfs --- .../TOS-CONFIG/tos_config.h | 2 - .../TOS-CONFIG/tos_config.h | 2 - .../mqttclient_iothub/TOS-CONFIG/tos_config.h | 2 - board/Fire_STM32F429/TOS-CONFIG/tos_config.h | 2 - .../TOS_CONFIG/tos_config.h | 2 - .../TOS_CONFIG/tos_config.h | 4 +- .../TOS_CONFIG/tos_config.h | 4 +- .../TOS_CONFIG/tos_config.h | 2 - board/QEMU_Spike/TOS-CONFIG/tos_config.h | 3 +- .../STM32F103_SIM800A/TOS-CONFIG/tos_config.h | 2 - .../TOS_CONFIG/tos_config.h | 2 - .../Sipeed_LonganNano/TOS_CONFIG/tos_config.h | 4 +- .../BSP/Inc/sdmmc.h | 58 + .../BSP/Inc/stm32l4xx_hal_conf.h | 2 +- .../BSP/Src/mcu_init.c | 9 +- .../BSP/Src/sdmmc.c | 117 ++ .../fatfs_through_vfs/TencentOS_tiny.uvoptx | 1400 +++++++++++++++++ .../fatfs_through_vfs/TencentOS_tiny.uvprojx | 892 +++++++++++ .../fatfs_through_vfs/startup_stm32l431xx.s | 404 +++++ components/fs/fatfs/wrapper/tos_fatfs_drv.c | 26 +- components/fs/vfs/include/tos_vfs.h | 4 - components/fs/vfs/include/tos_vfs_device.h | 4 - components/fs/vfs/include/tos_vfs_file.h | 5 +- components/fs/vfs/include/tos_vfs_fs.h | 4 - components/fs/vfs/include/tos_vfs_inode.h | 4 - components/fs/vfs/tos_vfs.c | 4 - components/fs/vfs/tos_vfs_device.c | 4 - components/fs/vfs/tos_vfs_file.c | 4 - components/fs/vfs/tos_vfs_fs.c | 4 - components/fs/vfs/tos_vfs_inode.c | 4 - kernel/core/include/tos_config_default.h | 4 - platform/hal/st/stm32l4xx/src/tos_hal_sd.c | 236 +++ 32 files changed, 3132 insertions(+), 88 deletions(-) create mode 100644 board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/sdmmc.h create mode 100644 board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/sdmmc.c create mode 100644 board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/TencentOS_tiny.uvoptx create mode 100644 board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/TencentOS_tiny.uvprojx create mode 100644 board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/startup_stm32l431xx.s create mode 100644 platform/hal/st/stm32l4xx/src/tos_hal_sd.c diff --git a/board/ALIENTEK_Apollo_STM32F767/TOS-CONFIG/tos_config.h b/board/ALIENTEK_Apollo_STM32F767/TOS-CONFIG/tos_config.h index b398f866..d2abb9dd 100644 --- a/board/ALIENTEK_Apollo_STM32F767/TOS-CONFIG/tos_config.h +++ b/board/ALIENTEK_Apollo_STM32F767/TOS-CONFIG/tos_config.h @@ -29,8 +29,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_IDLE_TASK_STK_SIZE 80u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/ALIENTEK_STM32F429/TOS-CONFIG/tos_config.h b/board/ALIENTEK_STM32F429/TOS-CONFIG/tos_config.h index e967885b..e57aff33 100644 --- a/board/ALIENTEK_STM32F429/TOS-CONFIG/tos_config.h +++ b/board/ALIENTEK_STM32F429/TOS-CONFIG/tos_config.h @@ -39,8 +39,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_IDLE_TASK_STK_SIZE 80u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/Fire_STM32F429/KEIL/mqttclient_iothub/TOS-CONFIG/tos_config.h b/board/Fire_STM32F429/KEIL/mqttclient_iothub/TOS-CONFIG/tos_config.h index b2deac98..6c86a6e3 100644 --- a/board/Fire_STM32F429/KEIL/mqttclient_iothub/TOS-CONFIG/tos_config.h +++ b/board/Fire_STM32F429/KEIL/mqttclient_iothub/TOS-CONFIG/tos_config.h @@ -39,8 +39,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_IDLE_TASK_STK_SIZE 80u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/Fire_STM32F429/TOS-CONFIG/tos_config.h b/board/Fire_STM32F429/TOS-CONFIG/tos_config.h index 2b2d47dd..3c0407a4 100644 --- a/board/Fire_STM32F429/TOS-CONFIG/tos_config.h +++ b/board/Fire_STM32F429/TOS-CONFIG/tos_config.h @@ -39,8 +39,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_IDLE_TASK_STK_SIZE 80u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/GigaDevice_GD32VF103C_EVAL/TOS_CONFIG/tos_config.h b/board/GigaDevice_GD32VF103C_EVAL/TOS_CONFIG/tos_config.h index e007b9ec..d3de2010 100644 --- a/board/GigaDevice_GD32VF103C_EVAL/TOS_CONFIG/tos_config.h +++ b/board/GigaDevice_GD32VF103C_EVAL/TOS_CONFIG/tos_config.h @@ -62,8 +62,6 @@ // 配置是否将TIMER配置成函数模式 #define TOS_CFG_TIMER_AS_PROC 1u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_MMBLK_EN 1u diff --git a/board/GigaDevice_GD32VF103C_START/TOS_CONFIG/tos_config.h b/board/GigaDevice_GD32VF103C_START/TOS_CONFIG/tos_config.h index fae07e78..e340feb4 100644 --- a/board/GigaDevice_GD32VF103C_START/TOS_CONFIG/tos_config.h +++ b/board/GigaDevice_GD32VF103C_START/TOS_CONFIG/tos_config.h @@ -52,9 +52,7 @@ // 配置是否将TIMER配置成函数模式 #define TOS_CFG_TIMER_AS_PROC 1u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_MMBLK_EN 1u - #endif /* INC_TOS_CONFIG_H_ */ + diff --git a/board/LILYGO_TTGO_T_Display_GD32V/TOS_CONFIG/tos_config.h b/board/LILYGO_TTGO_T_Display_GD32V/TOS_CONFIG/tos_config.h index fae07e78..e340feb4 100644 --- a/board/LILYGO_TTGO_T_Display_GD32V/TOS_CONFIG/tos_config.h +++ b/board/LILYGO_TTGO_T_Display_GD32V/TOS_CONFIG/tos_config.h @@ -52,9 +52,7 @@ // 配置是否将TIMER配置成函数模式 #define TOS_CFG_TIMER_AS_PROC 1u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_MMBLK_EN 1u - #endif /* INC_TOS_CONFIG_H_ */ + diff --git a/board/NUCLEO_STM32F746ZG/TOS_CONFIG/tos_config.h b/board/NUCLEO_STM32F746ZG/TOS_CONFIG/tos_config.h index 17368e56..d353d0c5 100644 --- a/board/NUCLEO_STM32F746ZG/TOS_CONFIG/tos_config.h +++ b/board/NUCLEO_STM32F746ZG/TOS_CONFIG/tos_config.h @@ -37,8 +37,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 0u - #define TOS_CFG_IDLE_TASK_STK_SIZE 128u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/QEMU_Spike/TOS-CONFIG/tos_config.h b/board/QEMU_Spike/TOS-CONFIG/tos_config.h index 45488f6c..8335ff96 100644 --- a/board/QEMU_Spike/TOS-CONFIG/tos_config.h +++ b/board/QEMU_Spike/TOS-CONFIG/tos_config.h @@ -31,10 +31,9 @@ #define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式 -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_MMBLK_EN 1u #define TOS_CFG_IRQ_STK_SIZE 128u #endif /* INC_TOS_CONFIG_H_ */ + diff --git a/board/STM32F103_SIM800A/TOS-CONFIG/tos_config.h b/board/STM32F103_SIM800A/TOS-CONFIG/tos_config.h index 44c65332..12c9bd15 100644 --- a/board/STM32F103_SIM800A/TOS-CONFIG/tos_config.h +++ b/board/STM32F103_SIM800A/TOS-CONFIG/tos_config.h @@ -25,8 +25,6 @@ #define TOS_CFG_SEM_EN 1u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_IDLE_TASK_STK_SIZE 80u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/STM32F746NGH6_discovery/TOS_CONFIG/tos_config.h b/board/STM32F746NGH6_discovery/TOS_CONFIG/tos_config.h index 72a648fd..5195005d 100644 --- a/board/STM32F746NGH6_discovery/TOS_CONFIG/tos_config.h +++ b/board/STM32F746NGH6_discovery/TOS_CONFIG/tos_config.h @@ -29,8 +29,6 @@ #define TOS_CFG_TICKLESS_EN 0u -#define TOS_CFG_VFS_EN 0u - #define TOS_CFG_IDLE_TASK_STK_SIZE 128u #define TOS_CFG_CPU_TICK_PER_SECOND 1000u diff --git a/board/Sipeed_LonganNano/TOS_CONFIG/tos_config.h b/board/Sipeed_LonganNano/TOS_CONFIG/tos_config.h index fae07e78..e340feb4 100644 --- a/board/Sipeed_LonganNano/TOS_CONFIG/tos_config.h +++ b/board/Sipeed_LonganNano/TOS_CONFIG/tos_config.h @@ -52,9 +52,7 @@ // 配置是否将TIMER配置成函数模式 #define TOS_CFG_TIMER_AS_PROC 1u -#define TOS_CFG_VFS_EN 1u - #define TOS_CFG_MMBLK_EN 1u - #endif /* INC_TOS_CONFIG_H_ */ + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/sdmmc.h b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/sdmmc.h new file mode 100644 index 00000000..1bfdc09b --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/sdmmc.h @@ -0,0 +1,58 @@ +/** + ****************************************************************************** + * File Name : SDMMC.h + * Description : This file provides code for the configuration + * of the SDMMC instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __sdmmc_H +#define __sdmmc_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern SD_HandleTypeDef hsd1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SDMMC1_SD_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ sdmmc_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/stm32l4xx_hal_conf.h b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/stm32l4xx_hal_conf.h index e4655812..f8fbac46 100644 --- a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/stm32l4xx_hal_conf.h +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Inc/stm32l4xx_hal_conf.h @@ -82,7 +82,7 @@ /*#define HAL_RNG_MODULE_ENABLED */ #define HAL_RTC_MODULE_ENABLED /*#define HAL_SAI_MODULE_ENABLED */ -/*#define HAL_SD_MODULE_ENABLED */ +#define HAL_SD_MODULE_ENABLED /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ #define HAL_SPI_MODULE_ENABLED diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c index ff6d6712..f84cf2c2 100644 --- a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/mcu_init.c @@ -116,19 +116,24 @@ void SystemClock_Config(void) } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_USART3 |RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_I2C1 - |RCC_PERIPHCLK_ADC; + |RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_SDMMC1; PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; PeriphClkInit.PLLSAI1.PLLSAI1M = 1; PeriphClkInit.PLLSAI1.PLLSAI1N = 16; PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; - PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK; +#if 0 + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK; +#else + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK; +#endif if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); diff --git a/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/sdmmc.c b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/sdmmc.c new file mode 100644 index 00000000..47745ea5 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/BSP/Src/sdmmc.c @@ -0,0 +1,117 @@ +/** + ****************************************************************************** + * File Name : SDMMC.c + * Description : This file provides code for the configuration + * of the SDMMC instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "sdmmc.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +SD_HandleTypeDef hsd1; + +/* SDMMC1 init function */ + +void MX_SDMMC1_SD_Init(void) +{ + + hsd1.Instance = SDMMC1; + hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B; + hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + hsd1.Init.ClockDiv = 0; + if (HAL_SD_Init(&hsd1) != HAL_OK) + { + Error_Handler(); + } + +} + +void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(sdHandle->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspInit 0 */ + + /* USER CODE END SDMMC1_MspInit 0 */ + /* SDMMC1 clock enable */ + __HAL_RCC_SDMMC1_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN SDMMC1_MspInit 1 */ + + /* USER CODE END SDMMC1_MspInit 1 */ + } +} + +void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle) +{ + + if(sdHandle->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspDeInit 0 */ + + /* USER CODE END SDMMC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SDMMC1_CLK_DISABLE(); + + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_12); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); + + /* USER CODE BEGIN SDMMC1_MspDeInit 1 */ + + /* USER CODE END SDMMC1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/TencentOS_tiny.uvoptx b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/TencentOS_tiny.uvoptx new file mode 100644 index 00000000..bc240673 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/TencentOS_tiny.uvoptx @@ -0,0 +1,1400 @@ + + + + 1.0 + +
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### uVision Project, (C) Keil Software
+ + + + TencentOS_tiny + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32L431RCTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.0.0 + http://www.keil.com/pack + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4") + + + + + + + + + + + + + + + $$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4107 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER,USE_ESP8266 + + ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\BSP\Hardware\DHT11;..\..\BSP\Hardware\OLED;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\helloworld;..\..\..\..\components\fs\vfs\include;..\..\..\..\components\fs\fatfs\wrapper\include;..\..\..\..\kernel\hal\include;..\..\..\..\components\fs\fatfs\3rdparty + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l431xx.s + 2 + startup_stm32l431xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\..\BSP\Src\stm32l4xx_it.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + adc.c + 1 + ..\..\BSP\Src\adc.c + + + dac.c + 1 + ..\..\BSP\Src\dac.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + spi.c + 1 + ..\..\BSP\Src\spi.c + + + tim.c + 1 + ..\..\BSP\Src\tim.c + + + sdmmc.c + 1 + ..\..\BSP\Src\sdmmc.c + + + + + examples + + + fatfs_through_vfs_sample.c + 1 + ..\..\..\..\examples\fatfs_through_vfs\fatfs_through_vfs_sample.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + stm32l4xx_ll_sdmmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_sdmmc.c + + + stm32l4xx_hal_sd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd.c + + + stm32l4xx_hal_sd_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\..\BSP\Src\system_stm32l4xx.c + + + + + Hardware + + + DHT11_BUS.c + 1 + ..\..\BSP\Hardware\DHT11\DHT11_BUS.c + + + oled.c + 1 + ..\..\BSP\Hardware\OLED\oled.c + + + + + kernel + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + + + cpu + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + + + cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + config + + + tos_config.h + 5 + ..\..\TOS-CONFIG\tos_config.h + + + + + fatfs + + + tos_diskio.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_diskio.c + + + tos_fatfs_drv.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_fatfs_drv.c + + + tos_fatfs_vfs.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_fatfs_vfs.c + + + tos_ff.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_ff.c + + + tos_ffsystem.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_ffsystem.c + + + tos_ffunicode.c + 1 + ..\..\..\..\components\fs\fatfs\wrapper\tos_ffunicode.c + + + + + vfs + + + tos_vfs.c + 1 + ..\..\..\..\components\fs\vfs\tos_vfs.c + + + tos_vfs_device.c + 1 + ..\..\..\..\components\fs\vfs\tos_vfs_device.c + + + tos_vfs_file.c + 1 + ..\..\..\..\components\fs\vfs\tos_vfs_file.c + + + tos_vfs_fs.c + 1 + ..\..\..\..\components\fs\vfs\tos_vfs_fs.c + + + tos_vfs_inode.c + 1 + ..\..\..\..\components\fs\vfs\tos_vfs_inode.c + + + + + hal + + + tos_hal_sd.c + 1 + ..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_sd.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/startup_stm32l431xx.s b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/startup_stm32l431xx.s new file mode 100644 index 00000000..6a5c15a5 --- /dev/null +++ b/board/TencentOS_tiny_EVB_MX_Plus/KEIL/fatfs_through_vfs/startup_stm32l431xx.s @@ -0,0 +1,404 @@ +;********************** COPYRIGHT(c) 2017 STMicroelectronics ****************** +;* File Name : startup_stm32l431xx.s +;* Author : MCD Application Team +;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x100 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x100 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_IRQHandler ; ADC1 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD 0 ; Reserved + DCD SPI3_IRQHandler ; SPI3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD 0 ; Reserved + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD 0 ; Reserved + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +SDMMC1_IRQHandler +SPI3_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/components/fs/fatfs/wrapper/tos_fatfs_drv.c b/components/fs/fatfs/wrapper/tos_fatfs_drv.c index 00ec0362..580cb8fb 100644 --- a/components/fs/fatfs/wrapper/tos_fatfs_drv.c +++ b/components/fs/fatfs/wrapper/tos_fatfs_drv.c @@ -29,7 +29,7 @@ static uint8_t sdio_aligned_buffer[512] __ALIGNED__(4); static ssize_t sd_read(vfs_inode_t *dev, void *buf, size_t start_sector, unsigned int nsectors) { TOS_CPU_CPSR_ALLOC(); - int ret = 0; + int rc = 0; uint32_t i; uint8_t *buff = (uint8_t *)buf; uint64_t sector_addr = start_sector << 9; @@ -37,44 +37,42 @@ static ssize_t sd_read(vfs_inode_t *dev, void *buf, size_t start_sector, unsigne TOS_CPU_INT_DISABLE(); if ((cpu_addr_t)buff % 4 != 0) { for (i = 0; i < nsectors; ++i) { - ret = tos_hal_sd_read(&sd, sdio_aligned_buffer, sector_addr + 512 * i, 1, 2000); + rc = tos_hal_sd_read(&sd, sdio_aligned_buffer, sector_addr + 512 * i, 1, 2000); memcpy(buff, sdio_aligned_buffer, 512); buff += 512; } } else { - ret = tos_hal_sd_read(&sd, buff, sector_addr, nsectors, 2000); + rc = tos_hal_sd_read(&sd, buff, sector_addr, nsectors, 2000); } TOS_CPU_INT_ENABLE(); - return ret; - + return rc; } static ssize_t sd_write(vfs_inode_t *dev, const unsigned char *buf, size_t start_sector, unsigned int nsectors) { TOS_CPU_CPSR_ALLOC(); - int ret = 0; + int rc = 0; uint32_t i; uint8_t *buff = (uint8_t *)buf; uint64_t sector_addr = start_sector << 9; TOS_CPU_INT_DISABLE(); - if ((cpu_addr_t)buff % 4 !=0) { + if ((cpu_addr_t)buff % 4 != 0) { for (i = 0; i < nsectors; ++i) { memcpy(sdio_aligned_buffer, buff, 512); - ret = tos_hal_sd_write(&sd, sdio_aligned_buffer, sector_addr + 512 * i, 1, 2000); + rc = tos_hal_sd_write(&sd, sdio_aligned_buffer, sector_addr + 512 * i, 1, 2000); buff += 512; } } else { - ret = tos_hal_sd_write(&sd, buff, sector_addr, nsectors, 2000); + rc = tos_hal_sd_write(&sd, buff, sector_addr, nsectors, 2000); } TOS_CPU_INT_ENABLE(); - return ret; - + return rc; } static int sd_ioctl(vfs_inode_t *dev, int cmd, unsigned long arg) { - int ret = 0; + int rc = 0; void *buff = (void *)arg; if (cmd != CTRL_SYNC && !buff) { @@ -98,11 +96,11 @@ static int sd_ioctl(vfs_inode_t *dev, int cmd, unsigned long arg) break; default: - ret = -1; + rc = -1; break; } - return ret; + return rc; } static int sd_geometry(vfs_inode_t *dev, vfs_blkdev_geo_t *geo) diff --git a/components/fs/vfs/include/tos_vfs.h b/components/fs/vfs/include/tos_vfs.h index c4de465f..1b99a373 100644 --- a/components/fs/vfs/include/tos_vfs.h +++ b/components/fs/vfs/include/tos_vfs.h @@ -3,8 +3,6 @@ #include "tos_k.h" -#if TOS_CFG_VFS_EN > 0u - #include "tos_vfs_err.h" #include "tos_vfs_types.h" #include "tos_vfs_file.h" @@ -54,7 +52,5 @@ __API__ int tos_vfs_rename(const char *oldpath, const char *newpath); __API__ int tos_vfs_stat(const char *pathname, vfs_fstat_t *buf); -#endif - #endif /* _TOS_VFS_H_ */ diff --git a/components/fs/vfs/include/tos_vfs_device.h b/components/fs/vfs/include/tos_vfs_device.h index 87b9d563..751e5363 100644 --- a/components/fs/vfs/include/tos_vfs_device.h +++ b/components/fs/vfs/include/tos_vfs_device.h @@ -1,8 +1,6 @@ #ifndef _TOS_VFS_DEVICE_H_ #define _TOS_VFS_DEVICE_H_ -#if TOS_CFG_VFS_EN > 0u - typedef struct vfs_inode_st vfs_inode_t; typedef struct vfs_char_device_operations_st { @@ -44,7 +42,5 @@ __API__ vfs_err_t tos_vfs_char_device_register(const char *device_name, vfs_chrd __API__ vfs_err_t tos_vfs_char_device_unregister(const char *device_name); -#endif - #endif /* _TOS_VFS_DEVICE_H_ */ diff --git a/components/fs/vfs/include/tos_vfs_file.h b/components/fs/vfs/include/tos_vfs_file.h index ad457d38..a2677201 100644 --- a/components/fs/vfs/include/tos_vfs_file.h +++ b/components/fs/vfs/include/tos_vfs_file.h @@ -1,8 +1,6 @@ #ifndef _TOS_VFS_FILE_H_ #define _TOS_VFS_FILE_H_ -#if TOS_CFG_VFS_EN > 0u - typedef struct vfs_inode_st vfs_inode_t; // why do you open so many files in a IOT system? @@ -104,6 +102,5 @@ __KNL__ vfs_dir_t *vfs_dir_alloc(void); __KNL__ void vfs_dir_free(vfs_dir_t *dir); -#endif - #endif /* _TOS_VFS_FILE_H_ */ + diff --git a/components/fs/vfs/include/tos_vfs_fs.h b/components/fs/vfs/include/tos_vfs_fs.h index d23a66f9..7e20942c 100644 --- a/components/fs/vfs/include/tos_vfs_fs.h +++ b/components/fs/vfs/include/tos_vfs_fs.h @@ -1,8 +1,6 @@ #ifndef _TOS_VFS_FS_H_ #define _TOS_VFS_FS_H_ -#if TOS_CFG_VFS_EN > 0u - typedef struct vfs_inode_st vfs_inode_t; typedef struct vfs_filesystem_operations_st { @@ -54,7 +52,5 @@ __API__ vfs_err_t tos_vfs_fs_umount(const char *dir); __API__ vfs_err_t tos_vfs_fs_mkfs(const char *device_path, const char *fs_name, int opt, unsigned long arg); -#endif - #endif /* _TOS_VFS_FS_H_ */ diff --git a/components/fs/vfs/include/tos_vfs_inode.h b/components/fs/vfs/include/tos_vfs_inode.h index 529ab862..1934207e 100644 --- a/components/fs/vfs/include/tos_vfs_inode.h +++ b/components/fs/vfs/include/tos_vfs_inode.h @@ -1,8 +1,6 @@ #ifndef _TOS_VFS_INODE_H_ #define _TOS_VFS_INODE_H_ -#if TOS_CFG_VFS_EN > 0u - // why your inode's name so long? #define VFS_INODE_NAME_MAX 31 @@ -53,7 +51,5 @@ __KNL__ void vfs_inode_free(vfs_inode_t *inode); __KNL__ void vfs_inode_release(vfs_inode_t *inode); -#endif - #endif /* _TOS_VFS_INODE_H_ */ diff --git a/components/fs/vfs/tos_vfs.c b/components/fs/vfs/tos_vfs.c index e35f67fc..972462fe 100644 --- a/components/fs/vfs/tos_vfs.c +++ b/components/fs/vfs/tos_vfs.c @@ -1,7 +1,5 @@ #include "tos_vfs.h" -#if TOS_CFG_VFS_EN > 0u - __API__ int tos_vfs_open(const char *pathname, vfs_oflag_t flags) { int path_len = 0, ret = -1; @@ -677,5 +675,3 @@ __API__ int tos_vfs_stat(const char *pathname, vfs_fstat_t *buf) return ret; } -#endif - diff --git a/components/fs/vfs/tos_vfs_device.c b/components/fs/vfs/tos_vfs_device.c index 6f688649..320d29af 100644 --- a/components/fs/vfs/tos_vfs_device.c +++ b/components/fs/vfs/tos_vfs_device.c @@ -1,7 +1,5 @@ #include "tos_vfs.h" -#if TOS_CFG_VFS_EN > 0u - vfs_err_t tos_vfs_block_device_register(const char *device_name, vfs_blkdev_ops_t *ops) { int path_len = 0; @@ -116,5 +114,3 @@ vfs_err_t tos_vfs_char_device_unregister(const char *device_name) return VFS_ERR_NONE; } -#endif /* TOS_CFG_VFS_EN */ - diff --git a/components/fs/vfs/tos_vfs_file.c b/components/fs/vfs/tos_vfs_file.c index 4a1d40f7..89cb8a00 100644 --- a/components/fs/vfs/tos_vfs_file.c +++ b/components/fs/vfs/tos_vfs_file.c @@ -1,7 +1,5 @@ #include "tos_vfs.h" -#if TOS_CFG_VFS_EN > 0u - __STATIC__ vfs_file_t vfs_file_pool[VFS_FILE_OPEN_MAX] = { { K_NULL, 0 } }; __KNL__ vfs_file_t *vfs_fd2file(int fd) @@ -75,5 +73,3 @@ __KNL__ void vfs_dir_free(vfs_dir_t *dir) tos_mmheap_free(dir); } -#endif - diff --git a/components/fs/vfs/tos_vfs_fs.c b/components/fs/vfs/tos_vfs_fs.c index c381fdc7..524037ca 100644 --- a/components/fs/vfs/tos_vfs_fs.c +++ b/components/fs/vfs/tos_vfs_fs.c @@ -1,7 +1,5 @@ #include "tos_vfs.h" -#if TOS_CFG_VFS_EN > 0u - extern k_list_t k_vfs_fsmap_list; TOS_LIST_DEFINE(k_vfs_fsmap_list); @@ -192,5 +190,3 @@ __API__ vfs_err_t tos_vfs_fs_mkfs(const char *device_path, const char *fs_name, return VFS_ERR_NONE; } -#endif /* TOS_CFG_VFS_EN */ - diff --git a/components/fs/vfs/tos_vfs_inode.c b/components/fs/vfs/tos_vfs_inode.c index 5073957a..4051c099 100644 --- a/components/fs/vfs/tos_vfs_inode.c +++ b/components/fs/vfs/tos_vfs_inode.c @@ -1,7 +1,5 @@ #include "tos_vfs.h" -#if TOS_CFG_VFS_EN > 0u - __STATIC__ TOS_LIST_DEFINE(k_vfs_inode_list); /* @@ -159,5 +157,3 @@ __KNL__ void vfs_inode_release(vfs_inode_t *inode) } } -#endif /* TOS_CFG_VFS_EN */ - diff --git a/kernel/core/include/tos_config_default.h b/kernel/core/include/tos_config_default.h index 369554e9..e76c3fcb 100644 --- a/kernel/core/include/tos_config_default.h +++ b/kernel/core/include/tos_config_default.h @@ -240,10 +240,6 @@ #define TOS_CFG_TICKLESS_EN 0u #endif -#ifndef TOS_CFG_VFS_EN -#define TOS_CFG_VFS_EN 0u -#endif - #if (TOS_CFG_PWR_MGR_EN > 0u) || (TOS_CFG_TICKLESS_EN > 0u) #if TOS_CFG_IDLE_TASK_STK_SIZE < 256 #undef TOS_CFG_IDLE_TASK_STK_SIZE diff --git a/platform/hal/st/stm32l4xx/src/tos_hal_sd.c b/platform/hal/st/stm32l4xx/src/tos_hal_sd.c new file mode 100644 index 00000000..cf33aa41 --- /dev/null +++ b/platform/hal/st/stm32l4xx/src/tos_hal_sd.c @@ -0,0 +1,236 @@ +#include "tos_k.h" +#include "tos_hal.h" +#include "stm32l4xx_hal.h" +#include "sdmmc.h" + +__API__ int tos_hal_sd_init(hal_sd_t *sd) +{ + if (!sd) { + return -1; + } + + sd->private_sd = &hsd1; + MX_SDMMC1_SD_Init(); + return 0; +} + +__API__ int tos_hal_sd_read(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, uint32_t blk_num, uint32_t timeout) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !buf) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_ReadBlocks(sd_handle, buf, blk_addr / 0x200, blk_num, timeout); + if (hal_status != HAL_OK) { + return -1; + } + + while (HAL_SD_GetCardState(sd_handle) != HAL_SD_CARD_TRANSFER) { + ; + } + return 0; +} + +__API__ int tos_hal_sd_write(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_addr, uint32_t blk_num, uint32_t timeout) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !buf) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_WriteBlocks(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num, timeout); + if (hal_status != HAL_OK) { + return -1; + } + + while (HAL_SD_GetCardState(sd_handle) != HAL_SD_CARD_TRANSFER) { + ; + } + return 0; +} + +__API__ int tos_hal_sd_read_dma(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, uint32_t blk_num) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !buf) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_ReadBlocks_DMA(sd_handle, buf, blk_addr / 0x200, blk_num); + if (hal_status != HAL_OK) { + return -1; + } + return 0; +} + +__API__ int tos_hal_sd_write_dma(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_addr, uint32_t blk_num) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !buf) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_WriteBlocks_DMA(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num); + if (hal_status != HAL_OK) { + return -1; + } + return 0; +} + +__API__ int tos_hal_sd_erase(hal_sd_t *sd, uint32_t blk_add_start, uint32_t blk_addr_end) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_Erase(sd_handle, blk_add_start / 0x200, blk_addr_end / 0x200); + if (hal_status != HAL_OK) { + return -1; + } + + while (HAL_SD_GetCardState(sd_handle) != HAL_SD_CARD_TRANSFER) { + ; + } + return 0; +} + +__API__ int tos_hal_sd_info_get(hal_sd_t *sd, hal_sd_info_t *info) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + HAL_SD_CardInfoTypeDef hal_card_info; + + if (!sd || !info) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + + hal_status = HAL_SD_GetCardInfo(sd_handle, &hal_card_info); + if (hal_status != HAL_OK) { + return -1; + } + + info->card_type = hal_card_info.CardType; + info->card_version = hal_card_info.CardVersion; + info->class = hal_card_info.Class; + info->relative_card_addr = hal_card_info.RelCardAdd; + info->blk_num = hal_card_info.BlockNbr; + info->blk_size = hal_card_info.BlockSize; + info->logical_blk_num = hal_card_info.LogBlockNbr; + info->logical_blk_size = hal_card_info.LogBlockSize; + + return 0; +} + +__API__ int tos_hal_sd_state_get(hal_sd_t *sd, hal_sd_state_t *state) +{ + int ret = 0; + SD_HandleTypeDef *sd_handle; + HAL_SD_StateTypeDef sd_state; + + if (!sd || !state) { + return -1; + } + + if (!sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + + sd_state = HAL_SD_GetState(sd_handle); + switch (sd_state) { + case HAL_SD_STATE_RESET: + *state = HAL_SD_STAT_RESET; + break; + + case HAL_SD_STATE_READY: + *state = HAL_SD_STAT_READY; + break; + + case HAL_SD_STATE_TIMEOUT: + *state = HAL_SD_STAT_TIMEOUT; + break; + + case HAL_SD_STATE_BUSY: + *state = HAL_SD_STAT_BUSY; + break; + + case HAL_SD_STATE_PROGRAMMING: + *state = HAL_SD_STAT_PROGRAMMING; + break; + + case HAL_SD_STATE_RECEIVING: + *state = HAL_SD_STAT_RECEIVING; + break; + + case HAL_SD_STATE_TRANSFER: + *state = HAL_SD_STAT_TRANSFER; + break; + + case HAL_SD_STATE_ERROR: + *state = HAL_SD_STAT_ERROR; + break; + + default: + ret = -1; + break; + } + return ret; +} + +__API__ int tos_hal_sd_deinit(hal_sd_t *sd) +{ + HAL_StatusTypeDef hal_status; + SD_HandleTypeDef *sd_handle; + + if (!sd || !sd->private_sd) { + return -1; + } + + sd_handle = sd->private_sd; + hal_status = HAL_SD_DeInit(sd_handle); + if (hal_status != HAL_OK) { + return -1; + } + return 0; +} +