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extract exceptions.h

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This commit is contained in:
daishengdong
2020-01-19 20:37:57 +08:00
parent 3d9d6198c8
commit 8588240c82
4 changed files with 235 additions and 228 deletions
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282
arch/arm/arm-v7a/cortex-a7/gcc/exceptions.S
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@@ -1,202 +1,80 @@
/* Fuchsia's code is nice here, so I learn from it(fine, almost copy). thanks */ /* Fuchsia's code is nice here, so I learn from it(fine, almost copy). thanks */
.syntax unified #include "exceptions.h"
.text
.global arm_undefined
/* macros to align and unalign the stack on 8 byte boundary for ABI compliance */ .global arm_syscall
.macro stack_align, tempreg .global arm_prefetch_abort
/* make sure the stack is aligned */ .global arm_data_abort
mov \tempreg, sp .global arm_reserved
tst sp, #4 .global arm_irq
subeq sp, #4 .global arm_fiq
push { \tempreg }
.extern tos_knl_irq_enter
/* tempreg holds the original stack */ .extern tos_knl_irq_leave
.endm .extern interrupt_irq
.macro stack_restore, tempreg .syntax unified
/* restore the potentially unaligned stack */ .text
pop { \tempreg }
mov sp, \tempreg .type arm_undefined, %function
.endm arm_undefined:
save
/* save and disable the vfp unit */ /* r0 now holds pointer to iframe */
.macro vfp_save, temp1
/* save old fpexc */ bl arm_undefined_handler
vmrs \temp1, fpexc
restore
push { \temp1 }
/* hard disable the vfp unit */ .type arm_syscall, %function
bic \temp1, #(1<<30) arm_syscall:
vmsr fpexc, \temp1 b .
.endm
/* restore the vfp enable/disable state */ .type arm_prefetch_abort, %function
.macro vfp_restore, temp1 arm_prefetch_abort:
/* restore fpexc */ saveall_offset #4
pop { \temp1 } /* r0 now holds pointer to iframe */
vmsr fpexc, \temp1 bl arm_prefetch_abort_handler
.endm
restoreall
/* Save callee trashed registers.
* At exit r0 contains a pointer to the register frame.
*/ .type arm_data_abort, %function
.macro save arm_data_abort:
/* save spsr and r14 onto the svc stack */ saveall_offset #8
srsdb #0x13! /* r0 now holds pointer to iframe */
/* switch to svc mode, interrupts disabled */ bl arm_data_abort_handler
cpsid i, #0x13
restoreall
/* save callee trashed regs and lr */
push { r0-r3, r12, lr }
.type arm_reserved, %function
#if 0 arm_reserved:
#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) b .
/* save and disable the vfp unit */
vfp_save r0
#endif .type arm_irq, %function
#endif arm_irq:
saveall_offset #4
/* make sure the stack is 8 byte aligned */
stack_align r0 /* r0 now holds pointer to iframe */
bl tos_knl_irq_enter
/* r0 now holds the pointer to the original iframe (before alignment) */
.endm /* call into higher level code */
bl interrupt_irq
.macro save_offset, offset
sub lr, \offset bl tos_knl_irq_leave
save
.endm restoreall
.macro restore
/* undo the stack alignment we did before */ .type arm_fiq, %function
stack_restore r0 arm_fiq:
b .
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__)) .end
/* restore the old state of the vfp unit */
vfp_restore r0
#endif
#endif
pop { r0-r3, r12, lr }
/* return to whence we came from */
rfeia sp!
.endm
/* Save all registers.
* At exit r0 contains a pointer to the register frame.
*/
.macro saveall
/* save spsr and r14 onto the svc stack */
srsdb #0x13!
/* switch to svc mode, interrupts disabled */
cpsid i,#0x13
/* save all regs */
push { r0-r12, lr }
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* save and disable the vfp unit */
vfp_save r0
#endif
#endif
/* make sure the stack is 8 byte aligned */
stack_align r0
/* r0 now holds the pointer to the original iframe (before alignment) */
.endm
.macro saveall_offset, offset
sub lr, \offset
saveall
.endm
.macro restoreall
/* undo the stack alignment we did before */
stack_restore r0
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* restore the old state of the vfp unit */
vfp_restore r0
#endif
#endif
pop { r0-r12, r14 }
/* return to whence we came from */
rfeia sp!
.endm
.extern tos_knl_irq_enter
.extern tos_knl_irq_leave
.global arm_undefined
arm_undefined:
save
/* r0 now holds pointer to iframe */
bl arm_undefined_handler
restore
.global arm_syscall
arm_syscall:
b .
.global arm_prefetch_abort
arm_prefetch_abort:
saveall_offset #4
/* r0 now holds pointer to iframe */
bl arm_prefetch_abort_handler
restoreall
.global arm_data_abort
arm_data_abort:
saveall_offset #8
/* r0 now holds pointer to iframe */
bl arm_data_abort_handler
restoreall
.global arm_reserved
arm_reserved:
b .
.global arm_irq
arm_irq:
saveall_offset #4
/* r0 now holds pointer to iframe */
bl tos_knl_irq_enter
/* call into higher level code */
bl interrupt_irq
bl tos_knl_irq_leave
restoreall
.global arm_fiq
arm_fiq:
b .
.end

133
arch/arm/arm-v7a/cortex-a7/gcc/exceptions.h Normal file
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@@ -0,0 +1,133 @@
/* macros to align and unalign the stack on 8 byte boundary for ABI compliance */
.macro stack_align, tempreg
/* make sure the stack is aligned */
mov \tempreg, sp
tst sp, #4
subeq sp, #4
push { \tempreg }
/* tempreg holds the original stack */
.endm
.macro stack_restore, tempreg
/* restore the potentially unaligned stack */
pop { \tempreg }
mov sp, \tempreg
.endm
/* save and disable the vfp unit */
.macro vfp_save, temp1
/* save old fpexc */
vmrs \temp1, fpexc
push { \temp1 }
/* hard disable the vfp unit */
bic \temp1, #(1<<30)
vmsr fpexc, \temp1
.endm
/* restore the vfp enable/disable state */
.macro vfp_restore, temp1
/* restore fpexc */
pop { \temp1 }
vmsr fpexc, \temp1
.endm
/* Save callee trashed registers.
* At exit r0 contains a pointer to the register frame.
*/
.macro save
/* save spsr and r14 onto the svc stack */
srsdb #0x13!
/* switch to svc mode, interrupts disabled */
cpsid i, #0x13
/* save callee trashed regs and lr */
push { r0-r3, r12, lr }
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* save and disable the vfp unit */
vfp_save r0
#endif
#endif
/* make sure the stack is 8 byte aligned */
stack_align r0
/* r0 now holds the pointer to the original iframe (before alignment) */
.endm
.macro save_offset, offset
sub lr, \offset
save
.endm
.macro restore
/* undo the stack alignment we did before */
stack_restore r0
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* restore the old state of the vfp unit */
vfp_restore r0
#endif
#endif
pop { r0-r3, r12, lr }
/* return to whence we came from */
rfeia sp!
.endm
/* Save all registers.
* At exit r0 contains a pointer to the register frame.
*/
.macro saveall
/* save spsr and r14 onto the svc stack */
srsdb #0x13!
/* switch to svc mode, interrupts disabled */
cpsid i,#0x13
/* save all regs */
push { r0-r12, lr }
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* save and disable the vfp unit */
vfp_save r0
#endif
#endif
/* make sure the stack is 8 byte aligned */
stack_align r0
/* r0 now holds the pointer to the original iframe (before alignment) */
.endm
.macro saveall_offset, offset
sub lr, \offset
saveall
.endm
.macro restoreall
/* undo the stack alignment we did before */
stack_restore r0
#if 0
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
/* restore the old state of the vfp unit */
vfp_restore r0
#endif
#endif
pop { r0-r12, r14 }
/* return to whence we came from */
rfeia sp!
.endm

42
arch/arm/arm-v7a/cortex-a7/gcc/port_s.S
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@@ -39,42 +39,44 @@ port_sched_start:
.type port_context_switch, %function .type port_context_switch, %function
port_context_switch: port_context_switch:
.L__context_save: .L__context_save:
STR R0, [SP, #-0xC] /* backup R0 */ STR R0, [SP, #-0xC] /* backup R0 */
MRS R0, CPSR MRS R0, CPSR
TST LR, #0x01 TST LR, #0x01
ORRNE R0, R0, 0x20 /* set thumb bit*/ ORRNE R0, R0, 0x20 /* set thumb bit*/
STMFD SP!, { R0 } /* save CPSR */ STMFD SP!, { R0 } /* save CPSR */
STMFD SP!, { LR } /* save PC */ STMFD SP!, { LR } /* save PC */
LDR R0, [SP, #-0x4] /* restore R0 */ LDR R0, [SP, #-0x4] /* restore R0 */
STMFD SP!, { R0 - R12, LR } STMFD SP!, { R0 - R12, LR }
/* k_curr_task->sp = SP */ /* k_curr_task->sp = SP */
LDR R0, =k_curr_task LDR R0, =k_curr_task
LDR R0, [R0] LDR R0, [R0]
STR SP, [R0] STR SP, [R0]
.L__context_restore: .L__context_restore:
/* k_curr_task = k_next_task */ /* k_curr_task = k_next_task */
LDR R0, =k_next_task LDR R0, =k_next_task
LDR R0, [R0] LDR R0, [R0]
LDR R1, =k_curr_task LDR R1, =k_curr_task
STR R0, [R1] STR R0, [R1]
/* SP = k_next_task->sp */ /* SP = k_next_task->sp */
LDR SP, [R0] LDR SP, [R0]
LDMFD SP!, { R0 - R12, LR } LDMFD SP!, { R0 - R12, LR }
RFEIA SP! RFEIA SP!
.type port_irq_context_switch, %function .type port_irq_context_switch, %function
port_irq_context_switch: port_irq_context_switch:
/* we already store the k_curr_task's context onto its stack by arm_irq(see saveall_offset) */ /* we already store the k_curr_task's context onto its stack by arm_irq(see saveall_offset) */
/* ATTENTION: our kernel always runs in SVC mode even in user task, /* ATTENTION:
our kernel always runs in SVC mode even in user task,
if one day we make the user task run in USR mode(although I cannot see any meaning to do this in RTOS), if one day we make the user task run in USR mode(although I cannot see any meaning to do this in RTOS),
we must deal with more logic */ we must deal with more logic
*/
B .L__context_restore /* magnificent */ B .L__context_restore /* magnificent */

6
board/ALPHA_I.MX_emmc_256ddr/src/main.c
View File

@@ -34,8 +34,6 @@ k_stack_t task2_stack[512];
int main(void) int main(void)
{ {
unsigned char state = OFF;
uart_init(); uart_init();
led_init(); led_init();
beep_init(); beep_init();
@@ -54,10 +52,6 @@ int main(void)
tos_knl_start(); tos_knl_start();
while (1) {
delay(3000);
}
return 0; return 0;
} }