add EVB_LN822x iot exporer demo

add EVB_LN822x  iot exporer demo
This commit is contained in:
supowang
2020-06-19 11:10:17 +08:00
parent c90e31d90f
commit 875a14aaf0
102 changed files with 9104 additions and 4790 deletions

View File

@@ -37,9 +37,10 @@ char at_station_disconnect(void);
char at_station_set_scan_list_display_option(char *str);
char at_station_scan(char *str);
char at_station_scan_no_filter(char *str);
#if WIFI_SNIFFER_TEST
#if WIFI_TRACK
char at_notify_aplist(void);
char at_station_aplx(char *str);
char at_station_aplist(char *str);
#endif
//softap
@@ -135,13 +136,8 @@ char at_get_cip_mux(char *str);
char at_set_netconn_disconnect(char *str);
char at_set_ip_close(char *str);
char at_get_cip_status(char *str);
#if WIFI_SWITCH
void wifi_sniffer_deinit(void);
void wifi_sniffer_reinit(void);
char at_wifi_switch(char *str);
bool wifi_init(void);
bool wifi_deinit(void);
#endif
char at_iperf(char *str);

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@@ -45,39 +45,39 @@ WEAK void SysTick_Handler(void);
//
// Controller specific peripheral interrupts
//
WEAK void WDT_IRQHandler();
WEAK void EXTERNAL_IRQHandler();
WEAK void RTC_IRQHandler();
WEAK void SLEEP_IRQHandler();
WEAK void MAC_IRQHandler();
WEAK void DMAC_IRQHandler();
WEAK void QSPI_IRQHandler();
WEAK void SDIOCFUN1_IRQHandler();
WEAK void SDIOCFUN2_IRQHandler();
WEAK void SDIOCFUN3_IRQHandler();
WEAK void SDIOCFUN4_IRQHandler();
WEAK void SDIOCFUN5_IRQHandler();
WEAK void SDIOCFUN6_IRQHandler();
WEAK void SDIOCFUN7_IRQHandler();
WEAK void SDIOC_ASYNC_HOST_IRQHandler();
WEAK void SDIOC_M2S_IRQHandler();
WEAK void CM4_INTR0_IRQHandler();
WEAK void CM4_INTR1_IRQHandler();
WEAK void CM4_INTR2_IRQHandler();
WEAK void CM4_INTR3_IRQHandler();
WEAK void CM4_INTR4_IRQHandler();
WEAK void CM4_INTR5_IRQHandler();
WEAK void ADCC_IRQHandler();
WEAK void TIMER_IRQHandler();
WEAK void I2C0_IRQHandler();
WEAK void I2C1_IRQHandler();
WEAK void SPIM_IRQHandler();
WEAK void SPIS_IRQHandler();
WEAK void UART0_IRQHandler();
WEAK void UART1_IRQHandler();
WEAK void SPIM2_IRQHandler();
WEAK void GPIO_IRQHandler();
WEAK void I2S_IRQHandler();
WEAK void PAOTD_IRQHandler();
WEAK void WDT_IRQHandler(void);
WEAK void EXTERNAL_IRQHandler(void);
WEAK void RTC_IRQHandler(void);
WEAK void SLEEP_IRQHandler(void);
WEAK void MAC_IRQHandler(void);
WEAK void DMAC_IRQHandler(void);
WEAK void QSPI_IRQHandler(void);
WEAK void SDIOCFUN1_IRQHandler(void);
WEAK void SDIOCFUN2_IRQHandler(void);
WEAK void SDIOCFUN3_IRQHandler(void);
WEAK void SDIOCFUN4_IRQHandler(void);
WEAK void SDIOCFUN5_IRQHandler(void);
WEAK void SDIOCFUN6_IRQHandler(void);
WEAK void SDIOCFUN7_IRQHandler(void);
WEAK void SDIOC_ASYNC_HOST_IRQHandler(void);
WEAK void SDIOC_M2S_IRQHandler(void);
WEAK void CM4_INTR0_IRQHandler(void);
WEAK void CM4_INTR1_IRQHandler(void);
WEAK void CM4_INTR2_IRQHandler(void);
WEAK void CM4_INTR3_IRQHandler(void);
WEAK void CM4_INTR4_IRQHandler(void);
WEAK void CM4_INTR5_IRQHandler(void);
WEAK void ADCC_IRQHandler(void);
WEAK void TIMER_IRQHandler(void);
WEAK void I2C0_IRQHandler(void);
WEAK void I2C1_IRQHandler(void);
WEAK void SPIM_IRQHandler(void);
WEAK void SPIS_IRQHandler(void);
WEAK void UART0_IRQHandler(void);
WEAK void UART1_IRQHandler(void);
WEAK void SPIM2_IRQHandler(void);
WEAK void GPIO_IRQHandler(void);
WEAK void I2S_IRQHandler(void);
WEAK void PAOTD_IRQHandler(void);
#endif /* _INTERRUPT_H_ */

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@@ -0,0 +1,125 @@
#ifndef __LN_COMPILER_H__
#define __LN_COMPILER_H__
/*------------------ RealView Compiler -----------------*/
#if defined(__CC_ARM)
#define ARMCC_V5
#define __ASM__ __asm
#define __VOLATILE__ volatile
#define __INLINE__ inline
#define __STATIC__ static
#if (__ARMCC_VERSION < 5060750)
#define __STATIC_INLINE__ static
#else
#define __STATIC_INLINE__ static inline
#endif
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define __UNUSED__ __attribute__((__unused__))
#define __USED__ __attribute__((__used__))
#define __PACKED__ __attribute__((packed))
#define __ALIGNED__(x) __attribute__((aligned(x)))
#define __PURE__ __attribute__((__pure__))
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __WEAK__ __attribute__((weak))
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#define ARMCC_V6
#define __ASM__ __asm
#define __VOLATILE__ volatile
#define __INLINE__ inline
#define __STATIC__ static
#define __STATIC_INLINE__ static inline
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define __UNUSED__ __attribute__((__unused__))
#define __USED__ __attribute__((__used__))
#define __PACKED__ __attribute__((packed))
#define __ALIGNED__(x) __attribute__((aligned(x)))
#define __PURE__ __attribute__((__pure__))
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __NAKED__ __attribute__((naked))
#define __WEAK__ __attribute__((weak))
/*------------------ ICC Compiler ----------------------*/
#elif defined(__ICCARM__) || defined(__ICC430__) // __IAR_SYSTEMS_ICC__
#define __ASM__ __asm
#define __VOLATILE__ volatile
#define __INLINE__ inline
#define __STATIC__ static
#define __STATIC_INLINE__ static inline
#define likely(x) (x)
#define unlikely(x) (x)
#define __UNUSED__
#define __USED__
#define __PACKED__
#define __ALIGNED__(x)
#define __PURE__
#define __CONST__
#define __NO_RETURN__
#define __NAKED__
#define __WEAK__ __weak
/*------------------ ICC Compiler for STM8/AVR ----------------------*/
#elif defined(__IAR_SYSTEMS_ICC__)
#define __ASM__ __asm
#define __VOLATILE__ volatile
#define __INLINE__ inline
#define __STATIC__ static
#define __STATIC_INLINE__ static inline
#define likely(x) (x)
#define unlikely(x) (x)
#define __UNUSED__
#define __USED__
#define __PACKED__
#define __ALIGNED__(x)
#define __PURE__
#define __CONST__
#define __NO_RETURN__
#define __NAKED__
#define __WEAK__ __weak
/*------------------ GNU Compiler ----------------------*/
#elif defined(__GNUC__)
#define __ASM__ __asm
#define __VOLATILE__ volatile
#define __INLINE__ inline
#define __STATIC__ static
#define __STATIC_INLINE__ static inline
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define __UNUSED__ __attribute__((__unused__))
#define __USED__ __attribute__((__used__))
#define __PACKED__ __attribute__((packed))
#define __ALIGNED__(x) __attribute__((aligned(x)))
#define __PURE__ __attribute__((__pure__))
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __NAKED__ __attribute__((naked))
#define __WEAK__ __attribute__((weak))
#endif
#endif /* __LN_COMPILER_H__ */

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@@ -0,0 +1,13 @@
#ifndef __LN_TYPES_H__
#define __LN_TYPES_H__
#include <stdint.h>
#include <stddef.h>
#define LN_TRUE (1u)
#define LN_FALSE (0u)
#endif /* __LN_TYPES_H__ */

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@@ -64,32 +64,15 @@
#define BOOTROM_RW_SECTION_LIMIT (SIZE_32KB)
//BOOTRAM
#define BOOTRAM_BASE (RAM_BASE)
#define BOOTRAM_LIMIT (SIZE_32KB)
#define BOOTRAM_BASE (RAM_BASE)
#define BOOTRAM_LIMIT (SIZE_4KB*9)
//FLASH
#define FLASH_BASE_OFFSET (0)
#define CACHE_FLASH_BASE (0x10000000)
#define BOOTRAM_HEADER_ON_FLASH_OFFSET (FLASH_BASE_OFFSET)
#define BOOTRAM_ON_FLASH_OFFSET (BOOTRAM_HEADER_ON_FLASH_OFFSET + BOOTRAM_HEADER_SIZE)
#define BOOTRAM_PARTITION_SIZE (8 * SIZE_4KB)
#define BOOTRAM_SIZE (BOOTRAM_PARTITION_SIZE - BOOTRAM_HEADER_SIZE)
#define PARTITION_TABLE0_OFFSET (BOOTRAM_HEADER_ON_FLASH_OFFSET + BOOTRAM_PARTITION_SIZE)
#define PARTITION_TABLE0_SIZE (SIZE_4KB)
#define PARTITION_TABLE1_OFFSET (PARTITION_TABLE0_OFFSET + PARTITION_TABLE0_SIZE)
#define PARTITION_TABLE1_SIZE (SIZE_4KB)
#define PARTITION_TABLE_FLAG_OFFSET (PARTITION_TABLE1_OFFSET + PARTITION_TABLE1_SIZE)
#define PARTITION_TABLE_FLAG_SIZE (SIZE_4KB)
#define SYSTEM_PARAMETER_OFFSET (PARTITION_TABLE_FLAG_OFFSET + PARTITION_TABLE_FLAG_SIZE)
#define SYSTEM_PARAMETER_SIZE (2 * SIZE_4KB)
#define USR_NVDS_PARAM_OFFSET (SIZE_2MB-(3*SIZE_4KB))
#define USR_NVDS_PARAM_SIZE (3 * SIZE_4KB)
#endif /* __MEMORY_MAP_LN882X_H__ */

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@@ -1,13 +0,0 @@
#ifndef __DRV_ADC_MEASURE_H__
#define __DRV_ADC_MEASURE_H__
#include <stdint.h>
void drv_adc_init(void);
void drv_adc_trigger(void);
uint16_t drv_adc_read(uint8_t ch);
#endif // __DRV_ADC_MEASURE_H__

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@@ -6,49 +6,60 @@
#endif // __cplusplus
#include "types.h"
#include "hal/hal_gpio.h"
#include "hal/syscon_types.h"
#include "ll/ll_sleep.h"
typedef enum
{
ACTIVE = 0,
LIGHT_SLEEP,
DEEP_SLEEP,
RETENTION_SLEEP,
FROZEN_SLEEP
}sleep_mode_enum_t;
typedef enum {
SLEEP_TIMER_WAKEUP = (1 << 0),
MAC_WAKEUP = (1 << 1),
EXT_INT_WAKEUP = (1 << 2),
RTC_WAKEUP = (1 << 3),
}hal_sleep_wakeup_src_enum_t;
MOD_QSPI = SW_CLKGATE_QSPI,
MOD_ADDC = SW_CLKGATE_ADCC,
MOD_I2S = SW_CLKGATE_I2S,
MOD_GPIO = SW_CLKGATE_GPIO,
MOD_SPIM = SW_CLKGATE_SPIM,
MOD_SPIS = SW_CLKGATE_SPIS,
MOD_I2C0 = SW_CLKGATE_I2C0,
MOD_I2C1 = SW_CLKGATE_I2C1,
MOD_UART0 = SW_CLKGATE_UART0,
MOD_UART1 = SW_CLKGATE_UART1,
MOD_SPIM2 = SW_CLKGATE_SPIM2,
MOD_WDT = SW_CLKGATE_WDT,
MOD_TIMER0 = SW_CLKGATE_TIMER,
MOD_TIMER1 = SW_CLKGATE_TIMER_1,
MOD_TIMER2 = SW_CLKGATE_TIMER_2,
MOD_TIMER3 = SW_CLKGATE_TIMER_3,
MOD_TIMER4 = SW_CLKGATE_TIMER_4,
MOD_DGBH = SW_CLKGATE_DBGH,
MOD_SDIO = SW_CLKGATE_SDIO,
MOD_MAC = SW_CLKGATE_MAC,
MOD_CACHE = SW_CLKGATE_CACHE,
MOD_DMA = SW_CLKGATE_DMA,
MOD_RFREG = SW_CLKGATE_RFREG,
MOD_PWM = SW_CLKGATE_PWM,
MOD_EF = SW_CLKGATE_EF,
MOD_TRNG = SW_CLKGATE_TRNG,
MOD_AES = SW_CLKGATE_AES,
MOD_EXT_INT,
MOD_MAX,
}hal_peripheral_module_t;
typedef void (* reinitialize_phy_cb_t)(void);
typedef bool (* wifi_is_slept_cb_t)(void);
typedef struct
{
GPIO_Num gpio;
SYSTEM_EXT_INT_Triggle_Type triggle_type;
}ext_irq_cfg_t ;
typedef struct {
sleep_mode_enum_t sleep_mode;
uint32_t wakeup_src;//bit[0]--SLEEP_IRQn; bit[1]--MAC_IRQn;bit[2]--EXTERNAL_IRQn;bit[3]--RTC_IRQn
ext_irq_cfg_t ext_irq_cfg;
}hal_sleep_config_t;
typedef bool (*sleep_condition_cb_t)(void);
typedef void (*sleep_processing_cb_t)(void);
typedef struct
{
bool flag;
hal_sleep_config_t sleep_config;
uint32_t nvic_int_en[2];
uint64_t compensation;
uint32_t msec;
wifi_is_slept_cb_t wifi_is_slept_cb;
reinitialize_phy_cb_t reinit_phy_cb;
bool inited;
}hal_sleep_ctrl_t ;
void hal_sleep_init(hal_sleep_config_t *sleep_config);
void hal_sleep_deinit(void);
void hal_sleep_set_config(hal_sleep_config_t *sleep_config);
int hal_sleep_set_mode(sleep_mode_enum_t sleep_mode);
sleep_mode_enum_t hal_sleep_get_mode(void);
int hal_sleep_register(hal_peripheral_module_t peripheral_module, sleep_condition_cb_t sleep_condition, sleep_processing_cb_t pre_sleep_proc, sleep_processing_cb_t post_sleep_proc);
int hal_sleep_unregister(hal_peripheral_module_t peripheral_module);
void hal_pre_sleep_processing(uint32_t *ticks);
uint32_t hal_post_sleep_processing(uint32_t ticks);
void hal_sleep_register_callback(reinitialize_phy_cb_t reinit_phy_cb, wifi_is_slept_cb_t wifi_is_slept_cb);
void hal_sleep_wakeup_source_set(hal_sleep_wakeup_src_enum_t wakeup_src);
#ifdef __cplusplus
}
#endif // __cplusplus

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@@ -316,7 +316,26 @@ void HAL_SYSCON_RCO32K_Bitsel_Set(uint8_t bitsel);
void HAL_SYSCON_RCO32K_Cbit_Set(uint8_t cbit);
void HAL_SYSCON_Xtal40MCap_Set(uint8_t cap);
void HAL_SYSCON_PmuCfg(void);
void HAL_SYSCON_AWO_phy_pd_en(uint8_t en);
void HAL_SYSCON_AWO_phy_po_en(uint8_t en);
void HAL_SYSCON_AWO_ldo18_po_en(uint8_t en);
void HAL_SYSCON_AWO_sram_pd_en(uint8_t en);
void HAL_SYSCON_AWO_sram_po_en(uint8_t en);
void HAL_SYSCON_AWO_pmu_ret_en(uint8_t en);
void HAL_SYSCON_AWO_pmu_unret_en(uint8_t en);
void HAL_SYSCON_AWO_pdcmp_po(uint8_t po);
void HAL_SYSCON_AWO_cpucore_retreg_po(uint8_t po);
void HAL_SYSCON_AWO_idle_reg_set(uint32_t val);
void HAL_SYSCON_AWO_lp_mode_awo(uint8_t lp_mode_awo);
void HAL_SYSCON_AWO_clk_sel_set(uint32_t val);
void HAL_SYSCON_CMP_rfreg_len(uint16_t rfreg_len);
void HAL_SYSCON_CMP_rfreg_base_addr(uint16_t rfreg_base_addr);
void HAL_SYSCON_CMP_rfreg_action_set(uint32_t val);
uint8_t HAL_SYSCON_CMP_save_done_get(void);
void HAL_SYSCON_AWO_sw_pwr_ctrl_set(uint32_t value);
uint8_t HAL_SYSCON_AWO_pmu_fsm_get(void);
uint8_t HAL_SYSCON_CMP_restore_done_get(void);
void HAL_SYSCON_CMP_sw_clkg_set(uint32_t value);
#ifdef __cplusplus
}
#endif

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@@ -7,6 +7,11 @@
extern "C" {
#endif /* __cplusplus */
/** @brief Timer expire callback function definition*/
typedef void (*timer_cb_func_t)(void);
/**
* @brief There are totally 4 hardware timers.
*
@@ -39,7 +44,7 @@ typedef enum
typedef enum
{
TIMER_MODE_FREERUNNING = 0, /**< TIMER_MODE_FREE_RUNNING: Use this mode if you want a single timed interrupt. */
TIMER_MODE_USERDEFINED /**< TIMER_MODE_USER_DEFINED: Use this mode if you want a fixed, timed interrupt. */
TIMER_MODE_USERDEFINED /**< TIMER_MODE_USER_DEFINED: Use this mode if you want a periodic timer, timed interrupt. */
} TIMER_Mode;
@@ -62,6 +67,7 @@ typedef struct
TIMER_Mask mask; /**< mask: mask or unmask the timer interrupt */
TIMER_Mode mode; /**< mode: select the running mode of timer, free-running or user define mode */
uint32_t user_freq; /**< user_freq: user-defined timer clock frequency fx, which must meet the request: 321.5KHz <= fx <= 80MHz */
timer_cb_func_t cb_func;/**< cb_func: call back function when timer is expired */
} TIMER_InitTypeDef;
@@ -189,6 +195,7 @@ void HAL_TIMER_LoadCount2_Set(TIMER_Index index, uint32_t loadCount2);
*/
uint32_t HAL_TIMER_LoadCount2_Get(TIMER_Index index);
#ifdef __cplusplus
}
#endif /* __cplusplus */

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@@ -175,7 +175,6 @@ typedef enum
typedef enum
{
SW_CLKGATE_PATCH = 0,
SW_CLKGATE_QSPI = 1,
SW_CLKGATE_ADCC = 2,
SW_CLKGATE_I2S = 3,
@@ -198,7 +197,11 @@ typedef enum
SW_CLKGATE_MAC = 20,
SW_CLKGATE_CACHE = 21,
SW_CLKGATE_DMA = 22,
SW_CLKGATE_RFREG = 23
SW_CLKGATE_RFREG = 23,
SW_CLKGATE_PWM = 24,
SW_CLKGATE_EF = 25,
SW_CLKGATE_TRNG = 26,
SW_CLKGATE_AES = 27,
} SYSCON_ClkGate_Peripheral;
typedef enum
@@ -339,8 +342,7 @@ typedef enum
(clkgate) == SW_CLKGATE_CORE_MAC40M || \
(clkgate) == SW_CLKGATE_CORE_MAC80M)
#define IS_CLKGATE_PERIPHERAL(clkgate) ((clkgate) == SW_CLKGATE_PATCH || \
(clkgate) == SW_CLKGATE_QSPI || \
#define IS_CLKGATE_PERIPHERAL(clkgate) ((clkgate) == SW_CLKGATE_QSPI || \
(clkgate) == SW_CLKGATE_ADCC || \
(clkgate) == SW_CLKGATE_I2S || \
(clkgate) == SW_CLKGATE_GPIO || \
@@ -362,7 +364,11 @@ typedef enum
(clkgate) == SW_CLKGATE_MAC || \
(clkgate) == SW_CLKGATE_CACHE || \
(clkgate) == SW_CLKGATE_DMA || \
(clkgate) == SW_CLKGATE_RFREG)
(clkgate) == SW_CLKGATE_RFREG || \
(clkgate) == SW_CLKGATE_PWM || \
(clkgate) == SW_CLKGATE_EF || \
(clkgate) == SW_CLKGATE_TRNG || \
(clkgate) == SW_CLKGATE_AES)
#define IS_SPIM_INDEX(index) ((index) == SPIM_IO_EN0 || (index) == SPIM_IO_EN1 || (index) == SPIM_IO_EN2)

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@@ -1,23 +1,12 @@
#ifndef __LL_SLEEP_H__
#define __LL_SLEEP_H__
#include "types.h"
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
typedef enum
{
ACTIVE = 0,
LIGHT_SLEEP,
DEEP_SLEEP,
RETENTION_SLEEP,
FROZEN_SLEEP
}sleep_mode_enum_t;
void ll_pre_sleep_processing(sleep_mode_enum_t sleep_mode, uint8_t sram_powerdown);
void ll_post_sleep_processing(sleep_mode_enum_t sleep_mode);
void ll_sleep_mac_tsf_clk_switch(uint8_t ps_clk_switch);
#ifdef __cplusplus
}

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@@ -332,7 +332,26 @@ void LL_SYSCON_EXT_INTR_Set_Triggle_Condition(SYSTEM_EXT_INT_Wakeup_Index ext_in
uint8_t LL_SYSCON_EXT_INTR_Stat(void);
uint8_t LL_SYSCON_EXT_INTR_Stat_Raw(void);
void LL_SYSCON_EXT_INTR_Clear(void);
void LL_SYSCON_AWO_phy_pd_en(uint8_t en);
void LL_SYSCON_AWO_phy_po_en(uint8_t en);
void LL_SYSCON_AWO_ldo18_po_en(uint8_t en);
void LL_SYSCON_AWO_sram_pd_en(uint8_t en);
void LL_SYSCON_AWO_sram_po_en(uint8_t en);
void LL_SYSCON_AWO_pmu_ret_en(uint8_t en);
void LL_SYSCON_AWO_pmu_unret_en(uint8_t en);
void LL_SYSCON_AWO_pdcmp_po(uint8_t po);
void LL_SYSCON_AWO_cpucore_retreg_po(uint8_t po);
void LL_SYSCON_AWO_idle_reg_set(uint32_t val);
void LL_SYSCON_AWO_lp_mode_awo(uint8_t lp_mode_awo);
void LL_SYSCON_AWO_clk_sel_set(uint32_t val);
void LL_SYSCON_CMP_rfreg_len(uint16_t rfreg_len);
void LL_SYSCON_CMP_rfreg_base_addr(uint16_t rfreg_base_addr);
void LL_SYSCON_CMP_rfreg_action_set(uint32_t val);
uint8_t LL_SYSCON_CMP_save_done_get(void);
void LL_SYSCON_AWO_sw_pwr_ctrl_set(uint32_t val);
uint8_t LL_SYSCON_AWO_pmu_fsm_get(void);
uint8_t LL_SYSCON_CMP_restore_done_get(void);
void LL_SYSCON_CMP_sw_clkg_set(uint32_t value);
#ifdef __cplusplus
}
#endif

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@@ -25,7 +25,6 @@ OS_Status OS_QueueCreate(OS_Queue_t *queue, uint32_t queueLen, uint32_t itemSize
OS_Status OS_QueueDelete(OS_Queue_t *queue);
OS_Status OS_QueueSend(OS_Queue_t *queue, const void *item, OS_Time_t waitMS);
OS_Status OS_QueueReceive(OS_Queue_t *queue, void *item, OS_Time_t waitMS);
OS_Status OS_QueueFlush(OS_Queue_t *queue);
/**

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@@ -2,7 +2,7 @@
#define __SERIAL_H__
#include "proj_config.h"
#include "serial/serial_p.h"
#include "serial_hw.h"
#include "utils/fifo/fifobuf.h"
/** Human-readable serial error descriptions */

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@@ -1,40 +0,0 @@
#ifndef __SERIAL_P_H__
#define __SERIAL_P_H__
#include "hal/hal_uart.h"
struct SerialHardware;
struct Serial;
typedef enum {
SER_PORT_UART0 = 0,
SER_PORT_UART1 = 1,
SER_PORT_NUM = 2, /**< Number of serial ports */
SER_PORT_ID_INVALID = SER_PORT_NUM
}SerialPortID;
struct SerialHardwareVT
{
void (*init )(struct SerialHardware *ctx, struct Serial *ser, uint32_t baudrate);
void (*cleanup )(struct SerialHardware *ctx);
void (*txStart )(struct SerialHardware *ctx);
bool (*txSending )(struct SerialHardware *ctx);
bool (*setBaudrate)(struct SerialHardware *ctx, uint32_t baudrate);
};
struct SerialHardware
{
const struct SerialHardwareVT *table;
unsigned char *txbuffer;
unsigned char *rxbuffer;
size_t txbuffer_size;
size_t rxbuffer_size;
void *hw_device;
volatile bool isSending;
};
struct SerialHardware *serial_hw_getdesc(SerialPortID port_id);
#endif /* __SERIAL_P_H__ */

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@@ -1,13 +1,20 @@
#ifndef CRC32_H
#define CRC32_H
#ifndef ___CRC32_H__
#define ___CRC32_H__
#include <stdint.h>
uint32_t GetCrc32(uint8_t *ptr, int len);
typedef struct {
uint32_t crc;
} crc32_ctx_t;
#endif
void ln_crc32_init(crc32_ctx_t *ctx);
void ln_crc32_update(crc32_ctx_t *ctx, uint8_t *data, uint32_t len);
uint32_t ln_crc32_final(crc32_ctx_t *ctx);
uint32_t ln_crc32_signle_cal(uint8_t *ptr, int len);
#endif /* ___CRC32_H__ */

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@@ -15,7 +15,6 @@ typedef struct {
#define NETIF_HOSTNAME_LEN_MAX (8)
#define WIFI_PSK_INFO_LIST_SIZE (2)
int system_parameter_init(void);
int system_parameter_deinit(void);
@@ -35,11 +34,10 @@ uint8_t system_parameter_get_dhcp_enable(void);
//ap_hostname config
int system_parameter_set_hostname(wifi_interface_enum_t if_index, uint8_t *hostname);
int system_parameter_get_hostname(wifi_interface_enum_t if_index, uint8_t *hostname);
////PSK info
int system_parameter_set_psk_info( wifi_psk_info_t *psk_info);
int system_parameter_get_psk_info(wifi_psk_info_t *psk_info);
int system_parameter_set_wifi_mode(wifi_mode_enum_t wifi_mode);
wifi_mode_enum_t system_parameter_get_wifi_mode(void);
int system_parameter_set_dhcpd_config(server_config_t *server_config);
int system_parameter_get_dhcpd_config(server_config_t *server_config);

View File

@@ -183,7 +183,8 @@ void wifi_do_temp_cal_period(uint16_t adc_ch0_val);
//STA
bool wifi_station_scan(wifi_scan_config_t *config);
int wifi_station_get_scan_ap_list(list_t **ap_list, bool sort);
int wifi_station_get_scan_list_size(void);
int wifi_station_get_scan_list(list_t *out_list, int out_list_size, bool sort);
void wifi_station_connect(wifi_sta_config_t *sta_config);
bool wifi_station_disconnect(void);
int8_t wifi_station_get_rssi(void);

View File

@@ -102,12 +102,10 @@ typedef struct wifi_manager_ctrl wifi_manager_ctrl_t;
//wifi get mode api (需要wifi_cfg 提供)
bool reg_wifi_msg_callbcak(wifi_manager_ctrl_t *manager_ctrl, wifi_msg_id_enum_t msg_id, wifi_msg_callback_fun callback_fun);
bool reg_wifi_msg_callbcak(wifi_msg_id_enum_t msg_id, wifi_msg_callback_fun callback_fun);
void notify_wifi_manager_task(wifi_msg_t * pWifiMsg);
bool wifi_manager_init(wifi_manager_ctrl_t *manager_ctrl);
bool wifi_manager_deinit(wifi_manager_ctrl_t *manager_ctrl);
wifi_manager_ctrl_t *wifi_manager_get_handle(void);
bool wifi_manager_init(void);
bool wifi_manager_deinit(void);
#ifdef __cplusplus
}

Binary file not shown.

View File

@@ -17,7 +17,7 @@
#include "ping/ping.h"
#include "iperf/iperf.h"
#include "dhcpd/dhcpd.h"
#include "nvds/nvds.h"
#include "nvds.h"
#include "hal/hal_efuse.h"
#define RET_OK_STR ("\r\nOK\r\n")
@@ -673,7 +673,7 @@ char at_station_scan_no_filter(char *str)
scan_list_dsiplay_option_t *display_option = &g_scan_list_dsiplay_option;
int ap_count = 0;
ap_info_t *item_iterator = NULL;
list_t *ap_list = NULL, *iterator;
list_t scan_list, *iterator, *prev;
#if WIFI_TRACK
at_printf("\r\n+CWLAPLN\r\n");
@@ -681,21 +681,40 @@ char at_station_scan_no_filter(char *str)
at_printf("\r\n+CWLAP\r\n");
#endif
ap_count = wifi_station_get_scan_ap_list(&ap_list, (display_option->sort_enable == 1)? true : false);
if(ap_list && ap_count > 0)
{
ap_count = wifi_station_get_scan_list_size();
if(ap_count > 0){
//prepare scan_list space
list_init(&scan_list);
for(i = 0; i < ap_count; i++){
item_iterator = OS_Malloc(sizeof(ap_info_t));
if(item_iterator){
list_add(&scan_list, &(item_iterator->list));
}
}
//get ap list
wifi_station_get_scan_list(&scan_list, ap_count, (display_option->sort_enable == 1)? true : false);
at_printf("Auth{ 0: Open, 1: WEP, 2: WPA_PSK, 3:WPA2_PSK, 4:WPA_WPA2_PSK, 5: WPA2_ENTERPRISE}\r\n");
at_printf ("\r\nAP_num SSID RSSI Channel Auth_mode BSSID IMODE WPS Freq_offset FreqCal\r\n");
for (iterator = ap_list->next, i = 1; iterator != ap_list; iterator = iterator->next, i++) {
for (iterator = scan_list.next, i = 0; iterator != &scan_list; iterator = iterator->next, i++) {
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf ("%6d %-31s %4d %7d %9d "MACSTR" %2X %3d %11d %7d\r\n",
i, item_iterator->ssid, item_iterator->rssi, item_iterator->channel, item_iterator->authmode,
(i + 1), item_iterator->ssid, item_iterator->rssi, item_iterator->channel, item_iterator->authmode,
MAC2STR(item_iterator->bssid),
item_iterator->imode, item_iterator->wps, item_iterator->freq_offset, item_iterator->freqcal_val
);
}
//free scan_list space
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
prev = iterator->prev;
item_iterator = list_entry(iterator, ap_info_t, list);
list_rm(iterator);
if(item_iterator){
OS_Free(item_iterator);
}
iterator = prev;
}
}
at_printf(RET_OK_STR);
@@ -710,53 +729,119 @@ char at_notify_aplist(void)
int i=0;
int ap_count = 0;
ap_info_t *item_iterator = NULL;
list_t *ap_list = NULL, *iterator;
list_t scan_list, *iterator, *prev;
ap_count = wifi_station_get_scan_ap_list(&ap_list, true);
at_printf("\r\nAT+ScanAp\r\n",ap_count);
for (iterator = ap_list->next, i = 0; (i < 10) && (iterator != ap_list); iterator = iterator->next, i++)
{
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf(MACSTR";%d;%s\r\n", MAC2STR(item_iterator->bssid), item_iterator->rssi, item_iterator->ssid);
ap_count = wifi_station_get_scan_list_size();
if(ap_count > 0){
//prepare scan_list space
list_init(&scan_list);
for(i = 0; i < ap_count; i++){
item_iterator = OS_Malloc(sizeof(ap_info_t));
if(item_iterator){
list_add(&scan_list, &(item_iterator->list));
}
}
//get ap list
wifi_station_get_scan_list(&scan_list, ap_count, true);
at_printf("\r\nAT+ScanAp\r\n",ap_count);
for (iterator = scan_list.next, i = 0; (i < 10) && iterator != &scan_list; iterator = iterator->next, i++) {
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf(MACSTR";%d;%s\r\n", MAC2STR(item_iterator->bssid), item_iterator->rssi, item_iterator->ssid);
}
//free scan_list space
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
prev = iterator->prev;
item_iterator = list_entry(iterator, ap_info_t, list);
list_rm(iterator);
if(item_iterator){
OS_Free(item_iterator);
}
iterator = prev;
}
}
return AT_OK;
}
char at_station_aplx(char *str)
{
int ap_count = 0;
int ap_count = 0, i;
ap_info_t *item_iterator = NULL;
list_t *ap_list = NULL, *iterator;
list_t scan_list, *iterator, *prev;
ap_count = wifi_station_get_scan_ap_list(&ap_list, true);
for (iterator = ap_list->next; iterator != ap_list; iterator = iterator->next)
{
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf("\r\n+CWLAP:%d,\"%s\",%d,\""MACSTR"\",%d",
ap_count = wifi_station_get_scan_list_size();
if(ap_count > 0){
//prepare scan_list space
list_init(&scan_list);
for(i = 0; i < ap_count; i++){
item_iterator = OS_Malloc(sizeof(ap_info_t));
if(item_iterator){
list_add(&scan_list, &(item_iterator->list));
}
}
//get ap list
wifi_station_get_scan_list(&scan_list, ap_count, true);
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf("\r\n+CWLAP:%d,\"%s\",%d,\""MACSTR"\",%d",
item_iterator->authmode,
item_iterator->ssid,
item_iterator->rssi,
MAC2STR(item_iterator->bssid),
item_iterator->channel);
}
//free scan_list space
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
prev = iterator->prev;
item_iterator = list_entry(iterator, ap_info_t, list);
list_rm(iterator);
if(item_iterator){
OS_Free(item_iterator);
}
iterator = prev;
}
}
at_printf("\r\n\r\nOK\r\n",ap_count);
return AT_OK;
}
char at_station_aplist(char *str)
{
int ap_count = 0;
int ap_count = 0, i;
ap_info_t *item_iterator = NULL;
list_t *ap_list = NULL, *iterator;
list_t scan_list, *iterator, *prev;
ap_count = wifi_station_get_scan_ap_list(&ap_list, true);
if(ap_count > 0)
{
ap_count = wifi_station_get_scan_list_size();
if(ap_count > 0){
//prepare scan_list space
list_init(&scan_list);
for(i = 0; i < ap_count; i++){
item_iterator = OS_Malloc(sizeof(ap_info_t));
if(item_iterator){
list_add(&scan_list, &(item_iterator->list));
}
}
//get ap list
wifi_station_get_scan_list(&scan_list, ap_count, true);
at_printf("\r\n+CWLAPLST: %d, ",ap_count);
for (iterator = ap_list->next; iterator != ap_list; iterator = iterator->next)
{
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
item_iterator = list_entry(iterator, ap_info_t, list);
at_printf(MACSTR" @ %d, ", MAC2STR(item_iterator->bssid), item_iterator->rssi);
}
//free scan_list space
for (iterator = scan_list.next; iterator != &scan_list; iterator = iterator->next) {
prev = iterator->prev;
item_iterator = list_entry(iterator, ap_info_t, list);
list_rm(iterator);
if(item_iterator){
OS_Free(item_iterator);
}
iterator = prev;
}
at_printf("\r\n\r\nOK\r\n");
}
else
@@ -3032,23 +3117,25 @@ char at_iperf(char *str)
#if WIFI_SWITCH
uint8_t wifi_en=1;
extern void wifi_track_init(void);
extern void wifi_track_reinit(void);
extern void wifi_track_deinit(void);
extern bool wifi_manager_init(void);
extern bool wifi_manager_deinit(void);
char at_wifi_switch(char *str)
{
uint8_t en;
en=atoi(str);
LOG(LOG_LVL_ERROR, "%s() 000 en=%d\r\n",__func__,en);
if(en&&wifi_en==0){
wifi_en=1;
LOG(LOG_LVL_ERROR, "%s() 111 \r\n",__func__);
wifi_init();
wifi_manager_init(wifi_manager_get_handle());
wifi_sniffer_reinit();//wifi_sniffer_init();//wifi_start(&init_param);
//wifi_init();
//wifi_manager_init();
wifi_track_reinit();
}else if(0==en&&wifi_en){
wifi_en=0;
LOG(LOG_LVL_ERROR, "%s() 222 \r\n",__func__);
wifi_sniffer_deinit();//call wifi_stop()
wifi_manager_deinit(wifi_manager_get_handle());
wifi_deinit();
wifi_track_deinit();//call wifi_stop()
//wifi_manager_deinit();
//wifi_deinit();
}
at_printf("OK\r\n");

View File

@@ -8,9 +8,8 @@
#include "ln88xx.h"
#include "utils/debug/log.h"
#include "utils/debug/art_assert.h"
#if WIFI_TRACK
#include "ll/ll_gpio.h"
#endif
#include "hal/hal_gpio.h"
#if (CHIP_ROLE == CHIP_MCU)
#include "serial/serial.h"
@@ -132,17 +131,21 @@ void serial_rx_callbcak(void){
OS_SemaphoreRelease(&g_rx_sem);
}
#endif /*__CONFIG_OS_KERNEL */
#if WIFI_TRACK
extern GPIO_Value get_gpio_value(GPIO_Num gpio);
#endif
void console_init(void)
{
CONSOLE_CTRL_T *console = &console_ctrl;
Serial_t *fd = NULL;
#if WIFI_TRACK
GPIO_InitTypeDef gpio_config = {
.dir = GPIO_INPUT,
.debounce = GPIO_DEBOUNCE_YES,
};
HAL_GPIO_Init(GPIOA_8, gpio_config);
int bd = 115200;
if(get_gpio_value(GPIOA_8) == GPIO_VALUE_LOW)
if(HAL_GPIO_ReadPin(GPIOA_8) == GPIO_VALUE_LOW)
bd = CONSOLE_PORT_BAUDRATE;
else
bd = 9600;

View File

@@ -16,9 +16,6 @@ extern uint32_t __Vectors[];
#define vector_table __Vectors
#endif
/* This variable is a placeholder, defined at the junction of two blocks memory(SRAM0 and SRAM1) */
int placeholder_between_sram0_and_sram1 __attribute__ ((section(".ARM.__at_0x1FFFFFFC"), zero_init));
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/

View File

@@ -1,31 +0,0 @@
#include "hal/hal_adc.h"
#include "drv/drv_adc_measure.h"
void drv_adc_init(void)
{
ADC_InitTypeDef adc_init_struct;
adc_init_struct.ADC_Autoff = FDISABLE;
adc_init_struct.ADC_ContinuousConvMode = FENABLE;
adc_init_struct.ADC_DataAlign = ADC_DataAlign_Right;
adc_init_struct.ADC_WaitMode = FDISABLE;
HAL_ADC_Init(ADC, &adc_init_struct);
HAL_ADC_PrescCfg(ADC, 42);//255: 256*2
HAL_ADC_SeqChanSelect_Cfg(ADC, ADC_CHAN_0);
HAL_ADC_Cmd(ADC, FENABLE);
HAL_ADC_SoftwareStartConvCmd(ADC);
}
uint16_t drv_adc_read(uint8_t ch)
{
uint16_t read_adc = 0;
for(volatile uint32_t t = 0; t < 40*3; t++);//delay xx us
read_adc = HAL_ADC_GetConversionValue(ADC, ch);
return read_adc;
}

View File

@@ -4,7 +4,7 @@
#include "hal/hal_syscon.h"
#include "utils/debug/log.h"
static hal_sdio_ctrl_t g_hal_sdio_ctrl __attribute__((section("wlan_shared_mem"))) = {0,};
static hal_sdio_ctrl_t g_hal_sdio_ctrl;
static hal_sdio_ctrl_t *hal_sdio_ctrl_get_handle(void)
{
return &g_hal_sdio_ctrl;

View File

@@ -14,7 +14,30 @@
#define SLEEP_TIMER_EXTRA_COMPENSATION_MSEC (0)
#define RTC_TIMER_EXTRA_COMPENSATION_MSEC (0)
hal_sleep_ctrl_t g_sleep_ctrl __attribute__((section("retention_data"))) = {0};
typedef struct
{
int irq_num;
sleep_condition_cb_t sleep_condition;
sleep_processing_cb_t pre_sleep;
sleep_processing_cb_t post_sleep;
}hal_sleep_action_t ;
typedef struct {
sleep_mode_enum_t sleep_mode;
uint32_t peripheral_mod;
hal_sleep_action_t actions[29];
}hal_sleep_config_t;
typedef struct
{
bool flag;
hal_sleep_config_t sleep_config;
uint32_t nvic_int_en[2];
uint64_t compensation;
uint32_t msec;
}hal_sleep_ctrl_t ;
hal_sleep_ctrl_t g_sleep_ctrl __attribute__((section("retention_data")));
static hal_sleep_ctrl_t *hal_sleep_get_handle(void)
{
@@ -24,15 +47,9 @@ static hal_sleep_ctrl_t *hal_sleep_get_handle(void)
void EXTERNAL_IRQHandler(void)
{
HAL_SYSCON_EXT_INTR_Clear();
hal_sleep_wakeup_source_set(EXT_INT_WAKEUP);
}
static void hal_sleep_external_irq_wakeup_init(SYSTEM_EXT_INT_Wakeup_Index ext_int_idx, SYSTEM_EXT_INT_Triggle_Type triggle)
{
HAL_SYSCON_EXT_INTR_Set_Triggle_Condition(ext_int_idx, triggle);
HAL_SYSCON_EXT_INTR_Enable(ext_int_idx, true);
NVIC_EnableIRQ(EXTERNAL_IRQn);
}
void hal_sleep_rtc_wakeup_init(uint32_t counter_match)
static int hal_sleep_rtc_init(uint32_t counter_match)
{
RTC_InitTypeDef rtcConfig;
@@ -44,11 +61,13 @@ void hal_sleep_rtc_wakeup_init(uint32_t counter_match)
HAL_RTC_Init(rtcConfig);
HAL_RTC_Enable(RTC_ENABLE);
NVIC_EnableIRQ(RTC_IRQn);
return 0;
}
void hal_sleep_rtc_wakeup_deinit(void)
static int hal_sleep_rtc_deinit(void)
{
HAL_RTC_Enable(RTC_DISABLE);
NVIC_DisableIRQ(RTC_IRQn);
return 0;
}
void RTC_IRQHandler(void)
{
@@ -59,122 +78,316 @@ void RTC_IRQHandler(void)
HAL_RTC_ClearInt();
//disable RTC
hal_sleep_rtc_wakeup_deinit();
//set wakeup src
hal_sleep_wakeup_source_set(RTC_WAKEUP);
hal_sleep_rtc_deinit();
}
}
void hal_sleep_init(hal_sleep_config_t *sleep_config)
void SLEEP_IRQHandler(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
if(sleep_ctrl->inited){
LOG(LOG_LVL_EMERG, "Function hal_sleep_init(*sleep_config) has been called, If you want to reconfigure, please call hal_sleep_deinit() and re-call hal_sleep_init(*sleep_config)\r\n");
return;
}
memset(sleep_ctrl, 0, sizeof(hal_sleep_ctrl_t));
sleep_ctrl->inited = true;
memcpy(&(sleep_ctrl->sleep_config), sleep_config, sizeof(hal_sleep_config_t));
}
void hal_sleep_deinit(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
memset(sleep_ctrl, 0, sizeof(hal_sleep_ctrl_t));
return;
}
static void hal_sleep_wakeup_source_clear_all(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
sleep_config->wakeup_src = 0;
}
static void hal_sleep_wakeup_source_update(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
sleep_mode_enum_t sleep_mode = sleep_config->sleep_mode;
//clear wakeup source
hal_sleep_wakeup_source_clear_all();
if(sleep_mode >= LIGHT_SLEEP)
{
//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
sleep_ctrl->nvic_int_en[0] = NVIC->ISER[0];
sleep_ctrl->nvic_int_en[1] = NVIC->ISER[1];
//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD>
//disable all interrupts
NVIC->ICER[0] = 0xFFFFFFFF;
NVIC->ICER[1] = 0xFFFFFFFF;
}
//enable wakeup IRQ
if(sleep_mode >= LIGHT_SLEEP){
if(sleep_mode == LIGHT_SLEEP){
NVIC_EnableIRQ(UART0_IRQn);
NVIC_EnableIRQ(UART1_IRQn);
}else{
NVIC_EnableIRQ(SLEEP_IRQn);
}
#if WIFI_SWITCH==0
if(sleep_mode <= DEEP_SLEEP){
NVIC_EnableIRQ(MAC_IRQn);
}
#endif
if(sleep_config->wakeup_src & EXT_INT_WAKEUP){
//ext int wakeup init
hal_sleep_external_irq_wakeup_init(HAL_GPIO_Mapping_To_Ext_Int(sleep_config->ext_irq_cfg.gpio), sleep_config->ext_irq_cfg.triggle_type);
}
}
NVIC_DisableIRQ(SLEEP_IRQn);
//do nothing
}
void hal_sleep_set_config(hal_sleep_config_t *sleep_config)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
if(!sleep_ctrl->inited){
LOG(LOG_LVL_EMERG, "Function hal_sleep_init(*sleep_config) has not been called before, so you can't set sleep_config!\r\n");
return;
}
memcpy(&(sleep_ctrl->sleep_config), sleep_config, sizeof(hal_sleep_config_t));
}
sleep_mode_enum_t hal_sleep_get_mode(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
return sleep_ctrl->sleep_config.sleep_mode;
}
extern bool is_sta_sleeping(void);
extern void initialize_phy(void);
#if 0
#define RAM_RETENTION (1 << 0)
#define RAM_MAC (1 << 1)
#define RAM_CPU (1 << 2)
#if WIFI_SWITCH
extern uint8_t wifi_en;
#endif
#define PRE_SLEEP_LOOP_COUNT 10
static void pre_sleep_processing_hardware(sleep_mode_enum_t sleep_mode, uint8_t sram_powerdown)
{
int i = 0;
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
if(sleep_mode < LIGHT_SLEEP || sleep_mode > FROZEN_SLEEP){
return;
}
if(sleep_mode >= RETENTION_SLEEP){
HAL_SYSCON_AWO_sram_pd_en(sram_powerdown);
HAL_SYSCON_AWO_sram_po_en(0x07);
HAL_SYSCON_AWO_pmu_ret_en(1);
HAL_SYSCON_AWO_pmu_unret_en(1);
HAL_SYSCON_AWO_pdcmp_po(0);
if(sleep_mode == FROZEN_SLEEP){
HAL_SYSCON_AWO_cpucore_retreg_po(0);//set 0 to enter frozon mode
HAL_SYSCON_AWO_idle_reg_set(0x52);
}else{
HAL_SYSCON_AWO_cpucore_retreg_po(1);
HAL_SYSCON_AWO_lp_mode_awo(1);
}
}else{//sleep_mode <= DEEP_SLEEP
HAL_SYSCON_AWO_sram_pd_en(sram_powerdown);
HAL_SYSCON_AWO_pmu_ret_en(0);
HAL_SYSCON_AWO_pmu_unret_en(0);
// if phy needs power down, then save phy reg to cmp
HAL_SYSCON_CMP_rfreg_len(0x158);
HAL_SYSCON_CMP_rfreg_base_addr(0x0);
HAL_SYSCON_CMP_rfreg_action_set(0x1);//bit 0 is save rf register
while(HAL_SYSCON_CMP_save_done_get() != 1);
}
if((sleep_mode >= DEEP_SLEEP) && (sleep_mode <= RETENTION_SLEEP)){
ll_sleep_mac_tsf_clk_switch(1);//switch to 32k and power saving
}
//set CM4 sleep mode
if(sleep_mode >= DEEP_SLEEP){
SCB->SCR |= (1<<2);
}else{
SCB->SCR &= ~(1<<2);
}
if(sleep_mode == LIGHT_SLEEP){
HAL_SYSCON_AWO_sw_pwr_ctrl_set(0x02);
while(i++ < PRE_SLEEP_LOOP_COUNT){
__NOP();
}
while(HAL_SYSCON_AWO_pmu_fsm_get() != 0);
HAL_SYSCON_CMP_sw_clkg_set(sleep_config->peripheral_mod|(1<<MOD_QSPI|1<<MOD_CACHE|1<<MOD_RFREG));
}
}
static void post_sleep_processing_hardware(sleep_mode_enum_t sleep_mode)
{
if(sleep_mode < LIGHT_SLEEP || sleep_mode > FROZEN_SLEEP){
return;
}
if(sleep_mode <= DEEP_SLEEP){
if(sleep_mode == LIGHT_SLEEP){
HAL_SYSCON_AWO_sw_pwr_ctrl_set(0x01);
HAL_SYSCON_CMP_sw_clkg_set(0xFFFFFFFF);
while(HAL_SYSCON_AWO_pmu_fsm_get() != 0);
}
HAL_SYSCON_AWO_pmu_ret_en(0);
HAL_SYSCON_AWO_pmu_unret_en(0);
//restore RF register firstly
HAL_SYSCON_CMP_rfreg_len(0x158);
HAL_SYSCON_CMP_rfreg_base_addr(0x0);
HAL_SYSCON_CMP_rfreg_action_set(0x2);//bit 1 is restore rf register
while(HAL_SYSCON_CMP_restore_done_get() != 1);
}
if((sleep_mode >= DEEP_SLEEP) && (sleep_mode <= RETENTION_SLEEP)){
ll_sleep_mac_tsf_clk_switch(0);//switch to 40M
}
}
static int hal_sleep_peripheral_module_to_IRQn(hal_peripheral_module_t peripheral_module)
{
int ret = 0;
switch(peripheral_module){
case MOD_QSPI:
ret = QSPI_IRQn;
break;
case MOD_ADDC:
ret = ADC_IRQn;
break;
case MOD_I2S:
ret = I2S_IRQn;
break;
case MOD_GPIO:
ret = GPIO_IRQn;
break;
case MOD_SPIM:
ret = SPI0_IRQn;
break;
case MOD_SPIS:
ret = SPI2_IRQn;
break;
case MOD_I2C0:
ret = I2C0_IRQn;
break;
case MOD_I2C1:
ret = I2C1_IRQn;
break;
case MOD_UART0:
ret = UART0_IRQn;
break;
case MOD_UART1:
ret = UART1_IRQn;
break;
case MOD_SPIM2:
ret = SPI1_IRQn;
break;
case MOD_WDT:
ret = WDT_IRQn;
break;
case MOD_TIMER0:
ret = TIMER_IRQn;
break;
case MOD_TIMER1:
ret = TIMER_IRQn;
break;
case MOD_TIMER2:
ret = TIMER_IRQn;
break;
case MOD_TIMER3:
ret = TIMER_IRQn;
break;
case MOD_TIMER4:
ret = TIMER_IRQn;
break;
case MOD_SDIO:
ret = SDIO_FUN1_IRQn;
break;
case MOD_MAC:
ret = MAC_IRQn;
break;
case MOD_DMA:
ret = DMA_IRQn;
break;
case MOD_PWM:
ret = PWM_IRQn;
break;
case MOD_TRNG:
ret = TRNG_IRQn;
break;
case MOD_AES:
ret = AES_IRQn;
break;
case MOD_EXT_INT:
ret = EXTERNAL_IRQn;
break;
case MOD_DGBH:
case MOD_CACHE:
case MOD_RFREG:
case MOD_EF:
default:
break;
}
return ret;
}
static int log2(uint32_t val)
{
int ret = 0;
switch(val)
{
case 0x1: ret = 0; break;
case 0x2: ret = 1; break;
case 0x4: ret = 2; break;
case 0x8: ret = 3; break;
case 0x10: ret = 4; break;
case 0x20: ret = 5; break;
case 0x40: ret = 6; break;
case 0x80: ret = 7; break;
case 0x100: ret = 8; break;
case 0x200: ret = 9; break;
case 0x400: ret = 10; break;
case 0x800: ret = 11; break;
case 0x1000: ret = 12; break;
case 0x2000: ret = 13; break;
case 0x4000: ret = 14; break;
case 0x8000: ret = 15; break;
case 0x10000: ret = 16; break;
case 0x20000: ret = 17; break;
case 0x40000: ret = 18; break;
case 0x80000: ret = 19; break;
case 0x100000: ret = 20; break;
case 0x200000: ret = 21; break;
case 0x400000: ret = 22; break;
case 0x800000: ret = 23; break;
case 0x1000000: ret = 24; break;
case 0x2000000: ret = 25; break;
case 0x4000000: ret = 26; break;
case 0x8000000: ret = 27; break;
case 0x10000000: ret = 28; break;
case 0x20000000: ret = 29; break;
case 0x40000000: ret = 30; break;
case 0x80000000: ret = 31; break;
default: break;
}
return ret;
}
/**
* @brief Check whether can sleep
*
* @param none
*
* @note If can sleep, return true; else return flase.
*/
static bool hal_sleep_condition_check(hal_sleep_config_t *sleep_config)
{
bool ret = true;
hal_sleep_action_t *action;
uint32_t value, tmp, idx;
if(!sleep_config){
return false;
}
value = sleep_config->peripheral_mod;
while(value){
tmp = value & (value - 1);
idx = log2(value - tmp);
action = &(sleep_config->actions[idx]);
if(action->sleep_condition){
ret = ret && action->sleep_condition();
}
value = tmp;
}
return ret;
}
static void hal_pre_sleep_processing_registered_cb(hal_sleep_config_t *sleep_config)
{
hal_sleep_action_t *action;
uint32_t value, tmp, idx;
if(!sleep_config){
return;
}
value = sleep_config->peripheral_mod;
while(value){
tmp = value & (value - 1);
idx = log2(value - tmp);
action = &(sleep_config->actions[idx]);
NVIC_EnableIRQ((IRQn_Type)action->irq_num);
if(action->pre_sleep){
action->pre_sleep();
}
value = tmp;
}
}
static void hal_post_sleep_processing_registered_cb(hal_sleep_config_t *sleep_config)
{
hal_sleep_action_t *action;
uint32_t value, tmp, idx;
if(!sleep_config){
return;
}
value = sleep_config->peripheral_mod;
while(value){
tmp = value & (value - 1);
idx = log2(value - tmp);
action = &(sleep_config->actions[idx]);
if(action->post_sleep){
action->post_sleep();
}
value = tmp;
}
}
void hal_pre_sleep_processing(uint32_t *ticks)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
sleep_mode_enum_t sleep_mode = hal_sleep_get_mode();
uint64_t u64val = (uint64_t)(*ticks) * 1000 / configTICK_RATE_HZ;
uint8_t sram_powerdown = 0x00;//RAM_RETENTION | RAM_MAC | RAM_CPU
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
#if WIFI_SWITCH
if(sleep_mode < LIGHT_SLEEP || sleep_ctrl->flag || (wifi_en==1)){
if(sleep_mode < LIGHT_SLEEP || sleep_ctrl->flag){
*ticks = 0;
return;
}
//LOG(LOG_LVL_INFO, "\r\n%s() line:%d\r\n",__func__,__LINE__);
#else
if(sleep_mode < LIGHT_SLEEP || sleep_ctrl->flag || (sleep_ctrl->wifi_is_slept_cb && !sleep_ctrl->wifi_is_slept_cb())){
if(!hal_sleep_condition_check(sleep_config)){
*ticks = 0;
return;
}
#endif
if(u64val >> 32){
LOG(LOG_LVL_EMERG, "[%s, %d]ticks(%d) expected overflow!\r\n", __func__, __LINE__, *ticks);
@@ -187,22 +400,24 @@ void hal_pre_sleep_processing(uint32_t *ticks)
sleep_ctrl->flag = true;
//set wakeup source
hal_sleep_wakeup_source_update();
hal_pre_sleep_processing_registered_cb(sleep_config);
if(sleep_mode == LIGHT_SLEEP){
// LIGHT_SLEEP˯<50><CBAF>ģʽʱ<CABD><CAB1>ʹ<EFBFBD><CAB9>RTC<54><43><EFBFBD><EFBFBD>
u64val = ((uint64_t)1000000 * (sleep_ctrl->msec - RTC_TIMER_EXTRA_COMPENSATION_MSEC))/HAL_SYSCON_Get32KPeriodNs();
if(u64val >> 32){
LOG(LOG_LVL_EMERG, "[%s, %d]RTC counter_match(%lld) overflow!\r\n", __func__, __LINE__, u64val);
u64val = u64val & 0xFFFFFFFFULL;
}
hal_sleep_rtc_wakeup_init(u64val);
hal_sleep_rtc_init((uint32_t)u64val);
}else{
// <20><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>ģʽʱ<CABD><CAB1>ʹ<EFBFBD><CAB9>ר<EFBFBD>ŵ<EFBFBD>sleep timer<65><72><EFBFBD><EFBFBD>
sleep_ctrl->compensation = HAL_SYSCON_CalculateCompensateNs() + (uint64_t)SLEEP_TIMER_EXTRA_COMPENSATION_MSEC*1000000;
HAL_SYSCON_CPUSleepDurationEnable(((uint64_t)*ticks * 1000000000 / configTICK_RATE_HZ) - sleep_ctrl->compensation);
NVIC_EnableIRQ(SLEEP_IRQn);
}
ll_pre_sleep_processing(sleep_mode, sram_powerdown);
//ll_pre_sleep_processing(sleep_mode, sram_powerdown);
pre_sleep_processing_hardware(sleep_mode, sram_powerdown);
HAL_SYSCON_AWO_clk_sel_set(0); // switch to crystal clock
}
uint32_t hal_post_sleep_processing(uint32_t ticks)
{
@@ -225,7 +440,7 @@ uint32_t hal_post_sleep_processing(uint32_t ticks)
}
sleep_ctrl->flag = false;
ll_post_sleep_processing(mode);
post_sleep_processing_hardware(mode);
if(mode == LIGHT_SLEEP){
ticks = (((uint64_t)HAL_RTC_GetCurValue() * HAL_SYSCON_Get32KPeriodNs() / 1000000 + RTC_TIMER_EXTRA_COMPENSATION_MSEC) * configTICK_RATE_HZ) / 1000;
@@ -243,28 +458,67 @@ uint32_t hal_post_sleep_processing(uint32_t ticks)
NVIC->ISER[0] = sleep_ctrl->nvic_int_en[0];
NVIC->ISER[1] = sleep_ctrl->nvic_int_en[1];
}
if(sleep_ctrl->reinit_phy_cb)
{
sleep_ctrl->reinit_phy_cb();
}
hal_post_sleep_processing_registered_cb(&(sleep_ctrl->sleep_config));
HAL_SYSCON_AWO_clk_sel_set(1); // switch to system pll clock
return ticks;
}
void hal_sleep_wakeup_source_set(hal_sleep_wakeup_src_enum_t wakeup_src)
int hal_sleep_set_mode(sleep_mode_enum_t sleep_mode)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
sleep_ctrl->sleep_config.sleep_mode = sleep_mode;
return 0;
}
sleep_mode_enum_t hal_sleep_get_mode(void)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
return sleep_ctrl->sleep_config.sleep_mode;
}
int hal_sleep_register(hal_peripheral_module_t peripheral_module, sleep_condition_cb_t sleep_condition, sleep_processing_cb_t pre_sleep, sleep_processing_cb_t post_sleep)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
sleep_config->wakeup_src |= wakeup_src;
hal_sleep_action_t *action;
if(peripheral_module >= MOD_MAX || peripheral_module < MOD_QSPI){
return -1;
}
action = &(sleep_config->actions[peripheral_module]);
SET_BIT(sleep_config->peripheral_mod, peripheral_module);
action->irq_num = hal_sleep_peripheral_module_to_IRQn(peripheral_module);
if(sleep_condition){
action->sleep_condition = sleep_condition;
}
if(pre_sleep){
action->pre_sleep = pre_sleep;
}
if(post_sleep){
action->post_sleep = post_sleep;
}
return 0;
}
void hal_sleep_register_callback(reinitialize_phy_cb_t reinit_phy_cb, wifi_is_slept_cb_t wifi_is_slept_cb)
int hal_sleep_unregister(hal_peripheral_module_t peripheral_module)
{
hal_sleep_ctrl_t *sleep_ctrl = hal_sleep_get_handle();
sleep_ctrl->reinit_phy_cb = reinit_phy_cb;
sleep_ctrl->wifi_is_slept_cb = wifi_is_slept_cb;
}
void SLEEP_IRQHandler(void)
{
//do nothing
hal_sleep_wakeup_source_set(SLEEP_TIMER_WAKEUP);
hal_sleep_config_t *sleep_config = &(sleep_ctrl->sleep_config);
hal_sleep_action_t *action;
if(peripheral_module >= MOD_MAX || peripheral_module < MOD_QSPI){
return -1;
}
action = &(sleep_config->actions[peripheral_module]);
CLR_BIT(sleep_config->peripheral_mod, peripheral_module);
action->irq_num = 0;
action->sleep_condition = NULL;
action->pre_sleep = NULL;
action->post_sleep = NULL;
return 0;
}

View File

@@ -498,6 +498,7 @@ void HAL_SYSCON_EXT_INTR_Clear(void)
LL_SYSCON_EXT_INTR_Clear();
}
/**
* @brief Reset the mcu by software
*
@@ -526,13 +527,104 @@ void HAL_SYSCON_Xtal40MCap_Set(uint8_t cap)
LL_SYSCON_Xtal40MCap_Set(cap);
}
void HAL_SYSCON_PmuCfg(void)
{
LL_SYSCON_PMUReg_Set(0x8B050900);// (BUCK) r_vtrim: bit[9:8]=0b01 //00: 1.195 / 01: 1.202 / 10: 1.210 / 11: 1.218
LL_SYSCON_PMUCfg_Set(0x20001603);// o_digldo_norvdd: bit[10:8]=0b100; o_digldo_retvdd: bit[14:12]=0b001
//LL_SYSCON_PMUCfg_Set(0x20001603);// o_digldo_norvdd: bit[10:8]=0b100; o_digldo_retvdd: bit[14:12]=0b001
LL_SYSCON_PMUCfg_Set(0x310746fd);// o_digldo_norvdd: bit[10:8]=0b100; o_digldo_retvdd: bit[14:12]=0b110
LL_SYSCON_Misc_Set(0x00002C0D);
LL_SYSCON_PMUAvdd_Set(0x00055DB6);// Avdd & PLL & RF voltage 55B75
}
void HAL_SYSCON_AWO_phy_pd_en(uint8_t en)
{
LL_SYSCON_AWO_phy_pd_en(en);
}
void HAL_SYSCON_AWO_phy_po_en(uint8_t en)
{
LL_SYSCON_AWO_phy_po_en(en);
}
void HAL_SYSCON_AWO_ldo18_po_en(uint8_t en)
{
LL_SYSCON_AWO_ldo18_po_en(en);
}
void HAL_SYSCON_AWO_sram_pd_en(uint8_t en)
{
LL_SYSCON_AWO_sram_pd_en(en);
}
void HAL_SYSCON_AWO_sram_po_en(uint8_t en)
{
LL_SYSCON_AWO_sram_po_en(en);
}
void HAL_SYSCON_AWO_pmu_ret_en(uint8_t en)
{
LL_SYSCON_AWO_pmu_ret_en(en);
}
void HAL_SYSCON_AWO_pmu_unret_en(uint8_t en)
{
LL_SYSCON_AWO_pmu_unret_en(en);
}
void HAL_SYSCON_AWO_pdcmp_po(uint8_t po)
{
LL_SYSCON_AWO_pdcmp_po(po);
}
void HAL_SYSCON_AWO_cpucore_retreg_po(uint8_t po)
{
LL_SYSCON_AWO_cpucore_retreg_po(po);
}
void HAL_SYSCON_AWO_idle_reg_set(uint32_t val)
{
LL_SYSCON_AWO_idle_reg_set(val);
}
void HAL_SYSCON_AWO_lp_mode_awo(uint8_t lp_mode_awo)
{
LL_SYSCON_AWO_lp_mode_awo(lp_mode_awo);
}
void HAL_SYSCON_AWO_clk_sel_set(uint32_t val)
{
LL_SYSCON_AWO_clk_sel_set(val);
}
void HAL_SYSCON_CMP_rfreg_len(uint16_t rfreg_len)
{
LL_SYSCON_CMP_rfreg_len(rfreg_len);
}
void HAL_SYSCON_CMP_rfreg_base_addr(uint16_t rfreg_base_addr)
{
LL_SYSCON_CMP_rfreg_base_addr(rfreg_base_addr);
}
void HAL_SYSCON_CMP_rfreg_action_set(uint32_t val)
{
LL_SYSCON_CMP_rfreg_action_set(val);
}
uint8_t HAL_SYSCON_CMP_save_done_get(void)
{
return LL_SYSCON_CMP_save_done_get();
}
void HAL_SYSCON_AWO_sw_pwr_ctrl_set(uint32_t value)
{
LL_SYSCON_AWO_sw_pwr_ctrl_set(value);
}
uint8_t HAL_SYSCON_AWO_pmu_fsm_get(void)
{
return LL_SYSCON_AWO_pmu_fsm_get();
}
uint8_t HAL_SYSCON_CMP_restore_done_get(void)
{
return LL_SYSCON_CMP_restore_done_get();
}
void HAL_SYSCON_CMP_sw_clkg_set(uint32_t value)
{
LL_SYSCON_CMP_sw_clkg_set(value);
}

View File

@@ -4,6 +4,7 @@
#include "ll/ll_syscon.h"
#include "hal/hal_common.h"
timer_cb_func_t Timer_cb_func[4]={NULL};
/**
* @brief Initialize the timer according to the input param config.
@@ -16,6 +17,7 @@ void HAL_TIMER_Init(TIMER_InitTypeDef config)
assert_param(IS_TIMER_MODE(config.mode));
assert_param(IS_TIMER_MASK(config.mask));
assert_param( ((APBUS0_CLOCK / config.user_freq) >= 1 ) && ( (APBUS0_CLOCK / config.user_freq) <= 256 ));
assert_param(config.cb_func);
HAL_TIMER_Enable(config.index, TIMER_DISABLE);
@@ -52,6 +54,10 @@ void HAL_TIMER_Init(TIMER_InitTypeDef config)
default:
break;
}
if(config.cb_func)
{
Timer_cb_func[config.index-1]=config.cb_func;
}
}
@@ -233,4 +239,14 @@ uint32_t HAL_TIMER_LoadCount2_Get(TIMER_Index index)
return LL_TIMER_LoadCount2_Get(index);
}
void TIMER_IRQHandler()
{
TIMER_Index index;
for(index=TIMER_1;index<=TIMER_4;index++)
{
if(HAL_TIMER_Int_Status(index)&&Timer_cb_func[index-1])
{
Timer_cb_func[index-1]();
}
}
}

View File

@@ -0,0 +1,316 @@
#include "string.h"
#include "xz_decompress.h"
#include "flash_partition_mgr.h"
#include "ota_image.h"
#include "ota_agent.h"
#include "ota_port.h"
static uint8_t temp_buf[LEN_4KB];
static image_hdr_t app_header;
static image_hdr_t ota_header;
static partition_info_t partition_info_app;
static partition_info_t partition_info_ota;
static int verify_total_img_partition(partition_type_t type, \
partition_info_t *info, image_hdr_t *hdr)
{
int err;
if (LN_TRUE != ln_fetch_partition_info(type, info)) {
return OTA_ERR_PARTITION_TAB;
}
if (OTA_ERR_NONE != (err = image_header_read(type, hdr))) {
return err;
}
if (OTA_ERR_NONE != (err = image_header_verify(hdr))) {
return err;
}
if (OTA_ERR_NONE != (err = image_body_verify(info->start_addr, hdr))) {
return err;
}
return OTA_ERR_NONE;
}
static int orig_image_do_restore(uint32_t app_body_offset, \
uint32_t ota_body_offset, uint32_t size)
{
uint32_t i = 0;
uint32_t count_4k = size / LEN_4KB;
uint32_t remainder_4k = size % LEN_4KB;
ota_port_ctx_t * port = ota_get_port_ctx();
for (i = 0; i < count_4k; i++) {
port->flash_drv.read(ota_body_offset, temp_buf, LEN_4KB);
port->flash_drv.write(app_body_offset, temp_buf, LEN_4KB);
ota_body_offset += LEN_4KB;
app_body_offset += LEN_4KB;
}
if (remainder_4k) {
port->flash_drv.read(ota_body_offset, temp_buf, remainder_4k);
port->flash_drv.write(app_body_offset, temp_buf, remainder_4k);
}
return OTA_ERR_NONE;
}
static int decompress_read_cb(uint8_t **buf, uint32_t *buf_len)
{
int32_t tmp_len;
uint32_t ota_xz_size = ota_header.img_size_orig_xz;
uint32_t ota_img_body_offset = partition_info_ota.start_addr + sizeof(image_hdr_t);
ota_port_ctx_t * port = ota_get_port_ctx();
static uint32_t xz_already_read = 0;
tmp_len = ota_xz_size - xz_already_read;
if (tmp_len > LEN_4KB) {
tmp_len = LEN_4KB;
}
*buf = temp_buf;
port->flash_drv.read(ota_img_body_offset + xz_already_read, *buf, tmp_len);
*buf_len = tmp_len;
xz_already_read += tmp_len;
return XZ_RET_OK;
}
static int decompress_write_cb(uint32_t offset, uint8_t *buf, uint32_t buf_len)
{
uint32_t app_img_body_offset = partition_info_app.start_addr + sizeof(image_hdr_t);
ota_port_ctx_t * port = ota_get_port_ctx();
static uint32_t xz_already_write = 0;
port->flash_drv.write(app_img_body_offset + xz_already_write, buf, buf_len);
xz_already_write += buf_len;
return XZ_RET_OK;
}
static int xz_image_do_restore(uint32_t ota_body_offset, uint32_t size)
{
write_cb_t out;
read_cb_t in;
xz_header_t xz_header = {0,};
ota_port_ctx_t * port = ota_get_port_ctx();
out.Write = decompress_write_cb;
in.Read = decompress_read_cb;
port->flash_drv.read(ota_body_offset, &xz_header, sizeof(xz_header_t));
if (XZ_RET_OK != xz_decompress_buf_to_buf(xz_header.header, &out, &in)) {
return OTA_ERR_DECOMPRESS;
}
return OTA_ERR_NONE;
}
static int restore_image(jump_to_app_t jump_to_app)
{
static image_hdr_t img_hdr_temp;
upg_state_t upgrade_state;
uint32_t app_body_offset = 0;
uint32_t ota_body_offset = 0;
uint32_t size = 0;
ota_port_ctx_t * port = ota_get_port_ctx();
int err = OTA_ERR_NONE;
switch(ota_header.image_type)
{
case IMAGE_TYPE_ORIGINAL:
// copy header
port->flash_drv.write(partition_info_app.start_addr, &ota_header, sizeof(image_hdr_t));
// copy image
app_body_offset = partition_info_app.start_addr + sizeof(image_hdr_t);
ota_body_offset = partition_info_ota.start_addr + sizeof(image_hdr_t);
size = ota_header.img_size_orig;
if (OTA_ERR_NONE != (err = orig_image_do_restore(app_body_offset, \
ota_body_offset, size))) {
return err;
}
// verify app partition(new image)
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_APP, \
&partition_info_app, &app_header))) {
//TODO:HOOK
return err;
}
// update OTA upg state
upgrade_state = UPG_STATE_RESTORE_OK;
if (LN_TRUE != port->kv_ops.kv_set(KV_OTA_UPG_STATE, &upgrade_state, sizeof(upg_state_t))) {
//TODO:HOOK
return OTA_ERR_KV_RW;
}
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return OTA_ERR_NONE;
case IMAGE_TYPE_ORIGINAL_XZ:
// copy header
memcpy(&img_hdr_temp, &ota_header, sizeof(image_hdr_t));
img_hdr_temp.image_type = IMAGE_TYPE_ORIGINAL;
img_hdr_temp.header_crc32 = ln_crc32_signle_cal((uint8_t *)&img_hdr_temp, \
sizeof(image_hdr_t) - sizeof(uint32_t));
port->flash_drv.write(partition_info_app.start_addr, &img_hdr_temp, sizeof(image_hdr_t));
// copy image
ota_body_offset = partition_info_ota.start_addr + sizeof(image_hdr_t);
size = ota_header.img_size_orig_xz;
// it takes a lot of time.
if (OTA_ERR_NONE != (err = xz_image_do_restore(ota_body_offset, size))) {
return err;
}
// verify app partition(new image)
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_APP, \
&partition_info_app, &app_header))) {
//TODO:HOOK
return err;
}
// update OTA upg state
upgrade_state = UPG_STATE_RESTORE_OK;
if (LN_TRUE != port->kv_ops.kv_set(KV_OTA_UPG_STATE, &upgrade_state, sizeof(upg_state_t))) {
//TODO:HOOK
return OTA_ERR_KV_RW;
}
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return OTA_ERR_NONE;
case IMAGE_TYPE_DIFF:
case IMAGE_TYPE_DIFF_XZ:
if ((app_header.ver.ver_major == ota_header.ver_diff_depend.ver_major) && \
(app_header.ver.ver_minor == ota_header.ver_diff_depend.ver_minor))
{
// this feature is not supported yet.
return OTA_ERR_NOT_SUPPORT;
}
/* why? it's impossible to go into this branch */
else
{
// download ok! why? App should check it!
return OTA_ERR_IMPOSSIBLE_VER;
}
default:
return OTA_ERR_IMG_TYPE;
}
}
int ota_boot_upgrade_agent(jump_to_app_t jump_to_app)
{
ota_port_ctx_t * port = ota_get_port_ctx();
upg_state_t upgrade_state;
uint32_t v_len = 0;
int err = OTA_ERR_NONE;
if (LN_TRUE != port->kv_ops.kv_get(KV_OTA_UPG_STATE, &upgrade_state, sizeof(upg_state_t), &v_len))
{
/* upg state param error,may be first startup or KV damaged */
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_APP, \
&partition_info_app, &app_header))) {
//TODO:HOOK
return err;
}
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return OTA_ERR_NONE;
}
if (UPG_STATE_DOWNLOAD_OK != upgrade_state)
{
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_APP, \
&partition_info_app, &app_header))) {
//TODO:HOOK
return err;
}
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return OTA_ERR_NONE;
}
else
{
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_APP, \
&partition_info_app, &app_header))) {
//last time copy err case.
//return errno
}
else
{
if (OTA_ERR_NONE != (err = verify_total_img_partition(PARTITION_TYPE_OTA, \
&partition_info_ota, &ota_header))) {
//update OTA upg state [upg restory filed]
//jump to app!
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return err;//ota err image but wo also jump to app
}
//version compare
if ((ota_header.ver.ver_major + ota_header.ver.ver_minor) > \
(app_header.ver.ver_major + app_header.ver.ver_minor))
{
port->flash_drv.erase(partition_info_app.start_addr, partition_info_app.size);
return restore_image(jump_to_app);
}
else if ((ota_header.ver.ver_major + ota_header.ver.ver_minor) == \
(app_header.ver.ver_major + app_header.ver.ver_minor))
{
/* a power loss may have occurred after the last restore before the UPG STATE update. */
if ((app_header.img_size_orig == ota_header.img_size_orig) && \
(app_header.img_crc32_orig == ota_header.img_crc32_orig))
{
//update OTA param
upgrade_state = UPG_STATE_RESTORE_OK;
if (LN_TRUE != port->kv_ops.kv_set(KV_OTA_UPG_STATE, &upgrade_state, sizeof(upg_state_t))) {
//TODO:HOOK
return OTA_ERR_KV_RW;
}
jump_to_app(partition_info_app.start_addr + sizeof(image_hdr_t));
return OTA_ERR_NONE;
}
/* why? it's impossible to go into this branch */
else
{
//TODO:HOOK
return OTA_ERR_IMPOSSIBLE_VER;
}
}
/* why? it's impossible to go into this branch */
else
{
//TODO:HOOK
return OTA_ERR_IMPOSSIBLE_VER;
}
}
}
return 0;
}

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@@ -0,0 +1,15 @@
#ifndef __OTA_API_H__
#define __OTA_API_H__
#include "ota_err.h"
#include "ota_types.h"
#include "ota_port.h"
typedef void (*jump_to_app_t)(uint32_t app_entity_offset);
int ota_boot_upgrade_agent(jump_to_app_t jump_to_app);
#endif /* __OTA_API_H__ */

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@@ -0,0 +1,24 @@
#ifndef __OTA_ERR_H__
#define __OTA_ERR_H__
typedef enum {
OTA_ERR_NONE = 0u,
OTA_ERR_INVALID_PARAM,
OTA_ERR_KV_RW = 10u,
OTA_ERR_UPG_STATE,
OTA_ERR_PARTITION_TAB,
OTA_ERR_DECOMPRESS,
OTA_ERR_IMG_TYPE = 20u,
OTA_ERR_IMG_HEADER_READ,
OTA_ERR_IMG_HEADER_VERIFY,
OTA_ERR_IMG_ENTITY_VERIFY,
OTA_ERR_IMPOSSIBLE_VER = 30u,
OTA_ERR_NOT_SUPPORT,
} ota_err_t;
#endif /* __OTA_ERR_H__ */

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#include "ota_image.h"
#include "ota_port.h"
#define TEMP_BUF_LEN (128)
static uint8_t temp_buf[TEMP_BUF_LEN];
int image_header_read(partition_type_t type, image_hdr_t *header)
{
partition_info_t info;
ota_port_ctx_t * port = ota_get_port_ctx();
if ((type != PARTITION_TYPE_APP) && (type != PARTITION_TYPE_OTA)) {
return OTA_ERR_INVALID_PARAM;
}
if (LN_TRUE == ln_fetch_partition_info(type, &info)) {
port->flash_drv.read(info.start_addr, (uint8_t*)header, sizeof(image_hdr_t));
return OTA_ERR_NONE;
}
return OTA_ERR_IMG_HEADER_READ;
}
int image_header_fast_read(uint32_t start_addr, image_hdr_t *header)
{
ota_port_ctx_t * port = ota_get_port_ctx();
port->flash_drv.read(start_addr, (uint8_t*)header, sizeof(image_hdr_t));
return OTA_ERR_NONE;
}
int image_header_verify(image_hdr_t *header)
{
if (header->header_crc32 == ln_crc32_signle_cal((uint8_t *)header, sizeof(image_hdr_t) - sizeof(uint32_t))) {
return OTA_ERR_NONE;
}
return OTA_ERR_IMG_HEADER_VERIFY;
}
int image_body_verify(uint32_t start_addr, image_hdr_t *header)
{
uint32_t offset = 0;
uint32_t size = 0;
uint32_t i = 0;
uint32_t crc32_result = 0;
crc32_ctx_t crc_ctx = {0,};
ota_port_ctx_t * port = ota_get_port_ctx();
if (!header) {
return OTA_ERR_INVALID_PARAM;
}
offset = start_addr + sizeof(image_hdr_t);
switch (header->image_type)
{
case IMAGE_TYPE_ORIGINAL:
size = header->img_size_orig;
break;
case IMAGE_TYPE_ORIGINAL_XZ:
size = header->img_size_orig_xz;
break;
case IMAGE_TYPE_DIFF:
size = header->img_size_diff;
break;
case IMAGE_TYPE_DIFF_XZ:
size = header->img_size_diff_xz;
break;
default:
return OTA_ERR_IMG_TYPE;
}
/* calculate CRC32 checksum of flash image segment by segment */
ln_crc32_init(&crc_ctx);
for (i = 0; i < size/TEMP_BUF_LEN; i++) {
port->flash_drv.read(offset, temp_buf, TEMP_BUF_LEN);
ln_crc32_update(&crc_ctx, temp_buf, TEMP_BUF_LEN);
offset += TEMP_BUF_LEN;
}
port->flash_drv.read(offset, temp_buf, size % TEMP_BUF_LEN);
ln_crc32_update(&crc_ctx, temp_buf, size % TEMP_BUF_LEN);
crc32_result = ln_crc32_final(&crc_ctx);
/* check the CRC32 checksum */
switch (header->image_type)
{
case IMAGE_TYPE_ORIGINAL:
return ((crc32_result == header->img_crc32_orig) ? OTA_ERR_NONE : OTA_ERR_IMG_ENTITY_VERIFY);
case IMAGE_TYPE_ORIGINAL_XZ:
return ((crc32_result == header->img_crc32_orig_xz) ? OTA_ERR_NONE : OTA_ERR_IMG_ENTITY_VERIFY);
case IMAGE_TYPE_DIFF:
return ((crc32_result == header->img_crc32_diff) ? OTA_ERR_NONE : OTA_ERR_IMG_ENTITY_VERIFY);
case IMAGE_TYPE_DIFF_XZ:
return ((crc32_result == header->img_crc32_diff_xz) ? OTA_ERR_NONE : OTA_ERR_IMG_ENTITY_VERIFY);
default:
return OTA_ERR_IMG_TYPE;
}
}

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@@ -0,0 +1,17 @@
#ifndef __OTA_IMAGE_H__
#define __OTA_IMAGE_H__
#include "flash_partition_mgr.h"
#include "ota_types.h"
#include "ota_err.h"
int image_header_read(partition_type_t type, image_hdr_t * header);
int image_header_fast_read(uint32_t start_addr, image_hdr_t *header);
int image_header_verify(image_hdr_t * header);
int image_body_verify(uint32_t start_addr, image_hdr_t *header);
#endif /* __OTA_IMAGE_H__ */

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#include "ota_port.h"
#include "ota_err.h"
#include "hal/flash.h"
#include "ln_kv_api.h"
#include "ln_kv_err.h"
static ota_port_ctx_t ota_port;
static int flash_read(uint32_t offset, void *buf, uint32_t len)
{
return FLASH_Read(offset, len, buf);
}
static int flash_write(uint32_t offset, const void *buf, uint32_t len)
{
return FLASH_Program(offset, len, (uint8_t*)buf);
}
static int flash_erase(uint32_t offset, uint32_t len)
{
FLASH_Erase(offset, len);
return 0;
}
static int ota_kv_set(const char *key, const void *value, size_t v_len)
{
if (KV_ERR_NONE == ln_kv_set(key,value,v_len)) {
return LN_TRUE;
}
return LN_FALSE;
}
static int ota_kv_get(const char *key, void *value_buf, size_t value_buf_size, size_t *v_len)
{
if (KV_ERR_NONE == ln_kv_get(key,value_buf,value_buf_size,v_len)) {
return LN_TRUE;
}
return LN_FALSE;
}
static void chip_reboot(void)
{
}
ota_err_t ota_port_init(void)
{
ota_port.flash_drv.read = flash_read;
ota_port.flash_drv.write = flash_write;
ota_port.flash_drv.erase = flash_erase;
ota_port.kv_ops.kv_set = ota_kv_set;
ota_port.kv_ops.kv_get = ota_kv_get;
ota_port.chip_reboot = chip_reboot;
return OTA_ERR_NONE;
}
ota_port_ctx_t * ota_get_port_ctx(void)
{
return &ota_port;
}

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#ifndef __OTA_PORT_H__
#define __OTA_PORT_H__
#include "ln_types.h"
#include "ln_kv_err.h"
#include "ota_err.h"
#include "utils/crc32.h"
#define LEN_4KB (1024*4)
typedef int (*ota_flash_write_t)(uint32_t addr, const void *buf, uint32_t len);
typedef int (*ota_flash_read_t)(uint32_t addr, void *buf, uint32_t len);
typedef int (*ota_flash_erase_t)(uint32_t addr, uint32_t len);
typedef int (*ota_kv_set_t)(const char *key, const void *value, size_t v_len);
typedef int (*ota_kv_get_t)(const char *key, void *value_buf, size_t value_buf_size, size_t *v_len);
typedef void (*chip_reboot_t)(void);
typedef struct {
ota_flash_write_t write;
ota_flash_read_t read;
ota_flash_erase_t erase;
} ota_flash_drv_t;
typedef struct {
ota_kv_set_t kv_set;
ota_kv_get_t kv_get;
} ota_kv_ops_t;
typedef struct {
ota_flash_drv_t flash_drv;
ota_kv_ops_t kv_ops;
chip_reboot_t chip_reboot;
} ota_port_ctx_t;
/**
* @brief ota port init.
* initialize some hardware api that ota module depend on.
*
* @attention None.
*
* @return errcode
* @retval #OTA_ERR_NONE initialize ok.
* @retval #OTA_ERR_* initialize failed.
*/
ota_err_t ota_port_init(void);
/**
* @brief get ota port context.
* get ota port context.
*
* @attention None.
*
* @return the pointer of ota port context.
*/
ota_port_ctx_t * ota_get_port_ctx(void);
#endif /* __OTA_PORT_H__ */

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#ifndef __OTA_TYPES_H__
#define __OTA_TYPES_H__
#include "ln_types.h"
typedef enum {
IMAGE_ATTACHE = 0u, /*< it's an attache drvice image */
IMAGE_TYPE_ORIGINAL = 1u, /*< it's an original image */
IMAGE_TYPE_ORIGINAL_XZ = 2u, /*< it's an original image which is zipped */
IMAGE_TYPE_DIFF = 3u, /*< it's a diff image */
IMAGE_TYPE_DIFF_XZ = 4u, /*< it's a diff image which is zipped */
IMAGE_TYPE_PLACE = 0x12345678, /*< make different IDEs compatible */
} image_type_t;
typedef struct {
uint8_t ver_major; /*< major version number */
uint8_t ver_minor; /*< minor version number */
} image_ver_t;
typedef struct {
image_type_t image_type; /*< what's the image type */
image_ver_t ver; /*< image version number */
image_ver_t ver_diff_depend; /*< which version of the file that diff image depend on */
uint32_t img_size_orig; /*< size of original image */
uint32_t img_size_orig_xz; /*< size of original image which is zipped */
uint32_t img_size_diff; /*< size of diff image */
uint32_t img_size_diff_xz; /*< size of diff image which is zippede */
uint32_t img_crc32_orig; /*< checksum of original image */
uint32_t img_crc32_orig_xz; /*< checksum of original image which is zipped */
uint32_t img_crc32_diff; /*< checksum of diff image */
uint32_t img_crc32_diff_xz; /*< checksum of diff image which is zippede */
uint8_t res[212]; /*< reserved space */
uint32_t header_crc32; /*< checksum of the image header except for itself */
} image_hdr_t;
typedef enum {
UPG_STATE_DOWNLOAD_ING = 0u, /*< ota image downloading */
UPG_STATE_DOWNLOAD_OK = 1u, /*< ota image download finish and check success */
UPG_STATE_RESTORE_ING = 2u, /*< ota image restoring */
UPG_STATE_RESTORE_OK = 3u, /*< ota image restore finish and check success */
UPG_STATE_RESTORE_FILED = 4u, /*< ota image restore filed */
UPG_STATE_PLACE = 0x12345678, /*< make different IDEs compatible */
} upg_state_t;
#define KV_OTA_UPG_STATE "kv_ota_upg_state"
#endif /*< __OTA_TYPES_H__ */

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#include "xz_decompress.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define XZ_BASE_SIZE 1846
#define XZ_LIT_SIZE 768
#define kNumTopBits 24
#define kTopValue ((uint32_t)1 << kNumTopBits)
#define kNumBitModelTotalBits 11
#define kBitModelTotal (1 << kNumBitModelTotalBits)
#define kNumMoveBits 5
typedef struct
{
uint8_t* Buffer;
uint8_t* BufferLim;
uint32_t Range;
uint32_t Code;
read_cb_t* InCallback;
int read_cb_ret;
int ExtraBytes;
} CRangeDecoder;
typedef struct
{
CRangeDecoder RangeDecoder;
uint8_t* Dictionary;
uint32_t DictionarySize;
uint32_t DictionaryPos;
uint32_t GlobalPos;
uint32_t Reps[4];
int lc;
int lp;
int pb;
int State;
int PreviousIsMatch;
int RemainLen;
} XzVarState;
uint8_t RangeDecoderReadByte(CRangeDecoder* rd)
{
uint32_t size = 0;
if (rd->Buffer == rd->BufferLim)
{
rd->read_cb_ret = rd->InCallback->Read(&rd->Buffer, &size);
rd->BufferLim = rd->Buffer + size;
if (size == 0) {
rd->ExtraBytes = 1;
return 0xFF;
}
}
return (*rd->Buffer++);
}
#define ReadByte (RangeDecoderReadByte(rd))
void RangeDecoderInit(CRangeDecoder* rd, read_cb_t* in_cb)
{
rd->InCallback = in_cb;
rd->Buffer = rd->BufferLim = 0;
rd->ExtraBytes = 0;
rd->Code = 0;
rd->Range = (0xFFFFFFFF);
for (int i = 0; i < 5; i++) {
rd->Code = (rd->Code << 8) | ReadByte;
}
}
uint32_t RangeDecoderDecodeDirectBits(CRangeDecoder* rd, int numTotalBits)
{
uint32_t range = rd->Range;
uint32_t code = rd->Code;
uint32_t result = 0;
for (int i = numTotalBits; i > 0; i--)
{
range >>= 1;
result <<= 1;
if (code >= range) {
code -= range;
result |= 1;
}
/* uint32_t t; */
/*
t = (code - range) >> 31;
t &= 1;
code -= range & (t - 1);
result = (result + result) | (1 - t);
*/
if (range < kTopValue) {
range <<= 8;
code = (code << 8) | ReadByte;
}
}
rd->Range = range;
rd->Code = code;
return result;
}
int RangeDecoderBitDecode(prob_t* prob, CRangeDecoder* rd)
{
uint32_t bound = (rd->Range >> kNumBitModelTotalBits)* (*prob);
if (rd->Code < bound)
{
rd->Range = bound;
*prob += (kBitModelTotal - *prob) >> kNumMoveBits;
if (rd->Range < kTopValue)
{
rd->Code = (rd->Code << 8) | ReadByte;
rd->Range <<= 8;
}
return 0;
}
else
{
rd->Range -= bound;
rd->Code -= bound;
*prob -= (*prob) >> kNumMoveBits;
if (rd->Range < kTopValue)
{
rd->Code = (rd->Code << 8) | ReadByte;
rd->Range <<= 8;
}
return 1;
}
}
int RangeDecoderBitTreeDecode(prob_t* probs, int numLevels, CRangeDecoder* rd)
{
int mi = 1;
for (int i = numLevels; i > 0; i--) {
mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd);
}
return mi - (1 << numLevels);
}
int RangeDecoderReverseBitTreeDecode(prob_t* probs, int numLevels, CRangeDecoder* rd)
{
int mi = 1;
int symbol = 0;
for (int i = 0; i < numLevels; i++)
{
int bit = RangeDecoderBitDecode(probs + mi, rd);
mi = mi + mi + bit;
symbol |= (bit << i);
}
return symbol;
}
static uint8_t xz_literal_decode(prob_t* probs, CRangeDecoder* rd)
{
int symbol = 1;
do
{
symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
} while (symbol < 0x100);
return symbol;
}
static uint8_t xz_literal_decode_match(prob_t* probs, CRangeDecoder* rd, uint8_t matchByte)
{
int symbol = 1;
int bit = 0, matchBit = 0;
do
{
matchBit = (matchByte >> 7) & 1;
matchByte <<= 1;
bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd);
symbol = (symbol << 1) | bit;
if (matchBit != bit)
{
while (symbol < 0x100) {
symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
}
break;
}
} while (symbol < 0x100);
return symbol;
}
#define kNumPosBitsMax 4
#define kNumPosStatesMax (1 << kNumPosBitsMax)
#define kLenNumLowBits 3
#define kLenNumLowSymbols (1 << kLenNumLowBits)
#define kLenNumMidBits 3
#define kLenNumMidSymbols (1 << kLenNumMidBits)
#define kLenNumHighBits 8
#define kLenNumHighSymbols (1 << kLenNumHighBits)
#define LenChoice 0
#define LenChoice2 (LenChoice + 1)
#define LenLow (LenChoice2 + 1)
#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
static int xz_len_decode(prob_t* p, CRangeDecoder* rd, int posState)
{
if (RangeDecoderBitDecode(p + LenChoice, rd) == 0)
return RangeDecoderBitTreeDecode(p + LenLow + (posState << kLenNumLowBits), kLenNumLowBits, rd);
if (RangeDecoderBitDecode(p + LenChoice2, rd) == 0)
return (kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid + (posState << kLenNumMidBits), kLenNumMidBits, rd));
return (kLenNumLowSymbols + kLenNumMidSymbols + RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd));
}
#define kNumStates 12
#define kStartPosModelIndex 4
#define kEndPosModelIndex 14
#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
#define kNumPosSlotBits 6
#define kNumLenToPosStates 4
#define kNumAlignBits 4
#define kAlignTableSize (1 << kNumAlignBits)
#define kMatchMinLen 2
#define IsMatch 0
#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
#define IsRepG0 (IsRep + kNumStates)
#define IsRepG1 (IsRepG0 + kNumStates)
#define IsRepG2 (IsRepG1 + kNumStates)
#define IsRep0Long (IsRepG2 + kNumStates)
#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
#define LenCoder (Align + kAlignTableSize)
#define RepLenCoder (LenCoder + kNumLenProbs)
#define Literal (RepLenCoder + kNumLenProbs)
#if Literal != XZ_BASE_SIZE
#error
#endif
static int xz_decode(uint8_t* buf, uint8_t* out_stream, uint32_t out_size, uint32_t* out_size_processed)
{
XzVarState* vs = (XzVarState*)buf;
prob_t* p = (prob_t*)(buf + sizeof(XzVarState));
CRangeDecoder rd = vs->RangeDecoder;
int state = vs->State;
int previousIsMatch = vs->PreviousIsMatch;
uint32_t rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
uint32_t nowPos = 0, pos = 0;
uint8_t previousByte = 0;
uint32_t posStateMask = (1 << (vs->pb)) - 1;
uint32_t literalPosMask = (1 << (vs->lp)) - 1;
int lc = vs->lc;
int remain_len = vs->RemainLen;
uint32_t globalPos = vs->GlobalPos;
uint8_t* dict = vs->Dictionary;
uint32_t dict_size = vs->DictionarySize;
uint32_t dictionaryPos = vs->DictionaryPos;
if (remain_len == -1) {
*out_size_processed = 0;
return XZ_RET_OK;
}
while ((remain_len > 0) && (nowPos < out_size))
{
pos = dictionaryPos - rep0;
if (pos >= dict_size)
pos += dict_size;
out_stream[nowPos++] = dict[dictionaryPos] = dict[pos];
if (++dictionaryPos == dict_size)
dictionaryPos = 0;
remain_len--;
}
if (dictionaryPos == 0)
previousByte = dict[dict_size - 1];
else
previousByte = dict[dictionaryPos - 1];
*out_size_processed = 0;
while (nowPos < out_size)
{
int posState = (int)((nowPos + globalPos) & posStateMask);
if (rd.read_cb_ret != XZ_RET_OK)
return rd.read_cb_ret;
if (rd.ExtraBytes != 0)
return XZ_RET_DATA_ERR;
if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0)
{
prob_t* probs = p + Literal + (XZ_LIT_SIZE * ((((nowPos + globalPos) & literalPosMask) << lc) + (previousByte >> (8 - lc))));
if (state < 4) {
state = 0;
}
else if (state < 10) {
state -= 3;
}
else {
state -= 6;
}
if (previousIsMatch)
{
pos = dictionaryPos - rep0;
if (pos >= dict_size)
pos += dict_size;
uint8_t matchByte = dict[pos];
previousByte = xz_literal_decode_match(probs, &rd, matchByte);
previousIsMatch = 0;
}
else {
previousByte = xz_literal_decode(probs, &rd);
}
out_stream[nowPos++] = previousByte;
dict[dictionaryPos] = previousByte;
if (++dictionaryPos == dict_size)
dictionaryPos = 0;
}
else
{
previousIsMatch = 1;
if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1)
{
if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0)
{
if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0)
{
if ((nowPos + globalPos) == 0)
return XZ_RET_DATA_ERR;
state = state < 7 ? 9 : 11;
pos = dictionaryPos - rep0;
if (pos >= dict_size)
pos += dict_size;
previousByte = dict[pos];
dict[dictionaryPos] = previousByte;
if (++dictionaryPos == dict_size)
dictionaryPos = 0;
out_stream[nowPos++] = previousByte;
continue;
}
}
else
{
uint32_t distance;
if (RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0)
distance = rep1;
else
{
if (RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0)
distance = rep2;
else
{
distance = rep3;
rep3 = rep2;
}
rep2 = rep1;
}
rep1 = rep0;
rep0 = distance;
}
remain_len = xz_len_decode(p + RepLenCoder, &rd, posState);
state = state < 7 ? 8 : 11;
}
else
{
int posSlot;
rep3 = rep2;
rep2 = rep1;
rep1 = rep0;
state = (state < 7) ? 7 : 10;
remain_len = xz_len_decode(p + LenCoder, &rd, posState);
posSlot = RangeDecoderBitTreeDecode(p + PosSlot + \
((remain_len < kNumLenToPosStates ? remain_len : kNumLenToPosStates - 1) << kNumPosSlotBits), kNumPosSlotBits, &rd);
if (posSlot >= kStartPosModelIndex)
{
int numDirectBits = ((posSlot >> 1) - 1);
rep0 = ((2 | ((uint32_t)posSlot & 1)) << numDirectBits);
if (posSlot < kEndPosModelIndex) {
rep0 += RangeDecoderReverseBitTreeDecode((p + SpecPos + rep0 - posSlot - 1), numDirectBits, &rd);
}
else {
rep0 += RangeDecoderDecodeDirectBits(&rd, numDirectBits - kNumAlignBits) << kNumAlignBits;
rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd);
}
}
else {
rep0 = posSlot;
}
rep0++;
}
if (rep0 == (uint32_t)(0)) {
remain_len = -1;/* it's for stream version */
break;
}
if (rep0 > nowPos + globalPos) {
return XZ_RET_DATA_ERR;
}
remain_len += kMatchMinLen;
do
{
pos = dictionaryPos - rep0;
if (pos >= dict_size) {
pos += dict_size;
}
previousByte = dict[pos];
dict[dictionaryPos] = previousByte;
if (++dictionaryPos == dict_size) {
dictionaryPos = 0;
}
out_stream[nowPos++] = previousByte;
remain_len--;
} while ((remain_len > 0) && (nowPos < out_size));
}
}
vs->RangeDecoder = rd;
vs->DictionaryPos = dictionaryPos;
vs->GlobalPos = globalPos + nowPos;
vs->Reps[0] = rep0;
vs->Reps[1] = rep1;
vs->Reps[2] = rep2;
vs->Reps[3] = rep3;
vs->State = state;
vs->PreviousIsMatch = previousIsMatch;
vs->RemainLen = remain_len;
*out_size_processed = nowPos;
return XZ_RET_OK;
}
char XZINTERNALDATA_MEMORY_ADDR[INTERNAL_DATA_BUF_SIZE] = { 0 };
char DICTIONARY_MEMORY_ADDR[DICT_BUF_SIZE] = { 0 };
char BLOCK_MEMORY_ADDR[BLOCK_BUF_SIZE] = { 0 };
int xz_decompress_buf_to_buf(uint8_t* header, write_cb_t* out_cb, read_cb_t* in_cb)
{
uint32_t nowPos = 0, out_size = 0, out_size_processed = 0;
uint8_t properties[5];
uint8_t prop0;
int lc, lp, pb;
uint8_t b = 0;
int ret = 0;
uint8_t* dict = NULL;
uint32_t dict_size = 0;
uint8_t* xzInternalData = NULL;
uint32_t xzInternalSize = 0;
memcpy(properties, header, sizeof(properties));
header += sizeof(properties);
for (int i = 0; i < 4; i++)
{
b = *(uint8_t*)header;
header += sizeof(b);
out_size += (uint32_t)(b) << (i * 8);
}
if (out_size == 0xFFFFFFFF) {
return XZ_RET_STREAM_VER_NOT_SUPP;
}
for (int i = 0; i < 4; i++)
{
b = *(uint8_t*)header;
header += sizeof(b);
if (b != 0) {
return XZ_RET_FILE_TOO_LONG;
}
}
prop0 = properties[0];
if (prop0 >= (9 * 5 * 5)) {
return XZ_RET_PROPERTIES_ERR;
}
for (pb = 0; prop0 >= (9 * 5); pb++, prop0 -= (9 * 5));
for (lp = 0; prop0 >= 9; lp++, prop0 -= 9);
lc = prop0;
for (int i = 0; i < 4; i++) {
dict_size += (uint32_t)(properties[1 + i]) << (i * 8);
}
//os_malloc(dict_size);
dict = (void*)DICTIONARY_MEMORY_ADDR;
if (dict == NULL) {
return XZ_RET_MEM_ALLOC_FILED;
}
if (dict_size > sizeof(DICTIONARY_MEMORY_ADDR)) {
return XZ_RET_NOT_ENOUGH_MEM;
}
memset(dict, 0, sizeof(DICTIONARY_MEMORY_ADDR));
//os_malloc(xzInternalSize);
xzInternalData = (void*)XZINTERNALDATA_MEMORY_ADDR;
if (xzInternalData == NULL) {
return XZ_RET_MEM_ALLOC_FILED;
}
xzInternalSize = (XZ_BASE_SIZE + (XZ_LIT_SIZE << (lc + lp))) * sizeof(prob_t);
xzInternalSize += sizeof(XzVarState);
if (xzInternalSize >= sizeof(XZINTERNALDATA_MEMORY_ADDR)) {
return XZ_RET_NOT_ENOUGH_MEM;
}
memset(xzInternalData, 0, sizeof(XZINTERNALDATA_MEMORY_ADDR));
//init param
{
XzVarState * vs = (XzVarState*)xzInternalData;
prob_t * p = (prob_t*)(xzInternalData + sizeof(XzVarState));
uint32_t numProbs = Literal + ((uint32_t)XZ_LIT_SIZE << (lc + lp));
vs->Dictionary = dict;
vs->DictionarySize = dict_size;
vs->DictionaryPos = 0;
vs->GlobalPos = 0;
vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
vs->lc = lc;
vs->lp = lp;
vs->pb = pb;
vs->State = 0;
vs->PreviousIsMatch = 0;
vs->RemainLen = 0;
for (uint32_t i = 0; i < numProbs; i++) {
p[i] = kBitModelTotal >> 1;
}
RangeDecoderInit(&vs->RangeDecoder, in_cb);
}
//decode
for (nowPos = 0; nowPos < out_size;)
{
uint8_t* dest = (uint8_t*)BLOCK_MEMORY_ADDR;
uint32_t blockSize = out_size - nowPos;
if (blockSize > sizeof(BLOCK_MEMORY_ADDR)) {
blockSize = sizeof(BLOCK_MEMORY_ADDR);
}
if (XZ_RET_OK != (ret = xz_decode((uint8_t*)xzInternalData, ((uint8_t*)dest), blockSize, &out_size_processed))) {
return ret;
}
if (out_size_processed == 0) {
out_size = nowPos;
break;
}
out_cb->Write(nowPos, dest, out_size_processed);
nowPos += out_size_processed;
}
return 0;
}

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@@ -0,0 +1,43 @@
#ifndef __XZ_DECOMPRESS_H__
#define __XZ_DECOMPRESS_H__
#include "stdint.h"
#define prob_t uint16_t //uint32_t
#define INTERNAL_DATA_BUF_SIZE (16*1024)
#define DICT_BUF_SIZE (4*1024)
#define BLOCK_BUF_SIZE (1*1024)
typedef enum {
XZ_RET_OK = 0,
XZ_RET_DATA_ERR = -1,
XZ_RET_NOT_ENOUGH_MEM = -2,
XZ_RET_STREAM_VER_NOT_SUPP = -3,
XZ_RET_FILE_TOO_LONG = -4,
XZ_RET_PROPERTIES_ERR = -5,
XZ_RET_MEM_ALLOC_FILED = -6,
}xz_errno_t;
typedef struct
{
int(*Read)(uint8_t** buf, uint32_t* buf_len);
} read_cb_t;
typedef struct
{
int(*Write)(uint32_t offset, uint8_t* buf, uint32_t buf_len);
} write_cb_t;
typedef struct
{
uint8_t header[13];
} xz_header_t;
int xz_decompress_buf_to_buf(uint8_t* header, write_cb_t* out_cb, read_cb_t* in_cb);
#endif /* __XZ_DECOMPRESS_H__ */

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#ifndef __LN_KV_H__
#define __LN_KV_H__
#include "ln_compiler.h"
#include "ln_types.h"
#include "ln_kv_err.h"
#include "ln_kv_flash.h"
#include "ln_kv_port.h"
#include "ln_kv_api.h"
typedef uint64_t kv_wunit_t;
typedef uint8_t kv_byte_t; // byte
typedef uint16_t kv_hword_t; // half word
typedef uint32_t kv_word_t; // word
typedef uint64_t kv_dword_t; // double word
#define KV_BLK_FLAG_FRESH 0x01 /* a totally virgin block */
#define KV_BLK_FLAG_INUSE 0x02 /* in-use */
#define KV_BLK_FLAG_DIRTY 0x04 /* has discarded item inside */
#define KV_BLK_FLAG_BAD 0x08 /* bad block, maybe device error */
#define KV_BLK_FLAG_HANGING 0x10 /* index building failed, we mark a hanging flag here, and will give another chance to do a retry */
#define KV_FLASH_START (kv_ctl.flash_ctl.flash_start)
#define KV_FLASH_END (kv_ctl.flash_ctl.flash_end)
#define KV_FLASH_SIZE (KV_FLASH_END - KV_FLASH_START)
#define KV_FLASH_SECTOR_SIZE_LOG2 (kv_ctl.flash_ctl.sector_size_log2)
#define KV_FLASH_SECTOR_SIZE (1 << KV_FLASH_SECTOR_SIZE_LOG2)
#define KV_FLASH_WRITE_ALIGN (kv_ctl.flash_ctl.flash_write_align)
#define KV_FLASH_WRITE ((kv_flash_write_t)(kv_ctl.flash_ctl.flash_drv.write))
#define KV_FLASH_READ ((kv_flash_read_t)(kv_ctl.flash_ctl.flash_drv.read))
#define KV_FLASH_ERASE ((kv_flash_erase_t)(kv_ctl.flash_ctl.flash_drv.erase))
#define KV_IS_ALINGED(v, align) ((v) % (align) == 0)
#define KV_IS_ALINGED_LOG2(v, align_log2) KV_IS_ALINGED(v, (1 << (align_log2)))
#define KV_ALIGN_UP(v, align) (((v) + ((align) - 1)) & ~((align) - 1))
#define KV_ALIGN_DOWN(v, align) ((v) - ((v) & ((align) - 1)))
#define KV_OFFSET_OF_FIELD(type, field) ((uint32_t)&(((type *)0)->field))
#define KV_ADDR_OF_FIELD(addr, type, field) (addr + KV_OFFSET_OF_FIELD(type, field))
#define KV_ALIGNED_SIZE(len) KV_ALIGN_UP(len, KV_FLASH_WRITE_ALIGN)
#ifndef KV_CONFIG_OS_NONE
#define KV_MGR_LOCK (&kv_ctl.mgr_ctl.kv_lock)
#endif
#define KV_MGR_BLK_NUM_FRESH (kv_ctl.mgr_ctl.blk_info.num_fresh)
#define KV_MGR_BLK_NUM_INUSE (kv_ctl.mgr_ctl.blk_info.num_inuse)
#define KV_MGR_BLK_NUM_HANGING (kv_ctl.mgr_ctl.blk_info.num_hanging)
#define KV_MGR_BLK_NUM_TOTAL (kv_ctl.mgr_ctl.blk_info.num_total)
#define KV_MGR_BLK_DETAIL (kv_ctl.mgr_ctl.blk_info.blk_detail)
#define KV_MGR_WORKSPACE (kv_ctl.mgr_ctl.workspace)
#define KV_NO_WRITEABLE_BLK() (KV_MGR_BLK_NUM_INUSE == 0 && KV_MGR_BLK_NUM_FRESH == 0)
#define KV_ITEM_HDR_MAGIC 0xABCD1234DCBA4321
#define KV_ITEM_DISCARDED 0x0F0F0F0F0F0F0F0F
#define KV_ITEM_IS_DISCARDED(item_hdr) ((item_hdr)->discarded_flag == KV_ITEM_DISCARDED)
#define KV_ITEM_IS_LEGAL(item_hdr) ((item_hdr)->magic == KV_ITEM_HDR_MAGIC)
#define KV_ITEM_IS_FRESH(item_hdr) ((item_hdr)->magic == (kv_wunit_t)-1 && \
(item_hdr)->discarded_flag == (kv_wunit_t)-1 && \
(item_hdr)->checksum == (uint8_t)-1 && \
(item_hdr)->k_len == (uint8_t)-1 && \
(item_hdr)->v_len == (uint16_t)-1 && \
(item_hdr)->prev_pos == (uint32_t)-1)
#define KV_ITEM_ADDR2BLK(item_start) (KV_ALIGN_DOWN((item_start) - KV_FLASH_START, KV_BLK_SIZE) + KV_FLASH_START)
#define KV_ITEM_HDR_SIZE KV_ALIGNED_SIZE(sizeof(kv_item_hdr_t))
#define KV_ITEM_BODY_SIZE(k_len, v_len) KV_ALIGNED_SIZE(k_len + v_len)
#define KV_ITEM_SIZE(k_len, v_len) (KV_ITEM_HDR_SIZE + KV_ITEM_BODY_SIZE(k_len, v_len))
#define KV_ITEM_SIZE_OF_ITEM(item) KV_ITEM_SIZE(item->hdr.k_len, item->hdr.v_len)
#define KV_ITEM_SIZE_OF_BODY(item) KV_ITEM_BODY_SIZE(item->hdr.k_len, item->hdr.v_len)
#define KV_ITEM_ADDR_OF_BODY(item) (item->pos + KV_ITEM_HDR_SIZE)
#define KV_BLK_HDR_MAGIC 0x1234ABCD4321DCBA
#define KV_BLK_IS_LEGAL(blk_hdr) ((blk_hdr)->magic == KV_BLK_HDR_MAGIC)
#define KV_BLK_INVALID ((uint32_t)-1)
#define KV_BLK_HDR_SIZE KV_ALIGNED_SIZE(sizeof(kv_blk_hdr_t))
#define KV_BLK_SIZE (KV_FLASH_SECTOR_SIZE)
#define KV_BLK_FRESH_SIZE (KV_BLK_SIZE - KV_BLK_HDR_SIZE)
#define KV_BLK_END(blk_start) (blk_start + KV_BLK_SIZE)
#define KV_BLK_USABLE_ADDR(blk_start) (KV_BLK_END(blk_start) - kv_blk_freesz_get(blk_start))
#define KV_BLK_ADDR2IDX(blk_start) ((blk_start - KV_FLASH_START) / KV_BLK_SIZE)
#define KV_BLK_FIRST_ITEM(blk_start) (blk_start + KV_BLK_HDR_SIZE)
#define KV_BLK_NEXT(blk_start) (blk_start + KV_BLK_SIZE >= KV_FLASH_END ? KV_FLASH_START : blk_start + KV_BLK_SIZE)
#define KV_BLK_FOR_EACH_FROM(cur_blk, start_blk) \
for (cur_blk = KV_BLK_NEXT(start_blk); \
cur_blk != start_blk; \
cur_blk = KV_BLK_NEXT(cur_blk))
#define KV_BLK_FOR_EACH(cur_blk) \
for (cur_blk = KV_FLASH_START; \
cur_blk < KV_FLASH_END; \
cur_blk += KV_BLK_SIZE)
typedef struct kv_flash_control_st {
uint8_t sector_size_log2;
uint8_t flash_write_align;
uint32_t flash_start;
uint32_t flash_end;
kv_flash_drv_t flash_drv;
} kv_flash_ctl_t;
typedef struct kv_blk_detail_st {
uint8_t blk_flags; /*< flags indicating the status of the blk, see KV_BLK_FLAG_* */
uint32_t free_size; /*< how many usable flash left */
} kv_blk_detail_t;
typedef struct kv_blk_info_st {
uint16_t num_inuse;
uint16_t num_fresh;
uint16_t num_hanging;
uint16_t num_total;
kv_blk_detail_t *blk_detail;
} kv_blk_info_t;
typedef struct kv_manager_control_st {
uint32_t workspace;
kv_blk_info_t blk_info;
#ifndef KV_CONFIG_OS_NONE
kv_mutex_t kv_lock;
#endif
} kv_mgr_ctl_t;
typedef struct kv_control_st {
kv_flash_ctl_t flash_ctl;
kv_mgr_ctl_t mgr_ctl;
} kv_ctl_t;
typedef struct kv_block_header_st {
kv_wunit_t magic; /*< is this block formatted? */
} __PACKED__ kv_blk_hdr_t;
typedef struct kv_item_header_st {
kv_wunit_t discarded_flag; /*< is this item a discarded one, deleted or updated */
kv_wunit_t magic; /*< for item header integrity verification */
uint8_t checksum; /*< checksum for key/value buffer */
uint8_t k_len; /*< key length */
uint16_t v_len; /*< value length */
uint32_t prev_pos; /*< previous position of this item */
} __PACKED__ kv_item_hdr_t;
typedef struct kv_item_st {
kv_item_hdr_t hdr; /*< item header */
uint32_t pos; /*< where this item is */
uint8_t *body; /*< item body: key/value buffer */
} kv_item_t;
static kv_ctl_t kv_ctl;
__STATIC_INLINE__ void kv_blk_freesz_set(uint32_t blk_start, uint32_t free_size)
{
KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].free_size = free_size;
}
__STATIC_INLINE__ uint32_t kv_blk_freesz_get(uint32_t blk_start)
{
return KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].free_size;
}
__STATIC_INLINE__ void kv_blk_freesz_reduce(uint32_t blk_start, uint32_t size_reduced)
{
kv_blk_freesz_set(blk_start, kv_blk_freesz_get(blk_start) - size_reduced);
}
__STATIC_INLINE__ int kv_blk_is_full(uint32_t blk_start)
{
return kv_blk_freesz_get(blk_start) <= KV_ITEM_HDR_SIZE;
}
__STATIC_INLINE__ void kv_blk_flags_set(uint32_t blk_start, uint8_t blk_flags)
{
KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].blk_flags = blk_flags;
}
__STATIC_INLINE__ uint8_t kv_blk_flags_get(uint32_t blk_start)
{
return KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].blk_flags;
}
__STATIC_INLINE__ void kv_blk_flags_add(uint32_t blk_start, uint8_t blk_flags)
{
KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].blk_flags |= blk_flags;
}
__STATIC_INLINE__ void kv_blk_flags_rmv(uint32_t blk_start, uint8_t blk_flags)
{
KV_MGR_BLK_DETAIL[KV_BLK_ADDR2IDX(blk_start)].blk_flags &= ~blk_flags;
}
__STATIC_INLINE__ int kv_blk_is_fresh(uint32_t blk_start)
{
return kv_blk_flags_get(blk_start) & KV_BLK_FLAG_FRESH;
}
__STATIC_INLINE__ int kv_blk_is_inuse(uint32_t blk_start)
{
return kv_blk_flags_get(blk_start) & KV_BLK_FLAG_INUSE;
}
__STATIC_INLINE__ int kv_blk_is_dirty(uint32_t blk_start)
{
return kv_blk_flags_get(blk_start) & KV_BLK_FLAG_DIRTY;
}
__STATIC_INLINE__ int kv_blk_is_bad(uint32_t blk_start)
{
return kv_blk_flags_get(blk_start) & KV_BLK_FLAG_BAD;
}
__STATIC_INLINE__ int kv_blk_is_hanging(uint32_t blk_start)
{
return kv_blk_flags_get(blk_start) & KV_BLK_FLAG_HANGING;
}
__STATIC_INLINE__ void kv_blk_set_fresh(uint32_t blk_start)
{
if (!kv_blk_is_fresh(blk_start)) {
++KV_MGR_BLK_NUM_FRESH;
}
kv_blk_freesz_set(blk_start, KV_BLK_FRESH_SIZE);
kv_blk_flags_set(blk_start, KV_BLK_FLAG_FRESH);
}
__STATIC_INLINE__ void kv_blk_set_inuse(uint32_t blk_start)
{
if (!kv_blk_is_inuse(blk_start)) {
++KV_MGR_BLK_NUM_INUSE;
}
kv_blk_flags_add(blk_start, KV_BLK_FLAG_INUSE);
}
__STATIC_INLINE__ void kv_blk_set_dirty(uint32_t blk_start)
{
kv_blk_flags_add(blk_start, KV_BLK_FLAG_DIRTY);
}
__STATIC_INLINE__ void kv_blk_set_bad(uint32_t blk_start)
{
kv_blk_flags_set(blk_start, KV_BLK_FLAG_BAD);
}
__STATIC_INLINE__ void kv_blk_set_hanging(uint32_t blk_start)
{
if (!kv_blk_is_hanging(blk_start)) {
++KV_MGR_BLK_NUM_HANGING;
}
kv_blk_flags_add(blk_start, KV_BLK_FLAG_HANGING);
}
__STATIC_INLINE__ void kv_blk_reset_fresh(uint32_t blk_start)
{
if (kv_blk_is_fresh(blk_start)) {
--KV_MGR_BLK_NUM_FRESH;
}
kv_blk_flags_rmv(blk_start, KV_BLK_FLAG_FRESH);
}
__STATIC_INLINE__ void kv_blk_reset_inuse(uint32_t blk_start)
{
if (kv_blk_is_inuse(blk_start)) {
--KV_MGR_BLK_NUM_INUSE;
}
kv_blk_flags_rmv(blk_start, KV_BLK_FLAG_INUSE);
}
__STATIC_INLINE__ void kv_blk_reset_hanging(uint32_t blk_start)
{
if (kv_blk_is_hanging(blk_start)) {
--KV_MGR_BLK_NUM_HANGING;
}
kv_blk_flags_rmv(blk_start, KV_BLK_FLAG_HANGING);
}
typedef kv_err_t (*kv_item_walker_t)(kv_item_t *item, const void *patten);
kv_err_t ln_kv_init(uint32_t flash_start, uint32_t flash_end, kv_flash_drv_t *flash_drv, kv_flash_prop_t *flash_prop);
#endif /* __LN_KV_H__ */

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#ifndef __LN_KV_API_H__
#define __LN_KV_API_H__
#include "ln_types.h"
#include "ln_kv_err.h"
#include "ln_kv_api.h"
kv_err_t ln_kv_port_init(uint32_t flash_start, uint32_t flash_end);
kv_err_t ln_kv_deinit(void);
kv_err_t ln_kv_set(const char *key, const void *value, size_t v_len);
kv_err_t ln_kv_get(const char *key, void *value_buf, size_t value_buf_size, size_t *v_len);
int ln_kv_has_key(const char *key);
kv_err_t ln_kv_del(const char *key);
#endif /* __LN_KV_API_H__ */

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#ifndef __LN_KV_ERR_H__
#define __LN_KV_ERR_H__
typedef enum kv_err_en {
KV_ERR_NONE = 0u,
KV_ERR_BUF_TOO_SHORT = 10u,
KV_ERR_BLK_STATUS_ERROR,
KV_ERR_DATA_FETCH_FAILED = 20u,
KV_ERR_FLASH_ERASE_FAILED = 30u,
KV_ERR_FLASH_READ_FAILED,
KV_ERR_FLASH_WRITE_FAILED,
KV_ERR_GC_NOTHING = 40u,
KV_ERR_INTERNAL_ERROR = 50u,
KV_ERR_INSUFFICIENT_SPACE,
KV_ERR_INVALID_PARAM,
KV_ERR_INVALID_ITEM,
KV_ERR_NEXT_LOOP = 60u,
KV_ERR_NOT_EXIST,
KV_ERR_NO_WRITEABLE_BLK,
KV_ERR_OUT_OF_MEMORY = 70u,
KV_ERR_POS_FIX_FAILED =80u,
KV_ERR_SIZE_EXCEEDED = 90u,
} kv_err_t;
#endif /* __LN_KV_ERR_H__ */

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#ifndef __LN_KV_FLASH_H__
#define __LN_KV_FLASH_H__
#include "ln_types.h"
typedef int (*kv_flash_write_t)(uint32_t addr, const void *buf, size_t len);
typedef int (*kv_flash_read_t)(uint32_t addr, void *buf, size_t len);
typedef int (*kv_flash_erase_t)(uint32_t addr, size_t len);
typedef struct kv_flash_drv_st {
kv_flash_write_t write;
kv_flash_read_t read;
kv_flash_erase_t erase;
} kv_flash_drv_t;
typedef struct kv_flash_property_st {
uint8_t sector_size_log2;
} kv_flash_prop_t;
#endif /* __LN_KV_FLASH_H__ */

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#include "ln_kv_port.h"
#include "ln_kv_flash.h"
#include "ln_kv.h"
#include "hal/flash.h"
static kv_flash_drv_t flash_drv;
static kv_flash_prop_t flash_prop;
static int flash_read(uint32_t offset, void *buf, uint32_t len)
{
return FLASH_Read(offset, len, buf);
}
static int flash_write(uint32_t offset, const void *buf, uint32_t len)
{
return FLASH_Program(offset, len, (uint8_t*)buf);
}
static int flash_erase(uint32_t offset, uint32_t len)
{
FLASH_Erase(offset, len);
return 0;
}
kv_err_t ln_kv_port_init(uint32_t flash_start, uint32_t flash_end)
{
flash_drv.read = flash_read;
flash_drv.write = flash_write;
flash_drv.erase = flash_erase;
flash_prop.sector_size_log2 = KV_CONFIG_FLASH_SECT_SIZE_LOG2;
return ln_kv_init(flash_start, flash_end, &flash_drv, &flash_prop);
}

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#ifndef __LN_KV_PORT_H__
#define __LN_KV_PORT_H__
#include "proj_config.h"
#include "ln_types.h"
#include "ln_kv_err.h"
#include "ln_compiler.h"
#include "mem_map_ln882x.h"
#ifndef __CONFIG_OS_KERNEL
#define KV_CONFIG_OS_NONE
#endif
#define KV_CONFIG_FLASH_SECT_SIZE_LOG2 (12)
#if defined(KV_CONFIG_OS_NONE)
#include "stdlib.h"
__STATIC_INLINE__ void *ln_kv_malloc(size_t size)
{
return malloc(size);
}
__STATIC_INLINE__ void ln_kv_free(void *ptr)
{
free(ptr);
}
#else /* KV_CONFIG_OS_NONE */
#include "osal/osal.h"
typedef OS_Mutex_t kv_mutex_t;
__STATIC_INLINE__ int ln_kv_is_os_running(void)
{
if (OS_ThreadIsSchedulerRunning()){
return LN_TRUE;
}
return LN_FALSE;
}
__STATIC_INLINE__ int ln_kv_mutex_create(kv_mutex_t *mutex)
{
if (OS_OK == OS_MutexCreate(mutex)) {
return LN_TRUE;
}
return LN_FALSE;
}
__STATIC_INLINE__ void ln_kv_mutex_delete(kv_mutex_t *mutex)
{
OS_MutexDelete(mutex);
}
__STATIC_INLINE__ void ln_kv_mutex_lock(kv_mutex_t *mutex)
{
OS_MutexLock(mutex, OS_WAIT_FOREVER);
}
__STATIC_INLINE__ void ln_kv_mutex_unlock(kv_mutex_t *mutex)
{
OS_MutexUnlock(mutex);
}
__STATIC_INLINE__ void *ln_kv_malloc(size_t size)
{
return OS_Malloc(size);
}
__STATIC_INLINE__ void ln_kv_free(void *ptr)
{
OS_Free(ptr);
}
#endif /* KV_CONFIG_OS_NONE */
#endif /* __LN_KV_PORT_H__ */

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@@ -1,4 +1,4 @@
#include "nvds/nvds.h"
#include "nvds.h"
#include "hal/flash.h"

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@@ -2,8 +2,9 @@
#define __NVDS_H__
#include "ln88xx.h"
#include "flash_partition_table.h"
#define USR_NVDS_SECT1_OFFSET (USR_NVDS_PARAM_OFFSET)
#define USR_NVDS_SECT1_OFFSET (NVDS_SPACE_OFFSET)
#define USR_NVDS_SECT2_OFFSET (USR_NVDS_SECT1_OFFSET + SIZE_4KB)
#define USR_NVDS_FLAG_OFFSET (USR_NVDS_SECT2_OFFSET + SIZE_4KB)

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@@ -0,0 +1,61 @@
#include "flash_partition_mgr.h"
#include "hal/flash.h"
#include "utils/crc32.h"
int ln_verify_partition_table(void)
{
partition_info_t rd_info;
for (uint32_t i = 0; i < PARTITION_TAB_SIZE; i += sizeof(partition_info_t))
{
FLASH_Read((PARTITION_TAB_BASE + i), sizeof(partition_info_t), (uint8_t *)&rd_info);
if ((rd_info.type == 0) && \
(rd_info.start_addr == 0) && \
(rd_info.size == 0) && \
(rd_info.crc32 == 0))
{
return LN_TRUE;
}
else
{
if (rd_info.crc32 != ln_crc32_signle_cal((uint8_t *)&rd_info, sizeof(partition_info_t) - sizeof(uint32_t))) {
return LN_FALSE;
}
}
}
return LN_FALSE;
}
int ln_fetch_partition_info(partition_type_t type, partition_info_t *info)
{
if (!info) {
return LN_FALSE;
}
for (uint32_t i = 0; i < PARTITION_TAB_SIZE; i += sizeof(partition_info_t))
{
FLASH_Read((PARTITION_TAB_BASE + i), sizeof(partition_info_t), (uint8_t *)info);
if (info->type == type)
{
if (info->crc32 == ln_crc32_signle_cal((uint8_t *)info, sizeof(partition_info_t) - sizeof(uint32_t))) {
return LN_TRUE;
} else {
return LN_FALSE;
}
}
else if ((info->type == 0) && \
(info->start_addr == 0) && \
(info->size == 0) && \
(info->crc32 == 0))
{
return LN_FALSE;
}
}
return LN_FALSE;
}

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@@ -0,0 +1,58 @@
#ifndef __FLASH_PARTITION_MGR_H__
#define __FLASH_PARTITION_MGR_H__
#include "ln_types.h"
#define PARTITION_TAB_BASE (1024*36)/* < Warning: Do not change it! */
#define PARTITION_TAB_SIZE (1024*4) /* < Warning: Do not change it! */
typedef enum {
PARTITION_TYPE_APP = 0u, /*< application */
PARTITION_TYPE_OTA = 1u, /*< ota temp*/
PARTITION_TYPE_KV = 2u, /*< Key-Value */
PARTITION_TYPE_NVDS = 3u, /*< nvds(NVRAM) */
PARTITION_TYPE_SIMU_EEPROM = 4u, /*< simulation eeprom*/
PARTITION_TYPE_USER = 5u, /*< user defined */
PARTITION_TYPE_PLACE = 0x12345678, /*< make different IDEs compatible */
} partition_type_t;
typedef struct {
partition_type_t type; /*< what's the type of partition */
uint32_t start_addr; /*< start address */
uint32_t size; /*< partition size */
uint32_t crc32; /*< checksum of the partition info except itself */
} partition_info_t;
/**
* @brief Verify partition table.
* verify the main partition table of flash.
*
* @attention None
*
* @return whether the verification is successful.
* @retval #LN_TRUE successful.
* @retval #LN_FALSE failed.
*/
int ln_verify_partition_table(void);
/**
* @brief fetch partition info.
* Fetch partition information for a specified type partition.
*
* @attention None
*
* @param[in] type types indicating the type of the partition entity, see PARTITION_TYPE_*.
* @param[out] info pointer to a partition info struct.
*
* @return Whether to fetch info successfully.
* @retval #LN_TRUE successful.
* @retval #LN_FALSE failed.
*/
int ln_fetch_partition_info(partition_type_t type, partition_info_t * info);
#endif /* __FLASH_PARTITION_MGR_H__ */

View File

@@ -8,10 +8,14 @@
#include "ln88xx.h"
#ifdef __CC_ARM
extern unsigned int Image$$HEAP_SPACE$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE$$ZI$$Limit;
#define HEAP_START (&Image$$HEAP_SPACE$$ZI$$Base)
#define HEAP_END (&Image$$HEAP_SPACE$$ZI$$Limit)
extern unsigned int Image$$HEAP_SPACE0$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE0$$ZI$$Limit;
extern unsigned int Image$$HEAP_SPACE1$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE1$$ZI$$Limit;
#define HEAP0_START (&Image$$HEAP_SPACE0$$ZI$$Base)
#define HEAP0_END (&Image$$HEAP_SPACE0$$ZI$$Limit)
#define HEAP1_START (&Image$$HEAP_SPACE1$$ZI$$Base)
#define HEAP1_END (&Image$$HEAP_SPACE1$$ZI$$Limit)
#elif __ICCARM__
#error "TODO: support iar compiler!!!"
#elif __GNUC__
@@ -29,11 +33,14 @@ static HeapRegion_t xHeapRegions[] = {
void OS_HeapSizeConfig(void)
{
xHeapRegions[0].pucStartAddress = (uint8_t *)(HEAP_START);
xHeapRegions[0].xSizeInBytes = (size_t) ((uint8_t *)HEAP_END - (uint8_t *)HEAP_START);
xHeapRegions[0].pucStartAddress = (uint8_t *)(HEAP0_START);
xHeapRegions[0].xSizeInBytes = (size_t) ((uint8_t *)HEAP0_END - (uint8_t *)HEAP0_START);
xHeapRegions[1].pucStartAddress = NULL;
xHeapRegions[1].xSizeInBytes = 0;
xHeapRegions[1].pucStartAddress = (uint8_t *)(HEAP1_START);
xHeapRegions[1].xSizeInBytes = (size_t) ((uint8_t *)HEAP1_END - (uint8_t *)HEAP1_START);
xHeapRegions[2].pucStartAddress = NULL;
xHeapRegions[2].xSizeInBytes = 0;
}
void OS_DefineHeapRegions(void)

View File

@@ -50,7 +50,7 @@ OS_Status OS_MutexDelete(OS_Mutex_t *mutex)
* @param[in] waitMS The maximum amount of time (in millisecond) the thread
* should remain in the blocked state to wait for the mutex
* to become unlocked.
* HAL_WAIT_FOREVER for waiting forever, zero for no waiting.
* OS_WAIT_FOREVER for waiting forever, zero for no waiting.
* @retval OS_Status, OS_OK on success
*/
OS_Status OS_MutexLock(OS_Mutex_t *mutex, OS_Time_t waitMS)

View File

@@ -36,16 +36,9 @@ OS_Status OS_QueueCreate(OS_Queue_t *queue, uint32_t queueLen, uint32_t itemSize
*/
OS_Status OS_QueueDelete(OS_Queue_t *queue)
{
UBaseType_t ret;
OS_HANDLE_ASSERT(OS_QueueIsValid(queue), queue->handle);
ret = uxQueueMessagesWaiting(queue->handle);
if (ret > 0) {
OS_ERR("queue %"OS_HANDLE_F" is not empty\r\n", queue->handle);
return OS_FAIL;
}
vQueueDelete(queue->handle);
OS_QueueSetInvalid(queue);
return OS_OK;
@@ -134,13 +127,3 @@ OS_Status OS_QueueReceive(OS_Queue_t *queue, void *item, OS_Time_t waitMS)
return OS_OK;
}
OS_Status OS_QueueFlush(OS_Queue_t *queue)
{
void *item;
OS_HANDLE_ASSERT(OS_QueueIsValid(queue), queue->handle);
while(uxQueueMessagesWaiting(queue->handle)){
OS_QueueReceive(queue,item,OS_WAIT_FOREVER);
}
return OS_OK;
}

View File

@@ -8,10 +8,14 @@
#include "ln88xx.h"
#ifdef __CC_ARM
extern unsigned int Image$$HEAP_SPACE$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE$$ZI$$Limit;
#define HEAP_START (&Image$$HEAP_SPACE$$ZI$$Base)
#define HEAP_END (&Image$$HEAP_SPACE$$ZI$$Limit)
extern unsigned int Image$$HEAP_SPACE0$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE0$$ZI$$Limit;
#define HEAP0_START (&Image$$HEAP_SPACE0$$ZI$$Base)
#define HEAP0_END (&Image$$HEAP_SPACE0$$ZI$$Limit)
extern unsigned int Image$$HEAP_SPACE1$$ZI$$Base;
extern unsigned int Image$$HEAP_SPACE1$$ZI$$Limit;
#define HEAP1_START (&Image$$HEAP_SPACE1$$ZI$$Base)
#define HEAP1_END (&Image$$HEAP_SPACE1$$ZI$$Limit)
#elif __ICCARM__
#error "TODO: support iar compiler!!!"
#elif __GNUC__
@@ -25,12 +29,18 @@
void os_heap_mem_add_pool(void)
{
uint8_t * heap_pool0_base = (uint8_t *)((((uint32_t)HEAP_START) + sizeof(size_t) - 1U) & ~(sizeof(size_t)-1U));
size_t pool0_size = ((uint32_t)HEAP_END - (uint32_t)heap_pool0_base);
uint8_t * heap_pool0_base = (uint8_t *)((((uint32_t)HEAP0_START) + sizeof(size_t) - 1U) & ~(sizeof(size_t)-1U));
size_t pool0_size = ((uint32_t)HEAP0_END - (uint32_t)heap_pool0_base);
uint8_t * heap_pool1_base = (uint8_t *)((((uint32_t)HEAP1_START) + sizeof(size_t) - 1U) & ~(sizeof(size_t)-1U));
size_t pool1_size = ((uint32_t)HEAP1_END - (uint32_t)heap_pool1_base);
if(K_ERR_NONE != tos_mmheap_pool_add(heap_pool0_base, pool0_size)){
LOG(LOG_LVL_ERROR,"[%s, %d]add pool fail.\r\n", __func__, __LINE__);
LOG(LOG_LVL_ERROR,"[%s, %d]add pool0 fail.\r\n", __func__, __LINE__);
};
if(K_ERR_NONE != tos_mmheap_pool_add(heap_pool1_base, pool1_size)){
LOG(LOG_LVL_ERROR,"[%s, %d]add pool1 fail.\r\n", __func__, __LINE__);
};
}

View File

@@ -72,7 +72,7 @@ OS_Status OS_SemaphoreWait(OS_Semaphore_t *sem, OS_Time_t waitMS)
if (err == K_ERR_NONE) {
return OS_OK;
} else {
OS_ERR("err:%d,OS_SemaphoreWait filed.\r\n", err);
// OS_ERR("err:%d,OS_SemaphoreWait filed.\r\n", err);
return OS_FAIL;
}
}

View File

@@ -53,7 +53,7 @@ a lot of data that needs to be copied, this should be set high. */
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 35
#define PBUF_POOL_SIZE 25
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 500//(NETIF_MTU + PBUF_LINK_HLEN)
@@ -68,7 +68,7 @@ a lot of data that needs to be copied, this should be set high. */
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF (7 * TCP_MSS)
/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
#define TCP_SND_QUEUELEN (42)//(5 * TCP_SND_BUF/TCP_MSS)
#define TCP_SND_QUEUELEN (5 * TCP_SND_BUF/TCP_MSS)
/* TCP receive window. */
#define TCP_WND (6 * TCP_MSS)
/* Maximum number of retransmissions of data segments. */

View File

@@ -1,6 +1,6 @@
#include <string.h>
#include "serial/serial.h"
#include "serial/serial_p.h"
#include "serial_hw.h"
#include "utils/fifo/fifobuf.h"
#include "utils/debug/art_assert.h"

View File

@@ -1,405 +0,0 @@
#include "proj_config.h"
#include "ln88xx.h"
#include "serial/serial.h"
#include "hal/hal_syscon.h"
#include "hal/hal_uart.h"
#include "utils/debug/art_assert.h"
#define UART0_TX_BUF_SIZE CFG_UART0_TX_BUF_SIZE
#define UART0_RX_BUF_SIZE CFG_UART0_RX_BUF_SIZE
#define UART1_TX_BUF_SIZE CFG_UART1_TX_BUF_SIZE
#define UART1_RX_BUF_SIZE CFG_UART1_RX_BUF_SIZE
/* From the high-level serial driver */
extern Serial_t serial_handles[SER_PORT_NUM];
/* TX and RX buffers */
unsigned char uart0_txbuffer[UART0_TX_BUF_SIZE];
unsigned char uart0_rxbuffer[UART0_RX_BUF_SIZE];
unsigned char uart1_txbuffer[UART1_TX_BUF_SIZE];
unsigned char uart1_rxbuffer[UART1_RX_BUF_SIZE];
/* UART device*/
UART_DevTypeDef g_huart0,g_huart1;
/**
* Internal state structure
*/
struct ARTSerial
{
struct SerialHardware Hardware;
struct Serial *serial;
};
struct ARTSerial UARTDescs[SER_PORT_NUM];
static void uart0_SendDataIrqCallback(uint8_t *ch);
static void uart0_RecvDataIrqCallback(uint8_t *ch);
static void uart1_SendDataIrqCallback(uint8_t *ch);
static void uart1_RecvDataIrqCallback(uint8_t *ch);
/*
* ***************************** Port IO Config ******************************
*/
static void uart_io_pin_request(struct Serial *serial)
{
int en = 1;
ART_ASSERT(serial);
if(serial->port_id == SER_PORT_UART0){
#if defined (LN881x)
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_RX, GPIO_AF_IO_0, en);
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_TX, GPIO_AF_IO_1, en);
#elif defined (LN882x)
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_RX, GPIO_AF_IO_18, en); //LN882x: GPIO_A[8], FULL_MUX_18, PAD24 [rom_uart0 RX]
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_TX, GPIO_AF_IO_19, en); //LN882x: GPIO_A[9], FULL_MUX_19, PAD25 [rom_uart0 TX]
#else
#error Add your bord type!!!
#endif
}else if(serial->port_id == SER_PORT_UART1){
#if defined (LN881x)
// EVB V2 引脚更改了
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_2, en);
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_4, en);
#elif defined (LN882x)
//TODO:待最终demo板确认
//HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_15, en);//LN882x FPGA: GPIO_1[5], FULL_MUX_15, PAD21
//HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_16, en);//LN882x FPGA: GPIO_1[6], FULL_MUX_16, PAD22
#if 0//LN8826CT
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_8, en);//LN8826CT EVB: GPIOA8 GPIO_0[8], FULL_MUX_08, PAD08
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_9, en);//LN8826CT EVB: GPIOA9 GPIO_0[9], FULL_MUX_09, PAD09
#else //LN8820 or LN8825
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_16, en);//LN8820 (LN8825) &BLE EVB: GPIOB6, FULL_MUX_16, Pin31
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_17, en);//LN8820 (LN8825) &BLE EVB: GPIOB7, FULL_MUX_17, Pin32
#endif
#else
#error Add your bord type!!!
#endif
}
}
static void uart_io_pin_release(struct Serial *serial)
{
int en = 0;
ART_ASSERT(serial);
if(serial->port_id == SER_PORT_UART0){
#if defined (LN881x)
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_RX, GPIO_AF_IO_0, en);
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_TX, GPIO_AF_IO_1, en);
#elif defined (LN882x)
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_RX, GPIO_AF_IO_18, en);//LN882x: GPIO_1[8], FULL_MUX_18, PAD24 [rom_uart0 RX]
HAL_SYSCON_FuncIOSet(GPIO_AF_UART0_TX, GPIO_AF_IO_19, en);//LN882x: GPIO_1[9], FULL_MUX_19, PAD25 [rom_uart0 TX]
#else
#error Add your bord type!!!
#endif
}else if(serial->port_id == SER_PORT_UART1){
#if defined (LN881x)
// EVB V2 引脚更改了
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_2, en);
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_4, en);
#elif defined (LN882x)
//TODO:待最终demo板确认
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_RX, GPIO_AF_IO_15, en);//LN882x: GPIO_1[5], FULL_MUX_15, PAD21
HAL_SYSCON_FuncIOSet(GPIO_AF_UART1_TX, GPIO_AF_IO_16, en);//LN882x: GPIO_1[6], FULL_MUX_16, PAD22
#else
#error Add your bord type!!!
#endif
}
}
/*
* ***************************** Device Init ******************************
*/
static void hw_uart0_init(struct SerialHardware *_hw, struct Serial *serial, uint32_t baudrate)
{
struct ARTSerial *hw = NULL;
ART_ASSERT(_hw && serial);
hw = (struct ARTSerial *)_hw;
hw->serial = serial;
g_huart0.Instance = UART0;
g_huart0.Config.BaudRate = baudrate;//115200 921600 2000000
g_huart0.Config.DataLength = UART_DATALEN_8BIT;
g_huart0.Config.Parity = UART_PARITY_NONE;
g_huart0.Config.StopBits = UART_STOP_BIT_1;
g_huart0.Config.FlowControl = UART_FLOW_CONTROL_SOFTWARE;
//request pin for uart
uart_io_pin_request(hw->serial);
//init uart hardware
HAL_UART_Init(&g_huart0);
//config tx/rx trigger
HAL_UART_FIFOControl(&g_huart0, UART_TX_EMPTY_TRIGGER_FIFO_EMPTY, UART_RCVR_TRIGGER_FIFO_HAS_ONE_CHARACTER, UART_DMA_MODE0);
//enable RX interrupt if necessary
HAL_UART_INT_Switch_RecvDataAvailable(&g_huart0, 1);
//enable TX interrupt if necessary
// hal_uart_xfer_data_interrupt(_hw->hw_addr, 1);
//Enable Receiver Line Status Interrupt if necessary
HAL_UART_INT_Switch_RecvLineStatus(&g_huart0, 1);
//Enable Modem Status Interrupt if necessary
//hal_uart_modem_status_interrupt(_hw->hw_addr, 1);
//Enable Programmable THRE Interrupt if necessary
// hal_uart_thre_interrupt(_hw->hw_addr, 1);
HAL_UART_SetIsrRecvCharCallback(g_huart0.Instance, uart0_RecvDataIrqCallback);
HAL_UART_SetIsrSendCharCallback(g_huart0.Instance, uart0_SendDataIrqCallback);
//enable uart master switch
NVIC_EnableIRQ(UART0_IRQn);
}
static void hw_uart1_init(struct SerialHardware *_hw, struct Serial *serial, uint32_t baudrate)
{
struct ARTSerial *hw = NULL;
ART_ASSERT(_hw && serial);
hw = (struct ARTSerial *)_hw;
hw->serial = serial;
g_huart1.Instance = UART1;
g_huart1.Config.BaudRate = baudrate;//115200, 921600
g_huart1.Config.DataLength = UART_DATALEN_8BIT;
g_huart1.Config.Parity = UART_PARITY_NONE;
g_huart1.Config.StopBits = UART_STOP_BIT_1;
g_huart1.Config.FlowControl = UART_FLOW_CONTROL_SOFTWARE;
//request pin for uart
uart_io_pin_request(hw->serial);
//init uart hardware
HAL_UART_Init(&g_huart1);
//config tx/rx trigger
HAL_UART_FIFOControl(&g_huart1, UART_TX_EMPTY_TRIGGER_FIFO_EMPTY, UART_RCVR_TRIGGER_FIFO_HAS_ONE_CHARACTER, UART_DMA_MODE0);
//enable RX interrupt if necessary
HAL_UART_INT_Switch_RecvDataAvailable(&g_huart1, 1);
HAL_UART_SetIsrRecvCharCallback(g_huart1.Instance, uart1_RecvDataIrqCallback);
HAL_UART_SetIsrSendCharCallback(g_huart1.Instance, uart1_SendDataIrqCallback);
//enable uart master switch
NVIC_EnableIRQ(UART1_IRQn);
}
/*
* ***************************** Device Cleanup ******************************
*/
static void hw_uart_cleanup(struct SerialHardware *_hw)
{
struct ARTSerial *hw = NULL;
ART_ASSERT(_hw);
hw = (struct ARTSerial *)_hw;
HAL_UART_Deinit(hw->Hardware.hw_device);
uart_io_pin_release(hw->serial);
hw->serial = NULL;
}
/*
* ***************************** Device txStart ******************************
*/
//txStart polling mode.
static void hw_uart_txStartPolling(struct SerialHardware * _hw)
{
uint8_t ch;
struct ARTSerial *hw = NULL;
UART_DevTypeDef * pUartDev;
ART_ASSERT(_hw);
hw = (struct ARTSerial *)_hw;
while(!fifo_isempty(&hw->serial->txfifo))
{
ch = fifo_pop(&hw->serial->txfifo);
pUartDev = (UART_DevTypeDef *)hw->Hardware.hw_device;
HAL_UART_WriteOneChar(pUartDev->Instance, &ch);
}
}
//txStart ISR mode.
static void hw_uart_txStartIsr(struct SerialHardware * _hw)
{
struct ARTSerial *hw = NULL;
ART_ASSERT(_hw);
hw = (struct ARTSerial *)_hw;
if (hw->Hardware.isSending){
return;
}
if(!fifo_isempty(&hw->serial->txfifo))
{
hw->Hardware.isSending = true;
/* Enable TX empty interrupts. */
HAL_UART_INT_Switch_TransmitHoldingRegEmpty(hw->Hardware.hw_device, 1);
}
}
/*
* ***************************** Device ixSending ******************************
*/
static bool hw_uart_txIsSending(struct SerialHardware * _hw)
{
struct ARTSerial *hw = NULL;
ART_ASSERT(_hw);
hw = (struct ARTSerial *)_hw;
return hw->Hardware.isSending;
}
/*
* ***************************** Device setBaudrate ******************************
*/
static bool hw_uart_setBaudrate(struct SerialHardware * _hw, uint32_t baudrate)
{
struct ARTSerial *hw = NULL;
UART_DevTypeDef * pUartDev;
ART_ASSERT(_hw);
hw = (struct ARTSerial *)_hw;
pUartDev = (UART_DevTypeDef *)hw->Hardware.hw_device;
if(HAL_OK == HAL_UART_BaudRateConfig(pUartDev, baudrate)){
return true;
} else {
return false;
}
}
/*
* ***************************** Register ISR Callback *****************************
*/
//send data callback in ISR mode.
static void uart0_SendDataIrqCallback(uint8_t *ch)
{
struct ARTSerial *hw = (struct ARTSerial *)&UARTDescs[SER_PORT_UART0];
uint8_t tx_char = 0;
if (fifo_isempty(&hw->serial->txfifo))
{
/* Disable TX empty interrupts if there're no more characters to transmit. */
HAL_UART_INT_Switch_TransmitHoldingRegEmpty(&g_huart0, 0);
hw->Hardware.isSending = false;
}
else
{
tx_char = fifo_pop(&hw->serial->txfifo);
HAL_UART_WriteOneChar(g_huart0.Instance, &tx_char);
}
}
//recieve data callback in ISR mode.
static void uart0_RecvDataIrqCallback(uint8_t *ch)
{
struct ARTSerial *hw = (struct ARTSerial *)&UARTDescs[SER_PORT_UART0];
while (fifo_isfull_locked(&hw->serial->rxfifo)){
serial_purgeRx(hw->serial);
}
fifo_push(&hw->serial->rxfifo, (unsigned char)*ch);
hw->serial->callback();
}
//send data callback in ISR mode.
static void uart1_SendDataIrqCallback(uint8_t *ch)
{
struct ARTSerial *hw = (struct ARTSerial *)&UARTDescs[SER_PORT_UART1];
uint8_t tx_char = 0;
if (fifo_isempty(&hw->serial->txfifo))
{
/* Disable TX empty interrupts if there're no more characters to transmit. */
HAL_UART_INT_Switch_TransmitHoldingRegEmpty(&g_huart1, 0);
hw->Hardware.isSending = false;
}
else
{
*ch = fifo_pop(&hw->serial->txfifo);
HAL_UART_WriteOneChar(g_huart1.Instance, &tx_char);
}
}
//recieve data callback in ISR mode.
static void uart1_RecvDataIrqCallback(uint8_t *ch)
{
struct ARTSerial *hw = (struct ARTSerial *)&UARTDescs[SER_PORT_UART1];
if (fifo_isfull_locked(&hw->serial->rxfifo)){
serial_purgeRx(hw->serial);
}
fifo_push(&hw->serial->rxfifo, (unsigned char)*ch);
if(*ch == '\n'){
hw->serial->callback();
}
}
/*
* High-level interface data structures.
*/
static const struct SerialHardwareVT uart0_vtable =
{
.init = hw_uart0_init,
.cleanup = hw_uart_cleanup,
.txStart = hw_uart_txStartPolling,//hw_uart_txStartPolling,hw_uart_txStartIsr
.txSending = hw_uart_txIsSending,
.setBaudrate = hw_uart_setBaudrate,
};
static const struct SerialHardwareVT uart1_vtable =
{
.init = hw_uart1_init,
.cleanup = hw_uart_cleanup,
.txStart = hw_uart_txStartPolling,//hw_uart_txStartPolling,hw_uart_txStartIsr
.txSending = hw_uart_txIsSending,
.setBaudrate = hw_uart_setBaudrate,
};
struct ARTSerial UARTDescs[SER_PORT_NUM] =
{
{
.Hardware =
{
.table = &uart0_vtable,
.txbuffer = uart0_txbuffer,
.rxbuffer = uart0_rxbuffer,
.txbuffer_size = sizeof(uart0_txbuffer),
.rxbuffer_size = sizeof(uart0_rxbuffer),
.hw_device = (void *)&g_huart0,
.isSending = false,
},
.serial = NULL,
},
{
.Hardware =
{
.table = &uart1_vtable,
.txbuffer = uart1_txbuffer,
.rxbuffer = uart1_rxbuffer,
.txbuffer_size = sizeof(uart1_txbuffer),
.rxbuffer_size = sizeof(uart1_rxbuffer),
.hw_device = (void *)&g_huart1,
.isSending = false,
},
.serial = NULL,
},
};
struct SerialHardware *serial_hw_getdesc(SerialPortID port_id)
{
ART_ASSERT(port_id < SER_PORT_NUM);
return (struct SerialHardware *)&UARTDescs[port_id].Hardware;
}

View File

@@ -5,6 +5,8 @@
#include "utils/debug/log.h"
#include "utils/debug/art_assert.h"
#define LN_MAC_OUI "00-50-C2"
/***************************************************************
* <20><> <20><> <20><><EFBFBD><EFBFBD>substring
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>λ<EFBFBD>õ<EFBFBD><C3B5>Ӵ<EFBFBD>
@@ -250,12 +252,26 @@ int generate_mac_randomly(unsigned char *addr)
HAL_TRNG_Init(TRNG, initStruct);
HAL_TRNG_Start(TRNG);
while(!HAL_TRNG_isDataReady(TRNG) || HAL_TRNG_isBusy(TRNG));
#ifdef LN_MAC_OUI
uint32_t addr0, addr1, addr2;
sscanf(LN_MAC_OUI, "%X-%X-%X", &addr0, &addr1, &addr2);
*addr = addr0 & 0xFF;
*(addr + 1) = addr1 & 0xFF;
*(addr + 2) = addr2 & 0xFF;
for (int i = 0; i < 1; i++) {
trngNumber[i] = HAL_TRNG_GetRandomNumber(TRNG, i);
}
HAL_TRNG_Stop(TRNG);
memcpy(addr + 3, trngNumber, 3);
#else
for (int i = 0; i < 2; i++) {
trngNumber[i] = HAL_TRNG_GetRandomNumber(TRNG, i);
}
HAL_TRNG_Stop(TRNG);
memcpy(addr, trngNumber, 6);
CLR_BIT(addr[0],0);
CLR_BIT(addr[0],1);
#endif
return 0;
}

View File

@@ -1,7 +1,7 @@
#include "utils/crc32.h"
const uint32_t Crc32Table[256] = {
static const uint32_t Crc32Table[256] = {
0x00000000,0x77073096,0xEE0E612C,0x990951BA,
0x076DC419,0x706AF48F,0xE963A535,0x9E6495A3,
0x0EDB8832,0x79DCB8A4,0xE0D5E91E,0x97D2D988,
@@ -69,9 +69,27 @@ const uint32_t Crc32Table[256] = {
};
uint32_t GetCrc32(uint8_t *ptr, int len)
void ln_crc32_init(crc32_ctx_t *ctx)
{
ctx->crc = 0xFFFFFFFFL;
}
void ln_crc32_update(crc32_ctx_t *ctx, uint8_t *data, uint32_t len)
{
for (uint32_t i = 0; i < len; i++)
{
ctx->crc = (ctx->crc >> 8) ^ Crc32Table[(ctx->crc & 0xFF) ^ *data++];
}
}
uint32_t ln_crc32_final(crc32_ctx_t *ctx)
{
return ctx->crc ^= 0xFFFFFFFFUL;
}
uint32_t ln_crc32_signle_cal(uint8_t *ptr, int len)
{
uint32_t crc = 0xFFFFFFFF;
while (len > 0)
{
@@ -80,7 +98,6 @@ uint32_t GetCrc32(uint8_t *ptr, int len)
len--;
}
return crc^0xffffffff;
}

View File

@@ -8,11 +8,12 @@
#include "osal/osal.h"
#include "utils/eeprom.h"
#include "utils/system_parameter.h"
#include "flash_partition_table.h"
#define PAGE_SIZE (1*SIZE_4KB)
/* EEPROM start address in Flash */
#define EEPROM_START_ADDRESS ((uint32_t)(SYSTEM_PARAMETER_OFFSET))
#define EEPROM_START_ADDRESS ((uint32_t)(SIMU_EEPROM_SPACE_OFFSET))
/* Pages 0 and 1 base and end addresses */
#define PAGE0_BASE_ADDRESS ((uint32_t)(EEPROM_START_ADDRESS))

File diff suppressed because it is too large Load Diff

View File

@@ -17,10 +17,6 @@ typedef struct {
uint8_t ap_hostname[NETIF_HOSTNAME_LEN_MAX+1];
} hostname_t;
typedef struct {
wifi_psk_info_t psk_info_list[WIFI_PSK_INFO_LIST_SIZE];
} wifi_psk_info_list_t;
typedef enum {
WIFI_COMMON_CONFIG = 0,
WIFI_STA_CONFIG,
@@ -42,7 +38,6 @@ typedef struct system_parameter{
uint8_t dhcp_sw_config;
hostname_t hostname_cfg;
server_config_t dhcpd_config;
wifi_psk_info_list_t psk_info_list;
OS_Mutex_t lock;
}system_parameter_t;
@@ -58,7 +53,6 @@ typedef struct {
uint8_t dhcp_sw_config;
hostname_t hostname_cfg;
server_config_t dhcpd_config;
wifi_psk_info_list_t psk_info_list;
}item;
} system_param_item_t;
@@ -221,13 +215,6 @@ void system_parameter_sync_to_flash(system_param_item_t *param_item)
}
break;
case WIFI_PSK_INFO: {
cache_content = (uint8_t *)&(param_item->item.psk_info_list);
len = sizeof(wifi_psk_info_list_t);
start = (uint8_t *)&(system_parameter->psk_info_list) - system_parameter_base;
}
break;
default:
break;
}
@@ -325,111 +312,6 @@ int system_parameter_get_config(wifi_interface_enum_t if_index, wifi_config_t *c
return 0;
}
static int system_parameter_set_psk_info_list(wifi_psk_info_list_t *psk_info_list)
{
system_parameter_t *system_parameter = get_system_parameter_handle();
system_param_item_t *param_item = get_param_item_cache();
ART_ASSERT(system_parameter && psk_info_list);
OS_MutexLock(&system_parameter->lock, OS_WAIT_FOREVER);
param_item->item_id = (uint32_t)WIFI_PSK_INFO;
memcpy(&param_item->item.psk_info_list, psk_info_list, sizeof(wifi_psk_info_list_t));
system_parameter_sync_to_flash(param_item);
OS_MutexUnlock(&system_parameter->lock);
return 0;
}
static int system_parameter_get_psk_info_list( wifi_psk_info_list_t *psk_info_list)
{
system_parameter_t *system_parameter = get_system_parameter_handle();
ART_ASSERT(system_parameter && psk_info_list);
OS_MutexLock(&system_parameter->lock, OS_WAIT_FOREVER);
memcpy(psk_info_list, &(system_parameter->psk_info_list), sizeof(wifi_psk_info_list_t));
OS_MutexUnlock(&system_parameter->lock);
return 0;
}
//PSK info
int system_parameter_set_psk_info(wifi_psk_info_t *psk_info)
{
int i, idx_idle = -1;
wifi_psk_info_t *wifi_psk_info = NULL;
wifi_psk_info_list_t wifi_psk_info_list = {0,};
bool need_flush = false;
ART_ASSERT(psk_info);
if(0 == system_parameter_get_psk_info_list(&wifi_psk_info_list))
{
for(i = 0; i < (sizeof(wifi_psk_info_list_t)/sizeof(wifi_psk_info_t)); i++){
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[i]);
//Got it
if((psk_info->ssid_len == wifi_psk_info->ssid_len)
&& (psk_info->password_len == wifi_psk_info->password_len)
&& ((psk_info->password_len > 0) && !memcmp(psk_info->password, wifi_psk_info->password, psk_info->password_len))
&& ((psk_info->ssid_len > 0) && !memcmp(psk_info->ssid, wifi_psk_info->ssid, psk_info->ssid_len))){
break;
}
//First idle
if((idx_idle < 0)
&& (psk_info->password_len == 0)
&& (psk_info->ssid_len == 0)){
idx_idle = i;
}
}
if(i < (sizeof(wifi_psk_info_list_t)/sizeof(wifi_psk_info_t))){//already in list
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[i]);
if(memcmp(psk_info->psk, wifi_psk_info->psk, 40) != 0){//update
memcpy(wifi_psk_info->psk, psk_info->psk, 40);
need_flush = true;
}
}else if(idx_idle >= 0 && idx_idle < (sizeof(wifi_psk_info_list_t)/sizeof(wifi_psk_info_t))){
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[i]);
memcpy(wifi_psk_info, psk_info, sizeof(wifi_psk_info_t));
need_flush = true;
}else{
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[0]);
memcpy(wifi_psk_info, psk_info, sizeof(wifi_psk_info_t));
need_flush = true;
}
if(need_flush){
system_parameter_set_psk_info_list(&wifi_psk_info_list);
}
return 0;
}
return -1;
}
int system_parameter_get_psk_info(wifi_psk_info_t *psk_info)
{
int i;
wifi_psk_info_t *wifi_psk_info = NULL;
wifi_psk_info_list_t wifi_psk_info_list = {0,};
ART_ASSERT(psk_info);
if(0 == system_parameter_get_psk_info_list(&wifi_psk_info_list))
{
for(i = 0; i < (sizeof(wifi_psk_info_list_t)/sizeof(wifi_psk_info_t)); i++){
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[i]);
//Got it
if((psk_info->ssid_len == wifi_psk_info->ssid_len)
&& (psk_info->password_len == wifi_psk_info->password_len)
&& ((psk_info->password_len > 0) && !memcmp(psk_info->password, wifi_psk_info->password, psk_info->password_len))
&& ((psk_info->ssid_len > 0) && !memcmp(psk_info->ssid, wifi_psk_info->ssid, psk_info->ssid_len))){
break;
}
}
if(i < (sizeof(wifi_psk_info_list_t)/sizeof(wifi_psk_info_t))){//already in list
wifi_psk_info = &(wifi_psk_info_list.psk_info_list[i]);
memcpy(psk_info, wifi_psk_info, sizeof(wifi_psk_info_t));
return 0;
}
}
return -1;
}
//ip config
int system_parameter_set_ip_config(wifi_interface_enum_t if_index, tcpip_ip_info_t *ip_config)
{
@@ -594,8 +476,12 @@ int system_parameter_get_wifi_config_default (wifi_interface_enum_t if_index, wi
memcpy(ap->ssid, WIFI_AP_SSID_DEFAULT, ap->ssid_len);
len = (strlen(WIFI_AP_PASSWORD_DEFAULT) < PASSWORD_MAX_LEN) ? strlen(WIFI_AP_PASSWORD_DEFAULT) : PASSWORD_MAX_LEN;
memcpy(ap->password, WIFI_AP_PASSWORD_DEFAULT, len);
if(strlen((const char *)ap->password) > 0){
ap->authmode = WIFI_AUTH_WPA2_PSK;
}else{
ap->authmode = WIFI_AP_AUTH_MODE_DEFAULT;
}
ap->channel = WIFI_AP_CHANNEL_DEFAULT;
ap->authmode = WIFI_AP_AUTH_MODE_DEFAULT;
ap->ssid_hidden = WIFI_AP_SSID_HIDDEN_DEFAULT;
ap->max_connection = WIFI_AP_MAX_CONNECTION_DEFAULT;
ap->beacon_interval = WIFI_AP_BEACON_INTERVAL_DEFAULT;

View File

@@ -7,7 +7,7 @@
#include "dhcpd/dhcpd.h"
#define WIFI_MANAGER_TASK_STACK_SIZE 5*256 //Byte
#define WIFI_MSG_QUEUE_DEPTH 5
#define WIFI_MSG_QUEUE_DEPTH 10
struct wifi_manager_ctrl{
@@ -17,8 +17,14 @@ struct wifi_manager_ctrl{
};
static wifi_manager_ctrl_t gwifi_manager_ctrl= {0,};
bool reg_wifi_msg_callbcak(wifi_manager_ctrl_t *manager_ctrl, wifi_msg_id_enum_t msg_id, wifi_msg_callback_fun callback_fun)
static wifi_manager_ctrl_t *wifi_manager_get_handle(void)
{
return &gwifi_manager_ctrl;
}
bool reg_wifi_msg_callbcak(wifi_msg_id_enum_t msg_id, wifi_msg_callback_fun callback_fun)
{
wifi_manager_ctrl_t *manager_ctrl = wifi_manager_get_handle();
wifi_msg_handle_table_t *msg_handler_table = NULL;
ART_ASSERT(manager_ctrl);
@@ -57,15 +63,11 @@ static void wifi_manager_task_entry(void *params)
case WIFI_MSG_ID_STA_READY:
//turn on WIFI LED
#if (WIFI_TRACK==0)
LOG(LOG_LVL_INFO, "[%s, %d]WIFI_MSG_ID_WIFI_READY\r\n", __func__, __LINE__);
#endif
LOG(LOG_LVL_TRACE, "[%s, %d]WIFI_MSG_ID_WIFI_READY\r\n", __func__, __LINE__);
break;
case WIFI_MSG_ID_STA_SCAN_DONE:
#if (WIFI_TRACK==0)
LOG(LOG_LVL_INFO, "[%s, %d]WIFI_MSG_ID_STA_SCAN_DONE\r\n", __func__, __LINE__);
#endif
LOG(LOG_LVL_TRACE, "[%s, %d]WIFI_MSG_ID_STA_SCAN_DONE\r\n", __func__, __LINE__);
//update ap list
break;
@@ -151,9 +153,10 @@ static void wifi_manager_task_entry(void *params)
}
}
bool wifi_manager_init(wifi_manager_ctrl_t *manager_ctrl)
bool wifi_manager_init(void)
{
OS_Status ret = OS_OK;
wifi_manager_ctrl_t *manager_ctrl = wifi_manager_get_handle();
ART_ASSERT(manager_ctrl);
ret = OS_QueueCreate(&manager_ctrl->wifi_manager_msgq, WIFI_MSG_QUEUE_DEPTH, sizeof(wifi_msg_t));
@@ -169,11 +172,12 @@ bool wifi_manager_init(wifi_manager_ctrl_t *manager_ctrl)
return true;
}
bool wifi_manager_deinit(wifi_manager_ctrl_t *manager_ctrl)
bool wifi_manager_deinit(void)
{
OS_Status ret = OS_OK;
ART_ASSERT(manager_ctrl);
wifi_manager_ctrl_t *manager_ctrl = wifi_manager_get_handle();
ART_ASSERT(manager_ctrl);
ret = OS_ThreadDelete(&manager_ctrl->wifi_manager_thread);
if (ret != OS_OK){
LOG(LOG_LVL_ERROR, "[%s, %d]OS_ThreadDelete manager_ctrl->wifi_manager_thread fail.\r\n", __func__, __LINE__);
@@ -188,9 +192,4 @@ bool wifi_manager_deinit(wifi_manager_ctrl_t *manager_ctrl)
return true;
}
wifi_manager_ctrl_t *wifi_manager_get_handle(void)
{
return &gwifi_manager_ctrl;
}

View File

@@ -0,0 +1,52 @@
/*---------------------------------------------------------------------------*
| @author : LightningSemi WLAN Software Team |
| @version : V2.0.0 |
| @date : 1-May-2018 |
| @brief : IEEE 802.11 a/b/g/e/i/n MAC Software |
|---------------------------------------------------------------------------|
| COPYRIGHT(c) 2018 LightningSemi |
*---------------------------------------------------------------------------*/
/*****************************************************************************/
/* */
/* File Name : itypes.h */
/* */
/* Description : This file contains all the data type definitions for */
/* MAC implementation. */
/* */
/* List of Functions : None */
/* Issues / Problems : None */
/* */
/*****************************************************************************/
#ifndef ITYPES_H
#define ITYPES_H
/*****************************************************************************/
/* Constants */
/*****************************************************************************/
#define INLINE static __inline
/*****************************************************************************/
/* Data Types */
/*****************************************************************************/
typedef int WORD32;
typedef short WORD16;
typedef char WORD8;
typedef unsigned int UWORD32;
typedef unsigned short UWORD16;
typedef unsigned char UWORD8;
typedef signed char SWORD8;
/*****************************************************************************/
/* Enums */
/*****************************************************************************/
typedef enum {BFALSE = 0,
BTRUE = 1
} BOOL_T;
#endif /* ITYPES_H */

View File

@@ -0,0 +1,62 @@
#include "wifi_port.h"
#include "ln_kv_err.h"
#include "ln_kv_api.h"
#include "itypes.h"
#include "osal/osal.h"
#define KV_PSK_INFO ("kv_psk_info")
/* restore/store psk info */
int kv_set_psk_info_list(uint8_t *v_buf, uint32_t buf_len)
{
if (KV_ERR_NONE != ln_kv_set((const char *)KV_PSK_INFO, v_buf, (size_t)buf_len)) {
return BFALSE;
}
return BTRUE;
}
int kv_get_psk_info_list(uint8_t *v_buf, uint32_t buf_len)
{
size_t len;
if (KV_ERR_NONE != ln_kv_get((const char *)KV_PSK_INFO, v_buf, (size_t)buf_len, &len)) {
return BFALSE;
}
return BTRUE;
}
int kv_has_psk_info_list(void)
{
size_t len;
if (LN_TRUE == ln_kv_has_key((const char *)KV_PSK_INFO)) {
return BTRUE;
}
return BFALSE;
}
/* heap memory manager */
void *mac_malloc(uint32_t size)
{
return OS_Malloc(size);
}
void mac_free(void *ptr)
{
OS_Free(ptr);
}

View File

@@ -0,0 +1,15 @@
#ifndef __WIFI_PORT_H__
#define __WIFI_PORT_H__
#include "ln_types.h"
int kv_has_psk_info_list(void);
int kv_set_psk_info_list(uint8_t *v_buf, uint32_t buf_len);
int kv_get_psk_info_list(uint8_t *v_buf, uint32_t buf_len);
void *mac_malloc(uint32_t size);
void mac_free(void *ptr);
#endif /* __WIFI_PORT_H__ */

View File

@@ -0,0 +1,86 @@
#!env python3
# -*- coding: utf-8 -*-
# @Time : 2020/5/10 11:53
# @Author : WuLiang
# @FileName: before_build.py
# @Software: PyCharm
import json
import sys
ALIGN = "32"
image_header_size = "0x100"
def json2macro(rfile_path,wfile_path):
result = dict()
try:
with open(rfile_path,'r',encoding='utf-8') as f:
result = json.loads(f.read())
except Exception as e:
pass
with open(wfile_path, "w+") as f:
file_v = wfile_path.split("\\")[-1].replace(".h","").upper()
startcomment = "#ifndef __" + file_v + "__\n#define __" + file_v + "__\n\n\n//flash partition map,it's generated by the script based on the json file <flash_partition_table.json>\n"
f.writelines(startcomment)
count = 0
last_name1 = ""
last_name2 = ""
for key,value in result.items():
try:
if key not in ["Warning1","Warning2"]:
for i in value:
name1 = i['partition_type'] + "_SPACE_OFFSET"
name2 = i['partition_type'] + "_SPACE_SIZE"
temp1 = "".join(["#define ", format(name1," <"+ALIGN), " (", i['start_addr'], ")"])
temp2 = "".join(["#define ", format(name2," <"+ALIGN), " (1024*", str(i['size_KB']), ')'])
f.writelines("\n"+temp1+"\n")
f.writelines(temp2+"\n")
if (count > 0):
temp3 = "".join(["#if (", name1, " < (", last_name1, " + ", last_name2, "))"])
f.writelines(temp3 + "\n")
f.writelines(" #error \"flash partition overlap,please check <flash_partition_table.json>!!!\"\n")
f.writelines("#endif\n")
count = count + 1
last_name1 = name1
last_name2 = name2
except Exception as e:
print(e)
temp = "".join(["\n\n#define ", format("IMAGE_HEADER_SIZE"," <"+ALIGN), " ", "("+image_header_size+")"])
f.writelines(temp)
endcommont = "\n\n#endif /* __" + file_v + "__ */\n\n"
f.writelines(endcommont)
def main(argv):
arg_count = len(sys.argv)
# print("arg count = ", arg_count)
# print(sys.argv[1])
# print(sys.argv[2])
if arg_count == 3:
rfile_path = sys.argv[1]
wfile_path = sys.argv[2]
json2macro(rfile_path, wfile_path)
else:
assert arg_count == 3
if __name__ == "__main__":
version = sys.version.split(' ')[0]
if version < str(3):
print("pyhton version is too low,please install python3 !\n")
assert version < str(3)
else:
main(sys.argv)