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Merge pull request #16 from acevest/bumblebee_timer

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detach risc-v cpu bumblebee level code from gd32v lib
This commit is contained in:
Supowang1989
2019-09-29 11:29:44 +08:00
committed by GitHub
parent b34ce35f5e 384a4f6ef3
commit 9dd36ed2da
11 changed files with 124 additions and 17 deletions
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4
arch/risc-v/bumblebee/gcc/riscv_port.h
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@@ -24,6 +24,8 @@
#define CLINT_MTIMECMP 0x0008
#define CLINT_MTIME 0x0000
void riscv_cpu_init();
void port_cpu_init();
void port_systick_priority_set(uint32_t priority);
#endif // _RISCV_PORT_H_

104
arch/risc-v/bumblebee/gcc/riscv_port_c.c
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@@ -1,5 +1,103 @@
#include "gd32vf103.h"
#include "tos.h"
void riscv_cpu_init() {
eclic_irq_enable(CLIC_INT_TMR, 0, 0);
#define ECLIC_ADDR_BASE 0xD2000000
#define CLIC_INT_TMR 0x07
#define ECLIC_CFG_OFFSET 0x00
#define ECLIC_INFO_OFFSET 0x04
#define ECLIC_MTH_OFFSET 0x0B
#define ECLIC_INT_IP_OFFSET 0x1000
#define ECLIC_INT_IE_OFFSET 0x1001
#define ECLIC_INT_ATTR_OFFSET 0x1002
#define ECLIC_INT_CTRL_OFFSET 0x1003
#define ECLIC_CFG_NLBITS_MASK 0x1E
#define ECLIC_CFG_NLBITS_LSB 1
static uint8_t elci_get_clic_int_ctl_bits() {
uint32_t bits = *(volatile uint32_t*)(ECLIC_ADDR_BASE+ECLIC_INFO_OFFSET);
bits >>= 21;
return (uint8_t) bits;
}
static uint8_t elci_get_nlbits() {
uint8_t nlbits = *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_CFG_OFFSET);
nlbits = (nlbits & ECLIC_CFG_NLBITS_MASK) >> ECLIC_CFG_NLBITS_LSB;
uint8_t cicbits = elci_get_clic_int_ctl_bits();
if(nlbits > cicbits) {
nlbits = cicbits;
}
return nlbits;
}
static uint8_t eclic_get_intctrl(uint32_t source) {
return *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_CTRL_OFFSET+source*4);
}
static void eclic_set_intctrl(uint32_t source, uint8_t v) {
*(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_CTRL_OFFSET+source*4) = v;
}
static void eclic_enable_interrupt(uint32_t source) {
*(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IE_OFFSET+source*4) = 1;
}
static void eclic_set_irq_level(uint32_t source, uint8_t level) {
uint8_t nlbits = elci_get_nlbits();
if (nlbits == 0) {
return ;
}
uint8_t intctrl_val = eclic_get_intctrl(CLIC_INT_TMR);
intctrl_val <<= nlbits;
intctrl_val >>= nlbits;
intctrl_val |= (level << (8- nlbits));
eclic_set_intctrl(CLIC_INT_TMR, intctrl_val);
}
static void eclic_set_irq_priority(uint32_t source, uint8_t priority) {
uint8_t nlbits = elci_get_nlbits();
uint8_t cicbits= elci_get_clic_int_ctl_bits();
if (nlbits >= cicbits) {
return ;
}
uint8_t pad = ~0;
pad <<= cicbits;
pad >>= cicbits;
uint8_t intctrl_val = eclic_get_intctrl(CLIC_INT_TMR);
intctrl_val >>= (8 - nlbits);
intctrl_val <<= (8 - nlbits);
intctrl_val |= (priority << (8 - cicbits));
intctrl_val |= pad;
eclic_set_intctrl(CLIC_INT_TMR, intctrl_val);
}
__PORT__ void port_cpu_init() {
eclic_enable_interrupt(CLIC_INT_TMR);
eclic_set_irq_level(CLIC_INT_TMR, 0);
}
__PORT__ void port_systick_priority_set(uint32_t priority) {
eclic_set_irq_priority(CLIC_INT_TMR, priority);
}

2
arch/risc-v/common/tos_cpu.c
View File

@@ -12,7 +12,7 @@ __KERNEL__ void cpu_init(void) {
k_cpu_cycle_per_tick = TOS_CFG_CPU_CLOCK / k_cpu_tick_per_second;
cpu_systick_init(k_cpu_cycle_per_tick);
riscv_cpu_init();
port_cpu_init();
}
__API__ cpu_cpsr_t tos_cpu_cpsr_save(void)

9
arch/risc-v/rv32i/gcc/port_c.c
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@@ -1,8 +1,6 @@
#include <tos.h>
#include "riscv_encoding.h"
#include "riscv_port.h"
#include <tos.h>
//#include "gd32vf103.h"
__PORT__ void port_systick_config(uint32_t cycle_per_tick)
{
@@ -34,8 +32,3 @@ __PORT__ void port_systick_config(uint32_t cycle_per_tick)
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = 0xFFFFFFFF & (mtimecmp >> 32);
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF & (mtimecmp >> 0);
}
__PORT__ void port_systick_priority_set(uint32_t prio)
{
//NVIC_SetPriority(SysTick_IRQn, prio);
}

4
arch/risc-v/spike/gcc/riscv_port.h
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@@ -23,6 +23,8 @@
#define CLINT_MTIMECMP 0x4000
#define CLINT_MTIME 0xBFF8
void riscv_cpu_init();
void port_cpu_init();
void port_systick_priority_set(uint32_t priority);
#endif // _RISCV_PORT_H_

8
arch/risc-v/spike/gcc/riscv_port_c.c
View File

@@ -1,3 +1,9 @@
void riscv_cpu_init() {
#include "tos.h"
__PORT__ void port_cpu_init() {
// DO NOTHING
}
__PORT__ void port_systick_priority_set(uint32_t priority) {
// DO NOTHING
}

2
board/GD32VF103C_START/TOS_CONFIG/tos_config.h
View File

@@ -23,6 +23,8 @@
#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
#define TOS_CFG_CPU_SYSTICK_PRIO 0xF
#if (TOS_CFG_QUEUE_EN > 0u)
#define TOS_CFG_MSG_EN 1u
#else

2
board/GD32VF103C_START/eclipse/hello_world/.cproject
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@@ -142,6 +142,8 @@
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/TencentOS_tiny/arch/risc-v/rv32i}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/TencentOS_tiny/arch/risc-v/bumblebee}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/hello_world/TencentOS_tiny/kernel/evtdrv/include}&quot;"/>
</option>

2
board/GD32VF103C_START/eclipse/hello_world/.settings/language.settings.xml
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@@ -11,7 +11,7 @@
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1372898985477160516" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1367083006174630109" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>

2
board/QEMU_Spike/eclipse/demo/.cproject
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@@ -140,6 +140,8 @@
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/demo/TencentOS_tiny/arch/risc-v/rv32i}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/demo/TencentOS_tiny/arch/risc-v/spike}&quot;"/>
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/demo/TencentOS_tiny/kernel/evtdrv/include}&quot;"/>
</option>

2
board/QEMU_Spike/eclipse/demo/.settings/language.settings.xml
View File

@@ -11,7 +11,7 @@
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1306101209105946474" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1303215729854698371" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>