diff --git a/arch/risc-v/common/include/riscv_encoding.h b/arch/risc-v/common/include/riscv_encoding.h new file mode 100644 index 00000000..63644419 --- /dev/null +++ b/arch/risc-v/common/include/riscv_encoding.h @@ -0,0 +1,146 @@ +#ifndef _RISCV_CSR_ENCODING_H +#define _RISCV_CSR_ENCODING_H + +#define MSTATUS_UIE 0x00000001 +#define MSTATUS_SIE 0x00000002 +#define MSTATUS_HIE 0x00000004 +#define MSTATUS_MIE 0x00000008 +#define MSTATUS_UPIE 0x00000010 +#define MSTATUS_SPIE 0x00000020 +#define MSTATUS_HPIE 0x00000040 +#define MSTATUS_MPIE 0x00000080 +#define MSTATUS_SPP 0x00000100 +#define MSTATUS_MPP 0x00001800 +#define MSTATUS_FS 0x00006000 +#define MSTATUS_XS 0x00018000 +#define MSTATUS_MPRV 0x00020000 +#define MSTATUS_PUM 0x00040000 +#define MSTATUS_MXR 0x00080000 +#define MSTATUS_VM 0x1F000000 +#define MSTATUS32_SD 0x80000000 +#define MSTATUS64_SD 0x8000000000000000 + + +#define SSTATUS_UIE 0x00000001 +#define SSTATUS_SIE 0x00000002 +#define SSTATUS_UPIE 0x00000010 +#define SSTATUS_SPIE 0x00000020 +#define SSTATUS_SPP 0x00000100 +#define SSTATUS_FS 0x00006000 +#define SSTATUS_XS 0x00018000 +#define SSTATUS_PUM 0x00040000 +#define SSTATUS32_SD 0x80000000 +#define SSTATUS64_SD 0x8000000000000000 + +#define DCSR_XDEBUGVER (3U<<30) +#define DCSR_NDRESET (1<<29) +#define DCSR_FULLRESET (1<<28) +#define DCSR_EBREAKM (1<<15) +#define DCSR_EBREAKH (1<<14) +#define DCSR_EBREAKS (1<<13) +#define DCSR_EBREAKU (1<<12) +#define DCSR_STOPCYCLE (1<<10) +#define DCSR_STOPTIME (1<<9) +#define DCSR_CAUSE (7<<6) +#define DCSR_DEBUGINT (1<<5) +#define DCSR_HALT (1<<3) +#define DCSR_STEP (1<<2) +#define DCSR_PRV (3<<0) + +#define DCSR_CAUSE_NONE 0 +#define DCSR_CAUSE_SWBP 1 +#define DCSR_CAUSE_HWBP 2 +#define DCSR_CAUSE_DEBUGINT 3 +#define DCSR_CAUSE_STEP 4 +#define DCSR_CAUSE_HALT 5 + +#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4)) +#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5)) +#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11)) + +#define MCONTROL_SELECT (1<<19) +#define MCONTROL_TIMING (1<<18) +#define MCONTROL_ACTION (0x3f<<12) +#define MCONTROL_CHAIN (1<<11) +#define MCONTROL_MATCH (0xf<<7) +#define MCONTROL_M (1<<6) +#define MCONTROL_H (1<<5) +#define MCONTROL_S (1<<4) +#define MCONTROL_U (1<<3) +#define MCONTROL_EXECUTE (1<<2) +#define MCONTROL_STORE (1<<1) +#define MCONTROL_LOAD (1<<0) + +#define MCONTROL_TYPE_NONE 0 +#define MCONTROL_TYPE_MATCH 2 + +#define MCONTROL_ACTION_DEBUG_EXCEPTION 0 +#define MCONTROL_ACTION_DEBUG_MODE 1 +#define MCONTROL_ACTION_TRACE_START 2 +#define MCONTROL_ACTION_TRACE_STOP 3 +#define MCONTROL_ACTION_TRACE_EMIT 4 + +#define MCONTROL_MATCH_EQUAL 0 +#define MCONTROL_MATCH_NAPOT 1 +#define MCONTROL_MATCH_GE 2 +#define MCONTROL_MATCH_LT 3 +#define MCONTROL_MATCH_MASK_LOW 4 +#define MCONTROL_MATCH_MASK_HIGH 5 + +#define MIP_SSIP (1 << IRQ_S_SOFT) +#define MIP_HSIP (1 << IRQ_H_SOFT) +#define MIP_MSIP (1 << IRQ_M_SOFT) +#define MIP_STIP (1 << IRQ_S_TIMER) +#define MIP_HTIP (1 << IRQ_H_TIMER) +#define MIP_MTIP (1 << IRQ_M_TIMER) +#define MIP_SEIP (1 << IRQ_S_EXT) +#define MIP_HEIP (1 << IRQ_H_EXT) +#define MIP_MEIP (1 << IRQ_M_EXT) + +#define MIE_SSIE MIP_SSIP +#define MIE_HSIE MIP_HSIP +#define MIE_MSIE MIP_MSIP +#define MIE_STIE MIP_STIP +#define MIE_HTIE MIP_HTIP +#define MIE_MTIE MIP_MTIP +#define MIE_SEIE MIP_SEIP +#define MIE_HEIE MIP_HEIP +#define MIE_MEIE MIP_MEIP + +#define SIP_SSIP MIP_SSIP +#define SIP_STIP MIP_STIP + +#define PRV_U 0 +#define PRV_S 1 +#define PRV_H 2 +#define PRV_M 3 + +#define VM_MBARE 0 +#define VM_MBB 1 +#define VM_MBBID 2 +#define VM_SV32 8 +#define VM_SV39 9 +#define VM_SV48 10 + +#define IRQ_S_SOFT 1 +#define IRQ_H_SOFT 2 +#define IRQ_M_SOFT 3 +#define IRQ_S_TIMER 5 +#define IRQ_H_TIMER 6 +#define IRQ_M_TIMER 7 +#define IRQ_S_EXT 9 +#define IRQ_H_EXT 10 +#define IRQ_M_EXT 11 +#define IRQ_COP 12 +#define IRQ_HOST 13 + +#define DEFAULT_RSTVEC 0x00001000 +#define DEFAULT_NMIVEC 0x00001004 +#define DEFAULT_MTVEC 0x00001010 +#define CONFIG_STRING_ADDR 0x0000100C +#define EXT_IO_BASE 0x40000000 +#define DRAM_BASE 0x80000000 + + +#endif + diff --git a/arch/risc-v/common/include/tos_cpu.h b/arch/risc-v/common/include/tos_cpu.h new file mode 100644 index 00000000..75695178 --- /dev/null +++ b/arch/risc-v/common/include/tos_cpu.h @@ -0,0 +1,118 @@ +#ifndef _TOS_CPU_H_ +#define _TOS_CPU_H_ + + +typedef struct cpu_context_st { + cpu_data_t epc; + cpu_data_t mstatus; + union { cpu_data_t x1, ra; }; + union { cpu_data_t x3, gp; }; + union { cpu_data_t x4, tp; }; + union { cpu_data_t x5, t0; }; + union { cpu_data_t x6, t1; }; + union { cpu_data_t x7, t2; }; + union { cpu_data_t x8, s0, fp; }; + union { cpu_data_t x9, s1; }; + union { cpu_data_t x10, a0; }; + union { cpu_data_t x11, a1; }; + union { cpu_data_t x12, a2; }; + union { cpu_data_t x13, a3; }; + union { cpu_data_t x14, a4; }; + union { cpu_data_t x15, a5; }; + union { cpu_data_t x16, a6; }; + union { cpu_data_t x17, a7; }; + union { cpu_data_t x18, s2; }; + union { cpu_data_t x19, s3; }; + union { cpu_data_t x20, s4; }; + union { cpu_data_t x21, s5; }; + union { cpu_data_t x22, s6; }; + union { cpu_data_t x23, s7; }; + union { cpu_data_t x24, s8; }; + union { cpu_data_t x25, s9; }; + union { cpu_data_t x26, s10; }; + union { cpu_data_t x27, s11; }; + union { cpu_data_t x28, t3; }; + union { cpu_data_t x29, t4; }; + union { cpu_data_t x30, t5; }; + union { cpu_data_t x31, t6; }; +} cpu_context_t; + +__API__ uint32_t tos_cpu_clz(uint32_t val); + +__API__ void tos_cpu_int_disable(void); + +__API__ void tos_cpu_int_enable(void); + +__API__ cpu_cpsr_t tos_cpu_cpsr_save(void); + +__API__ void tos_cpu_cpsr_restore(cpu_cpsr_t cpsr); + + +__KERNEL__ void cpu_init(void); + +__KERNEL__ void cpu_reset(void); + +__KERNEL__ void cpu_systick_init(k_cycle_t cycle_per_tick); + +__KERNEL__ void cpu_sched_start(void); + +__KERNEL__ void cpu_context_switch(void); + +__KERNEL__ void cpu_irq_context_switch(void); + +__KERNEL__ k_stack_t *cpu_task_stk_init(void *entry, + void *arg, + void *exit, + k_stack_t *stk_base, + size_t stk_size); + +#if TOS_CFG_TICKLESS_EN > 0u + +__KERNEL__ void cpu_systick_resume(void); + +__KERNEL__ void cpu_systick_suspend(void); + +__KERNEL__ void cpu_systick_reload_reset(void); + +__KERNEL__ void cpu_systick_pending_reset(void); + +__KERNEL__ k_time_t cpu_systick_max_delay_millisecond(void); + +__KERNEL__ void cpu_systick_expires_set(k_time_t millisecond); + +__KERNEL__ void cpu_systick_reset(void); + +#endif + +#if TOS_CFG_PWR_MGR_EN > 0u + +__KERNEL__ void cpu_sleep_mode_enter(void); + +__KERNEL__ void cpu_stop_mode_enter(void); + +__KERNEL__ void cpu_standby_mode_enter(void); + +#endif + +#if TOS_CFG_FAULT_BACKTRACE_EN > 0u + +#error "unsupport now" + +#endif + +/* Allocates CPU status register word. */ +#define TOS_CPU_CPSR_ALLOC() cpu_cpsr_t cpu_cpsr = (cpu_cpsr_t)0u + +/* Save CPU status word & disable interrupts.*/ +#define TOS_CPU_INT_DISABLE() \ + do { \ + cpu_cpsr = tos_cpu_cpsr_save(); \ + } while (0) + +/* Restore CPU status word. */ +#define TOS_CPU_INT_ENABLE() \ + do { \ + tos_cpu_cpsr_restore(cpu_cpsr); \ + } while (0) + +#endif /* _TOS_CPU_H_ */ diff --git a/arch/risc-v/common/include/tos_cpu_def.h b/arch/risc-v/common/include/tos_cpu_def.h new file mode 100644 index 00000000..c603da9b --- /dev/null +++ b/arch/risc-v/common/include/tos_cpu_def.h @@ -0,0 +1,23 @@ +/* + * tos_cpu_def.h + * + * Created on: Sep 7, 2019 + * Author: ace + */ + +#ifndef _TOS_CPU_DEF_H_ +#define _TOS_CPU_DEF_H_ + +enum CPU_WORD_SIZE { + CPU_WORD_SIZE_08, + CPU_WORD_SIZE_16, + CPU_WORD_SIZE_32, + CPU_WORD_SIZE_64, +}; + +enum CPU_STK_GROWTH { + CPU_STK_GROWTH_ASCENDING, + CPU_STK_GROWTH_DESCENDING, +}; + +#endif /* _TOS_CPU_DEF_H_ */ diff --git a/arch/risc-v/common/include/tos_cpu_types.h b/arch/risc-v/common/include/tos_cpu_types.h new file mode 100644 index 00000000..a3f9285d --- /dev/null +++ b/arch/risc-v/common/include/tos_cpu_types.h @@ -0,0 +1,46 @@ +/* + * tos_cpu_types.h + * + * Created on: Sep 7, 2019 + * Author: ace + */ + +#ifndef _TOS_CPU_TYPES_H_ +#define _TOS_CPU_TYPES_H_ + +/* CPU address type based on address bus size. */ +#if (TOS_CFG_CPU_ADDR_SIZE == CPU_WORD_SIZE_32) +typedef uint32_t cpu_addr_t; +#elif (TOS_CFG_CPU_ADDR_SIZE == CPU_WORD_SIZE_16) +typedef uint16_t cpu_addr_t; +#else +typedef uint8_t cpu_addr_t; +#endif + +/* CPU data type based on data bus size. */ +#if (TOS_CFG_CPU_DATA_SIZE == CPU_WORD_SIZE_32) +typedef uint32_t cpu_data_t; +#elif (TOS_CFG_CPU_DATA_SIZE == CPU_WORD_SIZE_16) +typedef uint16_t cpu_data_t; +#else +typedef uint8_t cpu_data_t; +#endif + +#if (TOS_CFG_CPU_HRTIMER_EN > 0) +#if (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_08) +typedef uint8_t cpu_hrtimer_t; +#elif (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_16) +typedef uint16_t cpu_hrtimer_t; +#elif (TOS_CFG_CPU_HRTIMER_SIZE == CPU_WORD_SIZE_64) +typedef uint64_t cpu_hrtimer_t; +#else +typedef uint32_t cpu_hrtimer_t; +#endif +#else +typedef uint32_t cpu_hrtimer_t; +#endif + +//typedef cpu_addr_t size_t; +typedef cpu_addr_t cpu_cpsr_t; + +#endif diff --git a/arch/risc-v/common/include/tos_fault.h b/arch/risc-v/common/include/tos_fault.h new file mode 100644 index 00000000..5b9d34b2 --- /dev/null +++ b/arch/risc-v/common/include/tos_fault.h @@ -0,0 +1,10 @@ +#ifndef _TOS_FAULT_H_ +#define _TOS_FAULT_H_ + +#if TOS_CFG_FAULT_BACKTRACE_EN > 0u + +#error "unsupport now" + +#endif + +#endif /* _TOS_FAULT_H_ */ diff --git a/arch/risc-v/common/tos_cpu.c b/arch/risc-v/common/tos_cpu.c new file mode 100644 index 00000000..ec7a7ebf --- /dev/null +++ b/arch/risc-v/common/tos_cpu.c @@ -0,0 +1,189 @@ +/* + * tos_cpu.c + * + * Created on: Sep 8, 2019 + * Author: ace + */ +#include +#include + + +__KERNEL__ void cpu_systick_init(k_cycle_t cycle_per_tick) +{ + port_systick_priority_set(TOS_CFG_CPU_SYSTICK_PRIO); + port_systick_config(cycle_per_tick); +} + +__KERNEL__ void cpu_init(void) { + k_cpu_cycle_per_tick = TOS_CFG_CPU_CLOCK / k_cpu_tick_per_second; + cpu_systick_init(k_cpu_cycle_per_tick); +} + +__API__ cpu_cpsr_t tos_cpu_cpsr_save(void) +{ + return port_cpsr_save(); +} + +__API__ void tos_cpu_cpsr_restore(cpu_cpsr_t cpsr) +{ + port_cpsr_restore(cpsr); +} + + +__KERNEL__ void cpu_context_switch(void) +{ + port_context_switch(); +} + +__KERNEL__ void cpu_irq_context_switch(void) +{ + port_irq_context_switch(); +} + +__KERNEL__ void cpu_sched_start(void) +{ + port_sched_start(); +} + +/* + +Inx Offset Register +31 124 x31 t6 +32 120 x30 t5 +29 116 x29 t4 +28 112 x28 t3 +27 108 x27 s11 +26 104 x26 s10 +25 100 x25 s9 +24 096 x24 s8 +23 092 x23 s7 +22 088 x22 s6 +21 084 x21 s5 +20 080 x20 s4 +19 076 x19 s3 +18 072 x18 s2 +17 068 x17 a7 +16 064 x16 a6 +15 060 x15 a5 +14 056 x14 a4 +13 052 x13 a3 +12 048 x12 a2 +11 044 x11 a1 +10 040 x10 a0 +09 036 x9 s1 +08 032 x8 s0/fp +07 028 x7 t2 +06 024 x6 t1 +05 020 x5 t0 +04 016 x4 tp +03 012 x3 gp +02 008 x1 ra +01 004 mstatus +00 000 epc + +*/ + +__KERNEL__ k_stack_t *cpu_task_stk_init(void *entry, + void *arg, + void *exit, + k_stack_t *stk_base, + size_t stk_size) +{ + cpu_data_t *sp = 0; + cpu_context_t *regs = 0; + + sp = (cpu_data_t *)&stk_base[stk_size]; + sp = (cpu_data_t *)((cpu_addr_t)(sp) & 0xFFFFFFF8); + + sp -= (sizeof(cpu_context_t)/sizeof(cpu_data_t)); + + regs = (cpu_context_t*) sp; + +#if 1 + for(int i=0; i<(sizeof(cpu_context_t)/sizeof(cpu_data_t)); i++) { + #define _V(v) ((unsigned int)((v/10) << 4 | (v % 10))) + *(sp + i) = (_V(i) << 24) | (_V(i) << 16) | (_V(i) << 8) | _V(i); + #undef _V + } +#endif + + regs->a0 = (cpu_data_t)arg; // a0: argument + regs->ra = (cpu_data_t)0xACE00ACE; // ra: return address + regs->mstatus = (cpu_data_t)(MSTATUS_MPP | MSTATUS_MPIE); // return to machine mode and enable interrupt + regs->epc = (cpu_data_t)entry; + + + return (k_stack_t*)sp; +} + +void cpu_trap_entry(cpu_data_t cause, cpu_context_t *regs) +{ + while(1) { + // TODO + } +} + +void SysTick_IRQHandler() { + port_systick_config(k_cpu_cycle_per_tick); + if(tos_knl_is_running()) { + tos_knl_irq_enter(); + tos_tick_handler(); + tos_knl_irq_leave(); + } +} + +void cpu_irq_entry(cpu_data_t irq, cpu_context_t *regs) +{ +#if 1 + if(irq != 7) { + return; + } + + SysTick_IRQHandler(); +#else + void (*irq_handler)(); + extern void (*handler_vector_table[])(); + + irq_handler = handler_vector_table[irq]; + if((*irq_handler) == 0) { + return; + } + + (*irq_handler)(); +#endif +} + +__API__ uint32_t tos_cpu_clz(uint32_t val) +{ + uint32_t nbr_lead_zeros = 0; + + if (!(val & 0XFFFF0000)) { + val <<= 16; + nbr_lead_zeros += 16; + } + + if (!(val & 0XFF000000)) { + val <<= 8; + nbr_lead_zeros += 8; + } + + if (!(val & 0XF0000000)) { + val <<= 4; + nbr_lead_zeros += 4; + } + + if (!(val & 0XC0000000)) { + val <<= 2; + nbr_lead_zeros += 2; + } + + if (!(val & 0X80000000)) { + nbr_lead_zeros += 1; + } + + if (!val) { + nbr_lead_zeros += 1; + } + + return (nbr_lead_zeros); +} diff --git a/arch/risc-v/rv32i/gcc/port.h b/arch/risc-v/rv32i/gcc/port.h new file mode 100644 index 00000000..a3da86ea --- /dev/null +++ b/arch/risc-v/rv32i/gcc/port.h @@ -0,0 +1,72 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#ifndef _PORT_H_ +#define _PORT_H_ + +__PORT__ void port_int_disable(void); + +__PORT__ void port_int_enable(void); + +__PORT__ cpu_cpsr_t port_cpsr_save(void); + +__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr); + +__PORT__ void port_cpu_reset(void); + +__PORT__ void port_sched_start(void) __NO_RETURN__; + +__PORT__ void port_context_switch(void); + +__PORT__ void port_irq_context_switch(void); + +__PORT__ void port_systick_config(uint32_t cycle_per_tick); + +__PORT__ void port_systick_priority_set(uint32_t prio); + +#if TOS_CFG_TICKLESS_EN > 0u + +__PORT__ void port_systick_resume(void); + +__PORT__ void port_systick_suspend(void); + +__PORT__ void port_systick_reload(uint32_t cycle_per_tick); + +__PORT__ void port_systick_pending_reset(void); + +__PORT__ k_time_t port_systick_max_delay_millisecond(void); + +#endif + +#if TOS_CFG_PWR_MGR_EN > 0u + +__PORT__ void port_sleep_mode_enter(void); + +__PORT__ void port_stop_mode_enter(void); + +__PORT__ void port_standby_mode_enter(void); + +#endif + + +#if TOS_CFG_FAULT_BACKTRACE_EN > 0u +__PORT__ void HardFault_Handler(void); + +__PORT__ void port_fault_diagnosis(void); +#endif + +#endif /* _PORT_H_ */ diff --git a/arch/risc-v/rv32i/gcc/port_c.c b/arch/risc-v/rv32i/gcc/port_c.c new file mode 100644 index 00000000..fcb9958d --- /dev/null +++ b/arch/risc-v/rv32i/gcc/port_c.c @@ -0,0 +1,49 @@ +/* + * port_c.c + * + * Created on: Sep 9, 2019 + * Author: ace + */ +#include "riscv_encoding.h" +#include + +#define CLINT_CTRL_ADDR 0x2000000 +#define CLINT_MSIP 0x0000 +#define CLINT_MTIMECMP 0x4000 +#define CLINT_MTIME 0xBFF8 + +__PORT__ void port_systick_config(uint32_t cycle_per_tick) +{ + + // it cost cpu read two times, first mtime_lo and then mtime_hi + // if mtime_lo == 0xFFFFFFFF and mtime_hi = 0 at first read + // then mtime_lo == 0 and mtime_hi = 1 at next read + // the result will be 0x1FFFFFFFF, not 0x100000000 + uint64_t mtime = 0; + while(1) { + uint32_t mtime_hi = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4); + uint32_t mtime_lo = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 0); + uint32_t mtime_hn = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4); + if(mtime_hi == mtime_hn) { + mtime += ((uint64_t)mtime_hi << 32) | mtime_lo; + break; + } + } + + // just set mtime to mtimecmp does not accurately reflect the passage of time + // cause some time cost on the path to deal with the interrupt + // so, we need to to fix the value with a multiple of cycle_per_tick + uint64_t tick = mtime / cycle_per_tick; + uint64_t mtimecmp = (tick + 1) * cycle_per_tick; + + + // write to mtimecmp register + *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF; + *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = 0xFFFFFFFF & (mtimecmp >> 32); + *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF & (mtimecmp >> 0); +} + +__PORT__ void port_systick_priority_set(uint32_t prio) +{ + //NVIC_SetPriority(SysTick_IRQn, prio); +} diff --git a/arch/risc-v/rv32i/gcc/port_config.h b/arch/risc-v/rv32i/gcc/port_config.h new file mode 100644 index 00000000..9a8a5e2b --- /dev/null +++ b/arch/risc-v/rv32i/gcc/port_config.h @@ -0,0 +1,27 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#ifndef _PORT_CONFIG_H_ +#define _PORT_CONFIG_H_ + +#define TOS_CFG_CPU_ADDR_SIZE CPU_WORD_SIZE_32 +#define TOS_CFG_CPU_DATA_SIZE CPU_WORD_SIZE_32 +#define TOS_CFG_CPU_STK_GROWTH CPU_STK_GROWTH_DESCENDING +#define TOS_CFG_CPU_HRTIMER_EN 0u +#define TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT 0u + +#endif /* _PORT_CONFIG_H_ */ diff --git a/arch/risc-v/rv32i/gcc/port_s.S b/arch/risc-v/rv32i/gcc/port_s.S new file mode 100644 index 00000000..a7153dc0 --- /dev/null +++ b/arch/risc-v/rv32i/gcc/port_s.S @@ -0,0 +1,258 @@ +.global port_int_disable +.global port_int_enable + +.global port_cpsr_save +.global port_cpsr_restore + +.global port_systick_resume +.global port_systick_suspend +.global port_systick_pending_reset + +.global port_sched_start +.global port_context_switch +.global port_irq_context_switch + +.extern k_curr_task +.extern k_next_task + + +#include "riscv_encoding.h" + +.text +.align 2 + +.type port_int_disable, %function +port_int_disable: + csrci mstatus, MSTATUS_MIE + ret + +.type port_int_enable, %function +port_int_enable: + csrsi mstatus, MSTATUS_MIE + ret + +.type port_cpsr_save, %function +port_cpsr_save: + csrrci a0, mstatus, MSTATUS_MIE + ret + +.type port_cpsr_restore, %function +port_cpsr_restore: + csrw mstatus, a0 + ret + +.type port_systick_resume, %function +port_systick_resume: + li t0, MIE_MTIE + csrs mie, t0 + ret + +.type port_systick_suspend, %function +port_systick_suspend: + li t0, MIE_MTIE + csrc mie, t0 + ret + +.type port_systick_pending_reset, %function +port_systick_pending_reset: + li t0, MIP_MTIP + csrc mip, t0 + ret + +#define REGBYTES 4 + +.macro SAVE_CONTEXT + addi sp, sp, -32*REGBYTES + sw x1, 2*REGBYTES(sp) + sw x3, 3*REGBYTES(sp) + sw x4, 4*REGBYTES(sp) + sw x5, 5*REGBYTES(sp) + sw x6, 6*REGBYTES(sp) + sw x7, 7*REGBYTES(sp) + sw x8, 8*REGBYTES(sp) + sw x9, 9*REGBYTES(sp) + sw x10, 10*REGBYTES(sp) + sw x11, 11*REGBYTES(sp) + sw x12, 12*REGBYTES(sp) + sw x13, 13*REGBYTES(sp) + sw x14, 14*REGBYTES(sp) + sw x15, 15*REGBYTES(sp) + sw x16, 16*REGBYTES(sp) + sw x17, 17*REGBYTES(sp) + sw x18, 18*REGBYTES(sp) + sw x19, 19*REGBYTES(sp) + sw x20, 20*REGBYTES(sp) + sw x21, 21*REGBYTES(sp) + sw x22, 22*REGBYTES(sp) + sw x23, 23*REGBYTES(sp) + sw x24, 24*REGBYTES(sp) + sw x25, 25*REGBYTES(sp) + sw x26, 26*REGBYTES(sp) + sw x27, 27*REGBYTES(sp) + sw x28, 28*REGBYTES(sp) + sw x29, 29*REGBYTES(sp) + sw x30, 30*REGBYTES(sp) + sw x31, 31*REGBYTES(sp) +.endm + +.macro RESTORE_CONTEXT + lw t0, 0*REGBYTES(sp) + csrw mepc, t0 + + lw t0, 1*REGBYTES(sp) + csrw mstatus, t0 + + lw x1, 2*REGBYTES(sp) + lw x3, 3*REGBYTES(sp) + lw x4, 4*REGBYTES(sp) + lw x5, 5*REGBYTES(sp) + lw x6, 6*REGBYTES(sp) + lw x7, 7*REGBYTES(sp) + lw x8, 8*REGBYTES(sp) + lw x9, 9*REGBYTES(sp) + lw x10, 10*REGBYTES(sp) + lw x11, 11*REGBYTES(sp) + lw x12, 12*REGBYTES(sp) + lw x13, 13*REGBYTES(sp) + lw x14, 14*REGBYTES(sp) + lw x15, 15*REGBYTES(sp) + lw x16, 16*REGBYTES(sp) + lw x17, 17*REGBYTES(sp) + lw x18, 18*REGBYTES(sp) + lw x19, 19*REGBYTES(sp) + lw x20, 20*REGBYTES(sp) + lw x21, 21*REGBYTES(sp) + lw x22, 22*REGBYTES(sp) + lw x23, 23*REGBYTES(sp) + lw x24, 24*REGBYTES(sp) + lw x25, 25*REGBYTES(sp) + lw x26, 26*REGBYTES(sp) + lw x27, 27*REGBYTES(sp) + lw x28, 28*REGBYTES(sp) + lw x29, 29*REGBYTES(sp) + lw x30, 30*REGBYTES(sp) + lw x31, 31*REGBYTES(sp) + + addi sp, sp, 32*REGBYTES +.endm + +.align 2 +context_switch_return: +irq_context_return: + ret + +.align 2 +.type port_sched_start, %function +port_sched_start: + // enable timer interrupt + li t0, MIE_MTIE + csrs mie, t0 + + // load sp from k_curr_task->sp + la t0, k_curr_task // t0 = &k_curr_task + lw t0, (t0) // t0 = &(k_curr_task->sp) + lw sp, (t0) // sp = k_curr_task->sp + + // save sp to stack + addi t1, sp, 32*REGBYTES + sw t1, (t0) + + RESTORE_CONTEXT + + mret + + +.align 2 +.type port_context_switch, %function +port_context_switch: + SAVE_CONTEXT + + // return from port_context_switch as return from a function + la t0, context_switch_return + sw t0, 0*REGBYTES(sp) + + csrr t0, mstatus + li t1, MSTATUS_MPP + or t0, t0, t1 + sw t0, 1*REGBYTES(sp) + + // save sp to k_curr_task.sp + la t0, k_curr_task // t0 = &k_curr_task + lw t1, (t0) + sw sp, (t1) + + // switch task + // k_curr_task = k_next_task + la t1, k_next_task // t1 = &k_next_task + lw t1, (t1) // t1 = k_next_task + sw t1, (t0) + + // load new task sp + lw sp, (t1) + + RESTORE_CONTEXT + + mret + + +.align 2 +.type port_irq_context_switch, %function +port_irq_context_switch: + SAVE_CONTEXT + + + la t0, irq_context_return + sw t0, 0*REGBYTES(sp) + + li t0, MSTATUS_MPP + sw t0, 1*REGBYTES(sp) + + // save sp to k_curr_task.sp + la t0, k_curr_task // t0 = &k_curr_task + lw t1, (t0) + sw sp, (t1) + + // switch task + // k_curr_task = k_next_task + la t1, k_next_task // t1 = &k_next_task + lw t1, (t1) // t1 = k_next_task + sw t1, (t0) + + // load new task sp + lw sp, (t1) + + RESTORE_CONTEXT + + mret + + +.align 2 +.global machine_trap_entry +machine_trap_entry: + SAVE_CONTEXT + + csrr t0, mepc + sw t0, 0*REGBYTES(sp) + + csrr t0, mstatus + sw t0, 1*REGBYTES(sp) + + // save sp to k_curr_task.sp + la t0, k_curr_task // t0 = &k_curr_task + lw t1, (t0) + sw sp, (t1) + + csrr a0, mcause + mv a1, sp + bltz a0, irq + call cpu_trap_entry + j restore +irq: + slli a0, a0, 1 + srli a0, a0, 1 + call cpu_irq_entry +restore: + RESTORE_CONTEXT + + mret + diff --git a/board/QEMU_Spike/GCC/demo/Makefile b/board/QEMU_Spike/GCC/demo/Makefile new file mode 100644 index 00000000..8b6a96e6 --- /dev/null +++ b/board/QEMU_Spike/GCC/demo/Makefile @@ -0,0 +1,193 @@ +########################################################################################################################## +# File automatically-generated by tool: [projectgenerator] version: [3.3.0] date: [Mon Aug 05 10:29:11 CST 2019] +########################################################################################################################## + +# ------------------------------------------------ +# Generic Makefile (based on gcc) +# +# ChangeLog : +# 2017-02-10 - Several enhancements + project update mode +# 2015-07-22 - first version +# ------------------------------------------------ + +###################################### +# target +###################################### +TARGET = demo + + +###################################### +# building variables +###################################### +# debug build? +DEBUG = 1 +# optimization +OPT = -O0 + +TOP_DIR = ../../../.. +####################################### +# paths +####################################### +# Build path +BUILD_DIR = build + +###################################### +# source +###################################### +# C sources +KERNEL_SRC = \ + ${wildcard $(TOP_DIR)/kernel/core/*.c} + C_SOURCES += $(KERNEL_SRC) + +ARCH_SRC = \ + ${wildcard $(TOP_DIR)/arch/risc-v/rv32i/gcc/*.c} \ + ${wildcard $(TOP_DIR)/arch/risc-v/common/*.c} + C_SOURCES += $(ARCH_SRC) + +HAL_DRIVER_SRC = \ + $(TOP_DIR)/board/QEMU_Spike/Src/main.c + C_SOURCES += $(HAL_DRIVER_SRC) + +# ASM sources +ASM_SOURCES = + +ASM_SOURCES_S = \ +$(TOP_DIR)/arch/risc-v/rv32i/gcc/port_s.S \ +start.S + + +####################################### +# binaries +####################################### +PREFIX = riscv-none-embed- +# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) +# either it can be added to the PATH environment variable. +ifdef GCC_PATH +CC = $(GCC_PATH)/$(PREFIX)gcc +AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp +CP = $(GCC_PATH)/$(PREFIX)objcopy +SZ = $(GCC_PATH)/$(PREFIX)size +else +CC = $(PREFIX)gcc +AS = $(PREFIX)gcc -x assembler-with-cpp +CP = $(PREFIX)objcopy +SZ = $(PREFIX)size +endif +HEX = $(CP) -O ihex +BIN = $(CP) -O binary -S + +####################################### +# CFLAGS +####################################### +# cpu +CPU = -march=rv32imac + +# fpu +FPU = + +# float-abi +FLOAT-ABI = + +# mcu +MCU = $(CPU) $(FPU) $(FLOAT-ABI) + +# macros for gcc +# AS defines +AS_DEFS = + +# C defines +C_DEFS = + +# AS includes +AS_INCLUDES = + +# C includes +KERNEL_INC = \ + -I $(TOP_DIR)/kernel/core/include \ + -I $(TOP_DIR)/kernel/pm/include \ + -I $(TOP_DIR)/kernel/hal/include \ + -I $(TOP_DIR)/arch/risc-v/common/include \ + -I $(TOP_DIR)/arch/risc-v/rv32i/gcc \ + -I $(TOP_DIR)/board/QEMU_Spike/TOS-CONFIG + C_INCLUDES += $(KERNEL_INC) +CMSIS_INC = + +HAL_DRIVER_INC = \ + -I $(TOP_DIR)/board/QEMU_Spike/Inc \ + C_INCLUDES += $(HAL_DRIVER_INC) + +# compile gcc flags +ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -mabi=ilp32 -msmall-data-limit=8 -mno-save-restore + +CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections -mabi=ilp32 -msmall-data-limit=8 -mno-save-restore -std=gnu11 --specs=nosys.specs -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections + +ifeq ($(DEBUG), 1) +CFLAGS += -g +endif + + +# Generate dependency information +CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" + + +####################################### +# LDFLAGS +####################################### +# link script +LDSCRIPT = link.ld + +# libraries +LIBS = -lc -lm -lnosys +LIBDIR = +LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections -nostartfiles + +# default action: build all +all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin + + +####################################### +# build the application +####################################### +# list of objects +OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) +vpath %.c $(sort $(dir $(C_SOURCES))) +# list of ASM program objects +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) +vpath %.s $(sort $(dir $(ASM_SOURCES))) +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o))) +vpath %.S $(sort $(dir $(ASM_SOURCES_S))) + +$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) + $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile + $(CC) $(OBJECTS) $(LDFLAGS) -o $@ + $(SZ) $@ + +$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(HEX) $< $@ + +$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(BIN) $< $@ + +$(BUILD_DIR): + mkdir $@ + +####################################### +# clean up +####################################### +clean: + -rm -fR $(BUILD_DIR) + +####################################### +# dependencies +####################################### +-include $(wildcard $(BUILD_DIR)/*.d) + +# *** EOF *** diff --git a/board/QEMU_Spike/GCC/demo/link.ld b/board/QEMU_Spike/GCC/demo/link.ld new file mode 100644 index 00000000..bc3eb43f --- /dev/null +++ b/board/QEMU_Spike/GCC/demo/link.ld @@ -0,0 +1,51 @@ +OUTPUT_ARCH( "riscv" ) +ENTRY( _start ) + +MEMORY +{ + ROM (rxai!w) : ORIGIN = 0x80000000, LENGTH = 512K + RAM (wxa!ri) : ORIGIN = 0x84000000, LENGTH = 128K +} + +SECTIONS +{ + .text : { + PROVIDE( _text = . ); + *(.text.entry) + *(.text) + *(.rodata) + PROVIDE( _etext = . ); + } >ROM AT>ROM + + . = ALIGN(4); + _load_data = LOADADDR(.data); + + . = ALIGN(4); + .data : { + PROVIDE( _data = . ); + *(.data) + . = ALIGN(4); + } >RAM AT>ROM + . = ALIGN(4); + PROVIDE( _edata = . ); + + . = ALIGN(0x1000); + PROVIDE( _bss = . ); + .bss : { + *(.bss) + } >RAM AT>RAM + . = ALIGN(4); + PROVIDE( _ebss = . ); + + + . = ALIGN(8); + PROVIDE( end = . ); + + _stack_size = 128; + .stack ORIGIN(RAM) + LENGTH(RAM) - _stack_size : + { + . = _stack_size; + PROVIDE( _stack_top = . ); + } >RAM AT>RAM + _end = .; +} diff --git a/board/QEMU_Spike/GCC/demo/start.S b/board/QEMU_Spike/GCC/demo/start.S new file mode 100644 index 00000000..30b04422 --- /dev/null +++ b/board/QEMU_Spike/GCC/demo/start.S @@ -0,0 +1,41 @@ +// See LICENSE for license details. + +#include "riscv_encoding.h" + +.section .text.entry + .globl _start + .type _start,@function +_start: + csrc mstatus, MSTATUS_MIE + csrw mie, 0 + + la t0, machine_trap_entry + csrw mtvec, t0 + + la sp, _stack_top + + /* Load data section */ + la a0, _load_data + la a1, _data + la a2, _edata + bgeu a1, a2, begin_clear_bss +clear_data: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, clear_data + +begin_clear_bss: + // clear bss section + la a0, _bss + la a1, _ebss + bgeu a0, a1, init_finish +clear_bss: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, clear_bss +init_finish: + call main +__die: + j __die diff --git a/board/QEMU_Spike/Src/main.c b/board/QEMU_Spike/Src/main.c new file mode 100644 index 00000000..406c6e84 --- /dev/null +++ b/board/QEMU_Spike/Src/main.c @@ -0,0 +1,62 @@ +/* + * main.c + * + * Created on: Sep 13, 2019 + * Author: ace + */ + +#include "tos.h" + +#define TASK_SIZE 512 +k_task_t k_task_task1; +k_task_t k_task_task2; +uint8_t k_task1_stk[TASK_SIZE]; +uint8_t k_task2_stk[TASK_SIZE]; + +int share = 123; +void task1(void *pdata) +{ + int t1 = 0; + while(1) + { + t1++; + share++; + //k_tick_t delay = tos_millisec2tick(10); + //tos_task_delay(delay); + tos_task_yield(); + //osDelay(10); + //asm("wfi;"); + } +} + +void task2(void *pdata) +{ + int t2 = 0; + while(1) + { + t2--; + share--; + //tos_task_delay(10); + tos_task_yield(); + asm("wfi;"); + } +} + +int main(void) +{ + tos_knl_init(); + + tos_task_create(&k_task_task1, "task1", task1, NULL, 3, k_task1_stk, TASK_SIZE, 0); + tos_task_create(&k_task_task2, "task2", task2, NULL, 3, k_task2_stk, TASK_SIZE, 0); + + tos_knl_start(); + + + int c = 0; + while(1) + { + c++; + asm("wfi;"); + } + +} diff --git a/board/QEMU_Spike/TOS-CONFIG/tos_config.h b/board/QEMU_Spike/TOS-CONFIG/tos_config.h new file mode 100644 index 00000000..501ec378 --- /dev/null +++ b/board/QEMU_Spike/TOS-CONFIG/tos_config.h @@ -0,0 +1,54 @@ +/* + * tos_config.h + * + * Created on: Sep 7, 2019 + * Author: ace + */ + +#ifndef INC_TOS_CONFIG_H_ +#define INC_TOS_CONFIG_H_ + +#include "stddef.h" + +#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量 + +#define TOS_CFG_ROUND_ROBIN_EN 0u // 配置TencentOS tiny的内核是否开启时间片轮转 + +#define TOS_CFG_OBJECT_VERIFY 0u // 配置TencentOS tiny是否校验指针合法 + +#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏 + +#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块 + +#define TOS_CFG_MMHEAP_POOL_SIZE 8192 // 配置TencentOS tiny动态内存池大小 + +#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块 + +#define TOS_CFG_QUEUE_EN 1u // 配置TencentOS tiny是否开启队列模块 + +#define TOS_CFG_TIMER_EN 0u // 配置TencentOS tiny是否开启软件定时器模块 + +#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块 + +#if (TOS_CFG_QUEUE_EN > 0u) +#define TOS_CFG_MSG_EN 1u +#else +#define TOS_CFG_MSG_EN 0u +#endif + +#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小 + +#define TOS_CFG_IDLE_TASK_STK_SIZE 512u // 配置TencentOS tiny空闲任务栈大小 + +#define TOS_CFG_CPU_TICK_PER_SECOND 1000u // 配置TencentOS tiny的tick频率 + +#define TOS_CFG_CPU_CLOCK 108000000 // 配置TencentOS tiny CPU频率 + +#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式 + +#define TOS_CFG_VFS_EN 1u + +#define TOS_CFG_MMBLK_EN 1u + + +#endif /* INC_TOS_CONFIG_H_ */ diff --git a/board/QEMU_Spike/eclipse/demo/.cproject b/board/QEMU_Spike/eclipse/demo/.cproject new file mode 100644 index 00000000..895eea06 --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.cproject @@ -0,0 +1,432 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/board/QEMU_Spike/eclipse/demo/.gitignore b/board/QEMU_Spike/eclipse/demo/.gitignore new file mode 100644 index 00000000..3df573fe --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/board/QEMU_Spike/eclipse/demo/.project b/board/QEMU_Spike/eclipse/demo/.project new file mode 100644 index 00000000..dd81e27f --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.project @@ -0,0 +1,63 @@ + + + demo + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + Inc + 2 + $%7BPARENT-2-PROJECT_LOC%7D/Inc + + + Src + 2 + $%7BPARENT-2-PROJECT_LOC%7D/Src + + + TOS-CONFIG + 2 + $%7BPARENT-2-PROJECT_LOC%7D/TOS-CONFIG + + + TencentOS_tiny + 2 + virtual:/virtual + + + TencentOS_tiny/arch + 2 + virtual:/virtual + + + TencentOS_tiny/kernel + 2 + $%7BPARENT-4-PROJECT_LOC%7D/kernel + + + TencentOS_tiny/arch/risc-v + 2 + $%7BPARENT-4-PROJECT_LOC%7D/arch/risc-v + + + diff --git a/board/QEMU_Spike/eclipse/demo/.settings/language.settings.xml b/board/QEMU_Spike/eclipse/demo/.settings/language.settings.xml new file mode 100644 index 00000000..975049f4 --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.settings/language.settings.xml @@ -0,0 +1,48 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.cdt.codan.core.prefs b/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 00000000..77496f55 --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,75 @@ +eclipse.preferences.version=1 +org.eclipse.cdt.codan.checkers.errnoreturn=Warning +org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false} +org.eclipse.cdt.codan.checkers.errreturnvalue=Error +org.eclipse.cdt.codan.checkers.errreturnvalue.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused return value\\")"} +org.eclipse.cdt.codan.checkers.nocommentinside=-Error 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redefinition\\")"} +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"} +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem=-Warning +org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"} +org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem=Warning 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+org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")} +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=Error +org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"} +org.eclipse.cdt.qt.core.qtproblem=Warning +org.eclipse.cdt.qt.core.qtproblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>false,RUN_ON_INC_BUILD\=>false,RUN_ON_FILE_OPEN\=>true,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>null} diff --git a/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.ltk.core.refactoring.prefs b/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.ltk.core.refactoring.prefs new file mode 100644 index 00000000..b196c64a --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/.settings/org.eclipse.ltk.core.refactoring.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false diff --git a/board/QEMU_Spike/eclipse/demo/link.ld b/board/QEMU_Spike/eclipse/demo/link.ld new file mode 100644 index 00000000..a4e704dd --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/link.ld @@ -0,0 +1,50 @@ +OUTPUT_ARCH( "riscv" ) +ENTRY( _start ) + +MEMORY +{ + ROM (rxai!w) : ORIGIN = 0x80000000, LENGTH = 512K + RAM (wxa!ri) : ORIGIN = 0x84000000, LENGTH = 128K +} + +SECTIONS +{ + .text : { + PROVIDE( _text = . ); + *(.text.entry) + *(.text) + *(.rodata) + PROVIDE( _etext = . ); + } >ROM AT>ROM + + . = ALIGN(4); + _load_data = LOADADDR(.data); + + . = ALIGN(4); + .data : { + PROVIDE( _data = . ); + *(.data) + . = ALIGN(4); + } >RAM AT>ROM + . = ALIGN(4); + PROVIDE( _edata = . ); + + . = ALIGN(0x1000); + PROVIDE( _bss = . ); + .bss : { + *(.bss) + } >RAM AT>RAM + . = ALIGN(4); + PROVIDE( _ebss = . ); + + + . = ALIGN(8); + PROVIDE( end = . ); + + _stack_size = 128; + .stack ORIGIN(RAM) + LENGTH(RAM) - _stack_size : + { + . = _stack_size; + PROVIDE( _stack_top = . ); + } >RAM AT>RAM +} \ No newline at end of file diff --git a/board/QEMU_Spike/eclipse/demo/start.S b/board/QEMU_Spike/eclipse/demo/start.S new file mode 100644 index 00000000..30b04422 --- /dev/null +++ b/board/QEMU_Spike/eclipse/demo/start.S @@ -0,0 +1,41 @@ +// See LICENSE for license details. + +#include "riscv_encoding.h" + +.section .text.entry + .globl _start + .type _start,@function +_start: + csrc mstatus, MSTATUS_MIE + csrw mie, 0 + + la t0, machine_trap_entry + csrw mtvec, t0 + + la sp, _stack_top + + /* Load data section */ + la a0, _load_data + la a1, _data + la a2, _edata + bgeu a1, a2, begin_clear_bss +clear_data: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, clear_data + +begin_clear_bss: + // clear bss section + la a0, _bss + la a1, _ebss + bgeu a0, a1, init_finish +clear_bss: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, clear_bss +init_finish: + call main +__die: + j __die