支持BLE设备接入“腾讯连连”小程序
This commit is contained in:
@@ -238,11 +238,11 @@
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// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver
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//==========================================================
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#ifndef NRFX_GPIOTE_ENABLED
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#define NRFX_GPIOTE_ENABLED 0
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#define NRFX_GPIOTE_ENABLED 1
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#endif
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// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
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#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
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#endif
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// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
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@@ -42,6 +42,8 @@
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extern "C" {
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#endif
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#include "apply_old_config.h"
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int NVIC_IRQ_IS_ENABLED(unsigned int irq);
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unsigned int nrfx_enter_critical(void);
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void nrfx_exit_critical(unsigned int ctx);
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@@ -61,12 +63,13 @@ void nrfx_exit_critical(unsigned int ctx);
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//------------------------------------------------------------------------------
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#include <nrf_assert.h>
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/**
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* @brief Macro for placing a runtime assertion.
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*
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* @param expression Expression to evaluate.
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*/
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#define NRFX_ASSERT(expression)
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#define NRFX_ASSERT(expression) ASSERT(expression)
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/**
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* @brief Macro for placing a compile time assertion.
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@@ -230,15 +233,38 @@ void nrfx_exit_critical(unsigned int ctx);
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#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
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//------------------------------------------------------------------------------
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#ifndef NRFX_CUSTOM_ERROR_CODES
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#include <sdk_errors.h>
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/**
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* @brief When set to a non-zero value, this macro specifies that the
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* @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
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* @ref nrfx_error_codes and the @ref ret_code_t type itself are defined
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* in a customized way and the default definitions from @c <nrfx_error.h>
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* should not be used.
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*/
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#define NRFX_CUSTOM_ERROR_CODES 0
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#define NRFX_CUSTOM_ERROR_CODES 1
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typedef ret_code_t nrfx_err_t;
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#define NRFX_SUCCESS NRF_SUCCESS
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#define NRFX_ERROR_INTERNAL NRF_ERROR_INTERNAL
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#define NRFX_ERROR_NO_MEM NRF_ERROR_NO_MEM
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#define NRFX_ERROR_NOT_SUPPORTED NRF_ERROR_NOT_SUPPORTED
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#define NRFX_ERROR_INVALID_PARAM NRF_ERROR_INVALID_PARAM
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#define NRFX_ERROR_INVALID_STATE NRF_ERROR_INVALID_STATE
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#define NRFX_ERROR_INVALID_LENGTH NRF_ERROR_INVALID_LENGTH
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#define NRFX_ERROR_TIMEOUT NRF_ERROR_TIMEOUT
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#define NRFX_ERROR_FORBIDDEN NRF_ERROR_FORBIDDEN
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#define NRFX_ERROR_NULL NRF_ERROR_NULL
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#define NRFX_ERROR_INVALID_ADDR NRF_ERROR_INVALID_ADDR
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#define NRFX_ERROR_BUSY NRF_ERROR_BUSY
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#define NRFX_ERROR_ALREADY_INITIALIZED NRF_ERROR_MODULE_ALREADY_INITIALIZED
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#define NRFX_ERROR_DRV_TWI_ERR_OVERRUN NRF_ERROR_DRV_TWI_ERR_OVERRUN
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#define NRFX_ERROR_DRV_TWI_ERR_ANACK NRF_ERROR_DRV_TWI_ERR_ANACK
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#define NRFX_ERROR_DRV_TWI_ERR_DNACK NRF_ERROR_DRV_TWI_ERR_DNACK
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#endif // NRFX_CUSTOM_ERROR_CODES
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//------------------------------------------------------------------------------
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/**
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@@ -1943,7 +1943,7 @@
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#endif
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// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
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#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
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#endif
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// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
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@@ -7088,7 +7088,7 @@
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// <e> NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library
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//==========================================================
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#ifndef NRF_FSTORAGE_ENABLED
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#define NRF_FSTORAGE_ENABLED 0
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#define NRF_FSTORAGE_ENABLED 1
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#endif
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// <h> nrf_fstorage - Common settings
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@@ -0,0 +1,21 @@
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/*
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* Auto generated Run-Time-Environment Configuration File
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* *** Do not modify ! ***
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*
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* Project: 'TencentOS_tiny'
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* Target: 'TencentOS_tiny'
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*/
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#ifndef RTE_COMPONENTS_H
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#define RTE_COMPONENTS_H
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/*
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* Define the Device Header File:
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*/
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#define CMSIS_device_header "nrf.h"
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#endif /* RTE_COMPONENTS_H */
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1401
board/Nordic_NRF52832/KEIL/llsync/TencentOS_tiny.uvprojx
Normal file
1401
board/Nordic_NRF52832/KEIL/llsync/TencentOS_tiny.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
371
board/Nordic_NRF52832/KEIL/llsync/arm_startup_nrf52.s
Normal file
371
board/Nordic_NRF52832/KEIL/llsync/arm_startup_nrf52.s
Normal file
@@ -0,0 +1,371 @@
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; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
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;
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; SPDX-License-Identifier: Apache-2.0
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;
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; Licensed under the Apache License, Version 2.0 (the License); you may
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; not use this file except in compliance with the License.
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; You may obtain a copy of the License at
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;
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; www.apache.org/licenses/LICENSE-2.0
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;
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; Unless required by applicable law or agreed to in writing, software
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; distributed under the License is distributed on an AS IS BASIS, WITHOUT
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; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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; See the License for the specific language governing permissions and
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; limitations under the License.
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;
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; NOTICE: This file has been modified by Nordic Semiconductor ASA.
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IF :DEF: __STARTUP_CONFIG
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#ifdef __STARTUP_CONFIG
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#include "startup_config.h"
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#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
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#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
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#endif
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#endif
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ENDIF
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IF :DEF: __STARTUP_CONFIG
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Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE
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ELIF :DEF: __STACK_SIZE
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Stack_Size EQU __STACK_SIZE
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ELSE
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Stack_Size EQU 8192
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ENDIF
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IF :DEF: __STARTUP_CONFIG
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Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT
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ELSE
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Stack_Align EQU 3
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ENDIF
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AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align
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Stack_Mem SPACE Stack_Size
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__initial_sp
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IF :DEF: __STARTUP_CONFIG
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Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE
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ELIF :DEF: __HEAP_SIZE
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Heap_Size EQU __HEAP_SIZE
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ELSE
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Heap_Size EQU 8192
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ENDIF
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD MemoryManagement_Handler
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DCD BusFault_Handler
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DCD UsageFault_Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler
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DCD DebugMon_Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD POWER_CLOCK_IRQHandler
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DCD RADIO_IRQHandler
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DCD UARTE0_UART0_IRQHandler
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DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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DCD NFCT_IRQHandler
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DCD GPIOTE_IRQHandler
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DCD SAADC_IRQHandler
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DCD TIMER0_IRQHandler
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DCD TIMER1_IRQHandler
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DCD TIMER2_IRQHandler
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DCD RTC0_IRQHandler
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DCD TEMP_IRQHandler
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DCD RNG_IRQHandler
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DCD ECB_IRQHandler
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DCD CCM_AAR_IRQHandler
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DCD WDT_IRQHandler
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DCD RTC1_IRQHandler
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DCD QDEC_IRQHandler
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DCD COMP_LPCOMP_IRQHandler
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DCD SWI0_EGU0_IRQHandler
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DCD SWI1_EGU1_IRQHandler
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DCD SWI2_EGU2_IRQHandler
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DCD SWI3_EGU3_IRQHandler
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DCD SWI4_EGU4_IRQHandler
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DCD SWI5_EGU5_IRQHandler
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DCD TIMER3_IRQHandler
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DCD TIMER4_IRQHandler
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DCD PWM0_IRQHandler
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DCD PDM_IRQHandler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD MWU_IRQHandler
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DCD PWM1_IRQHandler
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DCD PWM2_IRQHandler
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DCD SPIM2_SPIS2_SPI2_IRQHandler
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DCD RTC2_IRQHandler
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DCD I2S_IRQHandler
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DCD FPU_IRQHandler
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DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
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||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset Handler
|
||||
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemoryManagement_Handler\
|
||||
PROC
|
||||
EXPORT MemoryManagement_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT POWER_CLOCK_IRQHandler [WEAK]
|
||||
EXPORT RADIO_IRQHandler [WEAK]
|
||||
EXPORT UARTE0_UART0_IRQHandler [WEAK]
|
||||
EXPORT SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler [WEAK]
|
||||
EXPORT SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler [WEAK]
|
||||
EXPORT NFCT_IRQHandler [WEAK]
|
||||
EXPORT GPIOTE_IRQHandler [WEAK]
|
||||
EXPORT SAADC_IRQHandler [WEAK]
|
||||
EXPORT TIMER0_IRQHandler [WEAK]
|
||||
EXPORT TIMER1_IRQHandler [WEAK]
|
||||
EXPORT TIMER2_IRQHandler [WEAK]
|
||||
EXPORT RTC0_IRQHandler [WEAK]
|
||||
EXPORT TEMP_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT ECB_IRQHandler [WEAK]
|
||||
EXPORT CCM_AAR_IRQHandler [WEAK]
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT RTC1_IRQHandler [WEAK]
|
||||
EXPORT QDEC_IRQHandler [WEAK]
|
||||
EXPORT COMP_LPCOMP_IRQHandler [WEAK]
|
||||
EXPORT SWI0_EGU0_IRQHandler [WEAK]
|
||||
EXPORT SWI1_EGU1_IRQHandler [WEAK]
|
||||
EXPORT SWI2_EGU2_IRQHandler [WEAK]
|
||||
EXPORT SWI3_EGU3_IRQHandler [WEAK]
|
||||
EXPORT SWI4_EGU4_IRQHandler [WEAK]
|
||||
EXPORT SWI5_EGU5_IRQHandler [WEAK]
|
||||
EXPORT TIMER3_IRQHandler [WEAK]
|
||||
EXPORT TIMER4_IRQHandler [WEAK]
|
||||
EXPORT PWM0_IRQHandler [WEAK]
|
||||
EXPORT PDM_IRQHandler [WEAK]
|
||||
EXPORT MWU_IRQHandler [WEAK]
|
||||
EXPORT PWM1_IRQHandler [WEAK]
|
||||
EXPORT PWM2_IRQHandler [WEAK]
|
||||
EXPORT SPIM2_SPIS2_SPI2_IRQHandler [WEAK]
|
||||
EXPORT RTC2_IRQHandler [WEAK]
|
||||
EXPORT I2S_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
POWER_CLOCK_IRQHandler
|
||||
RADIO_IRQHandler
|
||||
UARTE0_UART0_IRQHandler
|
||||
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
|
||||
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
|
||||
NFCT_IRQHandler
|
||||
GPIOTE_IRQHandler
|
||||
SAADC_IRQHandler
|
||||
TIMER0_IRQHandler
|
||||
TIMER1_IRQHandler
|
||||
TIMER2_IRQHandler
|
||||
RTC0_IRQHandler
|
||||
TEMP_IRQHandler
|
||||
RNG_IRQHandler
|
||||
ECB_IRQHandler
|
||||
CCM_AAR_IRQHandler
|
||||
WDT_IRQHandler
|
||||
RTC1_IRQHandler
|
||||
QDEC_IRQHandler
|
||||
COMP_LPCOMP_IRQHandler
|
||||
SWI0_EGU0_IRQHandler
|
||||
SWI1_EGU1_IRQHandler
|
||||
SWI2_EGU2_IRQHandler
|
||||
SWI3_EGU3_IRQHandler
|
||||
SWI4_EGU4_IRQHandler
|
||||
SWI5_EGU5_IRQHandler
|
||||
TIMER3_IRQHandler
|
||||
TIMER4_IRQHandler
|
||||
PWM0_IRQHandler
|
||||
PDM_IRQHandler
|
||||
MWU_IRQHandler
|
||||
PWM1_IRQHandler
|
||||
PWM2_IRQHandler
|
||||
SPIM2_SPIS2_SPI2_IRQHandler
|
||||
RTC2_IRQHandler
|
||||
I2S_IRQHandler
|
||||
FPU_IRQHandler
|
||||
B .
|
||||
ENDP
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap PROC
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, = (Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
1245
board/Nordic_NRF52832/KEIL/llsync/nimble/config/private_syscfg.h
Normal file
1245
board/Nordic_NRF52832/KEIL/llsync/nimble/config/private_syscfg.h
Normal file
File diff suppressed because it is too large
Load Diff
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