diff --git a/board/BDW01-STM32L496VG/BSP/.mxproject b/board/BDW01-STM32L496VG/BSP/.mxproject new file mode 100644 index 00000000..a3c69b4f --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/.mxproject @@ -0,0 +1,16 @@ +[PreviousGenFiles] +HeaderPath=D:/wml_work/TencentOS-tiny/board/bdw01OS/Inc +HeaderFiles=stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h;usb_device.h;usbd_conf.h;usbd_desc.h;usbd_custom_hid_if.h;usb_host.h;usbh_conf.h; +SourcePath=D:/wml_work/TencentOS-tiny/board/bdw01OS/Src +SourceFiles=stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c;usb_device.c;usbd_conf.c;usbd_desc.c;usbd_custom_hid_if.c;usb_host.c;usbh_conf.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_hcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_adc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_adc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dac.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dac_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_iwdg.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sai_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_sd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_sdmmc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_hcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l496xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\usb_host.c;..\Src\usbh_conf.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_hcd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_adc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dac_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_iwdg.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sai_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sd_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_sdmmc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;../\Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;D:/wml_work/TencentOS-tiny/board/bdw01OS//MDK-ARM/startup_stm32l496xx.s;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c; +HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Middlewares\ST\STM32_USB_Host_Library\Core\Inc;..\Middlewares\ST\STM32_USB_Host_Library\Class\CDC\Inc;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; + +[] +SourceFiles=;; + diff --git a/board/BDW01-STM32L496VG/BSP/BDW01-STM32L496VG.ioc b/board/BDW01-STM32L496VG/BSP/BDW01-STM32L496VG.ioc new file mode 100644 index 00000000..113ad85d --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/BDW01-STM32L496VG.ioc @@ -0,0 +1,544 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_3 +ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Rank-0\#ChannelRegularConversion=1 +ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 +ADC1.master=1 +Dma.Request0=SDMMC1_RX +Dma.Request1=SDMMC1_TX +Dma.RequestsNb=2 +Dma.SDMMC1_RX.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.SDMMC1_RX.0.Instance=DMA2_Channel4 +Dma.SDMMC1_RX.0.MemDataAlignment=DMA_MDATAALIGN_WORD +Dma.SDMMC1_RX.0.MemInc=DMA_MINC_ENABLE +Dma.SDMMC1_RX.0.Mode=DMA_NORMAL +Dma.SDMMC1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD +Dma.SDMMC1_RX.0.PeriphInc=DMA_PINC_DISABLE +Dma.SDMMC1_RX.0.Priority=DMA_PRIORITY_LOW +Dma.SDMMC1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority +Dma.SDMMC1_TX.1.Direction=DMA_MEMORY_TO_PERIPH +Dma.SDMMC1_TX.1.Instance=DMA2_Channel5 +Dma.SDMMC1_TX.1.MemDataAlignment=DMA_MDATAALIGN_WORD +Dma.SDMMC1_TX.1.MemInc=DMA_MINC_ENABLE +Dma.SDMMC1_TX.1.Mode=DMA_NORMAL +Dma.SDMMC1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD +Dma.SDMMC1_TX.1.PeriphInc=DMA_PINC_DISABLE +Dma.SDMMC1_TX.1.Priority=DMA_PRIORITY_LOW +Dma.SDMMC1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority +File.Version=6 +I2C2.IPParameters=Timing +I2C2.Timing=0x20303E5D +I2C3.I2C_Speed_Mode=I2C_Fast +I2C3.IPParameters=Timing,I2C_Speed_Mode +I2C3.Timing=0x2010091A +IWDG.IPParameters=Prescaler,Reload +IWDG.Prescaler=IWDG_PRESCALER_256 +IWDG.Reload=3999 +KeepUserPlacement=false +Mcu.Family=STM32L4 +Mcu.IP0=ADC1 +Mcu.IP1=DAC1 +Mcu.IP10=SDMMC1 +Mcu.IP11=SPI2 +Mcu.IP12=SYS +Mcu.IP13=TIM2 +Mcu.IP14=UART4 +Mcu.IP15=USART1 +Mcu.IP16=USART2 +Mcu.IP17=USART3 +Mcu.IP18=USB_HOST +Mcu.IP19=USB_OTG_FS +Mcu.IP2=DMA +Mcu.IP3=I2C2 +Mcu.IP4=I2C3 +Mcu.IP5=IWDG +Mcu.IP6=LPUART1 +Mcu.IP7=NVIC +Mcu.IP8=RCC +Mcu.IP9=SAI2 +Mcu.IPNb=20 +Mcu.Name=STM32L496V(E-G)Tx +Mcu.Package=LQFP100 +Mcu.Pin0=PE2 +Mcu.Pin1=PE3 +Mcu.Pin10=PC1 +Mcu.Pin11=PC2 +Mcu.Pin12=PA0 +Mcu.Pin13=PA1 +Mcu.Pin14=PA2 +Mcu.Pin15=PA3 +Mcu.Pin16=PA4 +Mcu.Pin17=PA5 +Mcu.Pin18=PA6 +Mcu.Pin19=PC4 +Mcu.Pin2=PE5 +Mcu.Pin20=PC5 +Mcu.Pin21=PB0 +Mcu.Pin22=PB1 +Mcu.Pin23=PB2 +Mcu.Pin24=PE7 +Mcu.Pin25=PE8 +Mcu.Pin26=PE9 +Mcu.Pin27=PE11 +Mcu.Pin28=PE12 +Mcu.Pin29=PE13 +Mcu.Pin3=PE6 +Mcu.Pin30=PE14 +Mcu.Pin31=PE15 +Mcu.Pin32=PB10 +Mcu.Pin33=PB11 +Mcu.Pin34=PB12 +Mcu.Pin35=PB13 +Mcu.Pin36=PB14 +Mcu.Pin37=PB15 +Mcu.Pin38=PD8 +Mcu.Pin39=PD9 +Mcu.Pin4=PC13 +Mcu.Pin40=PD10 +Mcu.Pin41=PD11 +Mcu.Pin42=PD12 +Mcu.Pin43=PD13 +Mcu.Pin44=PD15 +Mcu.Pin45=PC6 +Mcu.Pin46=PC7 +Mcu.Pin47=PC8 +Mcu.Pin48=PC9 +Mcu.Pin49=PA8 +Mcu.Pin5=PC14-OSC32_IN (PC14) +Mcu.Pin50=PA9 +Mcu.Pin51=PA11 +Mcu.Pin52=PA12 +Mcu.Pin53=PC10 +Mcu.Pin54=PC11 +Mcu.Pin55=PC12 +Mcu.Pin56=PD0 +Mcu.Pin57=PD1 +Mcu.Pin58=PD2 +Mcu.Pin59=PD3 +Mcu.Pin6=PC15-OSC32_OUT (PC15) +Mcu.Pin60=PD4 +Mcu.Pin61=PD5 +Mcu.Pin62=PD6 +Mcu.Pin63=PD7 +Mcu.Pin64=PB5 +Mcu.Pin65=PB6 +Mcu.Pin66=PB7 +Mcu.Pin67=PB8 +Mcu.Pin68=PB9 +Mcu.Pin69=PE0 +Mcu.Pin7=PH0-OSC_IN (PH0) +Mcu.Pin70=PE1 +Mcu.Pin71=VP_IWDG_VS_IWDG +Mcu.Pin72=VP_SAI2_VP_$IpInstance_SAIA_SAI_BASIC +Mcu.Pin73=VP_SYS_VS_Systick +Mcu.Pin74=VP_TIM2_VS_ClockSourceINT +Mcu.Pin75=VP_USB_HOST_VS_USB_HOST_CDC_FS +Mcu.Pin8=PH1-OSC_OUT (PH1) +Mcu.Pin9=PC0 +Mcu.PinsNb=76 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32L496VGTx +MxCube.Version=4.26.0 +MxDb.Version=DB.4.0.260 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.DMA2_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.DMA2_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.TIM2_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false +PA0.Locked=true +PA0.Mode=Asynchronous +PA0.Signal=UART4_TX +PA1.Locked=true +PA1.Mode=Asynchronous +PA1.Signal=UART4_RX +PA11.Mode=Host_Only +PA11.Signal=USB_OTG_FS_DM +PA12.Mode=Host_Only +PA12.Signal=USB_OTG_FS_DP +PA2.Locked=true +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.Locked=true +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA4.Locked=true +PA4.Signal=COMP_DAC11_group +PA5.Locked=true +PA5.Signal=SPI1_SCK +PA6.Locked=true +PA6.Signal=SPI1_MISO +PA8.GPIOParameters=PinState,GPIO_Label +PA8.GPIO_Label=PCIE_RST +PA8.Locked=true +PA8.PinState=GPIO_PIN_SET +PA8.Signal=GPIO_Output +PA9.GPIOParameters=GPIO_Label +PA9.GPIO_Label=PCIE_EN +PA9.Locked=true +PA9.Signal=GPIO_Output +PB0.Locked=true +PB0.Signal=SPI1_NSS +PB1.GPIOParameters=GPIO_Label +PB1.GPIO_Label=GPS_ON +PB1.Locked=true +PB1.Signal=GPIO_Output +PB10.Locked=true +PB10.Mode=Asynchronous +PB10.Signal=LPUART1_RX +PB11.Locked=true +PB11.Mode=Asynchronous +PB11.Signal=LPUART1_TX +PB12.GPIOParameters=GPIO_Label +PB12.GPIO_Label=OLED_RST +PB12.Locked=true +PB12.Signal=GPIO_Output +PB13.Locked=true +PB13.Mode=I2C +PB13.Signal=I2C2_SCL +PB14.Mode=I2C +PB14.Signal=I2C2_SDA +PB15.GPIOParameters=GPIO_Label +PB15.GPIO_Label=OLED_EN +PB15.Locked=true +PB15.Signal=GPIO_Output +PB2.GPIOParameters=GPIO_Label +PB2.GPIO_Label=BD_EN +PB2.Locked=true +PB2.Signal=GPIO_Output +PB5.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PB5.GPIO_Label=LED4 +PB5.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PB5.Locked=true +PB5.PinState=GPIO_PIN_SET +PB5.Signal=GPIO_Output +PB6.Locked=true +PB6.Mode=Asynchronous +PB6.Signal=USART1_TX +PB7.Mode=Asynchronous +PB7.Signal=USART1_RX +PB8.GPIOParameters=GPIO_Label +PB8.GPIO_Label=LED3 +PB8.Locked=true +PB8.Signal=GPIO_Output +PB9.GPIOParameters=GPIO_Label +PB9.GPIO_Label=IR_OUT +PB9.Locked=true +PB9.Signal=GPIO_Output +PC0.Mode=I2C +PC0.Signal=I2C3_SCL +PC1.Mode=I2C +PC1.Signal=I2C3_SDA +PC10.Mode=SD_4_bits_Wide_bus +PC10.Signal=SDMMC1_D2 +PC11.Mode=SD_4_bits_Wide_bus +PC11.Signal=SDMMC1_D3 +PC12.Mode=SD_4_bits_Wide_bus +PC12.Signal=SDMMC1_CK +PC13.GPIOParameters=GPIO_Label +PC13.GPIO_Label=SENSOR_INT2 +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSC32_IN\ (PC14).Locked=true +PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator +PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN +PC15-OSC32_OUT\ (PC15).Locked=true +PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator +PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PC2.Locked=true +PC2.Signal=ADCx_IN3 +PC4.Locked=true +PC4.Mode=Asynchronous +PC4.Signal=USART3_TX +PC5.Mode=Asynchronous +PC5.Signal=USART3_RX +PC6.GPIOParameters=GPIO_Label +PC6.GPIO_Label=CHARGE_STATE +PC6.Locked=true +PC6.Signal=GPIO_Input +PC7.GPIOParameters=GPIO_Label +PC7.GPIO_Label=CARD_EN +PC7.Locked=true +PC7.Signal=GPIO_Output +PC8.Mode=SD_4_bits_Wide_bus +PC8.Signal=SDMMC1_D0 +PC9.Mode=SD_4_bits_Wide_bus +PC9.Signal=SDMMC1_D1 +PCC.Checker=true +PCC.Line=STM32L4x6 +PCC.MCU=STM32L496V(E-G)Tx +PCC.PartNumber=STM32L496VGTx +PCC.Seq0=0 +PCC.Series=STM32L4 +PCC.Temperature=25 +PCC.Vdd=null +PD0.Locked=true +PD0.Mode=NSS_Signal_Hard_Output +PD0.Signal=SPI2_NSS +PD1.Locked=true +PD1.Mode=Full_Duplex_Master +PD1.Signal=SPI2_SCK +PD10.Locked=true +PD10.Mode=SAI_A_MasterWithClock +PD10.Signal=SAI2_SCK_A +PD11.Locked=true +PD11.Mode=SAI_A_MasterWithClock +PD11.Signal=SAI2_SD_A +PD12.Locked=true +PD12.Mode=SAI_A_MasterWithClock +PD12.Signal=SAI2_FS_A +PD13.GPIOParameters=GPIO_Label +PD13.GPIO_Label=AU_RST +PD13.Locked=true +PD13.Signal=GPIO_Output +PD15.GPIOParameters=GPIO_Label +PD15.GPIO_Label=AU_EN +PD15.Locked=true +PD15.Signal=GPIO_Output +PD2.Mode=SD_4_bits_Wide_bus +PD2.Signal=SDMMC1_CMD +PD3.Mode=Full_Duplex_Master +PD3.Signal=SPI2_MISO +PD4.Locked=true +PD4.Mode=Full_Duplex_Master +PD4.Signal=SPI2_MOSI +PD5.GPIOParameters=GPIO_Label +PD5.GPIO_Label=CARD_EN +PD5.Locked=true +PD5.Signal=GPIO_Output +PD6.GPIOParameters=GPIO_Label +PD6.GPIO_Label=KEY3 +PD6.Locked=true +PD6.Signal=GPIO_Input +PD7.GPIOParameters=GPIO_Label +PD7.GPIO_Label=KEY2 +PD7.Locked=true +PD7.Signal=GPIO_Input +PD8.GPIOParameters=GPIO_Label +PD8.GPIO_Label=AU_CTR +PD8.Locked=true +PD8.Signal=GPIO_Output +PD9.Locked=true +PD9.Mode=SAI_A_MasterWithClock +PD9.Signal=SAI2_MCLK_A +PE0.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PE0.GPIO_Label=LED2 +PE0.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PE0.Locked=true +PE0.PinState=GPIO_PIN_SET +PE0.Signal=GPIO_Output +PE1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PE1.GPIO_Label=LED1 +PE1.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PE1.Locked=true +PE1.PinState=GPIO_PIN_SET +PE1.Signal=GPIO_Output +PE11.GPIOParameters=GPIO_Label +PE11.GPIO_Label=NB_EN +PE11.Locked=true +PE11.Signal=GPIO_Output +PE12.GPIOParameters=GPIO_Label +PE12.GPIO_Label=SEL1 +PE12.Locked=true +PE12.Signal=GPIO_Input +PE13.GPIOParameters=GPIO_Label +PE13.GPIO_Label=SEL2 +PE13.Locked=true +PE13.Signal=GPIO_Input +PE14.GPIOParameters=GPIO_Label +PE14.GPIO_Label=SEL3 +PE14.Locked=true +PE14.Signal=GPIO_Input +PE15.GPIOParameters=GPIO_Label +PE15.GPIO_Label=KEY4 +PE15.Locked=true +PE15.Signal=GPIO_Input +PE2.GPIOParameters=GPIO_Label +PE2.GPIO_Label=KEY1 +PE2.Locked=true +PE2.Signal=GPIO_Input +PE3.GPIOParameters=GPIO_Speed,PinState,GPIO_Label +PE3.GPIO_Label=LED5 +PE3.GPIO_Speed=GPIO_SPEED_FREQ_LOW +PE3.Locked=true +PE3.PinState=GPIO_PIN_SET +PE3.Signal=GPIO_Output +PE5.GPIOParameters=GPIO_Label +PE5.GPIO_Label=SENSOR_EN +PE5.Locked=true +PE5.Signal=GPIO_Output +PE6.GPIOParameters=GPIO_Label +PE6.GPIO_Label=SENSOR_INT1 +PE6.Locked=true +PE6.Signal=GPXTI6 +PE7.GPIOParameters=GPIO_Label +PE7.GPIO_Label=GPS_RST +PE7.Locked=true +PE7.Signal=GPIO_Output +PE8.GPIOParameters=GPIO_Label +PE8.GPIO_Label=NB_RST +PE8.Locked=true +PE8.Signal=GPIO_Output +PE9.GPIOParameters=GPIO_Label +PE9.GPIO_Label=NB_WKUP +PE9.Locked=true +PE9.Signal=GPIO_Output +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=3 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=false +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32L496VGTx +ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.12.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x8000 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=bdw01OS.ioc +ProjectManager.ProjectName=bdw01OS +ProjectManager.StackSize=0x8000 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_SPI2_Init-SPI2-false-HAL-true,5-MX_DAC1_Init-DAC1-false-HAL-true,6-MX_ADC1_Init-ADC1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_I2C3_Init-I2C3-false-HAL-true,9-MX_SAI2_Init-SAI2-false-HAL-true,10-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,11-MX_USB_HOST_Init-USB_HOST-false-HAL-true,12-MX_TIM2_Init-TIM2-false-HAL-true,13-MX_IWDG_Init-IWDG-false-HAL-true,14-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,15-MX_UART4_Init-UART4-false-HAL-true,16-MX_USART3_UART_Init-USART3-false-HAL-true,17-MX_USART2_UART_Init-USART2-false-HAL-true,18-MX_USART1_UART_Init-USART1-false-HAL-true +RCC.ADCFreq_Value=48000000 +RCC.AHBFreq_Value=48000000 +RCC.APB1Freq_Value=48000000 +RCC.APB1TimFreq_Value=48000000 +RCC.APB2Freq_Value=48000000 +RCC.APB2TimFreq_Value=48000000 +RCC.CortexFreq_Value=48000000 +RCC.DFSDMFreq_Value=48000000 +RCC.FCLKCortexFreq_Value=48000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=48000000 +RCC.HSE_VALUE=16000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=48000000 +RCC.I2C2Freq_Value=48000000 +RCC.I2C3Freq_Value=48000000 +RCC.I2C4Freq_Value=48000000 +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIClockRange,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1P,PLLSAI1PoutputFreq_Value,PLLSAI1Q,PLLSAI1QoutputFreq_Value,PLLSAI1R,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value +RCC.LPTIM1Freq_Value=48000000 +RCC.LPTIM2Freq_Value=48000000 +RCC.LPUART1Freq_Value=48000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=48000000 +RCC.MSIClockRange=RCC_MSIRANGE_11 +RCC.MSI_VALUE=48000000 +RCC.PLLN=40 +RCC.PLLPoutputFreq_Value=320000000 +RCC.PLLQoutputFreq_Value=320000000 +RCC.PLLRCLKFreq_Value=320000000 +RCC.PLLSAI1N=12 +RCC.PLLSAI1P=RCC_PLLP_DIV4 +RCC.PLLSAI1PoutputFreq_Value=48000000 +RCC.PLLSAI1Q=RCC_PLLQ_DIV4 +RCC.PLLSAI1QoutputFreq_Value=48000000 +RCC.PLLSAI1R=RCC_PLLR_DIV4 +RCC.PLLSAI1RoutputFreq_Value=48000000 +RCC.PLLSAI2PoutputFreq_Value=64000000 +RCC.PLLSAI2RoutputFreq_Value=64000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.PWRFreq_Value=48000000 +RCC.RNGFreq_Value=48000000 +RCC.SAI1Freq_Value=48000000 +RCC.SAI2Freq_Value=48000000 +RCC.SDMMCFreq_Value=48000000 +RCC.SWPMI1Freq_Value=48000000 +RCC.SYSCLKFreq_VALUE=48000000 +RCC.UART4Freq_Value=48000000 +RCC.UART5Freq_Value=48000000 +RCC.USART1Freq_Value=48000000 +RCC.USART2Freq_Value=48000000 +RCC.USART3Freq_Value=48000000 +RCC.USBFreq_Value=48000000 +RCC.VCOInputFreq_Value=16000000 +RCC.VCOOutputFreq_Value=640000000 +RCC.VCOSAI1OutputFreq_Value=192000000 +RCC.VCOSAI2OutputFreq_Value=128000000 +SAI2.IPParameters=Instance-SAI_A_MasterWithClock,VirtualMode-SAI_A_MasterWithClock,Synchro-SAI_A_MasterWithClock,MClockEnable-SAI_A_MasterWithClock,InitProtocol-SAI_A_MasterWithClock,VirtualProtocol-SAI_A_BASIC +SAI2.InitProtocol-SAI_A_MasterWithClock=Enable +SAI2.Instance-SAI_A_MasterWithClock=SAI$Index_Block_A +SAI2.MClockEnable-SAI_A_MasterWithClock=SAI_MASTERCLOCK_ENABLE +SAI2.Synchro-SAI_A_MasterWithClock=SAI_ASYNCHRONOUS +SAI2.VirtualMode-SAI_A_MasterWithClock=VM_MASTER +SAI2.VirtualProtocol-SAI_A_BASIC=VM_BASIC_PROTOCOL +SDMMC1.ClockDiv=4 +SDMMC1.IPParameters=ClockDiv +SH.ADCx_IN3.0=ADC1_IN3,IN3-Single-Ended +SH.ADCx_IN3.ConfNb=1 +SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1 +SH.COMP_DAC11_group.ConfNb=1 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +SH.GPXTI6.0=GPIO_EXTI6 +SH.GPXTI6.ConfNb=1 +SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2 +SPI2.CalculateBaudRate=24.0 MBits/s +SPI2.Direction=SPI_DIRECTION_2LINES +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler +SPI2.Mode=SPI_MODE_MASTER +SPI2.VirtualNSS=VM_NSSHARD +SPI2.VirtualType=VM_MASTER +TIM2.IPParameters=Prescaler,Period +TIM2.Period=10 +TIM2.Prescaler=13260 +USART1.BaudRate=115200 +USART1.IPParameters=VirtualMode-Asynchronous,BaudRate +USART1.VirtualMode-Asynchronous=VM_ASYNC +USART2.BaudRate=57600 +USART2.IPParameters=VirtualMode-Asynchronous,BaudRate +USART2.VirtualMode-Asynchronous=VM_ASYNC +USART3.BaudRate=9600 +USART3.IPParameters=VirtualMode-Asynchronous,BaudRate +USART3.VirtualMode-Asynchronous=VM_ASYNC +USB_HOST.IPParameters=VirtualModeFS,USBH_HandleTypeDef,USBH_MAX_NUM_ENDPOINTS,USBH_MAX_NUM_INTERFACES,USBH_DEBUG_LEVEL +USB_HOST.USBH_DEBUG_LEVEL=3 +USB_HOST.USBH_HandleTypeDef=hUsbHostFS +USB_HOST.USBH_MAX_NUM_ENDPOINTS=3 +USB_HOST.USBH_MAX_NUM_INTERFACES=5 +USB_HOST.VirtualModeFS=Cdc +USB_OTG_FS.IPParameters=VirtualMode,phy_itface +USB_OTG_FS.VirtualMode=Host_Only +USB_OTG_FS.phy_itface=HCD_PHY_EMBEDDED +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG +VP_SAI2_VP_$IpInstance_SAIA_SAI_BASIC.Mode=SAI_A_BASIC +VP_SAI2_VP_$IpInstance_SAIA_SAI_BASIC.Signal=SAI2_VP_$IpInstance_SAIA_SAI_BASIC +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +VP_USB_HOST_VS_USB_HOST_CDC_FS.Mode=CDC_FS +VP_USB_HOST_VS_USB_HOST_CDC_FS.Signal=USB_HOST_VS_USB_HOST_CDC_FS +board=custom diff --git a/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c new file mode 100644 index 00000000..be6320f9 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.c @@ -0,0 +1,58 @@ +#include "tos_k.h" +#include "stm32l4xx.h" + +#define SECTOR_SIZE 2048 // sector size for stm32l431RCTX + +int stm32l4_norflash_onchip_read(uint32_t addr, void *buf, size_t len) +{ + memcpy(buf, (void *)addr, len); + return 0; +} + +int stm32l4_norflash_onchip_write(uint32_t addr, const void *buf, size_t len) +{ + int i = 0; + uint8_t *array = (uint8_t *)buf; + HAL_StatusTypeDef hal_status; + + HAL_FLASH_Unlock(); + tos_cpu_int_disable(); + + for (i = 0; i < len; i += 8) { + hal_status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, + addr + i, + *(uint64_t *)&array[i]); + if (hal_status != HAL_OK) { + return -1; + } + } + + HAL_FLASH_Lock(); + tos_cpu_int_enable(); + + return 0; +} + +int stm32l4_norflash_onchip_erase(uint32_t addr, size_t size) +{ + uint32_t page_err = 0; + HAL_StatusTypeDef hal_status; + FLASH_EraseInitTypeDef erase_para; + + erase_para.TypeErase = FLASH_TYPEERASE_PAGES; + erase_para.Banks = FLASH_BANK_1; + erase_para.Page = addr / SECTOR_SIZE; + erase_para.NbPages = size / SECTOR_SIZE; + HAL_FLASH_Unlock(); + tos_cpu_int_disable(); + hal_status = HAL_FLASHEx_Erase(&erase_para, &page_err); + HAL_FLASH_Lock(); + tos_cpu_int_enable(); + + if (hal_status != HAL_OK) { + return -1; + } + + return 0; +} + diff --git a/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h new file mode 100644 index 00000000..a718d31e --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash.h @@ -0,0 +1,13 @@ +#ifndef __ONCHIP_FLASH_H__ +#define __ONCHIP_FLASH_H__ + +#include "stdint.h" + +int stm32l4_norflash_onchip_read(uint32_t addr, void *buf, size_t len); + +int stm32l4_norflash_onchip_write(uint32_t addr, const void *buf, size_t len); + +int stm32l4_norflash_onchip_erase(uint32_t addr, size_t size); + +#endif /* __ONCHIP_FLASH_H__ */ + diff --git a/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c new file mode 100644 index 00000000..910694cd --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_kv.c @@ -0,0 +1,20 @@ +#include "tos_kv.h" +#include "onchip_flash.h" + +#define ONCHIP_FLASH_ADDR_START 0x08000000 // start address for onchip flash for stm32l431RCTX +#define ONCHIP_FLASH_ADDR_MAX 0x0803FFFF // 256K flash addr for stm32l431RCTX + +#define SECTOR_SIZE 2048 // sector size for stm32l431RCTX +#define SECTOR_SIZE_LOG2 11 // 2 ^ 11 = 2048 + +kv_flash_drv_t stm32l4_norflash_onchip_drv = { + .write = stm32l4_norflash_onchip_write, + .read = stm32l4_norflash_onchip_read, + .erase = stm32l4_norflash_onchip_erase, +}; + +kv_flash_prop_t stm32l4_norflash_onchip_prop = { + .sector_size_log2 = SECTOR_SIZE_LOG2, + .pgm_type = KV_FLASH_PROGRAM_TYPE_DOUBLEWORD, +}; + diff --git a/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c new file mode 100644 index 00000000..61a1ef27 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Hardware/ONCHIP_FLASH/onchip_flash_ota.c @@ -0,0 +1,23 @@ +#include "ota_flash.h" +#include "onchip_flash.h" + +#define ONCHIP_FLASH_ADDR_START 0x08000000 // start address for onchip flash for stm32l431RCTX +#define ONCHIP_FLASH_ADDR_MAX 0x0803FFFF // 256K flash addr for stm32l431RCTX + +#define SECTOR_SIZE 2048 // sector size for stm32l431RCTX +#define SECTOR_SIZE_LOG2 11 // 2 ^ 11 = 2048 + +#define FOR_OTA_FLASH_SIZE (2 * SECTOR_SIZE) // storage for OTA +#define FOR_OTA_FLASH_START 0x801e000 + +ota_flash_drv_t stm32l4_norflash_onchip_drv_ota = { + .write = stm32l4_norflash_onchip_write, + .read = stm32l4_norflash_onchip_read, + .erase = stm32l4_norflash_onchip_erase, +}; + +ota_flash_prop_t stm32l4_norflash_onchip_prop_ota = { + .sector_size_log2 = SECTOR_SIZE_LOG2, + .pgm_type = OTA_FLASH_PROGRAM_TYPE_DOUBLEWORD, +}; + diff --git a/board/BDW01-STM32L496VG/BSP/Inc/gpio.h b/board/BDW01-STM32L496VG/BSP/Inc/gpio.h new file mode 100644 index 00000000..1c7f4f49 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/gpio.h @@ -0,0 +1,57 @@ +/** + ****************************************************************************** + * File Name : gpio.h + * Description : This file contains all the functions prototypes for + * the gpio + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __gpio_H +#define __gpio_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_GPIO_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ pinoutConfig_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/gps.h b/board/BDW01-STM32L496VG/BSP/Inc/gps.h new file mode 100644 index 00000000..28ec5f55 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/gps.h @@ -0,0 +1,50 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#ifndef __GPS_H__ +#define __GPS_H__ + +#include "tos_at_gps.h" + +//#define DEBUG_GPS_DATA 1 + +typedef struct +{ +// GSV_item item[5]; + char db1;//0-19 + char db2;//20-29 + char db3;//30-39 + char db4;//40- +}GSV_; + + +typedef enum +{ + ATGM336H_UNITE_GPS =1, + ATGM336H_UNITE_BDS =2, + ATGM336H_UNITE_GPS_BDS =3, + ATGM336H_UNITE_GLONASS =4, + ATGM336H_UNITE_GPS_GLONASS =5, + ATGM336H_UNITE_BDS_GLONASS =6, + ATGM336H_UNITE_GPS_BDS_GLONASS =7, +}Atgm336h_Unite; + +int gps_read(int channel_id, void *buf, size_t len); +int gps_init(hal_uart_port_t uart_port); + +#endif /* __GPS_H__ */ + diff --git a/board/BDW01-STM32L496VG/BSP/Inc/i2c.h b/board/BDW01-STM32L496VG/BSP/Inc/i2c.h new file mode 100644 index 00000000..a34e69c5 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/i2c.h @@ -0,0 +1,60 @@ +/** + ****************************************************************************** + * File Name : I2C.h + * Description : This file provides code for the configuration + * of the I2C instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __i2c_H +#define __i2c_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern I2C_HandleTypeDef hi2c2; +extern I2C_HandleTypeDef hi2c3; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_I2C2_Init(void); +void MX_I2C3_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ i2c_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/main.h b/board/BDW01-STM32L496VG/BSP/Inc/main.h new file mode 100644 index 00000000..8e22be1a --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/main.h @@ -0,0 +1,135 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ +void _Error_Handler(char *file, int line); +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define KEY1_Pin GPIO_PIN_2 +#define KEY1_GPIO_Port GPIOE +#define LED5_Pin GPIO_PIN_3 +#define LED5_GPIO_Port GPIOE +#define SENSOR_EN_Pin GPIO_PIN_5 +#define SENSOR_EN_GPIO_Port GPIOE +#define SENSOR_INT1_Pin GPIO_PIN_6 +#define SENSOR_INT1_GPIO_Port GPIOE +#define SENSOR_INT2_Pin GPIO_PIN_13 +#define SENSOR_INT2_GPIO_Port GPIOC +#define GPS_ON_Pin GPIO_PIN_1 +#define GPS_ON_GPIO_Port GPIOB +#define BD_EN_Pin GPIO_PIN_2 +#define BD_EN_GPIO_Port GPIOB +#define GPS_RST_Pin GPIO_PIN_7 +#define GPS_RST_GPIO_Port GPIOE +#define NB_RST_Pin GPIO_PIN_8 +#define NB_RST_GPIO_Port GPIOE +#define NB_WKUP_Pin GPIO_PIN_9 +#define NB_WKUP_GPIO_Port GPIOE +#define NB_EN_Pin GPIO_PIN_11 +#define NB_EN_GPIO_Port GPIOE +#define SEL1_Pin GPIO_PIN_12 +#define SEL1_GPIO_Port GPIOE +#define SEL2_Pin GPIO_PIN_13 +#define SEL2_GPIO_Port GPIOE +#define SEL3_Pin GPIO_PIN_14 +#define SEL3_GPIO_Port GPIOE +#define KEY4_Pin GPIO_PIN_15 +#define KEY4_GPIO_Port GPIOE +#define OLED_RST_Pin GPIO_PIN_12 +#define OLED_RST_GPIO_Port GPIOB +#define OLED_EN_Pin GPIO_PIN_15 +#define OLED_EN_GPIO_Port GPIOB +#define AU_CTR_Pin GPIO_PIN_8 +#define AU_CTR_GPIO_Port GPIOD +#define AU_RST_Pin GPIO_PIN_13 +#define AU_RST_GPIO_Port GPIOD +#define AU_EN_Pin GPIO_PIN_15 +#define AU_EN_GPIO_Port GPIOD +#define CHARGE_STATE_Pin GPIO_PIN_6 +#define CHARGE_STATE_GPIO_Port GPIOC +#define CARD_EN_Pin GPIO_PIN_7 +#define CARD_EN_GPIO_Port GPIOC +#define PCIE_RST_Pin GPIO_PIN_8 +#define PCIE_RST_GPIO_Port GPIOA +#define PCIE_EN_Pin GPIO_PIN_9 +#define PCIE_EN_GPIO_Port GPIOA +#define CARD_END5_Pin GPIO_PIN_5 +#define CARD_END5_GPIO_Port GPIOD +#define KEY3_Pin GPIO_PIN_6 +#define KEY3_GPIO_Port GPIOD +#define KEY2_Pin GPIO_PIN_7 +#define KEY2_GPIO_Port GPIOD +#define LED4_Pin GPIO_PIN_5 +#define LED4_GPIO_Port GPIOB +#define LED3_Pin GPIO_PIN_8 +#define LED3_GPIO_Port GPIOB +#define IR_OUT_Pin GPIO_PIN_9 +#define IR_OUT_GPIO_Port GPIOB +#define LED2_Pin GPIO_PIN_0 +#define LED2_GPIO_Port GPIOE +#define LED1_Pin GPIO_PIN_1 +#define LED1_GPIO_Port GPIOE +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/mcu_init.h b/board/BDW01-STM32L496VG/BSP/Inc/mcu_init.h new file mode 100644 index 00000000..10fee7f5 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/mcu_init.h @@ -0,0 +1,21 @@ +#ifndef __MCU_INIT_H +#define __MCU_INIT_H +#ifdef __cplusplus + extern "C" { +#endif + +#include "main.h" +#include "stm32l4xx_hal.h" +#include "i2c.h" +#include "usart.h" +#include "gpio.h" +#include "tos_k.h" + + +void board_init(void); +void SystemClock_Config(void); + +#ifdef __cplusplus +} +#endif +#endif /*__ __MCU_INIT_H */ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/mymath.h b/board/BDW01-STM32L496VG/BSP/Inc/mymath.h new file mode 100644 index 00000000..aabbef69 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/mymath.h @@ -0,0 +1,18 @@ +#ifndef __MYMATH_H +#define __MYMATH_H + + +void Ascii_to_hex_char(char *dstbuf,char*rstbuf); +void HexStrToByte(const char* source, unsigned char* dest, int sourceLen); +void ByteToHexStr(const unsigned char* source, char* dest, int sourceLen); +void Hex2Str( const char *sSrc, char *sDest, int nSrcLen ); +int Myatoi(char *buf); +char * Myitoa(int val); +int str_to_hex(char *string, unsigned char *cbuf, int len); +void hex_to_str(char *ptr,unsigned char *buf,int len); + + +#endif + + + diff --git a/board/BDW01-STM32L496VG/BSP/Inc/sdmmc.h b/board/BDW01-STM32L496VG/BSP/Inc/sdmmc.h new file mode 100644 index 00000000..a52bbc60 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/sdmmc.h @@ -0,0 +1,59 @@ +/** + ****************************************************************************** + * File Name : SDMMC.h + * Description : This file provides code for the configuration + * of the SDMMC instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __sdmmc_H +#define __sdmmc_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l4xx_hal.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern SD_HandleTypeDef hsd1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SDMMC1_SD_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ sdmmc_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_hal_conf.h b/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 00000000..05e94661 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,435 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_HAL_CONF_H +#define __STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "main.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DFSDM_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +#define HAL_HCD_MODULE_ENABLED +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +#define HAL_IWDG_MODULE_ENABLED +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +#define HAL_SAI_MODULE_ENABLED +#define HAL_SD_MODULE_ENABLED +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)16000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)48000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" + #include "stm32l4xx_hal_rcc_ex.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" + #include "stm32l4xx_hal_dma_ex.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_it.h b/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_it.h new file mode 100644 index 00000000..05384073 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/stm32l4xx_it.h @@ -0,0 +1,74 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_IT_H +#define __STM32L4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void USART1_IRQHandler(void); +void USART2_IRQHandler(void); +void USART3_IRQHandler(void); +void USART4_IRQHandler(void); +void LPUART1_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/sys.h b/board/BDW01-STM32L496VG/BSP/Inc/sys.h new file mode 100644 index 00000000..64bea532 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/sys.h @@ -0,0 +1,56 @@ +/** + ****************************************************************************** + * File Name : SYS.h + * Description : This file provides code for the configuration + * of the SYS instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __sys_H +#define __sys_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SYS_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ sys_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/tos_at_gps.h b/board/BDW01-STM32L496VG/BSP/Inc/tos_at_gps.h new file mode 100644 index 00000000..4d6603f7 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/tos_at_gps.h @@ -0,0 +1,83 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#ifndef _TOS_AT_GPS_H_ +#define _TOS_AT_GPS_H_ + +#include "tos_k.h" +#include "tos_hal.h" + +#define AT_OUTPUT_MAX 128 +#define AT_RX_BUFFER_SIZE 512 +#define AT_PARSER_TASK_STACK_SIZE 2048 +#define AT_PARSER_TASK_PRIO 0 + +#define AT_DATA_CHANNEL_NUM 3 +#define AT_DATA_CHANNEL_FIFO_BUFFER_SIZE (2048 + 1024) + + +typedef void (*at_event_callback_t)(char * str); + +typedef struct at_event_st { + const char *event_header; + at_event_callback_t event_callback; +} at_event_t; + +typedef enum at_channel_status_en { + AT_CHANNEL_STATUS_NONE, /*< usually means we are try to get a channel status with invalid id */ + AT_CHANNEL_STATUS_HANGING, /*< channel is not used */ + AT_CHANNEL_STATUS_WORKING, /*< channel is being using */ + AT_CHANNEL_STATUS_BROKEN, /*< channel is broken(module link to remote server is broken) */ +} at_channel_status_t; + +typedef struct at_data_channel_st { + uint8_t is_free; + k_chr_fifo_t rx_fifo; + uint8_t *rx_fifo_buffer; + k_mutex_t rx_lock; + + at_channel_status_t status; + +} at_data_channel_t; + + + +typedef struct at_control_st { + at_data_channel_t data_channel[AT_DATA_CHANNEL_NUM]; + k_task_t parser; + at_event_t *event_table; + size_t event_table_size; + char *cmd_buffer; + int cmd_buffer_size; + hal_uart_t uart; + k_sem_t at_rx_sem; + k_chr_fifo_t at_rx_fifo; + uint8_t *at_rx_fifo_buffer; +} at_agent_t; + +#define AT_AGENT ((at_agent_t *)(&at_agent)) + +__API__ int tos_at_gps_init(hal_uart_port_t uart_port, at_event_t *event_table, size_t event_table_size); + +__API__ void tos_at_gps_deinit(void); + +__API__ void tos_at_gps_send(const char *format, ...); + +__API__ void tos_at_gps_uart_input_byte(uint8_t data); + +#endif /* _TOS_AT_GPS_H_ */ + diff --git a/board/BDW01-STM32L496VG/BSP/Inc/usart.h b/board/BDW01-STM32L496VG/BSP/Inc/usart.h new file mode 100644 index 00000000..645aa975 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/usart.h @@ -0,0 +1,67 @@ +/** + ****************************************************************************** + * File Name : USART.h + * Description : This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __usart_H +#define __usart_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern UART_HandleTypeDef huart1; +extern UART_HandleTypeDef huart2; +extern UART_HandleTypeDef huart3; +extern UART_HandleTypeDef huart4; +extern UART_HandleTypeDef hlpuart1; + + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_USART1_UART_Init(void); +void MX_USART2_UART_Init(void); +void MX_USART3_UART_Init(void); +void MX_USART4_UART_Init(void); +void MX_LPUART1_UART_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ usart_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Inc/user_usb_uart.h b/board/BDW01-STM32L496VG/BSP/Inc/user_usb_uart.h new file mode 100644 index 00000000..10fd96d3 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Inc/user_usb_uart.h @@ -0,0 +1,23 @@ +#ifndef __UART_H +#define __UART_H + + +#include "stm32l4xx_hal.h" + + + +#define MAX_USBRX_BUFFER_LENGTH 128 +#define CUSB_BUFFER_NUMBER 6 + + +void Usb_Buff_Init(void); +uint8_t ReadUsbBuffData(uint8_t *dBuffer, uint8_t len); + + +//uint8_t saveUart2Data(void); + + + + +#endif + diff --git a/board/BDW01-STM32L496VG/BSP/Src/gpio.c b/board/BDW01-STM32L496VG/BSP/Src/gpio.c new file mode 100644 index 00000000..efc114d1 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/gpio.c @@ -0,0 +1,172 @@ +/** + ****************************************************************************** + * File Name : gpio.c + * Description : This file provides code for the configuration + * of all used GPIO pins. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "gpio.h" +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure GPIO */ +/*----------------------------------------------------------------------------*/ +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** Configure pins as + * Analog + * Input + * Output + * EVENT_OUT + * EXTI +*/ +void MX_GPIO_Init(void) +{ + + GPIO_InitTypeDef GPIO_InitStruct; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOE, LED5_Pin|LED2_Pin|LED1_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOE, SENSOR_EN_Pin|GPS_RST_Pin|NB_RST_Pin|NB_WKUP_Pin + |NB_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, GPS_ON_Pin|BD_EN_Pin|OLED_RST_Pin|OLED_EN_Pin + |LED3_Pin|IR_OUT_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOD, AU_CTR_Pin|AU_RST_Pin|AU_EN_Pin|CARD_END5_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(CARD_EN_GPIO_Port, CARD_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(PCIE_RST_GPIO_Port, PCIE_RST_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(PCIE_EN_GPIO_Port, PCIE_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LED4_GPIO_Port, LED4_Pin, GPIO_PIN_SET); + + /*Configure GPIO pins : KEY1_Pin SEL1_Pin SEL2_Pin SEL3_Pin + KEY4_Pin */ + GPIO_InitStruct.Pin = KEY1_Pin|SEL1_Pin|SEL2_Pin|SEL3_Pin + |KEY4_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /*Configure GPIO pins : LED5_Pin SENSOR_EN_Pin GPS_RST_Pin NB_RST_Pin + NB_WKUP_Pin NB_EN_Pin LED2_Pin LED1_Pin */ + GPIO_InitStruct.Pin = LED5_Pin|SENSOR_EN_Pin|GPS_RST_Pin|NB_RST_Pin + |NB_WKUP_Pin|NB_EN_Pin|LED2_Pin|LED1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /*Configure GPIO pin : SENSOR_INT1_Pin */ + GPIO_InitStruct.Pin = SENSOR_INT1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(SENSOR_INT1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : SENSOR_INT2_Pin */ + GPIO_InitStruct.Pin = SENSOR_INT2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(SENSOR_INT2_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : PA5 PA6 */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pin : PB0 */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pins : GPS_ON_Pin BD_EN_Pin OLED_RST_Pin OLED_EN_Pin + LED4_Pin LED3_Pin IR_OUT_Pin */ + GPIO_InitStruct.Pin = GPS_ON_Pin|BD_EN_Pin|OLED_RST_Pin|OLED_EN_Pin + |LED4_Pin|LED3_Pin|IR_OUT_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pins : AU_CTR_Pin AU_RST_Pin AU_EN_Pin CARD_END5_Pin */ + GPIO_InitStruct.Pin = AU_CTR_Pin|AU_RST_Pin|AU_EN_Pin|CARD_END5_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /*Configure GPIO pin : CHARGE_STATE_Pin */ + GPIO_InitStruct.Pin = CHARGE_STATE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(CHARGE_STATE_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : CARD_EN_Pin */ + GPIO_InitStruct.Pin = CARD_EN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(CARD_EN_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : PCIE_RST_Pin PCIE_EN_Pin */ + GPIO_InitStruct.Pin = PCIE_RST_Pin|PCIE_EN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pins : KEY3_Pin KEY2_Pin */ + GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/gps.c b/board/BDW01-STM32L496VG/BSP/Src/gps.c new file mode 100644 index 00000000..ebef604d --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/gps.c @@ -0,0 +1,437 @@ + +#include "tos_k.h" +#include "tos_at_gps.h" +#include "tos_hal.h" + + +#include "stdio.h" +#include "stdbool.h" +#include "ctype.h" +#include "gps.h" +#include "mymath.h" + +const char ATGM336H_GPS[]="$PCAS04,1*18\r\n"; +const char ATGM336H_BDS[]="$PCAS04,2*1B\r\n"; +const char ATGM336H_GPS_BDS[]="$PCAS04,3*1A\r\n"; +const char ATGM336H_GLONASS[]="$PCAS04,4*1D\r\n"; +const char ATGM336H_GPS_GLONASS[]="$PCAS04,5*1C\r\n"; +const char ATGM336H_BDS_GLONASS[]="$PCAS04,6*1F\r\n"; +const char ATGM336H_GPS_BDS_GLONASS[]="$PCAS04,7*1E\r\n"; +const char ATGM336H_FREQ[]="$PCAS03,0,0,0,0,2,0,0,0,0,0,0,0,0,0*00\r\n";//"$PCAS03,2,0,0,2,2,0,0,0,0,0,0,0,0,0*00\r\n"; + + +char* get_gpsrmc (char* buf) +{ + char const *buff=buf; + char *p=NULL; + + if(p= strstr(buff,"GNRMC")) //ÁªºÏ + { + + } + else if(p= strstr(buff,"GBRMC")){ //BDS + + } + else if(p= strstr(buff,"GPRMC")){ //GPS + + } + else if(p= strstr(buff,"BDRMC")){ //BDS + + } + return p; +} + +char* get_gpsgga(char* buf) +{ + char const *buff=buf; + char *p=NULL; + + if(p= strstr(buff,"GNGGA")){ + } + else if(p= strstr(buff,"GBGGA")){ + } + else if(p= strstr(buff,"GPGGA")){ + } + else if(p= strstr(buff,"BDGGA")){ + } + return p; +} + +char* get_gpsgsv(char* buf) +{ + char const *buff=buf; + char *p=NULL; + + if(p= strstr(buff,"GNGSV")){ + } + else if(p= strstr(buff,"GBGSV")){ + } + else if(p= strstr(buff,"GPGSV")){ + } + else if(p= strstr(buff,"BDGSV")){ + } + return p; +} + + +//GBRMC,065730.00,V,2231.89755,N,11356.42786,E,0.206,,100919,,,N,V*08 +void ParseGpsRmc(char *gpsdata) +{ + uint16_t i,j,numtotal= 0; + uint8_t zero,first,second,third,fourth,fifth,sixth,sevevth; + char gpstestbuf[40]; + char coordinate[25]; + char rmcdatabuf[60]; + char *buff_gprmc=NULL; + char tmp[10],tmp1[10],GPSChecksum[2],result; + char *test; + int len; + test = gpsdata; + j =0; + first =0; second=0;third=0;fourth=0;fifth=0;sixth=0;sevevth=0,result=0; +// printf("\r\n%s \n",test); + buff_gprmc = get_gpsrmc(test); + len = strlen(test); + if(buff_gprmc ==0){ +// gpsFlag.Havetime2calitNb=0; + return; + }else{ +// printf("len= %d\r\n",len); +// printf("%s",buff_gprmc); +// tos_kprintln("rmc\n"); + for(i =0;i 57) ) + { + return; + } + gpstestbuf[j++] = buff_gprmc[i]; + } + if((i-first-1)<10) //Èç¹ûλÊýÉÙÁË1λ + gpstestbuf[j++] = '0'; + gpstestbuf[j++] = ','; + for(i = third+1;i 57) ) + { + return; + } + gpstestbuf[j++] = buff_gprmc[i]; + } + if((i-third-1)<11) //Èç¹ûλÊýÉÙÁË1λ + gpstestbuf[j++] = '0'; + + #ifdef DEBUG_GPS_DATA + printf("\r\nN AND E is \r\n"); + #endif +// tos_kprintln(gpstestbuf); + tos_at_gps_channel_write(1, gpstestbuf, strlen(gpstestbuf)); + + j =0; + #ifdef DEBUG_GPS_DATA + printf("\r\nfindchar5 is \r\n"); + #endif + memset(tmp,0,10); + for(i = fifth+1;i1) + { +// gpsFlag.gps_speed_non_zero=1; + } + else{ +// gpsFlag.gps_speed_non_zero=0; + } + #ifdef DEBUG_GPS_DATA + printf("\r\nspeed is:%d\r\n",i); + #endif + j =0; + memset(tmp,0,10); + for(i = sixth+1;i 57) ) + { + printf("Data error \r\n"); + return; + } + tmp[j]= buff_gpgga[i]; + } +// printf("i:%d \r\n",ava_satellite); +} + +//$BDGSV,4,1,15,01,47,123,42,02,47,235,36,03,64,189,44,07,74,092,41*66 +GSV_ gsv; +void ParseGpsGsv(char *gsvdata) +{ + char *buff_gpgga=NULL; +// char *test; + int i,len; + int num,num1,index,line,total,db; + char *revbuf[23] = {0}; +// test = gpsdata; +// buff_gpgga = get_gpsgsv(gsvdata); + if(gsvdata ==NULL){ + return; + } + else{ + printf("%s\n",gsvdata); + split(gsvdata,",*",revbuf,&num); +// split(revbuf[num-1],"*",NULL,NULL); + + + for(i=1;i4) + { + line = decstr_to_int(revbuf[2]);//µ±Ç°Êǵڼ¸Ìõ + total = decstr_to_int(revbuf[3]);//×ÜÐÇÊý + if(line==1) //Èç¹ûÊÇÊÕµ½µÚÒ»Ìõ£¬°Ñ֮ǰ¼Ç¼ÇåÁ㣬ÖØÈ¡ + { + gsv.db1= 0; + gsv.db2= 0; + gsv.db3= 0; + gsv.db4= 0; +// gpsData.gsv = gsv; + } + + index = (line-1)*4; //Ëã³öÎÀÐÇÐźÅÆðʼ¸öÊý,ÒòΪÿһÌõ×î¶à4¸öÎÀÐÇÐÅÏ¢ + + for(i=0;i<4&&i=40) + { + gsv.db4+=1; + } + else if(db>=30) + { + gsv.db3+=1; + } + else if(db>=20) + { + gsv.db2+=1; + } + else if(db>0) + { + gsv.db1+=1; + } + } + } + + + if(line==decstr_to_int(revbuf[1])) //ÊÕµ½µÄ×îºóÒ»Ìõ + { +// gpsData.gsv = gsv; + +// printf("gsv:%d,%d,%d,%d\n",gpsData.gsv.db1,gpsData.gsv.db2,gpsData.gsv.db3,gpsData.gsv.db4); + } + + } + + } +} + + + +//ÅäÖÃÎÀÐÇÁªºÏ¹¤×÷ģʽ +// 1GPS 2BDS 3GPS+BDS 4GLONASS 5GPS+GLONASS 6BDS+GLONASS 7GPS+BDS+GLONASS +void atgm336h_Unite(Atgm336h_Unite unite) +{ + switch(unite) + { + case ATGM336H_UNITE_GPS: + tos_at_gps_send(ATGM336H_GPS); + break; + case ATGM336H_UNITE_BDS: + tos_at_gps_send(ATGM336H_BDS); + break; + case ATGM336H_UNITE_GPS_BDS: + tos_at_gps_send(ATGM336H_GPS_BDS); + break; + case ATGM336H_UNITE_GLONASS: + tos_at_gps_send(ATGM336H_GLONASS); + break; + case ATGM336H_UNITE_GPS_GLONASS: + tos_at_gps_send(ATGM336H_GPS_GLONASS); + break; + case ATGM336H_UNITE_BDS_GLONASS: + tos_at_gps_send(ATGM336H_BDS_GLONASS); + break; + case ATGM336H_UNITE_GPS_BDS_GLONASS: + tos_at_gps_send(ATGM336H_GPS_BDS_GLONASS); + break; + } +} + +int gps_read(int channel_id, void *buf, size_t len) +{ + return tos_at_gps_channel_read(channel_id, buf, len); +} + +__STATIC__ void atgm336h_init(void) +{ + printf("Init atgm336h ...\n" ); + tos_task_delay(1000); + atgm336h_Unite(ATGM336H_UNITE_BDS); + tos_task_delay(200); + tos_at_gps_send(ATGM336H_FREQ); +} + + +__STATIC__ void gps_incoming_rmc(char * str) +{ +// printf("gp\n" ); +// printf(str); + ParseGpsRmc(str); +} + +at_event_t gps_at_event[] = { +// { "$GPTXT,01,01,02,HW=ATGM336H", atgm336h_init }, + { "$BDRMC", gps_incoming_rmc }, +}; + +int gps_init(hal_uart_port_t uart_port) +{ + HAL_GPIO_WritePin(GPS_RST_GPIO_Port, GPS_RST_Pin, GPIO_PIN_RESET); + tos_task_delay(200); + HAL_GPIO_WritePin(GPS_RST_GPIO_Port, GPS_RST_Pin, GPIO_PIN_SET); + + if (tos_at_gps_init(uart_port, gps_at_event,sizeof(gps_at_event) / sizeof(gps_at_event[0])) != 0) { + return -1; + } + + atgm336h_init(); + + return 0; +} + diff --git a/board/BDW01-STM32L496VG/BSP/Src/i2c.c b/board/BDW01-STM32L496VG/BSP/Src/i2c.c new file mode 100644 index 00000000..06e469b5 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/i2c.c @@ -0,0 +1,197 @@ +/** + ****************************************************************************** + * File Name : I2C.c + * Description : This file provides code for the configuration + * of the I2C instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "i2c.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +I2C_HandleTypeDef hi2c2; +I2C_HandleTypeDef hi2c3; + +/* I2C2 init function */ +void MX_I2C2_Init(void) +{ + + hi2c2.Instance = I2C2; + hi2c2.Init.Timing = 0x20303E5D; + hi2c2.Init.OwnAddress1 = 0; + hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + hi2c2.Init.OwnAddress2 = 0; + hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + if (HAL_I2C_Init(&hi2c2) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure Analogue filter + */ + if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure Digital filter + */ + if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/* I2C3 init function */ +void MX_I2C3_Init(void) +{ + + hi2c3.Instance = I2C3; + hi2c3.Init.Timing = 0x2010091A; + hi2c3.Init.OwnAddress1 = 0; + hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; + hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + hi2c3.Init.OwnAddress2 = 0; + hi2c3.Init.OwnAddress2Masks = I2C_OA2_NOMASK; + hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + if (HAL_I2C_Init(&hi2c3) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure Analogue filter + */ + if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure Digital filter + */ + if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) +{ + + GPIO_InitTypeDef GPIO_InitStruct; + if(hi2c->Instance==I2C2) + { + /* USER CODE BEGIN I2C2_MspInit 0 */ + + /* USER CODE END I2C2_MspInit 0 */ + + /**I2C2 GPIO Configuration + PB13 ------> I2C2_SCL + PB14 ------> I2C2_SDA + */ + GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_I2C2_CLK_ENABLE(); + /* USER CODE BEGIN I2C2_MspInit 1 */ + + /* USER CODE END I2C2_MspInit 1 */ + } + else if(hi2c->Instance==I2C3) + { + /* USER CODE BEGIN I2C3_MspInit 0 */ + + /* USER CODE END I2C3_MspInit 0 */ + + /**I2C3 GPIO Configuration + PC0 ------> I2C3_SCL + PC1 ------> I2C3_SDA + */ + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* Peripheral clock enable */ + __HAL_RCC_I2C3_CLK_ENABLE(); + /* USER CODE BEGIN I2C3_MspInit 1 */ + + /* USER CODE END I2C3_MspInit 1 */ + } + +} + +void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) +{ + + if(hi2c->Instance==I2C2) + { + /* USER CODE BEGIN I2C2_MspDeInit 0 */ + + /* USER CODE END I2C2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_I2C2_CLK_DISABLE(); + + /**I2C2 GPIO Configuration + PB13 ------> I2C2_SCL + PB14 ------> I2C2_SDA + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14); + + /* USER CODE BEGIN I2C2_MspDeInit 1 */ + + /* USER CODE END I2C2_MspDeInit 1 */ + } + else if(hi2c->Instance==I2C3) + { + /* USER CODE BEGIN I2C3_MspDeInit 0 */ + + /* USER CODE END I2C3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_I2C3_CLK_DISABLE(); + + /**I2C3 GPIO Configuration + PC0 ------> I2C3_SCL + PC1 ------> I2C3_SDA + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1); + + /* USER CODE BEGIN I2C3_MspDeInit 1 */ + + /* USER CODE END I2C3_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/main.c b/board/BDW01-STM32L496VG/BSP/Src/main.c new file mode 100644 index 00000000..8b77ee28 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/main.c @@ -0,0 +1,23 @@ +#include "mcu_init.h" +#include "cmsis_os.h" + +#define APPLICATION_TASK_STK_SIZE 1024 +extern void application_entry(void *arg); +osThreadDef(application_entry, osPriorityNormal, 1, APPLICATION_TASK_STK_SIZE); + +__weak void application_entry(void *arg) +{ + while (1) { + printf("This is a demo task,please use your task entry!\r\n"); + tos_task_delay(1000); + } +} + +int main(void) +{ + board_init(); + printf("Welcome to TencentOS tiny\r\n"); + osKernelInitialize(); + osThreadCreate(osThread(application_entry), NULL); + osKernelStart(); +} diff --git a/board/BDW01-STM32L496VG/BSP/Src/mcu_init.c b/board/BDW01-STM32L496VG/BSP/Src/mcu_init.c new file mode 100644 index 00000000..75692e2e --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/mcu_init.c @@ -0,0 +1,345 @@ +#include "mcu_init.h" + +ADC_HandleTypeDef hadc1; +DAC_HandleTypeDef hdac1; +TIM_HandleTypeDef htim2; +SPI_HandleTypeDef hspi2; +IWDG_HandleTypeDef hiwdg; +SAI_HandleTypeDef hsai_BlockA2; + +static void MX_DMA_Init(void); +static void MX_SPI2_Init(void); +static void MX_DAC1_Init(void); +static void MX_ADC1_Init(void); +static void MX_TIM2_Init(void); +static void MX_SAI2_Init(void); + +int fputc(int ch, FILE *f) +{ + if (ch == '\n') { + HAL_UART_Transmit(&huart1, (void *)"\r", 1,30000); + } + HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, 0xFFFF); + return ch; +} + +int _write(int fd, char *ptr, int len) +{ + (void)HAL_UART_Transmit(&huart1, (uint8_t *)ptr, len, 0xFFFF); + return len; +} + +int fgetc(FILE *f) +{ + /* Place your implementation of fgetc here */ + /* e.g. readwrite a character to the USART2 and Loop until the end of transmission */ + uint8_t ch = 0; + HAL_UART_Receive(&huart1, &ch, 1,30000); + return ch; +} + +void board_init(void) +{ + HAL_Init(); + SystemClock_Config(); + MX_GPIO_Init(); + MX_I2C2_Init(); + MX_I2C3_Init(); + MX_LPUART1_UART_Init(); + MX_UART4_Init(); + MX_USART3_UART_Init(); + MX_USART2_UART_Init(); + + MX_USART1_UART_Init(); +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit; + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE + |RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4 + |RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_SAI2 + |RCC_PERIPHCLK_I2C2|RCC_PERIPHCLK_I2C3 + |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_SDMMC1 + |RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; + PeriphClkInit.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1; + PeriphClkInit.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLLSAI1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 12; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_48M2CLK + |RCC_PLLSAI1_ADC1CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the Systick interrupt time + */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); + + /**Configure the Systick + */ + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); +} + +/* ADC1 init function */ +static void MX_ADC1_Init(void) +{ + + ADC_MultiModeTypeDef multimode; + ADC_ChannelConfTypeDef sConfig; + + /**Common config + */ + hadc1.Instance = ADC1; + hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc1.Init.Resolution = ADC_RESOLUTION_12B; + hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc1.Init.LowPowerAutoWait = DISABLE; + hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.NbrOfConversion = 1; + hadc1.Init.DiscontinuousConvMode = DISABLE; + hadc1.Init.NbrOfDiscConversion = 1; + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc1.Init.DMAContinuousRequests = DISABLE; + hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED; + hadc1.Init.OversamplingMode = DISABLE; + if (HAL_ADC_Init(&hadc1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the ADC multi-mode + */ + multimode.Mode = ADC_MODE_INDEPENDENT; + if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure Regular Channel + */ + sConfig.Channel = ADC_CHANNEL_3; + sConfig.Rank = ADC_REGULAR_RANK_1; + sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5; + sConfig.SingleDiff = ADC_SINGLE_ENDED; + sConfig.OffsetNumber = ADC_OFFSET_NONE; + sConfig.Offset = 0; + if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/* DAC1 init function */ +static void MX_DAC1_Init(void) +{ + + DAC_ChannelConfTypeDef sConfig; + + /**DAC Initialization + */ + hdac1.Instance = DAC1; + if (HAL_DAC_Init(&hdac1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**DAC channel OUT1 config + */ + sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE; + sConfig.DAC_Trigger = DAC_TRIGGER_NONE; + sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; + sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_DISABLE; + sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY; + if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/* SPI2 init function */ +static void MX_SPI2_Init(void) +{ + + /* SPI2 parameter configuration*/ + hspi2.Instance = SPI2; + hspi2.Init.Mode = SPI_MODE_MASTER; + hspi2.Init.Direction = SPI_DIRECTION_2LINES; + hspi2.Init.DataSize = SPI_DATASIZE_4BIT; + hspi2.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi2.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT; + hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi2.Init.TIMode = SPI_TIMODE_DISABLE; + hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi2.Init.CRCPolynomial = 7; + hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; + hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + if (HAL_SPI_Init(&hspi2) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/* TIM2 init function */ +static void MX_TIM2_Init(void) +{ + + TIM_ClockConfigTypeDef sClockSourceConfig; + TIM_MasterConfigTypeDef sMasterConfig; + + htim2.Instance = TIM2; + htim2.Init.Prescaler = 13260; + htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + htim2.Init.Period = 10; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/** + * Enable DMA controller clock + */ +static void MX_DMA_Init(void) +{ + /* DMA controller clock enable */ + __HAL_RCC_DMA2_CLK_ENABLE(); + + /* DMA interrupt init */ + /* DMA2_Channel4_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Channel4_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Channel4_IRQn); + /* DMA2_Channel5_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA2_Channel5_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Channel5_IRQn); + +} + +/* USER CODE BEGIN 4 */ +void _Error_Handler(char *file, int line) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + while(1) + { + printf("err %s,L%d\r\n",file,line); + } + /* USER CODE END Error_Handler_Debug */ +} +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/mymath.c b/board/BDW01-STM32L496VG/BSP/Src/mymath.c new file mode 100644 index 00000000..7c438067 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/mymath.c @@ -0,0 +1,245 @@ + +#include +#include "mymath.h" +#include + +void Ascii_to_hex_char(char *dstbuf,char*rstbuf) +{ + + //char *p = "jyh:abcdefghijklmnop"; + unsigned char i,len; + len = strlen(rstbuf); + //printf(rstbuf); + for(i =0;i 0x39) + highByte -= 0x37; + else + highByte -= 0x30; + + if (lowByte > 0x39) + lowByte -= 0x37; + else + lowByte -= 0x30; + + dest[i/2] = (highByte << 4) | lowByte; + } + return ; +} + +//×Ö½ÚÁ÷ת»»ÎªÊ®Áù½øÖÆ×Ö·û´® +void ByteToHexStr(const unsigned char* source, char* dest, int sourceLen) +{ + short i; + unsigned char highByte, lowByte; + + for (i = 0; i < sourceLen; i++) + { + highByte = source[i] >> 4; + lowByte = source[i] & 0x0f ; + + highByte += 0x30; + if (highByte > 0x39) + dest[i * 2] = highByte + 0x07; + else + dest[i * 2] = highByte; + + lowByte += 0x30; + if (lowByte > 0x39) + dest[i * 2 + 1] = lowByte + 0x07; + else + dest[i * 2 + 1] = lowByte; + } + return ; +} + + +//×Ö½ÚÁ÷ת»»ÎªÊ®Áù½øÖÆ×Ö·û´®µÄÁíÒ»ÖÖʵÏÖ·½Ê½ +void Hex2Str( const char *sSrc, char *sDest, int nSrcLen ) +{ + int i; + char szTmp[3]; + + for( i = 0; i < nSrcLen; i++ ) + { + sprintf( szTmp, "%02X", (unsigned char) sSrc[i] ); + memcpy( &sDest[i * 2], szTmp, 2 ); + } + return ; +} +//½«×Ö·û´®×ª»»ÎªÊ®½øÖÆÈýÖÖ·½·¨µÄ´úÂ룺 +int Myatoi(char *buf) +{ + int result = 0; + char ch; + while((ch = *(buf++)) != '\0') + { + result = result*10 + ch-'0'; + } + return result; +} + +//½«Ê®½øÖÆת³É×Ö·û´® +char * Myitoa(int val) +{ + static char szTmp[4]; + memset(szTmp,0,4); + sprintf(szTmp, "%02d", val ); + return szTmp; +} + + +/**************************************************************************** +º¯ÊýÃû³Æ: str_to_hex +º¯Êý¹¦ÄÜ: ×Ö·û´®×ª»»ÎªÊ®Áù½øÖÆ +ÊäÈë²ÎÊý: string ×Ö·û´® cbuf Ê®Áù½øÖÆ len ×Ö·û´®µÄ³¤¶È¡£ +Êä³ö²ÎÊý: ÎÞ +*****************************************************************************/ +int str_to_hex(char *string, unsigned char *cbuf, int len) +{ + unsigned char high, low; + int idx, ii=0; + for (idx=0; idx='0' && high<='9') + high = high-'0'; + else if(high>='A' && high<='F') + high = high - 'A' + 10; + else if(high>='a' && high<='f') + high = high - 'a' + 10; + else + return -1; + + if(low>='0' && low<='9') + low = low-'0'; + else if(low>='A' && low<='F') + low = low - 'A' + 10; + else if(low>='a' && low<='f') + low = low - 'a' + 10; + else + return -1; + + cbuf[ii++] = high<<4 | low; + } + return 0; +} + + +/**************************************************************************** +º¯ÊýÃû³Æ: hex_to_str +º¯Êý¹¦ÄÜ: Ê®Áù½øÖÆת×Ö·û´® 0->30 1->31 +ÊäÈë²ÎÊý: ptr ×Ö·û´® buf Ê®Áù½øÖÆ len Ê®Áù½øÖÆ×Ö·û´®µÄ³¤¶È¡£ +Êä³ö²ÎÊý: ÎÞ +*****************************************************************************/ +void hex_to_str(char *ptr,unsigned char *buf,int len) +{ + for(int i = 0; i < len; i++) + { + sprintf(ptr, "%02x",buf[i]); + ptr += 2; + } +} + + +/**************************************************************************** +º¯ÊýÃû³Æ: hexstr_to_byte +º¯Êý¹¦ÄÜ: Ê®Áù½øÖÆ×Ö·û´®×ª×Ö½ÚÊý×Ö +*****************************************************************************/ +int hexstr_to_byte(const unsigned char* source) +{ + int i=0,ret=0; + char dest[2]; + + for(i=0;i<2;i++) + { + dest[i]=source[i]-'0'; + if((dest[i] < 0) || (dest[i] > 54)) + return 0; + if((dest[i]> 9) && (dest[i]< 23)) //A~F + dest[i] -= 7; + else if((dest[i]> 48) && (dest[i]<55)) //a~f + dest[i] -= 39; +// printf("dest[%d]:%d\r\n",i,dest[i]); + } + ret = dest[0]*16+dest[1]; + + return ret; + +} + +/**************************************************************************** +º¯ÊýÃû³Æ: decstr_to_int +º¯Êý¹¦ÄÜ: Ê®½øÖÆ×Ö·û´®×ªÕûÐÍ +*****************************************************************************/ +int decstr_to_int(const unsigned char* src) +{ + int i=0,ret=0; + int len = strlen(src); + for(i=0;i '9')) + return -1; + ret =ret*10+(src[i]-'0'); + } + + return ret; +} + + + +/**************************************************************************** +src Ô´×Ö·û´®µÄÊ×µØÖ·(bufµÄµØÖ·) +separator Ö¸¶¨µÄ·Ö¸î×Ö·û +dest ½ÓÊÕ×Ó×Ö·û´®µÄÊý×é +num ·Ö¸îºó×Ó×Ö·û´®µÄ¸öÊý +*****************************************************************************/ +void split(char *src,const char *separator,char **dest,int *num) { + + char *pNext; + int count = 0; + if (src == NULL || strlen(src) == 0) //Èç¹û´«ÈëµÄµØַΪ¿Õ»ò³¤¶ÈΪ0£¬Ö±½ÓÖÕÖ¹ + return; + if (separator == NULL || strlen(separator) == 0) //Èçδָ¶¨·Ö¸îµÄ×Ö·û´®£¬Ö±½ÓÖÕÖ¹ + return; + pNext = (char *)strtok(src,separator); //±ØÐëʹÓÃ(char *)½øÐÐÇ¿ÖÆÀàÐÍת»»(ËäÈ»²»Ð´ÓеıàÒëÆ÷Öв»»á³öÏÖÖ¸Õë´íÎó) + while(pNext != NULL) { + if(dest) + *dest++ = pNext; + ++count; + pNext = (char *)strtok(NULL,separator); //±ØÐëʹÓÃ(char *)½øÐÐÇ¿ÖÆÀàÐÍת»» + } + if(num) + *num = count; +} + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/BSP/Src/sdmmc.c b/board/BDW01-STM32L496VG/BSP/Src/sdmmc.c new file mode 100644 index 00000000..1834da63 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/sdmmc.c @@ -0,0 +1,119 @@ +/** + ****************************************************************************** + * File Name : SDMMC.c + * Description : This file provides code for the configuration + * of the SDMMC instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "sdmmc.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +SD_HandleTypeDef hsd1; + + +/* SDMMC1 init function */ + +void MX_SDMMC1_SD_Init(void) +{ + + hsd1.Instance = SDMMC1; + hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B; + hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + hsd1.Init.ClockDiv = 0; + if (HAL_SD_Init(&hsd1) != HAL_OK) + { +// Error_Handler(); + printf("HAL_SD_Init error\n"); + } + +} + +void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(sdHandle->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspInit 0 */ + + /* USER CODE END SDMMC1_MspInit 0 */ + /* SDMMC1 clock enable */ + __HAL_RCC_SDMMC1_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USER CODE BEGIN SDMMC1_MspInit 1 */ + + /* USER CODE END SDMMC1_MspInit 1 */ + } +} + +void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle) +{ + + if(sdHandle->Instance==SDMMC1) + { + /* USER CODE BEGIN SDMMC1_MspDeInit 0 */ + + /* USER CODE END SDMMC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SDMMC1_CLK_DISABLE(); + + /**SDMMC1 GPIO Configuration + PC8 ------> SDMMC1_D0 + PC12 ------> SDMMC1_CK + PD2 ------> SDMMC1_CMD + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_12); + + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); + + /* USER CODE BEGIN SDMMC1_MspDeInit 1 */ + + /* USER CODE END SDMMC1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_hal_msp.c b/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_hal_msp.c new file mode 100644 index 00000000..ee19cf2c --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,100 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32f1xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + + /* System interrupt init*/ + /* MemoryManagement_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); + /* BusFault_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); + /* UsageFault_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); + /* SVCall_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); + /* DebugMonitor_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); + /* PendSV_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_it.c b/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_it.c new file mode 100644 index 00000000..a9d14c89 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/stm32l4xx_it.c @@ -0,0 +1,312 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32l4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "tos_k.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ +//#define USE_WIFI +//#define USE_ROLA +//#define USE_2G +//#define USE_GPS +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +extern UART_HandleTypeDef huart1; +extern UART_HandleTypeDef huart2; +extern UART_HandleTypeDef huart3; +extern UART_HandleTypeDef huart4; +extern UART_HandleTypeDef hlpuart1; + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M3 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +__weak void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + if(tos_knl_is_running()) + { + tos_knl_irq_enter(); + tos_tick_handler(); + tos_knl_irq_leave(); + } + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F1xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f1xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles USART1 global interrupt. + */ +void USART1_IRQHandler(void) +{ + /* USER CODE BEGIN USART1_IRQn 0 */ + + /* USER CODE END USART1_IRQn 0 */ + HAL_UART_IRQHandler(&huart1); + /* USER CODE BEGIN USART1_IRQn 1 */ + + /* USER CODE END USART1_IRQn 1 */ +} + +/** + * @brief This function handles USART2 global interrupt. + */ +void USART2_IRQHandler(void) +{ + /* USER CODE BEGIN USART2_IRQn 0 */ + + /* USER CODE END USART2_IRQn 0 */ + HAL_UART_IRQHandler(&huart2); + /* USER CODE BEGIN USART2_IRQn 1 */ + + /* USER CODE END USART2_IRQn 1 */ +} + +/** + * @brief This function handles USART3 global interrupt. + */ +void USART3_IRQHandler(void) +{ + /* USER CODE BEGIN USART3_IRQn 0 */ + + /* USER CODE END USART3_IRQn 0 */ + HAL_UART_IRQHandler(&huart3); + /* USER CODE BEGIN USART3_IRQn 1 */ + + /* USER CODE END USART3_IRQn 1 */ +} + +/** + * @brief This function handles USART4 global interrupt. + */ +void USART4_IRQHandler(void) +{ + /* USER CODE BEGIN USART4_IRQn 0 */ + + /* USER CODE END USART4_IRQn 0 */ + HAL_UART_IRQHandler(&huart4); + /* USER CODE BEGIN USART4_IRQn 1 */ + + /* USER CODE END USART4_IRQn 1 */ +} + +/** + * @brief This function handles LPUART1 global interrupt. + */ +void LPUART1_IRQHandler(void) +{ + /* USER CODE BEGIN LPUART1_IRQn 0 */ + + /* USER CODE END LPUART1_IRQn 0 */ + HAL_UART_IRQHandler(&hlpuart1); + /* USER CODE BEGIN LPUART1_IRQn 1 */ + + /* USER CODE END LPUART1_IRQn 1 */ +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) +{ + extern uint8_t data2; + extern uint8_t data3; + if (huart->Instance == USART2) { + HAL_UART_Receive_IT(&huart2, &data2, 1); + #if defined(USE_WIFI) + tos_serialwifi_uart_input_byte(data2); + #elif defined(USE_ROLA) + tos_at_ra06_uart_input_byte(data2); + #elif defined(USE_2G) + tos_at_uart_input_byte(data2); + #endif + } + else if (huart->Instance == USART3) { + HAL_UART_Receive_IT(&huart3, &data3, 1); + #if defined(USE_GPS) + tos_at_gps_uart_input_byte(data3); + #endif + } +} + + + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/sys.c b/board/BDW01-STM32L496VG/BSP/Src/sys.c new file mode 100644 index 00000000..bd913a81 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/sys.c @@ -0,0 +1,41 @@ +/** + ****************************************************************************** + * File Name : SYS.c + * Description : This file provides code for the configuration + * of the SYS instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "sys.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* SYS init function */ +void MX_SYS_Init(void) +{ + + /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled + */ + __HAL_AFIO_REMAP_SWJ_NOJTAG(); + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/system_stm32l4xx.c b/board/BDW01-STM32L496VG/BSP/Src/system_stm32l4xx.c new file mode 100644 index 00000000..26bd5179 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/tos_at_gps.c b/board/BDW01-STM32L496VG/BSP/Src/tos_at_gps.c new file mode 100644 index 00000000..2766ff44 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/tos_at_gps.c @@ -0,0 +1,386 @@ +/*---------------------------------------------------------------------------- + * Tencent is pleased to support the open source community by making TencentOS + * available. + * + * Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved. + * If you have downloaded a copy of the TencentOS binary from Tencent, please + * note that the TencentOS binary is licensed under the BSD 3-Clause License. + * + * If you have downloaded a copy of the TencentOS source code from Tencent, + * please note that TencentOS source code is licensed under the BSD 3-Clause + * License, except for the third-party components listed below which are + * subject to different license terms. Your integration of TencentOS into your + * own projects may require compliance with the BSD 3-Clause License, as well + * as the other licenses applicable to the third-party components included + * within TencentOS. + *---------------------------------------------------------------------------*/ + +#include "tos_at_gps.h" + +__STATIC__ at_agent_t at_agent; + +__STATIC__ k_stack_t at_parser_task_stack[AT_PARSER_TASK_STACK_SIZE]; + + +__STATIC__ int at_getchar(void) +{ + uint8_t chr; + k_err_t err; + + if (tos_sem_pend(&AT_AGENT->at_rx_sem, TOS_TIME_FOREVER) != K_ERR_NONE) { + return -1; + } + + err = tos_chr_fifo_pop(&AT_AGENT->at_rx_fifo, &chr); + + return err == K_ERR_NONE ? chr : -1; +} + +__STATIC__ at_event_t *at_event_do_get(char *buffer, size_t buffer_len) +{ + int i = 0; + at_event_t *event_table = K_NULL, *event = K_NULL; + size_t event_table_size = 0, event_len; + + event_table = AT_AGENT->event_table; + event_table_size = AT_AGENT->event_table_size; + + for (i = 0; i < event_table_size; ++i) { + event = &event_table[i]; + event_len = strlen(event->event_header); + + if (buffer_len < event_len) { + continue; + } + + if (strncmp(event->event_header, buffer, event_len) == 0) { + return event; + } + } + + return K_NULL; +} + +__STATIC__ at_event_t *at_get_event(void) +{ + char *buffer; + size_t buffer_len; + + buffer = AT_AGENT->cmd_buffer; + buffer_len = strlen(AT_AGENT->cmd_buffer); + + return at_event_do_get(buffer, buffer_len); +} + +__STATIC__ int at_readline(void) +{ + int chr, last_chr = 0; + at_event_t *at_event = K_NULL; + char *buf = AT_AGENT->cmd_buffer; + + while (K_TRUE) { + if (buf - AT_AGENT->cmd_buffer >= (AT_AGENT->cmd_buffer_size - 1)) { + return -1; + } + + chr = at_getchar(); + if (chr < 0) { + return -1; + } + + if (chr == '\n' && last_chr == '\r') { + *--buf = '\0'; +// tos_kprintln(AT_AGENT->cmd_buffer); + + at_event = at_get_event(); + if (at_event && at_event->event_callback) { + at_event->event_callback(AT_AGENT->cmd_buffer); + } + return 0; + } else if (chr == '\n') { + *buf = '\0'; + return 0; + } + + *buf++ = chr; + last_chr = chr; + } +} + + +__STATIC__ void at_parser(void *arg) +{ + while (K_TRUE) { + at_readline(); + } +} + +__STATIC__ at_data_channel_t *at_channel_get(int channel_id, int is_alloc) +{ + /* + if is_alloc is K_TRUE, means we are allocating a channel with certain id, + data_channel[channel_id] must be free if return none K_NULL. + otherwise if is_alloc is K_FALSE, means we are trying to get a channel with + certain id, data_channel[channel_id] must be not free if return none K_NULL. + */ + at_data_channel_t *data_channel = K_NULL; + + if (channel_id < 0 || channel_id >= AT_DATA_CHANNEL_NUM) { + return K_NULL; + } + + data_channel = &AT_AGENT->data_channel[channel_id]; + + if (is_alloc && data_channel->is_free) { + return data_channel; + } + + if (!is_alloc && !data_channel->is_free) { + return data_channel; + } + + return K_NULL; +} + + +__API__ int tos_at_gps_channel_read(int channel_id, uint8_t *buffer, size_t buffer_len) +{ + int read_len; + size_t total_read_len = 0; + at_data_channel_t *data_channel = K_NULL; + +// printf("===\n"); + + data_channel = at_channel_get(channel_id, K_FALSE); + if (!data_channel || data_channel->status == AT_CHANNEL_STATUS_BROKEN) { + return -1; + } + +// printf("==9\n"); + if (tos_mutex_pend(&data_channel->rx_lock) != K_ERR_NONE) { + return total_read_len; + } +// printf("==8\n"); + read_len = tos_chr_fifo_pop_stream(&data_channel->rx_fifo, buffer, buffer_len); + + tos_mutex_post(&data_channel->rx_lock); + + total_read_len += read_len; + return total_read_len; + +} + + +__API__ int tos_at_gps_channel_write(int channel_id, uint8_t *buffer, size_t buffer_len) +{ + int ret; + at_data_channel_t *data_channel = K_NULL; +// printf("++\n"); + data_channel = at_channel_get(channel_id, K_FALSE); + if (!data_channel) { +// printf("+++\n"); + return -1; + } + + if (tos_mutex_pend(&data_channel->rx_lock) != K_ERR_NONE) { + return -1; + } +// printf("++9\n"); + tos_chr_fifo_flush(&data_channel->rx_fifo); + ret = tos_chr_fifo_push_stream(&data_channel->rx_fifo, buffer, buffer_len); + + tos_mutex_post(&data_channel->rx_lock); + + return ret; +} + +__STATIC_INLINE__ int at_channel_construct(at_data_channel_t *data_channel) +{ + uint8_t *fifo_buffer = K_NULL; + + fifo_buffer = tos_mmheap_alloc(AT_DATA_CHANNEL_FIFO_BUFFER_SIZE); + if (!fifo_buffer) { + return -1; + } + + if (tos_mutex_create(&data_channel->rx_lock) != K_ERR_NONE) { + goto errout; + } + + data_channel->rx_fifo_buffer = fifo_buffer; + tos_chr_fifo_create(&data_channel->rx_fifo, fifo_buffer, AT_DATA_CHANNEL_FIFO_BUFFER_SIZE); + + data_channel->is_free = K_FALSE; + data_channel->status = AT_CHANNEL_STATUS_WORKING; + + return 0; + +errout: + tos_mmheap_free(fifo_buffer); + return -1; +} + + +__API__ int tos_at_gps_channel_alloc(void) +{ + int id = 0; + at_data_channel_t *data_channel = K_NULL; + + for (id = 0; id < AT_DATA_CHANNEL_NUM; ++id) { + data_channel = &AT_AGENT->data_channel[id]; + if (data_channel->is_free) { + break; + } + } + + if (id == AT_DATA_CHANNEL_NUM || !data_channel) { + return -1; + } + + if (at_channel_construct(data_channel) != 0) { + return -1; + } + + return id; +} + +__API__ int tos_at_gps_channel_free(int channel_id) +{ + at_data_channel_t *data_channel = K_NULL; + + data_channel = at_channel_get(channel_id, K_FALSE); + if (!data_channel) { + return -1; + } + + tos_mutex_destroy(&data_channel->rx_lock); + + tos_mmheap_free(data_channel->rx_fifo_buffer); + tos_chr_fifo_destroy(&data_channel->rx_fifo); + + memset(data_channel, 0, sizeof(at_data_channel_t)); + + data_channel->is_free = K_TRUE; + data_channel->status = AT_CHANNEL_STATUS_HANGING; + + return 0; +} + + +__STATIC__ void at_channel_init(void) +{ + int i = 0; + + for (i = 0; i < AT_DATA_CHANNEL_NUM; ++i) { + memset(&AT_AGENT->data_channel[i], 0, sizeof(at_data_channel_t)); + AT_AGENT->data_channel[i].is_free = K_TRUE; + AT_AGENT->data_channel[i].status = AT_CHANNEL_STATUS_HANGING; + } + + for (i = 0; i < AT_DATA_CHANNEL_NUM; ++i) { + tos_at_gps_channel_alloc(); + } +} + +__STATIC__ void at_channel_deinit(void) +{ + int i = 0; + + for (i = 0; i < AT_DATA_CHANNEL_NUM; ++i) { + tos_at_gps_channel_free(i); + } +} + + +__STATIC__ void at_event_table_set(at_event_t *event_table, size_t event_table_size) +{ + AT_AGENT->event_table = event_table; + AT_AGENT->event_table_size = event_table_size; +} + + +__API__ int tos_at_gps_init(hal_uart_port_t uart_port, at_event_t *event_table, size_t event_table_size) +{ + void *buffer = K_NULL; + + memset(AT_AGENT, 0, sizeof(at_agent_t)); + + at_event_table_set(event_table, event_table_size); + + at_channel_init(); + + buffer = tos_mmheap_alloc(AT_RX_BUFFER_SIZE); + if (!buffer) { + return -1; + } + + AT_AGENT->cmd_buffer = buffer; + AT_AGENT->cmd_buffer_size = AT_RX_BUFFER_SIZE; + + buffer = tos_mmheap_alloc(AT_RX_BUFFER_SIZE * 2); + if (!buffer) { + return -1; + } + + AT_AGENT->at_rx_fifo_buffer = (uint8_t *)buffer; + tos_chr_fifo_create(&AT_AGENT->at_rx_fifo, buffer, AT_RX_BUFFER_SIZE * 2); + + if (tos_sem_create(&AT_AGENT->at_rx_sem, (k_sem_cnt_t)0u) != K_ERR_NONE) { + goto errout0; + } + + if (tos_task_create(&AT_AGENT->parser, "at_parser", at_parser, + K_NULL, AT_PARSER_TASK_PRIO, at_parser_task_stack, + AT_PARSER_TASK_STACK_SIZE, 0) != K_ERR_NONE) { + goto errout1; + } + + if (tos_hal_uart_init(&AT_AGENT->uart, uart_port) != 0) { + goto errout1; + } + + return 0; + +errout1: + tos_sem_destroy(&AT_AGENT->at_rx_sem); + +errout0: + tos_mmheap_free(AT_AGENT->at_rx_fifo_buffer); + AT_AGENT->at_rx_fifo_buffer = K_NULL; + tos_chr_fifo_destroy(&AT_AGENT->at_rx_fifo); + + return -1; +} + +__API__ void tos_at_gps_deinit(void) +{ + tos_task_destroy(&AT_AGENT->parser); + tos_sem_destroy(&AT_AGENT->at_rx_sem); + tos_hal_uart_deinit(&AT_AGENT->uart); + + tos_mmheap_free(AT_AGENT->at_rx_fifo_buffer); + AT_AGENT->at_rx_fifo_buffer = K_NULL; + tos_chr_fifo_destroy(&AT_AGENT->at_rx_fifo); + + at_channel_deinit(); +} + +__API__ void tos_at_gps_send(const char *format, ...) +{ + va_list args; + size_t cmd_len = 0; + static char buffer[AT_OUTPUT_MAX]; + + va_start(args, format); + cmd_len =vsnprintf(buffer, sizeof(buffer), format, args); + va_end(args); + tos_hal_uart_write(&AT_AGENT->uart, buffer, cmd_len, 0xFFFF); +} + +__API__ void tos_at_gps_uart_input_byte(uint8_t data) +{ + if (tos_chr_fifo_push(&AT_AGENT->at_rx_fifo, data) == K_ERR_NONE) { + tos_sem_post(&AT_AGENT->at_rx_sem); + } +} + diff --git a/board/BDW01-STM32L496VG/BSP/Src/usart.c b/board/BDW01-STM32L496VG/BSP/Src/usart.c new file mode 100644 index 00000000..f7384f1a --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/usart.c @@ -0,0 +1,374 @@ +/** + ****************************************************************************** + * File Name : USART.c + * Description : This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "usart.h" + +/* USER CODE BEGIN 0 */ +uint8_t data2; +uint8_t data3; +uint8_t data4; +uint8_t datal1; +/* USER CODE END 0 */ + +UART_HandleTypeDef huart1; +UART_HandleTypeDef huart2; +UART_HandleTypeDef huart3; +UART_HandleTypeDef huart4; +UART_HandleTypeDef hlpuart1; + +/* USART1 init function */ + +void MX_USART1_UART_Init(void) +{ + + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + +} +/* USART2 init function */ + +void MX_USART2_UART_Init(void) +{ + + huart2.Instance = USART2; + huart2.Init.BaudRate = 57600; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + HAL_UART_Receive_IT(&huart2, &data2, 1); + +} +/* USART3 init function */ + +void MX_USART3_UART_Init(void) +{ + + huart3.Instance = USART3; + huart3.Init.BaudRate = 9600; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart3) != HAL_OK) + { + Error_Handler(); + } + HAL_UART_Receive_IT(&huart3, &data3, 1); +} + +/* UART4 init function */ +void MX_UART4_Init(void) +{ + + huart4.Instance = UART4; + huart4.Init.BaudRate = 115200; + huart4.Init.WordLength = UART_WORDLENGTH_8B; + huart4.Init.StopBits = UART_STOPBITS_1; + huart4.Init.Parity = UART_PARITY_NONE; + huart4.Init.Mode = UART_MODE_TX_RX; + huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart4.Init.OverSampling = UART_OVERSAMPLING_16; + huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart4) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + HAL_UART_Receive_IT(&huart4, &data4, 1); +} + +/* LPUART1 init function */ +void MX_LPUART1_UART_Init(void) +{ + + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 209700; + hlpuart1.Init.WordLength = UART_WORDLENGTH_7B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + HAL_UART_Receive_IT(&hlpuart1, &datal1, 1); +} + +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + + GPIO_InitTypeDef GPIO_InitStruct; + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspInit 0 */ + + /* USER CODE END LPUART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_LPUART1_CLK_ENABLE(); + + /**LPUART1 GPIO Configuration + PB10 ------> LPUART1_RX + PB11 ------> LPUART1_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_MspInit 1 */ + + /* USER CODE END LPUART1_MspInit 1 */ + } + else if(huart->Instance==UART4) + { + /* USER CODE BEGIN UART4_MspInit 0 */ + + /* USER CODE END UART4_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_UART4_CLK_ENABLE(); + + /**UART4 GPIO Configuration + PA0 ------> UART4_TX + PA1 ------> UART4_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF8_UART4; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN UART4_MspInit 1 */ + + /* USER CODE END UART4_MspInit 1 */ + } + else if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USART2 interrupt Init */ + HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(USART2_IRQn); + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } + else if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspInit 0 */ + + /* USER CODE END USART3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART3_CLK_ENABLE(); + + /**USART3 GPIO Configuration + PC4 ------> USART3_TX + PC5 ------> USART3_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USART3 interrupt Init */ + HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(USART3_IRQn); + /* USER CODE BEGIN USART3_MspInit 1 */ + + /* USER CODE END USART3_MspInit 1 */ + } + +} + +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + + if(huart->Instance==LPUART1) + { + /* USER CODE BEGIN LPUART1_MspDeInit 0 */ + + /* USER CODE END LPUART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPUART1_CLK_DISABLE(); + + /**LPUART1 GPIO Configuration + PB10 ------> LPUART1_RX + PB11 ------> LPUART1_TX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11); + + /* USER CODE BEGIN LPUART1_MspDeInit 1 */ + + /* USER CODE END LPUART1_MspDeInit 1 */ + } + else if(huart->Instance==UART4) + { + /* USER CODE BEGIN UART4_MspDeInit 0 */ + + /* USER CODE END UART4_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_UART4_CLK_DISABLE(); + + /**UART4 GPIO Configuration + PA0 ------> UART4_TX + PA1 ------> UART4_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1); + + /* USER CODE BEGIN UART4_MspDeInit 1 */ + + /* USER CODE END UART4_MspDeInit 1 */ + } + else if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + else if(huart->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PA2 ------> USART2_TX + PA3 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); + + /* USART2 interrupt DeInit */ + HAL_NVIC_DisableIRQ(USART2_IRQn); + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } + else if(huart->Instance==USART3) + { + /* USER CODE BEGIN USART3_MspDeInit 0 */ + + /* USER CODE END USART3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART3_CLK_DISABLE(); + + /**USART3 GPIO Configuration + PC4 ------> USART3_TX + PC5 ------> USART3_RX + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5); + + /* USART3 interrupt DeInit */ + HAL_NVIC_DisableIRQ(USART3_IRQn); + /* USER CODE BEGIN USART3_MspDeInit 1 */ + + /* USER CODE END USART3_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/BSP/Src/user_usb_uart.c b/board/BDW01-STM32L496VG/BSP/Src/user_usb_uart.c new file mode 100644 index 00000000..5f04b1cf --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/Src/user_usb_uart.c @@ -0,0 +1,77 @@ + +#include +#include + +#include "user_usb_uart.h" +#include "usb_host.h" +#include "usbh_cdc.h" + +uint8_t da_flag =0; + +uint8_t aUsbRxBuffer[MAX_USBRX_BUFFER_LENGTH]; +uint8_t bUsbRxBuffer[CUSB_BUFFER_NUMBER][MAX_USBRX_BUFFER_LENGTH+1]; +uint8_t bUsbBufLength[CUSB_BUFFER_NUMBER]; + +uint8_t CurrentUsbBufNumPoint = 0; + +extern USBH_HandleTypeDef hUsbHostFS; +extern uint8_t Recv_buf[MAX_USBRX_BUFFER_LENGTH]; + + +void Usb_Buff_Init(void) +{ + for(int ti=0; ti< CUSB_BUFFER_NUMBER; ti++) + { + bUsbBufLength[ti] = 0; + memset(bUsbRxBuffer[ti],0,sizeof(bUsbRxBuffer[ti])); + } +} + +uint8_t ReadUsbBuffData(uint8_t *dBuffer, uint8_t len) +{ + uint8_t buflen =0; + if(bUsbBufLength[CurrentUsbBufNumPoint]>0) + { + memset(dBuffer,0,len); + buflen = bUsbBufLength[CurrentUsbBufNumPoint]; + memcpy(dBuffer,(const char *)bUsbRxBuffer[CurrentUsbBufNumPoint],buflen); + memset(bUsbRxBuffer[CurrentUsbBufNumPoint],0,sizeof(bUsbRxBuffer[CurrentUsbBufNumPoint])); + bUsbBufLength[CurrentUsbBufNumPoint] = 0; + CurrentUsbBufNumPoint++; + if(CurrentUsbBufNumPoint >= CUSB_BUFFER_NUMBER) + CurrentUsbBufNumPoint = 0; + } + return buflen; +} +// +void Check_empty_buffer() +{ + uint8_t i; + for(i=0;i0) + { + CurrentUsbBufNumPoint++; + if(CurrentUsbBufNumPoint >= CUSB_BUFFER_NUMBER) + CurrentUsbBufNumPoint=0; + } + else + break; + } +} +// +void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost) +{ + uint32_t i,rec_len=0; + USBH_CDC_GetLastReceivedDataSize(phost); + rec_len = strlen(aUsbRxBuffer); + if(rec_len>0) + { + Check_empty_buffer(); + memcpy(bUsbRxBuffer[CurrentUsbBufNumPoint],aUsbRxBuffer,rec_len); + bUsbBufLength[CurrentUsbBufNumPoint] = rec_len; + memset(aUsbRxBuffer,0,sizeof(aUsbRxBuffer)); + } +} + + diff --git a/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer.c b/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer.c new file mode 100644 index 00000000..372b308a --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer.c @@ -0,0 +1,200 @@ +#include "stm32l4xx_hal.h" +#include "mcu_init.h" +#include "tos_k.h" +#include "mqttclient.h" +#include "cjson.h" +#include "sal_module_wrapper.h" + + + +//#define USE_ESP8266 +//#define USE_NB_BC35 +//#define USE_BC26 +//#define USE_EC200S +#define USE_M5313 + + +#if defined(USE_ESP8266) +#include "esp8266.h" +#elif defined(USE_BC26) +#include "bc26.h" +#elif defined(USE_EC200S) +#include "ec200s.h" +#elif defined(USE_M5313) +#include "m5313.h" + +#endif + +uint8_t module_sel=0; //0---M5313; 1---wifi; 2---BT; 3---Lora + + +#ifdef USE_ESP8266 +static hal_uart_port_t esp8266_port = HAL_UART_PORT_0; + +void mqtt_set_esp8266_port(hal_uart_port_t port) { + esp8266_port = port; +} +#endif + +k_event_t report_result_event; +k_event_flag_t report_success = 1<<0; +k_event_flag_t report_fail = 1<<1; + +static void tos_topic_handler(void* client, message_data_t* msg) +{ + (void) client; + cJSON* cjson_root = NULL; + cJSON* cjson_status = NULL; + char* status = NULL; + k_event_flag_t event_flag = report_fail; + + /* ´òÓ¡ÈÕÖ¾ */ + MQTT_LOG_I("-----------------------------------------------------------------------------------"); + MQTT_LOG_I("%s:%d %s()...\ntopic: %s, qos: %d. \nmessage:\n\t%s\n", __FILE__, __LINE__, __FUNCTION__, + msg->topic_name, msg->message->qos, (char*)msg->message->payload); + MQTT_LOG_I("-----------------------------------------------------------------------------------\n"); + + /* ʹÓÃcjson½âÎöÉϱ¨ÏìÓ¦Êý¾Ý */ + cjson_root = cJSON_Parse((char*)msg->message->payload); + if (cjson_root == NULL) { + printf("report reply message parser fail\r\n"); + event_flag = report_fail; + goto exit; + } + + /* ÌáÈ¡status״̬ */ + cjson_status = cJSON_GetObjectItem(cjson_root, "status"); + status = cJSON_GetStringValue(cjson_status); + if (cjson_status == NULL || status == NULL) { + printf("report reply status parser fail\r\n"); + event_flag = report_fail; + goto exit; + } + + /* ÅжÏstatus״̬ */ + if (strstr(status,"success")) { + event_flag = report_success; + }else { + event_flag = report_fail; + } + +exit: + cJSON_Delete(cjson_root); + cjson_root = NULL; + status = NULL; + + tos_event_post(&report_result_event, event_flag); + + return; +} + +#define REPORT_DATA_TEMPLATE "{\"method\":\"report\",\"clientToken\":\"00000001\",\"params\":{\"brightness\":%d,\"name\":\"bedroom\"}}" + +char report_buf[200]; + +void mqttclient_task(void) +{ + int error; + + int lightness = 0; + + mqtt_client_t *client = NULL; + + mqtt_message_t msg; + + k_event_flag_t match_flag; + + char host_ip[20]; + + memset(&msg, 0, sizeof(msg)); + +#ifdef USE_ESP8266 + esp8266_sal_init(esp8266_port); + esp8266_join_ap("Supowang", "13975428888"); +#endif + +#ifdef USE_NB_BC35 + int bc35_28_95_sal_init(hal_uart_port_t uart_port); + bc35_28_95_sal_init(HAL_UART_PORT_0); +#endif + +#ifdef USE_BC26 + bc26_sal_init(HAL_UART_PORT_2); +#endif + +#ifdef USE_EC200S + ec200s_sal_init(HAL_UART_PORT_2); +#endif + +#ifdef USE_M5313 + m5313_sal_init(HAL_UART_PORT_2); +#endif + + mqtt_log_init(); + + client = mqtt_lease(); + + tos_event_create(&report_result_event, (k_event_flag_t)0u); + + /* Domain Format: .iotcloud.tencentdevices.com */ + tos_sal_module_parse_domain("S7271EG5D8.iotcloud.tencentdevices.com",host_ip,sizeof(host_ip)); + + /* + These infomation is generated by mqtt_config_gen.py tool in "TencentOS-tiny\tools" directory. + */ + mqtt_set_port(client, "1883"); + mqtt_set_host(client, host_ip); + mqtt_set_client_id(client, "S7271EG5D8bdw01_led"); + mqtt_set_user_name(client, "S7271EG5D8bdw01_led;21010406;12365;4294967295"); + mqtt_set_password(client, "5b5d6b05117634f199e65fb078acbcdabbdda063;hmacsha1"); + mqtt_set_clean_session(client, 1); + + error = mqtt_connect(client); + + MQTT_LOG_D("mqtt connect error is %#0x", error); + + error = mqtt_subscribe(client, "$thing/down/property/S7271EG5D8/bdw01_led", QOS0, tos_topic_handler); + + MQTT_LOG_D("mqtt subscribe error is %#0x", error); + + while (1) { + memset(&msg, 0, sizeof(msg)); + + snprintf(report_buf, sizeof(report_buf), REPORT_DATA_TEMPLATE, lightness++); + + if (lightness > 100) { + lightness = 0; + } + + msg.qos = QOS0; + msg.payload = (void *) report_buf; + + error = mqtt_publish(client, "$thing/up/property/S7271EG5D8/bdw01_led", &msg); + + MQTT_LOG_D("mqtt publish error is %#0x", error); + + tos_event_pend(&report_result_event, + report_success|report_fail, + &match_flag, + TOS_TIME_FOREVER, + TOS_OPT_EVENT_PEND_ANY | TOS_OPT_EVENT_PEND_CLR); + + if (match_flag == report_success) { + printf("report to Tencent IoT Explorer success\r\n"); + + }else if (match_flag == report_fail){ + printf("report to Tencent IoT Explorer fail\r\n"); + } + + tos_task_delay(5000); + } +} + +void application_entry(void *arg) +{ + mqttclient_task(); + while (1) { + printf("This is a mqtt demo!\r\n"); + tos_task_delay(1000); + } +} diff --git a/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer_location.c b/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer_location.c new file mode 100644 index 00000000..3d9c59da --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/app/mqttclient_iot_explorer_location.c @@ -0,0 +1,273 @@ +#include "stm32l4xx_hal.h" +#include "mcu_init.h" +#include "tos_k.h" +#include "mqttclient.h" +#include "cjson.h" +#include "sal_module_wrapper.h" + + + +//#define USE_ESP8266 +//#define USE_NB_BC35 +//#define USE_BC26 +//#define USE_EC200S +#define USE_M5313 + + +#if defined(USE_ESP8266) +#include "esp8266.h" +#elif defined(USE_BC26) +#include "bc26.h" +#elif defined(USE_EC200S) +#include "ec200s.h" +#elif defined(USE_M5313) +#include "m5313.h" + +#endif + +uint8_t module_sel=0; //0---M5313; 1---wifi; 2---BT; 3---Lora + + +#ifdef USE_ESP8266 +static hal_uart_port_t esp8266_port = HAL_UART_PORT_0; + +void mqtt_set_esp8266_port(hal_uart_port_t port) { + esp8266_port = port; +} +#endif + +k_event_t report_result_event; +k_event_flag_t report_success = 1<<0; +k_event_flag_t report_fail = 1<<1; + +/* ½ÓÊÕÊý¾Ý×î´ó»º´æÌõÊý */ +#define MESSAGE_MAX 5 + +typedef struct payload_mail_st { + void* client; + void* payload; +} payload_mail_t; +k_mail_q_t mail_q; +uint8_t mail_pool[MESSAGE_MAX * sizeof(payload_mail_t *)]; + +#define REPORT_DATA_TEMPLATE "{\"method\":\"report\",\"clientToken\":\"00000001\",\"params\":{\"location\":\"%s\"}}" +#define CONTROL_REPLY_DATA "{\"method\":\"control_reply\",\"clientToken\":\"%s\",\"code\":0,\"status\":\"success\"}" + +char report_buf[1024]; +char reply_buf[200]; + + +static void tos_topic_handler(void* client, message_data_t* msg) +{ + (void) client; + cJSON* cjson_root = NULL; + cJSON* cjson_status = NULL; + cJSON* cjson_method = NULL; + cJSON* cjson_params = NULL; + cJSON* cjson_relay_status = NULL; + cJSON* cjson_client_token = NULL; + int relay_status = 0; + char* status = NULL; + char* method = NULL; + char* client_token = NULL; + k_event_flag_t event_flag = report_fail; + + int error; + mqtt_message_t reply_msg; + payload_mail_t payload_mail; + + /* ´òÓ¡ÈÕÖ¾ */ + MQTT_LOG_I("-----------------------------------------------------------------------------------"); + MQTT_LOG_I("%s:%d %s()...\ntopic: %s, qos: %d. \nmessage:\n\t%s\n", __FILE__, __LINE__, __FUNCTION__, + msg->topic_name, msg->message->qos, (char*)msg->message->payload); + MQTT_LOG_I("-----------------------------------------------------------------------------------\n"); + + /* ʹÓÃcjson½âÎöÉϱ¨ÏìÓ¦Êý¾Ý */ + cjson_root = cJSON_Parse((char*)msg->message->payload); + if (cjson_root == NULL) { + printf("report reply message parser fail\r\n"); + event_flag = report_fail; + goto exit; + } + + /* ÌáÈ¡ÏûÏ¢ÀàÐÍ */ + cjson_method = cJSON_GetObjectItem(cjson_root, "method"); + method = cJSON_GetStringValue(cjson_method); + + /* ÅжÏÊÇÄÄÖÖÀàÐ͵ÄÏûÏ¢ */ + if (strstr(method, "report_reply")) { + + /* ÌáÈ¡status״̬ */ + cjson_status = cJSON_GetObjectItem(cjson_root, "status"); + status = cJSON_GetStringValue(cjson_status); + if (cjson_status == NULL || status == NULL) { + printf("report reply status parser fail\r\n"); + event_flag = report_fail; + goto exit; + } + + /* ÅжÏstatus״̬ */ + if (strstr(status,"success")) { + event_flag = report_success; + }else { + event_flag = report_fail; + } + }else if (strstr(method, "control")) { + + //ÊÕµ½Æ½Ì¨Ï·¢µÄ¿ØÖƱ¨ÎÄ£¬ÌáÈ¡client_token£¬ÓÃÓÚÉϱ¨ÏìÓ¦ + cjson_client_token = cJSON_GetObjectItem(cjson_root, "clientToken"); + client_token = cJSON_GetStringValue(cjson_client_token); + + printf("parse client token:%s\r\n", client_token); + + //ÌáÈ¡ relay_status + cjson_params = cJSON_GetObjectItem(cjson_root, "params"); + cjson_relay_status = cJSON_GetObjectItem(cjson_params, "led"); + relay_status = cjson_relay_status->valueint; + + //¸ù¾Ý relay_status Ö´ÐÐÏàÓ¦µÄ¶¯×÷ + if (relay_status == 0) { + HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET); + } else if (relay_status == 1) { + HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET); + } + + memset(reply_buf, 0, sizeof(reply_buf)); + sprintf(reply_buf, CONTROL_REPLY_DATA, client_token); + memset(&reply_msg, 0, sizeof(reply_msg)); + reply_msg.qos = QOS0; + reply_msg.payload = (void *) reply_buf; + + printf("control reply:\r\n\t%s\r\n", reply_buf); + + error = mqtt_publish(payload_mail.client, "$thing/up/property/E2IGF491FP/dev001", &reply_msg); + + MQTT_LOG_D("control reply publish error is %#0x", error); + } + +exit: + cJSON_Delete(cjson_root); + cjson_root = NULL; + status = NULL; + + tos_event_post(&report_result_event, event_flag); + + return; +} + +void mqttclient_task(void) +{ + #define BUFFER_SIZE 128 + int error; + + int lightness = 0; + + mqtt_client_t *client = NULL; + + mqtt_message_t msg; + + k_event_flag_t match_flag; + + char host_ip[20]; + + int len; + uint8_t *buffer = K_NULL; + + memset(&msg, 0, sizeof(msg)); + + gps_init(HAL_UART_PORT_3); + + buffer = tos_mmheap_alloc(BUFFER_SIZE); + +#ifdef USE_ESP8266 + esp8266_sal_init(esp8266_port); + esp8266_join_ap("Supowang", "13975428888"); +#endif + +#ifdef USE_NB_BC35 + int bc35_28_95_sal_init(hal_uart_port_t uart_port); + bc35_28_95_sal_init(HAL_UART_PORT_0); +#endif + +#ifdef USE_BC26 + bc26_sal_init(HAL_UART_PORT_2); +#endif + +#ifdef USE_EC200S + ec200s_sal_init(HAL_UART_PORT_2); +#endif + +#ifdef USE_M5313 + m5313_sal_init(HAL_UART_PORT_2); +#endif + + mqtt_log_init(); + + client = mqtt_lease(); + + tos_event_create(&report_result_event, (k_event_flag_t)0u); + + /* Domain Format: .iotcloud.tencentdevices.com */ + tos_sal_module_parse_domain("OKY0D78DP2.iotcloud.tencentdevices.com",host_ip,sizeof(host_ip)); + + /* + These infomation is generated by mqtt_config_gen.py tool in "TencentOS-tiny\tools" directory. + */ + mqtt_set_port(client, "1883"); + mqtt_set_host(client, host_ip); + mqtt_set_client_id(client, "OKY0D78DP2bd_location"); + mqtt_set_user_name(client, "OKY0D78DP2bd_location;21010406;12365;4294967295"); + mqtt_set_password(client, "55ed32e6ce98deca02ea579954d05a8ba4c442e2;hmacsha1"); + mqtt_set_clean_session(client, 1); + + error = mqtt_connect(client); + + MQTT_LOG_D("mqtt connect error is %#0x", error); + + error = mqtt_subscribe(client, "$thing/down/property/OKY0D78DP2/bd_location", QOS0, tos_topic_handler); + + MQTT_LOG_D("mqtt subscribe error is %#0x", error); + + while (1) { + + if((len =gps_read(1,buffer,BUFFER_SIZE))>0) + { + printf("gps:%s(%d)\n",buffer,len); + memset(&msg, 0, sizeof(msg)); + + snprintf(report_buf, sizeof(report_buf), REPORT_DATA_TEMPLATE, buffer); + + msg.qos = QOS0; + msg.payload = (void *) report_buf; + + error = mqtt_publish(client, "$thing/up/property/OKY0D78DP2/bd_location", &msg); + + MQTT_LOG_D("mqtt publish error is %#0x", error); + + tos_event_pend(&report_result_event, + report_success|report_fail, + &match_flag, + TOS_TIME_FOREVER, + TOS_OPT_EVENT_PEND_ANY | TOS_OPT_EVENT_PEND_CLR); + + if (match_flag == report_success) { + printf("report to Tencent IoT Explorer success\r\n"); + + }else if (match_flag == report_fail){ + printf("report to Tencent IoT Explorer fail\r\n"); + } + + } + + tos_task_delay(5000); + } +} + +void application_entry(void *arg) +{ + mqttclient_task(); + while (1) { + printf("This is a mqtt demo!\r\n"); + tos_task_delay(1000); + } +} diff --git a/board/BDW01-STM32L496VG/BSP/app/ota_download_through_http_sample.c b/board/BDW01-STM32L496VG/BSP/app/ota_download_through_http_sample.c new file mode 100644 index 00000000..80c94cb0 --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/app/ota_download_through_http_sample.c @@ -0,0 +1,64 @@ +#include "m5313.h" +#include "mcu_init.h" +#include "sal_module_wrapper.h" +#include "cmsis_os.h" + +#include "ota_download.h" + +extern ota_flash_drv_t stm32l4_norflash_onchip_drv_ota; +extern ota_flash_prop_t stm32l4_norflash_onchip_prop_ota; + +k_sem_t sem; + +#define TASK1_STK_SIZE 1024 +void user_task(void *arg); +osThreadDef(user_task, osPriorityNormal, 1, TASK1_STK_SIZE); + +#define TASK2_STK_SIZE 1024 +void ota_download_task(void *arg); +osThreadDef(ota_download_task, osPriorityNormal, 1, TASK2_STK_SIZE); + +void user_task(void *arg) +{ + int iter = 0; + + while (K_TRUE) { + osDelay(2000); + + printf("do sth(v0.1)...\n"); + + if (++iter == 2) { + printf("trigger ota download\n"); + tos_sem_post(&sem); + } + } +} + +void ota_download_task(void *arg) +{ + tos_sem_pend(&sem, TOS_TIME_FOREVER); + + m5313_sal_init(HAL_UART_PORT_2); + + uint32_t partition_addr = 0x080ff800; + + if (ota_env_init(OTA_UPDATE_IN_POSITION, partition_addr, &stm32l4_norflash_onchip_drv_ota, &stm32l4_norflash_onchip_prop_ota) < 0) { + printf("env init failed!\n"); + return; + } + + if (!ota_download_http("http://119.139.199.196:2899/patch.bin")) { + printf("download successfully!\n"); + } else { + printf("download failed!\n"); + } +} + +void application_entry(void *arg) +{ + tos_sem_create(&sem, 0); + + osThreadCreate(osThread(user_task), NULL); // Create task1 + osThreadCreate(osThread(ota_download_task), NULL); // Create task2 +} + diff --git a/board/BDW01-STM32L496VG/BSP/app/tcp_through_module.c b/board/BDW01-STM32L496VG/BSP/app/tcp_through_module.c new file mode 100644 index 00000000..e6d1103b --- /dev/null +++ b/board/BDW01-STM32L496VG/BSP/app/tcp_through_module.c @@ -0,0 +1,133 @@ +#include "mcu_init.h" +#include "sal_module_wrapper.h" +#include "cmsis_os.h" + +//#define USE_ESP8266 +//#define USE_SIM800A +//#define USE_BC26 +//#define USE_EC20 +//#define USE_EC200S +#define USE_M5313 + +#ifdef USE_ESP8266 +#include "esp8266.h" +#endif + +#ifdef USE_SIM800A +#include "sim800a.h" +#endif + +#ifdef USE_BC26 +#include "bc26.h" +#endif + +#ifdef USE_EC20 +#include "ec20.h" +#endif + +#ifdef USE_EC200S +#include "ec200s.h" +#endif + +#ifdef USE_M5313 +#include "m5313.h" +#endif + +#define SERVER_TCP_IP "119.139.199.196" + +#define TCP_TEST_TASK0_STK_SIZE 4096 +void tcp_test0(void); +osThreadDef(tcp_test0, osPriorityNormal, 1, TCP_TEST_TASK0_STK_SIZE); + +#define TCP_TEST_TASK1_STK_SIZE 4096 +void tcp_test1(void); +osThreadDef(tcp_test1, osPriorityNormal, 1, TCP_TEST_TASK1_STK_SIZE); + +int socket_id_0 = -1; +int socket_id_1 = -1; + + +#define RECV_LEN 1024 +uint8_t recv_data_0[RECV_LEN]; +uint8_t recv_data_1[RECV_LEN]; + +void tcp_test0(void) +{ + int recv_len = -1; + + while (1) { + tos_sal_module_send(socket_id_0, (const void*)"This is TCP Test!\r\n", strlen("This is TCP Test!\r\n")); + + recv_len = tos_sal_module_recv_timeout(socket_id_0, recv_data_0, sizeof(recv_data_0), 8000); + if (recv_len < 0) { + printf("task0 receive error\n"); + } else if (recv_len == 0) { + printf("task0 receive none\n"); + } else { + recv_data_0[recv_len] = 0; + printf("task0: receive len: %d\nmsg from remote: %s\n", recv_len, recv_data_0); + } + + tos_sleep_ms(2000); + } +} + +void tcp_test1(void) +{ + int recv_len = -1; + + while (1) { + tos_sal_module_send(socket_id_1, (const void *)"Hello Tencent!\r\n", strlen("Hello Tencent!\r\n")); + + recv_len = tos_sal_module_recv_timeout(socket_id_1, recv_data_1, sizeof(recv_data_1), 8000); + if (recv_len < 0) { + printf("task1 receive error\n\r"); + } else if (recv_len == 0) { + printf("task1 receive none\n"); + } else { + recv_data_1[recv_len] = 0; + printf("task1: receive len: %d\nmsg from remote: %s\n", recv_len, recv_data_1); + } + + tos_sleep_ms(2000); + } +} + + +void application_entry(void *arg) +{ +#if defined(USE_ESP8266) + esp8266_sal_init(HAL_UART_PORT_0); + esp8266_join_ap("SheldonDai", "srnr6x9xbhmb0"); +#elif defined(USE_SIM800A) + sim800a_power_on(); + sim800a_sal_init(HAL_UART_PORT_2); +#elif defined(USE_BC26) + bc26_sal_init(HAL_UART_PORT_2); +#elif defined(USE_EC20) + ec20_sal_init(HAL_UART_PORT_0); +#elif defined(USE_EC200S) + ec200s_sal_init(HAL_UART_PORT_2); +#elif defined(USE_M5313) + m5313_sal_init(HAL_UART_PORT_2); +#endif + + socket_id_0 = tos_sal_module_connect(SERVER_TCP_IP, "2898", TOS_SAL_PROTO_TCP); + if (socket_id_0 == -1) { + printf("TCP0 connect failed\r\n"); + } else { + printf("TCP0 connect success! fd: %d\n", socket_id_0); + } + + socket_id_1 = tos_sal_module_connect(SERVER_TCP_IP, "2899", TOS_SAL_PROTO_TCP); + if (socket_id_1 == -1) { + printf("TCP1 connect failed\r\n"); + } else { + printf("TCP1 connect success! fd: %d\n", socket_id_1); + } + + + osThreadCreate(osThread(tcp_test0), NULL); + osThreadCreate(osThread(tcp_test1), NULL); +} + diff --git a/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.sct b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.sct new file mode 100644 index 00000000..c3369f91 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00040000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvguix.Administrator new file mode 100644 index 00000000..fc8a2daa --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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..\..\..\..\examples\hello_world\hello_world.c + hello_world.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvprojx b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvprojx new file mode 100644 index 00000000..dd2c976e --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/hello_world/BDW01-STM32L496VG.uvprojx @@ -0,0 +1,1122 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + BDW01-STM32L496VG + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\BDW01-STM32L496VG\ + BDW01-STM32L496VG + 1 + 0 + 1 + 1 + 0 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + USE_HAL_DRIVER,STM32F103xE + + ..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\kernel\hal\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l496xx.s + 2 + .\startup_stm32l496xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\..\BSP\Src\stm32l4xx_it.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_can.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c + + + stm32l4xx_hal_comp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_crc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + stm32l4xx_hal_crc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + stm32l4xx_hal_cryp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + stm32l4xx_hal_cryp_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_dcmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c + + + stm32l4xx_hal_dfsdm.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm.c + + + stm32l4xx_hal_dfsdm_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm_ex.c + + + stm32l4xx_hal_dma.c + 1 + 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+ + stm32l4xx_hal_opamp_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_opamp_ex.c + + + stm32l4xx_hal_ospi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ospi.c + + + stm32l4xx_hal_pcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c + + + stm32l4xx_hal_pcd_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_qspi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_rng.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + + + stm32l4xx_hal_rtc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + + + stm32l4xx_hal_rtc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + + + stm32l4xx_hal_sai.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai.c + + + stm32l4xx_hal_sai_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai_ex.c + + + stm32l4xx_hal_sd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd.c + + + stm32l4xx_hal_sd_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd_ex.c + + + stm32l4xx_hal_smartcard.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smartcard.c + + + stm32l4xx_hal_smartcard_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smartcard_ex.c + + + stm32l4xx_hal_smbus.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smbus.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + stm32l4xx_hal_sram.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c + + + stm32l4xx_hal_swpmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_swpmi.c + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_timebase_tim_template.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_timebase_tim_template.c + + + stm32l4xx_hal_tsc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tsc.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal_usart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + + + stm32l4xx_hal_usart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + + + stm32l4xx_hal_wwdg.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_wwdg.c + + + stm32l4xx_ll_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_adc.c + + + stm32l4xx_ll_comp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_comp.c + + + stm32l4xx_ll_crc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_crc.c + + + stm32l4xx_ll_crs.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_crs.c + + + stm32l4xx_ll_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dac.c + + + stm32l4xx_ll_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma.c + + + stm32l4xx_ll_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma2d.c + + + stm32l4xx_ll_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_exti.c + + + stm32l4xx_ll_fmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_fmc.c + + + stm32l4xx_ll_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_gpio.c + + + stm32l4xx_ll_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_i2c.c + + + stm32l4xx_ll_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lptim.c + + + stm32l4xx_ll_lpuart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lpuart.c + + + stm32l4xx_ll_opamp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_opamp.c + + + stm32l4xx_ll_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_pwr.c + + + stm32l4xx_ll_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rcc.c + + + stm32l4xx_ll_rng.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rng.c + + + stm32l4xx_ll_rtc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rtc.c + + + stm32l4xx_ll_sdmmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_sdmmc.c + + + stm32l4xx_ll_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_spi.c + + + stm32l4xx_ll_swpmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_swpmi.c + + + stm32l4xx_ll_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_tim.c + + + stm32l4xx_ll_usart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usart.c + + + stm32l4xx_ll_usb.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c + + + stm32l4xx_ll_utils.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_utils.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\..\BSP\Src\system_stm32l4xx.c + + + + + tos/arch + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + + + tos/kernel + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + + + tos/cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + tos/config + + + tos_config.h + 5 + ..\..\TOS_CONFIG\tos_config.h + + + + + examples + + + hello_world.c + 1 + ..\..\..\..\examples\hello_world\hello_world.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/hello_world/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/hello_world/startup_stm32l496xx.s new file mode 100644 index 00000000..7ed6a1e3 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/hello_world/startup_stm32l496xx.s @@ -0,0 +1,451 @@ +;******************************************************************************* +;* File Name : startup_stm32l496xx.s +;* Author : MCD Application Team +;* Description : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* @attention +;* +;* Copyright (c) 2017 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x8000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1, ADC2 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt + DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt + DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD LCD_IRQHandler ; LCD global interrupt + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS error + DCD I2C4_EV_IRQHandler ; I2C4 event + DCD I2C4_ER_IRQHandler ; I2C4 error + DCD DCMI_IRQHandler ; DCMI global interrupt + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD DMA2D_IRQHandler ; DMA2D global interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_TIM17_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +DFSDM1_FLT3_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +OTG_FS_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SAI2_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +LCD_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +DCMI_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +DMA2D_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.sct b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.sct new file mode 100644 index 00000000..c3369f91 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00040000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.uvguix.Administrator new file mode 100644 index 00000000..07d91c28 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/BDW01-STM32L496VG.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
+ + + + BDW01-STM32L496VG + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\app\ + BDW01-STM32L496VG-mqttclient_iot_explorer + 1 + 0 + 1 + 1 + 0 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 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+ + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l496xx.s + 2 + .\startup_stm32l496xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\..\BSP\Src\stm32l4xx_it.c + + + mymath.c + 1 + ..\..\BSP\Src\mymath.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_can.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c + + + stm32l4xx_hal_comp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_crc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + stm32l4xx_hal_crc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + stm32l4xx_hal_cryp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + stm32l4xx_hal_cryp_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_dcmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c + + + stm32l4xx_hal_dfsdm.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm.c + + + stm32l4xx_hal_dfsdm_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm_ex.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma2d.c + + + stm32l4xx_hal_dsi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dsi.c + + + stm32l4xx_hal_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + + + stm32l4xx_hal_firewall.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_firewall.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gfxmmu.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gfxmmu.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_hash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash.c + + + stm32l4xx_hal_hash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash_ex.c + + + stm32l4xx_hal_hcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hcd.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_irda.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_irda.c + + + stm32l4xx_hal_iwdg.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + + + stm32l4xx_hal_lcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lcd.c + + + stm32l4xx_hal_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lptim.c + + + stm32l4xx_hal_ltdc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ltdc.c + + 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stm32l4xx_ll_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma2d.c + + + stm32l4xx_ll_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_exti.c + + + stm32l4xx_ll_fmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_fmc.c + + + stm32l4xx_ll_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_gpio.c + + + stm32l4xx_ll_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_i2c.c + + + stm32l4xx_ll_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lptim.c + + + stm32l4xx_ll_lpuart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lpuart.c + + + stm32l4xx_ll_opamp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_opamp.c + + + stm32l4xx_ll_pwr.c + 1 + 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..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + + + + + tos/cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + tos/config + + + tos_config.h + 5 + ..\..\TOS_CONFIG\tos_config.h + + + + + at + + + tos_at.c + 1 + ..\..\..\..\net\at\src\tos_at.c + + + + + net + + + sal_module_wrapper.c + 1 + ..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + + + + + devices + + + m5313.c + 1 + ..\..\..\..\devices\m5313\m5313.c + + + + + app + + + mqttclient_iot_explorer.c + 1 + ..\..\BSP\app\mqttclient_iot_explorer.c + + + + + mqttclient + + + mqttclient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqttclient\mqttclient.c + + + + + mqttclient/mqtt + + + MQTTConnectClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTConnectClient.c + + + MQTTConnectServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTConnectServer.c + + + MQTTDeserializePublish.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTDeserializePublish.c + + + MQTTFormat.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTFormat.c + + + MQTTPacket.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTPacket.c + + + MQTTSerializePublish.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSerializePublish.c + + + MQTTSubscribeClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSubscribeClient.c + + + MQTTSubscribeServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSubscribeServer.c + + + MQTTUnsubscribeClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTUnsubscribeClient.c + + + MQTTUnsubscribeServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTUnsubscribeServer.c + + + + + mqttclient/salof + + + arch.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\arch\tencentos-tiny\arch.c + + + fifo.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\fifo.c + + + format.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\format.c + + + salof.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\salof.c + + + + + mqttclient/common + + + random.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\random.c + + + mqtt_list.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\mqtt_list.c + + + + + mqttclient/network + + + network.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\network.c + + + nettype_tcp.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\nettype_tcp.c + + + nettype_tls.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\nettype_tls.c + + + + + mqttclient/platform + + + platform_memory.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_memory.c + + + platform_mutex.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_mutex.c + + + platform_net_socket.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_net_socket.c + + + platform_thread.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_thread.c + + + platform_timer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_timer.c + + + + + cjson + + + cJSON.c + 1 + ..\..\..\..\components\utils\JSON\src\cJSON.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/startup_stm32l496xx.s new file mode 100644 index 00000000..7ed6a1e3 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer/startup_stm32l496xx.s @@ -0,0 +1,451 @@ +;******************************************************************************* +;* File Name : startup_stm32l496xx.s +;* Author : MCD Application Team +;* Description : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* @attention +;* +;* Copyright (c) 2017 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x8000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1, ADC2 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt + DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt + DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD LCD_IRQHandler ; LCD global interrupt + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS error + DCD I2C4_EV_IRQHandler ; I2C4 event + DCD I2C4_ER_IRQHandler ; I2C4 error + DCD DCMI_IRQHandler ; DCMI global interrupt + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD DMA2D_IRQHandler ; DMA2D global interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_TIM17_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +DFSDM1_FLT3_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +OTG_FS_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SAI2_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +LCD_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +DCMI_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +DMA2D_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.sct b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.sct new file mode 100644 index 00000000..c3369f91 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00040000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.uvguix.Administrator new file mode 100644 index 00000000..c229101d --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/BDW01-STM32L496VG.uvprojx @@ -0,0 +1,1347 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + BDW01-STM32L496VG + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\app\ + BDW01-STM32L496VG-mqttclient_iot_explorer_location + 1 + 0 + 1 + 1 + 0 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL 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..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\kernel\hal\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\devices\sht3x;..\..\..\..\devices\lsm6dsl;..\..\..\..\devices\l2832tsww;..\..\..\..\devices\4G_EC20;..\..\..\..\devices\gps;..\..\..\..\devices\m5313;..\..\..\..\net\at\include;..\..\..\..\net\sal_module_wrapper;..\..\..\..\net\4G_module_wrapper;..\..\..\..\net\lora_module_wrapper;..\..\..\..\net\passthrough;..\..\..\..\components\math;..\..\..\..\components\connectivity\mqttclient\common;..\..\..\..\components\connectivity\mqttclient\common\log;..\..\..\..\components\connectivity\mqttclient\mqtt;..\..\..\..\components\connectivity\mqttclient\mqttclient;..\..\..\..\components\connectivity\mqttclient\network;..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny;..\..\..\..\components\utils\JSON\include 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..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_dcmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c + + + stm32l4xx_hal_dfsdm.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm.c + + + stm32l4xx_hal_dfsdm_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm_ex.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma2d.c + + + stm32l4xx_hal_dsi.c + 1 + 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..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash.c + + + stm32l4xx_hal_hash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash_ex.c + + + stm32l4xx_hal_hcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hcd.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_irda.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_irda.c + + + stm32l4xx_hal_iwdg.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + + + stm32l4xx_hal_lcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lcd.c + + + stm32l4xx_hal_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lptim.c + + + stm32l4xx_hal_ltdc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ltdc.c + + + stm32l4xx_hal_ltdc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ltdc_ex.c + + + stm32l4xx_hal_nand.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_nand.c + + + stm32l4xx_hal_nor.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_nor.c + + + stm32l4xx_hal_opamp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_opamp.c + + + stm32l4xx_hal_opamp_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_opamp_ex.c + + + stm32l4xx_hal_ospi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ospi.c + + + stm32l4xx_hal_pcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd.c + + + stm32l4xx_hal_pcd_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pcd_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_qspi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_qspi.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_rng.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c + + + stm32l4xx_hal_rtc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c + + + stm32l4xx_hal_rtc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c + + + stm32l4xx_hal_sai.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai.c + + + stm32l4xx_hal_sai_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sai_ex.c + + + stm32l4xx_hal_sd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd.c + + + stm32l4xx_hal_sd_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd_ex.c + + + stm32l4xx_hal_smartcard.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smartcard.c + + + stm32l4xx_hal_smartcard_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smartcard_ex.c + + + stm32l4xx_hal_smbus.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_smbus.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + stm32l4xx_hal_sram.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c + + + stm32l4xx_hal_swpmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_swpmi.c + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_timebase_tim_template.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_timebase_tim_template.c + + + stm32l4xx_hal_tsc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tsc.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal_usart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart.c + + + stm32l4xx_hal_usart_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c + + + stm32l4xx_hal_wwdg.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_wwdg.c + + + stm32l4xx_ll_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_adc.c + + + stm32l4xx_ll_comp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_comp.c + + + stm32l4xx_ll_crc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_crc.c + + + stm32l4xx_ll_crs.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_crs.c + + + stm32l4xx_ll_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dac.c + + + stm32l4xx_ll_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma.c + + + stm32l4xx_ll_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma2d.c + + + stm32l4xx_ll_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_exti.c + + + stm32l4xx_ll_fmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_fmc.c + + + stm32l4xx_ll_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_gpio.c + + + stm32l4xx_ll_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_i2c.c + + + stm32l4xx_ll_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lptim.c + + + stm32l4xx_ll_lpuart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lpuart.c + + + stm32l4xx_ll_opamp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_opamp.c + + + stm32l4xx_ll_pwr.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_pwr.c + + + stm32l4xx_ll_rcc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rcc.c + + + stm32l4xx_ll_rng.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rng.c + + + stm32l4xx_ll_rtc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_rtc.c + + + stm32l4xx_ll_sdmmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_sdmmc.c + + + stm32l4xx_ll_spi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_spi.c + + + stm32l4xx_ll_swpmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_swpmi.c + + + stm32l4xx_ll_tim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_tim.c + + + stm32l4xx_ll_usart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usart.c + + + stm32l4xx_ll_usb.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c + + + stm32l4xx_ll_utils.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_utils.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\..\BSP\Src\system_stm32l4xx.c + + + + + tos/arch + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + + + tos/kernel + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + + + + + tos/cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + tos/config + + + tos_config.h + 5 + ..\..\TOS_CONFIG\tos_config.h + + + + + at + + + tos_at.c + 1 + ..\..\..\..\net\at\src\tos_at.c + + + + + net + + + sal_module_wrapper.c + 1 + ..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + + + + + devices + + + m5313.c + 1 + ..\..\..\..\devices\m5313\m5313.c + + + + + app + + + mqttclient_iot_explorer_location.c + 1 + ..\..\BSP\app\mqttclient_iot_explorer_location.c + + + + + mqttclient + + + mqttclient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqttclient\mqttclient.c + + + + + mqttclient/mqtt + + + MQTTConnectClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTConnectClient.c + + + MQTTConnectServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTConnectServer.c + + + MQTTDeserializePublish.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTDeserializePublish.c + + + MQTTFormat.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTFormat.c + + + MQTTPacket.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTPacket.c + + + MQTTSerializePublish.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSerializePublish.c + + + MQTTSubscribeClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSubscribeClient.c + + + MQTTSubscribeServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTSubscribeServer.c + + + MQTTUnsubscribeClient.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTUnsubscribeClient.c + + + MQTTUnsubscribeServer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\mqtt\MQTTUnsubscribeServer.c + + + + + mqttclient/salof + + + arch.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\arch\tencentos-tiny\arch.c + + + fifo.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\fifo.c + + + format.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\format.c + + + salof.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\log\salof.c + + + + + mqttclient/common + + + random.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\random.c + + + mqtt_list.c + 1 + ..\..\..\..\components\connectivity\mqttclient\common\mqtt_list.c + + + + + mqttclient/network + + + network.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\network.c + + + nettype_tcp.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\nettype_tcp.c + + + nettype_tls.c + 1 + ..\..\..\..\components\connectivity\mqttclient\network\nettype_tls.c + + + + + mqttclient/platform + + + platform_memory.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_memory.c + + + platform_mutex.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_mutex.c + + + platform_net_socket.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_net_socket.c + + + platform_thread.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_thread.c + + + platform_timer.c + 1 + ..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny\platform_timer.c + + + + + cjson + + + cJSON.c + 1 + ..\..\..\..\components\utils\JSON\src\cJSON.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/startup_stm32l496xx.s new file mode 100644 index 00000000..7ed6a1e3 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/mqttclient_iot_explorer_location/startup_stm32l496xx.s @@ -0,0 +1,451 @@ +;******************************************************************************* +;* File Name : startup_stm32l496xx.s +;* Author : MCD Application Team +;* Description : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* @attention +;* +;* Copyright (c) 2017 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x8000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1, ADC2 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt + DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt + DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD LCD_IRQHandler ; LCD global interrupt + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS error + DCD I2C4_EV_IRQHandler ; I2C4 event + DCD I2C4_ER_IRQHandler ; I2C4 error + DCD DCMI_IRQHandler ; DCMI global interrupt + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD DMA2D_IRQHandler ; DMA2D global interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_TIM17_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +DFSDM1_FLT3_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +OTG_FS_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SAI2_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +LCD_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +DCMI_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +DMA2D_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvguix.Administrator new file mode 100644 index 00000000..e1b0ff51 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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+ + + + 0 + 1600 + 900 + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvoptx b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvoptx new file mode 100644 index 00000000..074ecf12 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvoptx @@ -0,0 +1,1356 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ 0 + 0 + + + + + cpu + 0 + 0 + 0 + 0 + + 8 + 65 + 2 + 0 + 0 + 0 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + port_s.S + 0 + 0 + + + 8 + 66 + 1 + 0 + 0 + 0 + ..\..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + tos_cpu.c + 0 + 0 + + + 8 + 67 + 1 + 0 + 0 + 0 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + port_c.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 9 + 68 + 1 + 0 + 0 + 0 + ..\..\..\..\..\osal\cmsis_os\cmsis_os.c + cmsis_os.c + 0 + 0 + + + + + config + 1 + 0 + 0 + 0 + + 10 + 69 + 5 + 0 + 0 + 0 + ..\..\..\TOS_CONFIG\tos_config.h + tos_config.h + 0 + 0 + + + + + at + 1 + 0 + 0 + 0 + + 11 + 70 + 1 + 0 + 0 + 0 + ..\..\..\..\..\net\at\src\tos_at.c + tos_at.c + 0 + 0 + + + + + devices + 1 + 0 + 0 + 0 + + 12 + 71 + 1 + 0 + 0 + 0 + ..\..\..\..\..\devices\m5313\m5313.c + m5313.c + 0 + 0 + + + + + sal_module_wrapper + 0 + 0 + 0 + 0 + + 13 + 72 + 1 + 0 + 0 + 0 + ..\..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + sal_module_wrapper.c + 0 + 0 + + + + + hal + 1 + 0 + 0 + 0 + + 14 + 73 + 1 + 0 + 0 + 0 + ..\..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + tos_hal_uart.c + 0 + 0 + + + + + ota_download + 1 + 0 + 0 + 0 + + 15 + 74 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\download\protocol\http\ota_download_http.c + ota_download_http.c + 0 + 0 + + + 15 + 75 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\download\transport_layer\tcp\module\hal_tcp_module.c + hal_tcp_module.c + 0 + 0 + + + + + ota_common + 1 + 0 + 0 + 0 + + 16 + 76 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\common\flash\ota_flash.c + ota_flash.c + 0 + 0 + + + 16 + 77 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\common\crc\crc8.c + crc8.c + 0 + 0 + + + 16 + 78 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\common\image\ota_image.c + ota_image.c + 0 + 0 + + + 16 + 79 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\common\partition\ota_partition.c + ota_partition.c + 0 + 0 + + + 16 + 80 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\ota\common\env\ota_env.c + ota_env.c + 0 + 0 + + + + + kv + 0 + 0 + 0 + 0 + + 17 + 81 + 1 + 0 + 0 + 0 + ..\..\..\..\..\components\fs\kv\tos_kv.c + tos_kv.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvprojx b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvprojx new file mode 100644 index 00000000..3a22c48e --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/TencentOS_tiny.uvprojx @@ -0,0 +1,887 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + TencentOS_tiny + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin --output=@L.bin !L + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8007800 + 0xc8000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + USE_HAL_DRIVER,STM32L496xx, + + ..\..\..\BSP\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\..\kernel\core\include;..\..\..\TOS_CONFIG;..\..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\..\kernel\pm\include;..\..\..\..\..\osal\cmsis_os;..\..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\BSP\Hardware\DHT11;..\..\..\BSP\Hardware\OLED;..\..\..\BSP\Hardware\BH1750;..\..\..\..\..\devices\m5313;..\..\..\..\..\net\at\include;..\..\..\..\..\kernel\hal\include;..\..\..\..\..\net\sal_module_wrapper;..\..\..\..\..\components\ota\download\include;..\..\..\..\..\components\ota\common\crc;..\..\..\..\..\components\ota\common\image;..\..\..\..\..\components\ota\common\flash;..\..\..\..\..\components\ota\common\partition;..\..\..\..\..\components\ota\common\env;..\..\..\..\..\components\fs\kv\include;..\..\..\..\..\components\ota\common\info;..\..\..\..\..\components\ota\recovery\include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l496xx.s + 2 + .\startup_stm32l496xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\..\BSP\Src\mcu_init.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\..\BSP\Src\stm32l4xx_hal_msp.c + + + usart.c + 1 + ..\..\..\BSP\Src\usart.c + + + i2c.c + 1 + ..\..\..\BSP\Src\i2c.c + + + stm32l4xx_it.c + 1 + ..\..\..\BSP\Src\stm32l4xx_it.c + + + + + examples + + + ota_download_through_http_sample.c + 1 + ..\..\..\BSP\app\ota_download_through_http_sample.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + system_stm32l4xx.c + + + + + Hardware + + + onchip_flash.c + 1 + ..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash.c + + + onchip_flash_ota.c + 1 + ..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash_ota.c + + + + + kernel + + + tos_binary_heap.c + 1 + ..\..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_event.c + 1 + ..\..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\..\kernel\core\tos_global.c + + + tos_mail_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_message_queue.c + + + tos_mmblk.c + 1 + ..\..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\..\kernel\core\tos_pend.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_robin.c + 1 + ..\..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\..\kernel\core\tos_timer.c + + + tos_barrier.c + 1 + ..\..\..\..\..\kernel\core\tos_barrier.c + + + tos_bitmap.c + 1 + ..\..\..\..\..\kernel\core\tos_bitmap.c + + + tos_rwlock.c + 1 + ..\..\..\..\..\kernel\core\tos_rwlock.c + + + tos_stopwatch.c + 1 + ..\..\..\..\..\kernel\core\tos_stopwatch.c + + + + + cpu + + + port_s.S + 2 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + tos_cpu.c + 1 + ..\..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + + + cmsis + + + cmsis_os.c + 1 + ..\..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + config + + + tos_config.h + 5 + ..\..\..\TOS_CONFIG\tos_config.h + + + + + at + + + tos_at.c + 1 + ..\..\..\..\..\net\at\src\tos_at.c + + + + + devices + + + m5313.c + 1 + ..\..\..\..\..\devices\m5313\m5313.c + + + + + sal_module_wrapper + + + sal_module_wrapper.c + 1 + ..\..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + + + + + ota_download + + + ota_download_http.c + 1 + ..\..\..\..\..\components\ota\download\protocol\http\ota_download_http.c + + + hal_tcp_module.c + 1 + ..\..\..\..\..\components\ota\download\transport_layer\tcp\module\hal_tcp_module.c + + + + + ota_common + + + ota_flash.c + 1 + ..\..\..\..\..\components\ota\common\flash\ota_flash.c + + + crc8.c + 1 + ..\..\..\..\..\components\ota\common\crc\crc8.c + + + ota_image.c + 1 + ..\..\..\..\..\components\ota\common\image\ota_image.c + + + ota_partition.c + 1 + ..\..\..\..\..\components\ota\common\partition\ota_partition.c + + + ota_env.c + 1 + ..\..\..\..\..\components\ota\common\env\ota_env.c + + + + + kv + + + tos_kv.c + 1 + ..\..\..\..\..\components\fs\kv\tos_kv.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/startup_stm32l496xx.s new file mode 100644 index 00000000..6f4d9dd4 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/startup_stm32l496xx.s @@ -0,0 +1,450 @@ +;******************************************************************************* +;* File Name : startup_stm32l496xx.s +;* Author : MCD Application Team +;* Description : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;*

© Copyright (c) 2017 STMicroelectronics. +;* All rights reserved.

+;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x8000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1, ADC2 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt + DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt + DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD LCD_IRQHandler ; LCD global interrupt + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS error + DCD I2C4_EV_IRQHandler ; I2C4 event + DCD I2C4_ER_IRQHandler ; I2C4 error + DCD DCMI_IRQHandler ; DCMI global interrupt + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD DMA2D_IRQHandler ; DMA2D global interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_TIM17_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +DFSDM1_FLT3_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +OTG_FS_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SAI2_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +LCD_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +DCMI_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +DMA2D_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/system_stm32l4xx.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/system_stm32l4xx.c new file mode 100644 index 00000000..d748f570 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_application_download_through_http/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x7800 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/gpio.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/gpio.h new file mode 100644 index 00000000..1c7f4f49 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/gpio.h @@ -0,0 +1,57 @@ +/** + ****************************************************************************** + * File Name : gpio.h + * Description : This file contains all the functions prototypes for + * the gpio + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __gpio_H +#define __gpio_H +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_GPIO_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ pinoutConfig_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/main.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/main.h new file mode 100644 index 00000000..8e22be1a --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/main.h @@ -0,0 +1,135 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ +void _Error_Handler(char *file, int line); +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define KEY1_Pin GPIO_PIN_2 +#define KEY1_GPIO_Port GPIOE +#define LED5_Pin GPIO_PIN_3 +#define LED5_GPIO_Port GPIOE +#define SENSOR_EN_Pin GPIO_PIN_5 +#define SENSOR_EN_GPIO_Port GPIOE +#define SENSOR_INT1_Pin GPIO_PIN_6 +#define SENSOR_INT1_GPIO_Port GPIOE +#define SENSOR_INT2_Pin GPIO_PIN_13 +#define SENSOR_INT2_GPIO_Port GPIOC +#define GPS_ON_Pin GPIO_PIN_1 +#define GPS_ON_GPIO_Port GPIOB +#define BD_EN_Pin GPIO_PIN_2 +#define BD_EN_GPIO_Port GPIOB +#define GPS_RST_Pin GPIO_PIN_7 +#define GPS_RST_GPIO_Port GPIOE +#define NB_RST_Pin GPIO_PIN_8 +#define NB_RST_GPIO_Port GPIOE +#define NB_WKUP_Pin GPIO_PIN_9 +#define NB_WKUP_GPIO_Port GPIOE +#define NB_EN_Pin GPIO_PIN_11 +#define NB_EN_GPIO_Port GPIOE +#define SEL1_Pin GPIO_PIN_12 +#define SEL1_GPIO_Port GPIOE +#define SEL2_Pin GPIO_PIN_13 +#define SEL2_GPIO_Port GPIOE +#define SEL3_Pin GPIO_PIN_14 +#define SEL3_GPIO_Port GPIOE +#define KEY4_Pin GPIO_PIN_15 +#define KEY4_GPIO_Port GPIOE +#define OLED_RST_Pin GPIO_PIN_12 +#define OLED_RST_GPIO_Port GPIOB +#define OLED_EN_Pin GPIO_PIN_15 +#define OLED_EN_GPIO_Port GPIOB +#define AU_CTR_Pin GPIO_PIN_8 +#define AU_CTR_GPIO_Port GPIOD +#define AU_RST_Pin GPIO_PIN_13 +#define AU_RST_GPIO_Port GPIOD +#define AU_EN_Pin GPIO_PIN_15 +#define AU_EN_GPIO_Port GPIOD +#define CHARGE_STATE_Pin GPIO_PIN_6 +#define CHARGE_STATE_GPIO_Port GPIOC +#define CARD_EN_Pin GPIO_PIN_7 +#define CARD_EN_GPIO_Port GPIOC +#define PCIE_RST_Pin GPIO_PIN_8 +#define PCIE_RST_GPIO_Port GPIOA +#define PCIE_EN_Pin GPIO_PIN_9 +#define PCIE_EN_GPIO_Port GPIOA +#define CARD_END5_Pin GPIO_PIN_5 +#define CARD_END5_GPIO_Port GPIOD +#define KEY3_Pin GPIO_PIN_6 +#define KEY3_GPIO_Port GPIOD +#define KEY2_Pin GPIO_PIN_7 +#define KEY2_GPIO_Port GPIOD +#define LED4_Pin GPIO_PIN_5 +#define LED4_GPIO_Port GPIOB +#define LED3_Pin GPIO_PIN_8 +#define LED3_GPIO_Port GPIOB +#define IR_OUT_Pin GPIO_PIN_9 +#define IR_OUT_GPIO_Port GPIOB +#define LED2_Pin GPIO_PIN_0 +#define LED2_GPIO_Port GPIOE +#define LED1_Pin GPIO_PIN_1 +#define LED1_GPIO_Port GPIOE +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_hal_conf.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_hal_conf.h new file mode 100644 index 00000000..96c68cbc --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_hal_conf.h @@ -0,0 +1,450 @@ +/** + ****************************************************************************** + * @file stm32l4xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2020 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_HAL_CONF_H +#define __STM32L4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +#define HAL_CRC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DCMI_MODULE_ENABLED */ +/*#define HAL_DMA2D_MODULE_ENABLED */ +/*#define HAL_DFSDM_MODULE_ENABLED */ +/*#define HAL_DSI_MODULE_ENABLED */ +/*#define HAL_FIREWALL_MODULE_ENABLED */ +/*#define HAL_GFXMMU_MODULE_ENABLED */ +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_HASH_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_LTDC_MODULE_ENABLED */ +/*#define HAL_LCD_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_OSPI_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_PKA_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_SWPMI_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_TSC_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +/*#define HAL_EXTI_MODULE_ENABLED */ +/*#define HAL_PSSI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal Multiple Speed oscillator (MSI) default value. + * This value is the default MSI range value after Reset. + */ +#if !defined (MSI_VALUE) + #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined (HSI48_VALUE) + #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for SAI1 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) + #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ +#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ + +/** + * @brief External clock source for SAI2 peripheral + * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source + * frequency. + */ +#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) + #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI2 External clock source in Hz*/ +#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32l4xx_hal_rcc.h" + #include "stm32l4xx_hal_rcc_ex.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32l4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32l4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32l4xx_hal_dma.h" + #include "stm32l4xx_hal_dma_ex.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32l4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32l4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32l4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32l4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32l4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32l4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32l4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32l4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32l4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32l4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32l4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_FIREWALL_MODULE_ENABLED + #include "stm32l4xx_hal_firewall.h" +#endif /* HAL_FIREWALL_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32l4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32l4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32l4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32l4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32l4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32l4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32l4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32l4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LCD_MODULE_ENABLED + #include "stm32l4xx_hal_lcd.h" +#endif /* HAL_LCD_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32l4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32l4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32l4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32l4xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_PKA_MODULE_ENABLED + #include "stm32l4xx_hal_pka.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32l4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32l4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32l4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32l4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32l4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32l4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32l4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32l4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32l4xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32l4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32l4xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32l4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32l4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32l4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32l4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32l4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32l4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32l4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32l4xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32l4xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_it.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_it.h new file mode 100644 index 00000000..1bedbf68 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Inc/stm32l4xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L4xx_IT_H +#define __STM32L4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/TencentOS_tiny.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/TencentOS_tiny.uvguix.Administrator new file mode 100644 index 00000000..588871d0 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/TencentOS_tiny.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
+ + + + TencentOS_tiny + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + TencentOS_tiny + 1 + 0 + 1 + 1 + 0 + .\list\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x40000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x7800 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x50000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + USE_HAL_DRIVER,STM32L496xx, + + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\..\..\kernel\core\include;..\TOS-CONFIG;..\..\..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\..\..\kernel\pm\include;..\..\..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\..\..\components\ota\recovery\include;..\..\..\..\..\..\components\ota\common\crc;..\..\..\..\..\..\components\ota\common\image;..\..\..\..\..\..\components\ota\common\flash;..\..\..\..\..\..\components\ota\common\bsdiff;..\..\..\..\..\..\components\ota\common\lzma\3rdparty;..\..\..\..\..\..\components\ota\common\lzma\wrapper;..\..\..\..\..\..\components\ota\common\partition;..\..\..\..\..\..\components\ota\common\env;..\..\..\..\..\..\components\fs\kv\include;..\..\..\..\..\..\components\ota\common\info;..\Inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l496xx.s + 2 + .\startup_stm32l496xx.s + + + + + Application/User + + + main.c + 1 + ..\Src\main.c + + + stm32l4xx_hal_msp.c + 1 + ..\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\Src\stm32l4xx_it.c + + + gpio.c + 1 + ..\Src\gpio.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal_tim.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c + + + stm32l4xx_hal_tim_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c + + + stm32l4xx_hal_uart.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c + + + stm32l4xx_hal_uart_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c + + + stm32l4xx_hal.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_rcc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c + + + stm32l4xx_hal_rcc_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_pwr.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c + + + stm32l4xx_hal_pwr_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_spi.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c + + + stm32l4xx_hal_spi_ex.c + 1 + ..\..\..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\Src\system_stm32l4xx.c + + + + + Hardware + + + onchip_flash.c + 1 + ..\..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash.c + + + onchip_flash_ota.c + 1 + ..\..\..\..\BSP\Hardware\ONCHIP_FLASH\onchip_flash_ota.c + + + + + kernel + + + tos_binary_heap.c + 1 + ..\..\..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_event.c + 1 + ..\..\..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\..\..\kernel\core\tos_global.c + + + tos_mail_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_message_queue.c + + + tos_mmblk.c + 1 + ..\..\..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\..\..\kernel\core\tos_pend.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_robin.c + 1 + ..\..\..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\..\..\kernel\core\tos_timer.c + + + tos_barrier.c + 1 + ..\..\..\..\..\..\kernel\core\tos_barrier.c + + + tos_bitmap.c + 1 + ..\..\..\..\..\..\kernel\core\tos_bitmap.c + + + tos_rwlock.c + 1 + ..\..\..\..\..\..\kernel\core\tos_rwlock.c + + + tos_stopwatch.c + 1 + ..\..\..\..\..\..\kernel\core\tos_stopwatch.c + + + + + cpu + + + port_s.S + 2 + ..\..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + tos_cpu.c + 1 + ..\..\..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + + + config + + + tos_config.h + 5 + ..\TOS-CONFIG\tos_config.h + + + + + ota_recovery + + + ota_recovery.c + 1 + ..\..\..\..\..\..\components\ota\recovery\ota_recovery.c + + + ota_recovery_xip.c + 1 + ..\..\..\..\..\..\components\ota\recovery\ota_recovery_xip.c + + + ota_patch.c + 1 + ..\..\..\..\..\..\components\ota\recovery\ota_patch.c + + + ota_patch_xip.c + 1 + ..\..\..\..\..\..\components\ota\recovery\ota_patch_xip.c + + + + + ota_common + + + ota_flash.c + 1 + ..\..\..\..\..\..\components\ota\common\flash\ota_flash.c + + + crc8.c + 1 + ..\..\..\..\..\..\components\ota\common\crc\crc8.c + + + ota_image.c + 1 + ..\..\..\..\..\..\components\ota\common\image\ota_image.c + + + ota_env.c + 1 + ..\..\..\..\..\..\components\ota\common\env\ota_env.c + + + ota_partition.c + 1 + ..\..\..\..\..\..\components\ota\common\partition\ota_partition.c + + + ota_info.c + 1 + ..\..\..\..\..\..\components\ota\common\info\ota_info.c + + + + + lzma + + + 7zAlloc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zAlloc.c + + + 7zArcIn.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zArcIn.c + + + 7zBuf.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zBuf.c + + + 7zBuf2.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zBuf2.c + + + 7zCrc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zCrc.c + + + 7zCrcOpt.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zCrcOpt.c + + + 7zDec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zDec.c + + + 7zFile.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zFile.c + + + 7zStream.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\7zStream.c + + + Aes.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Aes.c + + + AesOpt.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\AesOpt.c + + + Alloc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Alloc.c + + + Bcj2.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Bcj2.c + + + Bcj2Enc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Bcj2Enc.c + + + Bra.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Bra.c + + + Bra86.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Bra86.c + + + BraIA64.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\BraIA64.c + + + CpuArch.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\CpuArch.c + + + Delta.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Delta.c + + + DllSecur.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\DllSecur.c + + + LzFind.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\LzFind.c + + + Lzma2Dec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Lzma2Dec.c + + + Lzma2Enc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Lzma2Enc.c + + + Lzma86Dec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Lzma86Dec.c + + + Lzma86Enc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Lzma86Enc.c + + + LzmaDec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\LzmaDec.c + + + LzmaEnc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\LzmaEnc.c + + + LzmaLib.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\LzmaLib.c + + + Ppmd7.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Ppmd7.c + + + Ppmd7Dec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Ppmd7Dec.c + + + Ppmd7Enc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Ppmd7Enc.c + + + Sha256.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Sha256.c + + + Sort.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Sort.c + + + Xz.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\Xz.c + + + XzCrc64.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\XzCrc64.c + + + XzCrc64Opt.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\XzCrc64Opt.c + + + XzDec.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\XzDec.c + + + XzEnc.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\XzEnc.c + + + XzIn.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\3rdparty\XzIn.c + + + + + lzma_wrapper + + + lzma_uncompress.c + 1 + ..\..\..\..\..\..\components\ota\common\lzma\wrapper\lzma_uncompress.c + + + + + kv + + + tos_kv.c + 1 + ..\..\..\..\..\..\components\fs\kv\tos_kv.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/startup_stm32l496xx.s new file mode 100644 index 00000000..c52f4b6f --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/MDK-ARM/startup_stm32l496xx.s @@ -0,0 +1,450 @@ +;******************************************************************************* +;* File Name : startup_stm32l496xx.s +;* Author : MCD Application Team +;* Description : STM32L496xx Ultra Low Power devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +;* +;*

© Copyright (c) 2017 STMicroelectronics. +;* All rights reserved.

+;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;******************************************************************************* +; +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x800 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x6000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1, ADC2 + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15 + DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16 + DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt + DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt + DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3 + DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4 + DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5 + DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt + DCD COMP_IRQHandler ; COMP Interrupt + DCD LPTIM1_IRQHandler ; LP TIM1 interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 interrupt + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6 + DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7 + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD QUADSPI_IRQHandler ; Quad SPI global interrupt + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt + DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TSC_IRQHandler ; Touch Sense Controller global interrupt + DCD LCD_IRQHandler ; LCD global interrupt + DCD 0 ; Reserved + DCD RNG_IRQHandler ; RNG global interrupt + DCD FPU_IRQHandler ; FPU + DCD CRS_IRQHandler ; CRS error + DCD I2C4_EV_IRQHandler ; I2C4 event + DCD I2C4_ER_IRQHandler ; I2C4 error + DCD DCMI_IRQHandler ; DCMI global interrupt + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD DMA2D_IRQHandler ; DMA2D global interrupt + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_PVM_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM16_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_IRQHandler [WEAK] + EXPORT DMA2_Channel5_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT COMP_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Channel6_IRQHandler [WEAK] + EXPORT DMA2_Channel7_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TSC_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_PVM_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM15_IRQHandler +TIM1_UP_TIM16_IRQHandler +TIM1_TRG_COM_TIM17_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +DFSDM1_FLT3_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_IRQHandler +DMA2_Channel5_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +COMP_IRQHandler +LPTIM1_IRQHandler +LPTIM2_IRQHandler +OTG_FS_IRQHandler +DMA2_Channel6_IRQHandler +DMA2_Channel7_IRQHandler +LPUART1_IRQHandler +QUADSPI_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +SAI1_IRQHandler +SAI2_IRQHandler +SWPMI1_IRQHandler +TSC_IRQHandler +LCD_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +CRS_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +DCMI_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +DMA2D_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/gpio.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/gpio.c new file mode 100644 index 00000000..efc114d1 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/gpio.c @@ -0,0 +1,172 @@ +/** + ****************************************************************************** + * File Name : gpio.c + * Description : This file provides code for the configuration + * of all used GPIO pins. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "gpio.h" +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure GPIO */ +/*----------------------------------------------------------------------------*/ +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** Configure pins as + * Analog + * Input + * Output + * EVENT_OUT + * EXTI +*/ +void MX_GPIO_Init(void) +{ + + GPIO_InitTypeDef GPIO_InitStruct; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOE, LED5_Pin|LED2_Pin|LED1_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOE, SENSOR_EN_Pin|GPS_RST_Pin|NB_RST_Pin|NB_WKUP_Pin + |NB_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOB, GPS_ON_Pin|BD_EN_Pin|OLED_RST_Pin|OLED_EN_Pin + |LED3_Pin|IR_OUT_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(GPIOD, AU_CTR_Pin|AU_RST_Pin|AU_EN_Pin|CARD_END5_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(CARD_EN_GPIO_Port, CARD_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(PCIE_RST_GPIO_Port, PCIE_RST_Pin, GPIO_PIN_SET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(PCIE_EN_GPIO_Port, PCIE_EN_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LED4_GPIO_Port, LED4_Pin, GPIO_PIN_SET); + + /*Configure GPIO pins : KEY1_Pin SEL1_Pin SEL2_Pin SEL3_Pin + KEY4_Pin */ + GPIO_InitStruct.Pin = KEY1_Pin|SEL1_Pin|SEL2_Pin|SEL3_Pin + |KEY4_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /*Configure GPIO pins : LED5_Pin SENSOR_EN_Pin GPS_RST_Pin NB_RST_Pin + NB_WKUP_Pin NB_EN_Pin LED2_Pin LED1_Pin */ + GPIO_InitStruct.Pin = LED5_Pin|SENSOR_EN_Pin|GPS_RST_Pin|NB_RST_Pin + |NB_WKUP_Pin|NB_EN_Pin|LED2_Pin|LED1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /*Configure GPIO pin : SENSOR_INT1_Pin */ + GPIO_InitStruct.Pin = SENSOR_INT1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(SENSOR_INT1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : SENSOR_INT2_Pin */ + GPIO_InitStruct.Pin = SENSOR_INT2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(SENSOR_INT2_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : PA5 PA6 */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pin : PB0 */ + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pins : GPS_ON_Pin BD_EN_Pin OLED_RST_Pin OLED_EN_Pin + LED4_Pin LED3_Pin IR_OUT_Pin */ + GPIO_InitStruct.Pin = GPS_ON_Pin|BD_EN_Pin|OLED_RST_Pin|OLED_EN_Pin + |LED4_Pin|LED3_Pin|IR_OUT_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pins : AU_CTR_Pin AU_RST_Pin AU_EN_Pin CARD_END5_Pin */ + GPIO_InitStruct.Pin = AU_CTR_Pin|AU_RST_Pin|AU_EN_Pin|CARD_END5_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /*Configure GPIO pin : CHARGE_STATE_Pin */ + GPIO_InitStruct.Pin = CHARGE_STATE_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(CHARGE_STATE_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : CARD_EN_Pin */ + GPIO_InitStruct.Pin = CARD_EN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(CARD_EN_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pins : PCIE_RST_Pin PCIE_EN_Pin */ + GPIO_InitStruct.Pin = PCIE_RST_Pin|PCIE_EN_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /*Configure GPIO pins : KEY3_Pin KEY2_Pin */ + GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/main.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/main.c new file mode 100644 index 00000000..574fcd88 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/main.c @@ -0,0 +1,249 @@ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +#include "stdio.h" +#include "stm32l4xx_hal.h" + +#include "ota_recovery.h" + +#include "tos_kv.h" + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_USART1_UART_Init(void); + +UART_HandleTypeDef huart1; + +int fputc(int ch, FILE *f) +{ + if (ch == '\n') { + HAL_UART_Transmit(&huart1, (void *)"\r", 1,30000); + } + HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, 0xFFFF); + return ch; +} + +extern ota_flash_drv_t stm32l4_norflash_onchip_drv_ota; +extern ota_flash_prop_t stm32l4_norflash_onchip_prop_ota; + +int main(void) +{ + ota_err_t ret; + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* Configure the system clock */ + SystemClock_Config(); + MX_GPIO_Init(); + MX_USART1_UART_Init(); + + uint32_t partition_addr = 0x080FF800; + + + if ((ret = ota_env_init(OTA_UPDATE_IN_POSITION, partition_addr, &stm32l4_norflash_onchip_drv_ota, &stm32l4_norflash_onchip_prop_ota)) != OTA_ERR_NONE) { + printf("env init failed!OTA errcode = %d\n", ret); + return -1; + } else { + printf("env init successfully!\r\n"); + printf("+-------------------------+\r\n"); + printf("|Active APP | 0x%08x |\r\n", ota_partition_start(OTA_PARTITION_ACTIVE_APP)); + printf("| OTA | 0x%08x |\r\n", ota_partition_start(OTA_PARTITION_OTA)); + printf("| KV | 0x%08x |\r\n", ota_partition_start(OTA_PARTITION_KV)); + printf("| Version | %d.%d |\r\n", ota_partition_init_version_get().major, ota_partition_init_version_get().minor); + printf("+-------------------------+\r\n"); + } + +// while(1) +// {;} + +//ota_img_vs_t new_version; +//new_version.major = 0; +//new_version.minor = 2; + +//tos_kv_set("new_version", &new_version, sizeof(ota_img_vs_t)); + +#if 0 + if ((ret = ota_recovery_xip()) != OTA_ERR_NONE) { + printf("recovery failed, OTA errcode = %d!\r\n", ret); + } else { + printf("recovery successfully!\r\n"); + } +#else + if ((ret = ota_recovery()) != OTA_ERR_NONE) { + printf("recovery failed, OTA errcode = %d!\r\n", ret); + } else { + printf("recovery successfully!\r\n"); + } +#endif + + + uint32_t jmp_addr, app_addr = ota_partition_start(OTA_PARTITION_ACTIVE_APP); + + /* test if user code is programmed starting from address app_addr */ + if (((*(uint32_t *)app_addr) & 0x2FFE0000) == 0x20000000) { + /* Jump to user application */ + jmp_addr = *(uint32_t *)(app_addr + 4); + + /* Initialize user application's Stack Pointer */ + __set_MSP(*(uint32_t *)app_addr); + ((void (*)(void))jmp_addr)(); + } +} + +void _Error_Handler(char *file, int line) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + while(1) + { + printf("err %s,L%d\r\n",file,line); + } + /* USER CODE END Error_Handler_Debug */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_PeriphCLKInitTypeDef PeriphClkInit; + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE + |RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2 + |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4 + |RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_SAI2 + |RCC_PERIPHCLK_I2C2|RCC_PERIPHCLK_I2C3 + |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_SDMMC1 + |RCC_PERIPHCLK_ADC; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; + PeriphClkInit.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1; + PeriphClkInit.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLLSAI1; + PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 12; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_48M2CLK + |RCC_PLLSAI1_ADC1CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + + /**Configure the Systick interrupt time + */ + HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); + + /**Configure the Systick + */ + HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); + + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); +} + +/** + * @brief USART2 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + + + + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(char *file, uint32_t line) +{ +} + +#endif /* USE_FULL_ASSERT */ + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_hal_msp.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_hal_msp.c new file mode 100644 index 00000000..fb39c720 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_hal_msp.c @@ -0,0 +1,153 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32l4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +#include "stm32l4xx_hal.h" + +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief CRC MSP Initialization +* This function configures the hardware resources used in this example +* @param hcrc: CRC handle pointer +* @retval None +*/ +void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc) +{ + if(hcrc->Instance==CRC) + { + /* USER CODE BEGIN CRC_MspInit 0 */ + + /* USER CODE END CRC_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_CRC_CLK_ENABLE(); + /* USER CODE BEGIN CRC_MspInit 1 */ + + /* USER CODE END CRC_MspInit 1 */ + } + +} + +/** +* @brief CRC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hcrc: CRC handle pointer +* @retval None +*/ +void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc) +{ + if(hcrc->Instance==CRC) + { + /* USER CODE BEGIN CRC_MspDeInit 0 */ + + /* USER CODE END CRC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_CRC_CLK_DISABLE(); + /* USER CODE BEGIN CRC_MspDeInit 1 */ + + /* USER CODE END CRC_MspDeInit 1 */ + } + +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PB6 ------> USART1_TX + PB7 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_it.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_it.c new file mode 100644 index 00000000..39097b6c --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/stm32l4xx_it.c @@ -0,0 +1,202 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32l4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +__weak void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32L4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32l4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/system_stm32l4xx.c b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/system_stm32l4xx.c new file mode 100644 index 00000000..26bd5179 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/Src/system_stm32l4xx.c @@ -0,0 +1,337 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set MSION bit */ + RCC->CR |= RCC_CR_MSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000U; + + /* Reset HSEON, CSSON , HSION, and PLLON bits */ + RCC->CR &= 0xEAF6FFFFU; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00001000U; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000U; + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; + + /* Get MSI Range frequency--------------------------------------------------*/ + if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/event_driven/tos_config.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/event_driven/tos_config.h new file mode 100644 index 00000000..43493faf --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/event_driven/tos_config.h @@ -0,0 +1,19 @@ +#ifndef _TOS_CONFIG_H_ +#define _TOS_CONFIG_H_ + +#include "stm32l4xx.h" + +#define TOS_CFG_EVENT_DRIVEN_EN 1u + +#define TOS_CFG_MMHEAP_EN 1u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x8000 + +#define TOS_CFG_PWR_MGR_EN 0u + +#define TOS_CFG_CPU_TICK_PER_SECOND 1000u + +#define TOS_CFG_CPU_CLOCK (SystemCoreClock) + +#endif + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/mqtt_config.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/mqtt_config.h new file mode 100644 index 00000000..c2caeb53 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/mqtt_config.h @@ -0,0 +1,48 @@ +/* + * @Author: jiejie + * @Github: https://github.com/jiejieTop + * @Date: 2019-12-15 00:42:16 + * @LastEditTime: 2020-02-25 09:25:35 + * @Description: the code belongs to jiejie, please keep the author information and source code according to the license. + */ +#ifndef _MQTT_CONFIG_H_ +#define _MQTT_CONFIG_H_ + +//#define LOG_IS_SALOF + +#define LOG_LEVEL DEBUG_LEVEL //WARN_LEVEL DEBUG_LEVEL + +#ifdef LOG_IS_SALOF + #define USE_LOG (1U) + #define USE_SALOF (1U) + #define SALOF_OS USE_TENCENTOS + #define USE_IDLE_HOOK (0U) + #define LOG_COLOR (0U) + #define LOG_TS (0U) + #define LOG_TAR (0U) + #define SALOF_BUFF_SIZE (512U) + #define SALOF_FIFO_SIZE (1024U) + #define SALOF_TASK_STACK_SIZE (1024U) + #define SALOF_TASK_TICK (50U) +#endif + + +#define MQTT_MAX_PACKET_ID (0xFFFF - 1) +#define MQTT_TOPIC_LEN_MAX 64 +#define MQTT_ACK_HANDLER_NUM_MAX 64 +#define MQTT_DEFAULT_BUF_SIZE 1024 +#define MQTT_DEFAULT_CMD_TIMEOUT 4000 +#define MQTT_MAX_CMD_TIMEOUT 20000 +#define MQTT_MIN_CMD_TIMEOUT 1000 +#define MQTT_KEEP_ALIVE_INTERVAL 100 // unit: second +#define MQTT_VERSION 4 // 4 is mqtt 3.1.1 +#define MQTT_RECONNECT_DEFAULT_DURATION 1000 +#define MQTT_THREAD_STACK_SIZE 2048 +#define MQTT_THREAD_PRIO 5 +#define MQTT_THREAD_TICK 50 + +#define MQTT_NETSOCKET_USE_AT + +//#define MQTT_NETWORK_TYPE_TLS + +#endif /* _MQTT_CONFIG_H_ */ diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tickless/tos_config.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tickless/tos_config.h new file mode 100644 index 00000000..e02e32a2 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tickless/tos_config.h @@ -0,0 +1,41 @@ +#ifndef _TOS_CONFIG_H_ +#define _TOS_CONFIG_H_ + +#include "stm32l4xx.h" + +#define TOS_CFG_TASK_PRIO_MAX 10u + +#define TOS_CFG_ROUND_ROBIN_EN 1u + +#define TOS_CFG_OBJECT_VERIFY_EN 1u + +#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 0u + +#define TOS_CFG_EVENT_EN 1u + +#define TOS_CFG_MMBLK_EN 1u + +#define TOS_CFG_MMHEAP_EN 1u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x6000 + +#define TOS_CFG_MUTEX_EN 1u + +#define TOS_CFG_TIMER_EN 1u + +#define TOS_CFG_PWR_MGR_EN 1u + +#define TOS_CFG_TICKLESS_EN 1u + +#define TOS_CFG_SEM_EN 1u + +#define TOS_CFG_IDLE_TASK_STK_SIZE 512u + +#define TOS_CFG_CPU_TICK_PER_SECOND 1000u + +#define TOS_CFG_CPU_CLOCK (SystemCoreClock) + +#define TOS_CFG_TIMER_AS_PROC 1u + +#endif + diff --git a/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tos_config.h b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tos_config.h new file mode 100644 index 00000000..92579b54 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/ota/ota_bootloader_recovery/TOS-CONFIG/tos_config.h @@ -0,0 +1,55 @@ +#ifndef _TOS_CONFIG_H_ +#define _TOS_CONFIG_H_ + +#include "stm32l4xx.h" + +#define TOS_CFG_TASK_PRIO_MAX 10u + +#define TOS_CFG_ROUND_ROBIN_EN 0u + +#define TOS_CFG_OBJECT_VERIFY_EN 1u + +#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 0u + +#define TOS_CFG_EVENT_EN 1u + +#define TOS_CFG_MMBLK_EN 1u + +#define TOS_CFG_MMHEAP_EN 0u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_EN 1u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x2000 + +#define TOS_CFG_MUTEX_EN 1u + +#define TOS_CFG_MESSAGE_QUEUE_EN 1u + +#define TOS_CFG_MAIL_QUEUE_EN 1u + +#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN 0u + +#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN 0u + +#define TOS_CFG_TIMER_EN 1u + +#define TOS_CFG_PWR_MGR_EN 0u + +#define TOS_CFG_TICKLESS_EN 0u + +#define TOS_CFG_SEM_EN 1u + +#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 1u + +#define TOS_CFG_FAULT_BACKTRACE_EN 0u + +#define TOS_CFG_IDLE_TASK_STK_SIZE 128u + +#define TOS_CFG_CPU_TICK_PER_SECOND 1000u + +#define TOS_CFG_CPU_CLOCK (SystemCoreClock) + +#define TOS_CFG_TIMER_AS_PROC 1u + +#endif + diff --git a/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.sct b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.sct new file mode 100644 index 00000000..c3369f91 --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00040000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.uvguix.Administrator b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.uvguix.Administrator new file mode 100644 index 00000000..fc8a2daa --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.uvguix.Administrator @@ -0,0 +1,3385 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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100644 index 00000000..93a822bc --- /dev/null +++ b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/BDW01-STM32L496VG.uvprojx @@ -0,0 +1,1172 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + BDW01-STM32L496VG + 0x4 + ARM-ADS + 5060183::V5.06 update 2 (build 183)::ARMCC + + + STM32L496VGTx + STMicroelectronics + Keil.STM32L4xx_DFP.2.4.0 + https://www.keil.com/pack/ + IRAM(0x20000000,0x00040000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32L4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32L496VGTx$CMSIS\Flash\STM32L4xx_1024.FLM)) + 0 + $$Device:STM32L496VGTx$Drivers\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h + + + + + + + + + + $$Device:STM32L496VGTx$CMSIS\SVD\STM32L4x6.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\app\ + BDW01-STM32L496VG-tcp_through_module + 1 + 0 + 1 + 1 + 0 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 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..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\kernel\core\include;..\..\..\..\kernel\pm\include;..\..\..\..\kernel\hal\include;..\..\..\..\osal\cmsis_os;..\..\TOS_CONFIG;..\..\..\..\devices\sht3x;..\..\..\..\devices\lsm6dsl;..\..\..\..\devices\l2832tsww;..\..\..\..\devices\4G_EC20;..\..\..\..\devices\gps;..\..\..\..\devices\m5313;..\..\..\..\net\at\include;..\..\..\..\net\sal_module_wrapper;..\..\..\..\net\4G_module_wrapper;..\..\..\..\net\lora_module_wrapper;..\..\..\..\net\passthrough;..\..\..\..\components\math;..\..\..\..\components\connectivity\mqttclient\common;..\..\..\..\components\connectivity\mqttclient\common\log;..\..\..\..\components\connectivity\mqttclient\mqtt;..\..\..\..\components\connectivity\mqttclient\mqttclient;..\..\..\..\components\connectivity\mqttclient\network;..\..\..\..\components\connectivity\mqttclient\platform\TencentOS-tiny;..\..\..\..\components\utils\JSON\include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Application/MDK-ARM + + + startup_stm32l496xx.s + 2 + .\startup_stm32l496xx.s + + + + + Application/User + + + gpio.c + 1 + ..\..\BSP\Src\gpio.c + + + main.c + 1 + ..\..\BSP\Src\main.c + + + mcu_init.c + 1 + ..\..\BSP\Src\mcu_init.c + + + usart.c + 1 + ..\..\BSP\Src\usart.c + + + stm32l4xx_hal_msp.c + 1 + ..\..\BSP\Src\stm32l4xx_hal_msp.c + + + stm32l4xx_it.c + 1 + ..\..\BSP\Src\stm32l4xx_it.c + + + mymath.c + 1 + ..\..\BSP\Src\mymath.c + + + i2c.c + 1 + ..\..\BSP\Src\i2c.c + + + + + Drivers/STM32L4xx_HAL_Driver + + + stm32l4xx_hal.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c + + + stm32l4xx_hal_adc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c + + + stm32l4xx_hal_adc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c + + + stm32l4xx_hal_can.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_can.c + + + stm32l4xx_hal_comp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_comp.c + + + stm32l4xx_hal_cortex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c + + + stm32l4xx_hal_crc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc.c + + + stm32l4xx_hal_crc_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_crc_ex.c + + + stm32l4xx_hal_cryp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp.c + + + stm32l4xx_hal_cryp_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cryp_ex.c + + + stm32l4xx_hal_dac.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c + + + stm32l4xx_hal_dac_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c + + + stm32l4xx_hal_dcmi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dcmi.c + + + stm32l4xx_hal_dfsdm.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm.c + + + stm32l4xx_hal_dfsdm_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dfsdm_ex.c + + + stm32l4xx_hal_dma.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c + + + stm32l4xx_hal_dma_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c + + + stm32l4xx_hal_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma2d.c + + + stm32l4xx_hal_dsi.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dsi.c + + + stm32l4xx_hal_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_exti.c + + + stm32l4xx_hal_firewall.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_firewall.c + + + stm32l4xx_hal_flash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c + + + stm32l4xx_hal_flash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c + + + stm32l4xx_hal_flash_ramfunc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c + + + stm32l4xx_hal_gfxmmu.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gfxmmu.c + + + stm32l4xx_hal_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c + + + stm32l4xx_hal_hash.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash.c + + + stm32l4xx_hal_hash_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hash_ex.c + + + stm32l4xx_hal_hcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_hcd.c + + + stm32l4xx_hal_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c + + + stm32l4xx_hal_i2c_ex.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c + + + stm32l4xx_hal_irda.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_irda.c + + + stm32l4xx_hal_iwdg.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_iwdg.c + + + stm32l4xx_hal_lcd.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lcd.c + + + stm32l4xx_hal_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lptim.c + + + stm32l4xx_hal_ltdc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_ltdc.c + + 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stm32l4xx_ll_dma2d.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_dma2d.c + + + stm32l4xx_ll_exti.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_exti.c + + + stm32l4xx_ll_fmc.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_fmc.c + + + stm32l4xx_ll_gpio.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_gpio.c + + + stm32l4xx_ll_i2c.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_i2c.c + + + stm32l4xx_ll_lptim.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lptim.c + + + stm32l4xx_ll_lpuart.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_lpuart.c + + + stm32l4xx_ll_opamp.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_opamp.c + + + stm32l4xx_ll_pwr.c + 1 + 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+ ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_usb.c + + + stm32l4xx_ll_utils.c + 1 + ..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_utils.c + + + + + Drivers/CMSIS + + + system_stm32l4xx.c + 1 + ..\..\BSP\Src\system_stm32l4xx.c + + + + + tos/arch + + + tos_cpu.c + 1 + ..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c + + + port_c.c + 1 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c + + + port_s.S + 2 + ..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S + + + + + tos/kernel + + + tos_event.c + 1 + ..\..\..\..\kernel\core\tos_event.c + + + tos_global.c + 1 + ..\..\..\..\kernel\core\tos_global.c + + + tos_mmblk.c + 1 + ..\..\..\..\kernel\core\tos_mmblk.c + + + tos_mmheap.c + 1 + ..\..\..\..\kernel\core\tos_mmheap.c + + + tos_mutex.c + 1 + ..\..\..\..\kernel\core\tos_mutex.c + + + tos_pend.c + 1 + ..\..\..\..\kernel\core\tos_pend.c + + + tos_robin.c + 1 + ..\..\..\..\kernel\core\tos_robin.c + + + tos_sched.c + 1 + ..\..\..\..\kernel\core\tos_sched.c + + + tos_sem.c + 1 + ..\..\..\..\kernel\core\tos_sem.c + + + tos_sys.c + 1 + ..\..\..\..\kernel\core\tos_sys.c + + + tos_task.c + 1 + ..\..\..\..\kernel\core\tos_task.c + + + tos_tick.c + 1 + ..\..\..\..\kernel\core\tos_tick.c + + + tos_time.c + 1 + ..\..\..\..\kernel\core\tos_time.c + + + tos_timer.c + 1 + ..\..\..\..\kernel\core\tos_timer.c + + + tos_binary_heap.c + 1 + ..\..\..\..\kernel\core\tos_binary_heap.c + + + tos_char_fifo.c + 1 + ..\..\..\..\kernel\core\tos_char_fifo.c + + + tos_completion.c + 1 + ..\..\..\..\kernel\core\tos_completion.c + + + tos_countdownlatch.c + 1 + ..\..\..\..\kernel\core\tos_countdownlatch.c + + + tos_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_mail_queue.c + + + tos_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_message_queue.c + + + tos_priority_mail_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_mail_queue.c + + + tos_priority_message_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_message_queue.c + + + tos_priority_queue.c + 1 + ..\..\..\..\kernel\core\tos_priority_queue.c + + + tos_ring_queue.c + 1 + ..\..\..\..\kernel\core\tos_ring_queue.c + + + tos_stopwatch.c + 1 + ..\..\..\..\kernel\core\tos_stopwatch.c + + + + + tos/cmsis + + + cmsis_os.c + 1 + ..\..\..\..\osal\cmsis_os\cmsis_os.c + + + + + tos/config + + + tos_config.h + 5 + ..\..\TOS_CONFIG\tos_config.h + + + + + at + + + tos_at.c + 1 + ..\..\..\..\net\at\src\tos_at.c + + + + + net + + + sal_module_wrapper.c + 1 + ..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c + + + + + hal + + + tos_hal_uart.c + 1 + ..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c + + + + + devices + + + m5313.c + 1 + ..\..\..\..\devices\m5313\m5313.c + + + + + app + + + tcp_through_module.c + 1 + ..\..\BSP\app\tcp_through_module.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/board/BDW01-STM32L496VG/KEIL/tcp_through_module/startup_stm32l496xx.s b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/startup_stm32l496xx.s new file mode 100644 index 00000000..cc74126e Binary files /dev/null and b/board/BDW01-STM32L496VG/KEIL/tcp_through_module/startup_stm32l496xx.s differ diff --git a/board/BDW01-STM32L496VG/TOS_CONFIG/mqtt_config.h b/board/BDW01-STM32L496VG/TOS_CONFIG/mqtt_config.h new file mode 100644 index 00000000..cfc0c976 --- /dev/null +++ b/board/BDW01-STM32L496VG/TOS_CONFIG/mqtt_config.h @@ -0,0 +1,48 @@ +/* + * @Author: jiejie + * @Github: https://github.com/jiejieTop + * @LastEditTime: 2020-06-17 19:31:41 + * @Description: the code belongs to jiejie, please keep the author information and source code according to the license. + */ +#ifndef _MQTT_CONFIG_H_ +#define _MQTT_CONFIG_H_ + +//#define MQTT_LOG_IS_SALOF + +#define MQTT_NETSOCKET_USING_AT + +#define MQTT_LOG_LEVEL MQTT_LOG_DEBUG_LEVEL //MQTT_LOG_WARN_LEVEL MQTT_LOG_DEBUG_LEVEL + +#ifdef MQTT_LOG_IS_SALOF + #define SALOF_USING_LOG (1U) + #define SALOF_USING_SALOF (1U) + #define SALOF_LOG_LEVEL MQTT_LOG_LEVEL + #define SALOF_OS SALOF_USING_TENCENTOS + #define SALOF_USING_IDLE_HOOK (0U) + #define SALOF_LOG_COLOR (1U) + #define SALOF_LOG_TS (0U) + #define SALOF_LOG_TAR (0U) + #define SALOF_BUFF_SIZE 512 + #define SALOF_FIFO_SIZE 4096 + #define SALOF_TASK_STACK_SIZE 1024 + #define SALOF_TASK_TICK 50 +#endif + +#define MQTT_MAX_PACKET_ID (0xFFFF - 1) +#define MQTT_TOPIC_LEN_MAX 64 +#define MQTT_ACK_HANDLER_NUM_MAX 64 +#define MQTT_DEFAULT_BUF_SIZE 1024 +#define MQTT_DEFAULT_CMD_TIMEOUT 10000 +#define MQTT_MAX_CMD_TIMEOUT 20000 +#define MQTT_MIN_CMD_TIMEOUT 10000 +#define MQTT_KEEP_ALIVE_INTERVAL 50 // unit: second +#define MQTT_VERSION 4 // 4 is mqtt 3.1.1 +#define MQTT_RECONNECT_DEFAULT_DURATION 1000 +#define MQTT_THREAD_STACK_SIZE 2048 +#define MQTT_THREAD_PRIO 5 +#define MQTT_THREAD_TICK 50 + + +#define MQTT_NETWORK_TYPE_NO_TLS + +#endif /* _MQTT_CONFIG_H_ */ diff --git a/board/BDW01-STM32L496VG/TOS_CONFIG/tos_config.h b/board/BDW01-STM32L496VG/TOS_CONFIG/tos_config.h new file mode 100644 index 00000000..8b451c04 --- /dev/null +++ b/board/BDW01-STM32L496VG/TOS_CONFIG/tos_config.h @@ -0,0 +1,62 @@ +#ifndef _TOS_CONFIG_H_ +#define _TOS_CONFIG_H_ + +////#include "stm32l0xx_hal.h" +#include +#include "stm32l4xx_hal.h" + +#define TOS_CFG_TASK_PRIO_MAX 10u + +#define TOS_CFG_ROUND_ROBIN_EN 0u + +#define TOS_CFG_OBJECT_VERIFY_EN 0u + +#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 0u + +#define TOS_CFG_EVENT_EN 1u + +#define TOS_CFG_MMBLK_EN 1u + +#define TOS_CFG_MMHEAP_EN 1u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_EN 1u + +#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x8000 + +#define TOS_CFG_MUTEX_EN 1u + +#define TOS_CFG_MESSAGE_QUEUE_EN 1u + +#define TOS_CFG_LIBC_PRINTF_EN 1u + +#define TOS_CFG_MAIL_QUEUE_EN 1u + +#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN 0u + +#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN 0u + +#define TOS_CFG_TIMER_EN 1u + +#define TOS_CFG_PWR_MGR_EN 0u + +#define TOS_CFG_TICKLESS_EN 0u + +#define TOS_CFG_SEM_EN 1u + +#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 0u + +#define TOS_CFG_FAULT_BACKTRACE_EN 0u + +#define TOS_CFG_IDLE_TASK_STK_SIZE 128u + +#define TOS_CFG_CPU_TICK_PER_SECOND 1000u + +#define TOS_CFG_CPU_CLOCK (SystemCoreClock) + +#define TOS_CFG_TIMER_AS_PROC 1u + + + + +#endif + diff --git a/board/BDW01-STM32L496VG/doc/1. å¼€å‘æ¿BDW01入门介ç».md b/board/BDW01-STM32L496VG/doc/1. å¼€å‘æ¿BDW01入门介ç».md new file mode 100644 index 00000000..41103906 --- /dev/null +++ b/board/BDW01-STM32L496VG/doc/1. å¼€å‘æ¿BDW01入门介ç».md @@ -0,0 +1,120 @@ +# å¼€å‘æ¿BDW01å…¥é—¨ä»‹ç» +--- +## 1. å¼€å‘æ¿ç‰¹æ€§ +BDW01物è”网开å‘æ¿çš„æ¿è½½èµ„æºå¦‚下： +![](./image/board.png) + +主控芯片采用STM32L4VGTx，Flash空间大å°1MB，SRAM空间大å°320KBï¼› + +- æ¿è½½ä¸­ç§»ç‰©è”NB-IOT模组M5313ï¼› +- æ¿è½½ä¸­ç§‘微北斗定ä½æ¨¡ç»„ATGM336Hï¼› +- æ¿è½½çŽ¯å¢ƒå…‰æ£€æµ‹ä¼ æ„Ÿå™¨TMD27713; +- æ¿è½½åŽ‹åŠ›ä¼ æ„Ÿå™¨BMP280; +- æ¿è½½æ¸©æ¹¿åº¦ä¼ æ„Ÿå™¨SHT3X; +- æ¿è½½3D加速度陀螺仪传感器LSM6DSL; +- æ¿è½½ç£åŠ›è®¡ä¼ æ„Ÿå™¨MMC3680KJ; +- æ¿è½½E43接å£å¯æ‰©å±•å…¶ä»–无线通信模å—ï¼› +- æ¿è½½E32接å£å¯æ‰©å±•å…¶ä»–定ä½æ¨¡å—ï¼› +- æ¿è½½E53传感器标准接å£ï¼Œæ–¹ä¾¿è¿žæŽ¥å„ç§E53传感器； +- æ¿è½½0.91'OLED显示å±å¹•ï¼› +- æ¿è½½æ–°å¡˜è¯­ç¦»çº¿éŸ³è¯†åˆ«æ¨¡å—ISD9160ï¼› +- æ¿è½½TFå¡å¡åº§ï¼Œæ–¹ä¾¿æ‰©å±•å­˜å‚¨ç©ºé—´ï¼› +- æ¿è½½MINI PCIE接å£ï¼Œæ–¹ä¾¿è¿žæŽ¥4G通信模å—ï¼› +- æ¿è½½18650锂电池æ’座，方便移动时正常供电； +- æ¿è½½CH340转串å£è¿žæŽ¥ï¼Œå¯ä»¥ä½¿ç”¨ä¸€æ ¹USB线连接至电脑，查看串å£æ—¥å¿—ï¼› + +关于开å‘æ¿ç¡¬ä»¶ç”µè·¯çš„更多信æ¯å’Œè¯¦è§£ï¼Œè¯·æŸ¥çœ‹æ–‡æ¡£BDW01主æ¿è§„格书和文档物è”网开å‘æ¿åŽŸç†å›¾ã€‚ + +## 2. å¼€å‘æ¿ç¡¬ä»¶å‡†å¤‡ +### 2.1 连接LOG USB线 +![](./image/logusb.png) +### 2.2 连接ST-Link烧录器 +对照烧录器引脚图和开å‘æ¿åŽŸç†å›¾ï¼Œæ‰¾åˆ°å¼€å‘æ¿ä¸Šçš„网络标å·SW11,连接如下: +**注æ„电æºæ­£è´Ÿæžä¸è¦æŽ¥å接错，é¿å…烧掉MCU和烧录器。** +![](./image/st-link.png) + +- å¼€å‘æ¿VCC(3v3) ---> STlink  3.3V +- å¼€å‘æ¿ST_SWDIO ---> STlink  SWDIO +- å¼€å‘æ¿ST_SWCLK ---> STlink  SWCLK +- å¼€å‘æ¿GND ---> STlink  GND + +## 3. å¼€å‘软件的环境准备 +### 3.1 软件开å‘工具的下载安装 +我们使用的软件开å‘工具是Keilå…¬å¸çš„MDK(Microcontroller Development kit)，MDK官网下载地å€ï¼š[http://www2.keil.com/mdk5](http://www2.keil.com/mdk5) + +下载的版本最好在5.24或5.24以上，本次介ç»ä»¥5.25版本为例，åŒå‡»MDK524应用程åºæ–‡ä»¶ï¼ŒæŽ¥ç€ç‚¹å‡»next>>。 + +![](./image/mtkdl01.png) + +在I agreeå‰é¢çš„å°æ–¹æ¡†æ‰“勾，表示åŒæ„该安装å议，å†ç‚¹å‡»next>>。 + +![](./image/mtkdl02.png) + +选择安装路径，默认情况下会安装在系统盘C盘，建议在其他盘建立å•ç‹¬çš„文件夹，并选择安装到该文件夹下。点击next>>。 + +![](./image/mtkdl03.png) + +填上我们的信æ¯åŽï¼Œç»§ç»­next>>。 + +![](./image/mtkdl04.png) + +然åŽç­‰å¾…安装完æˆåŽç‚¹å‡»Finish,接ç€ä¼šè·³å‡ºå™¨ä»¶æ”¯æŒåŒ…安装界é¢ï¼Œç‚¹OKå†æŠŠå¼¹æ¡†éƒ½å‰æŽ‰ï¼ŒåŽç»­å†ä»‹ç»ã€‚最åŽè¦æ¿€æ´»MDK，导入License,激活MDKåŽå°±å¯ä»¥ä½¿ç”¨äº†ã€‚ + +![](./image/mtkdl05.png) + +特别æ示：一定è¦è¾“å…¥License激活MDK软件，建议购买正版License。 + +### 3.2 安装器件支æŒåŒ… +MDK V4版本安装包里集æˆäº†å™¨ä»¶çš„支æŒåŒ…，而MDK V5版本是独立出æ¥çš„，å¯ä»¥è‡ªå·±ä¸‹è½½å®‰è£…。安装完开å‘工具MDK V5åŽï¼Œæˆ‘们需è¦å®‰è£…å¼€å‘æ¿ä¸»èŠ¯ç‰‡åž‹å·å¯¹åº”的芯片器件支æŒåŒ…。 +#### 3.2.1 安装方å¼ä¸€ +登录官网：[http://www.keil.com/dd2/pack/](http://www.keil.com/dd2/pack/) +下载Keil.STM32L4xx_DFP.x.x.x.pack 完æˆåŽï¼ŒåŒå‡»æ‰“开安装。 +#### 3.2.2 安装方å¼äºŒ +MDK软件上在线安装，一般下载速度会比较慢，更新时间很长，ä¸æŽ¨è。 +打开软件，在导航æ æ‰“å¼€Pack安装界é¢ï¼Œå¼¹å‡ºåŒ…安装æ示点击ok选项。 +![](./image/mtkins01.png) +进入在线安装界é¢ï¼Œé€‰æ‹©STM32L4XX Pack,点击Install进行安装。 +![](./image/mtkins02.png) + +### 3.3 CH340串å£é©±åŠ¨å®‰è£… +BDW01å¼€å‘æ¿æ¿è½½USB转串å£èŠ¯ç‰‡ï¼Œæ‰€ä»¥ä½¿ç”¨USB线将开å‘æ¿è¿žæŽ¥åˆ°ç”µè„‘，就在串å£è°ƒè¯•åŠ©æ‰‹æŸ¥çœ‹ä¸²å£è¾“出的LOGä¿¡æ¯ã€‚使用串å£è°ƒè¯•åŠ©æ‰‹ä¹‹å‰éœ€è¦ä¸‹è½½å®‰è£…CH340转串å£èŠ¯ç‰‡çš„驱动。直接在网上æœç´¢ä¸‹è½½CH340转串å£èŠ¯ç‰‡çš„驱动，下载完æˆåŽæ‰“开驱动安装程åºç‚¹å‡»å®‰è£…å³å¯ã€‚ +![](./image/ch340ins01.png) + +### 3.4 串å£è°ƒè¯•åŠ©æ‰‹çš„安装与使用 +工具下载网å€ï¼š[http://www.daxia.com/download/sscom.rar](http://www.daxia.com/download/sscom.rar) +下载完æˆåŽï¼Œè§£åŽ‹ï¼ŒåŒå‡»æ‰“开串å£è°ƒè¯•åŠ©æ‰‹æ‰§è¡Œç¨‹åºï¼Œç›´æŽ¥ä½¿ç”¨ã€‚ +![](./image/ch340ins02.png) +使用USB线一端接开å‘æ¿LOG USB串å£ï¼Œå¦ä¸€ç«¯è¿žæŽ¥åˆ°ç”µè„‘，å‰é¢å®‰è£…完CH340转串å£èŠ¯ç‰‡çš„驱动，打开电脑的设备管ç†å™¨ï¼Œå°±å¯ä»¥åœ¨ç«¯å£åˆ—表查看PC与开å‘æ¿ä¹‹é—´è¿žæŽ¥ç«¯å£å·ï¼Œç„¶åŽåœ¨ä¸²å£è°ƒè¯•åŠ©æ‰‹-端å£å·å¤„，选择PC和开å‘æ¿ä¹‹é—´çš„连接端å£(我这里显示的是COM15，所以è¦åœ¨ä¸²å£è°ƒè¯•åŠ©æ‰‹ä¸­é€‰æ‹©COM15)。 +![](./image/ch340ins03.png) +å†æ ¹æ®å¼€å‘æ¿ä¸²å£æ³¢ç‰¹çŽ‡è®¾ç½®ä¸²å£è°ƒè¯•åŠ©æ‰‹-波特率，开å‘æ¿ç¨‹åºæ³¢ç‰¹çŽ‡è®¾ç½®ä¸º115200，所以在串å£è°ƒè¯•åŠ©æ‰‹ä¸­é€‰æ‹©115200波特率。最åŽæ‰“开串å£å°±å¯ä»¥ä½¿ç”¨äº†ã€‚ + +### 3.5 ST-Link驱动的下载与安装 +å‰é¢2.2介ç»è¿‡å¼€å‘æ¿ä¸ŽST-Link烧录器的接线方å¼ï¼Œåœ¨ä½¿ç”¨çƒ§å½•å™¨å°†ç¨‹åºçƒ§å½•åˆ°å¼€å‘æ¿ä¹‹å‰ï¼Œéœ€è¦å®‰è£…烧录器的驱动。 +在ST官网下载ST-Link驱动STSW-LINK009，下载网å€ï¼š +[https://www.st.com/content/st_com/zh/products/development-tools/software-development-tools/stm32-software-development-tools/stm32-utilities/stsw-link009.html](https://www.st.com/content/st_com/zh/products/development-tools/software-development-tools/stm32-software-development-tools/stm32-utilities/stsw-link009.html) + +å†æ ¹æ®ç”µè„‘系统安装驱动，32ä½ç”µè„‘系统安装dpinst_x86.exe，64ä½ç”µè„‘系统安装dpinst_amd64.exe 。  +![](./image/st-link-dl01.png) + +è¿è¡Œå¯¹åº”的驱动执行程åºï¼Œå¼€å§‹å®‰è£…ST-Link V2驱动，最åŽç‚¹å‡»å®Œæˆã€‚ +![](./image/st-link-dl02.png) + +安装完æˆåŽ, 将开å‘æ¿ç”µæºæ‰“开，将连ç€å¼€å‘æ¿çš„烧录器通过USB接å£è¿žè‡³ç”µè„‘。 + +打开电脑上的设备管ç†å™¨ã€‚è‹¥å¯ä»¥çœ‹åˆ°é€šç”¨ä¸²è¡Œæ€»çº¿è®¾å¤‡-STM32 STLink,表示驱动安装æˆåŠŸ,如下图所示。 +![](./image/st-link-dl03.png) + +## 4. å¼€å‘与调试 +å‰é¢çš„软硬件工作准备好之åŽï¼ŒæŽ¥ä¸‹æ¥å°±å¯ä»¥è¿›è¡Œå¼€å‘与调试了。示例工程hello_world的主è¦åŠŸèƒ½æ˜¯åˆ›å»ºä¸¤ä¸ªä»»åŠ¡ï¼Œä¸¤ä¸ªä»»åŠ¡å¾ªçŽ¯è¾“å‡ºæ‰“å° ã€‚ +路径：TencentOS-tiny\board\BDW01-STM32L496VG\KEIL\hello_world。 + +打开示例工程hello_world，进入到MDK keil5主窗å£ç•Œé¢ï¼š +![](./image/helloword00.png) +点击 Build Target 编译工程目标： +![](./image/helloword01.png) +编译完æˆåŽï¼ŒæŸ¥çœ‹æ¶ˆæ¯çª—å£ï¼š0 Error(s)，表示代ç æ²¡æœ‰è¯­æ³•é”™è¯¯ã€‚ +![](./image/helloword02.png) +LOG USB线和烧录器ST-Link/v2都连接到电脑，串å£è°ƒè¯•åŠ©æ‰‹ä¹Ÿé…置好并打开。 +点击 Download 下载程åºåˆ°å¼€å‘æ¿ã€‚ +下载完æˆåŽï¼Œåœ¨å¼€å‘æ¿ä¸ŠæŒ‰ä¸‹å¤ä½æŒ‰é’®ï¼ŒæŸ¥çœ‹ä¸²å£è°ƒè¯•åŠ©æ‰‹ä¸ŠæŽ¥æ”¶æ•°æ®çš„显示。 +![](./image/helloword03.png) \ No newline at end of file diff --git a/board/BDW01-STM32L496VG/doc/2.TCP Socket 通讯测试.md b/board/BDW01-STM32L496VG/doc/2.TCP Socket 通讯测试.md new file mode 100644 index 00000000..d5946bd3 --- /dev/null +++ b/board/BDW01-STM32L496VG/doc/2.TCP Socket 通讯测试.md @@ -0,0 +1,32 @@ +# TCP Socket 通讯测试 +--- +本示例会å¯åŠ¨ä¸¤ä¸ªçº¿ç¨‹ï¼Œå»ºç«‹ä¸¤ä¸ªTCP链接，分别å‘é€æ•°æ® +M5313å¯åŒæ—¶æ”¯æŒ4个链接，ä¸è¿‡åœ¨ä»£ç é»˜è®¤å®šä¹‰çš„是3个，有需è¦å¯ä»¥ä¿®æ”¹ä¸º4个或根æ®è‡ªå·±éœ€è¦è¿›è¡Œä¿®æ”¹ã€‚ + +路径：TencentOS-tiny\net\at\include\tos_at.h +![](./image/tcpsocket01.png) + +## 1. æ­å»ºTCPæœåŠ¡å™¨ +M5313 使用2G网络，本地PC使用的是局域网，这里åšäº†ä¸€ä¸ªæœåŠ¡å™¨çš„内网穿é€ï¼Œç„¶åŽç™¾åº¦ip查看æœåŠ¡å™¨çš„外网IP。 +这里使用SocketTool建立TCP server。 + +## 2. è¿è¡Œå·¥ç¨‹ +使用 Keil-MDK 打开 tcp_through_module工程： +路径：TencentOS-tiny\board\BDW01-STM32L496VG\KEIL\tcp_through_module +![](./image/tcpsocket02.png) + +打开2g模å—M5313的串å£æŽ¥æ”¶ï¼š +![](./image/tcpsocket03.png) + +打开tcp_through_module.c文件，根æ®è‡ªå·±çš„TCPæœåŠ¡å™¨åœ°å€ï¼Œä¿®æ”¹é…ç½®: +![](./image/tcpsocket04.png) + +修改完æˆåŽï¼Œç‚¹å‡»ç¼–译按钮编译，编译æˆåŠŸä¹‹åŽçƒ§å½•åˆ°å¼€å‘æ¿ï¼ˆé»˜è®¤ä½¿ç”¨ST-Link下载器）。 + +烧录之åŽæŒ‰ä¸‹å¼€å‘æ¿ä¸Šçš„å¤ä½æŒ‰é’®ï¼Œç¨‹åºå¼€å§‹è¿è¡Œï¼Œåœ¨ä¸²å£åŠ©æ‰‹æŸ¥çœ‹æ—¥å¿—： +![](./image/tcpsocket05.png) + +在TCPæœåŠ¡å™¨ä¸Šå¯æŸ¥çœ‹æ”¶åˆ°çš„æ•°æ® +![](./image/tcpsocket06.png) + +![](./image/tcpsocket07.png) \ No newline at end of file diff --git a/board/BDW01-STM32L496VG/doc/3.对接腾讯云与腾讯连连-测试.md b/board/BDW01-STM32L496VG/doc/3.对接腾讯云与腾讯连连-测试.md new file mode 100644 index 00000000..d8c6dee0 --- /dev/null +++ b/board/BDW01-STM32L496VG/doc/3.对接腾讯云与腾讯连连-测试.md @@ -0,0 +1,328 @@ +# 对接腾讯云与腾讯连连-测试 + +---------- +本示例示范如何对接到腾讯云物è”网开å‘å¹³å°IoT Explore和腾讯连连å°ç¨‹åº +## 1.云端æ“作步骤 +登录[腾讯云物è”网开å‘å¹³å°ï¼ˆIoT Explorer）](https://cloud.tencent.com/product/iotexplorer "腾讯云物è”网开å‘å¹³å°ï¼ˆIoT Explorer）")，点击“立å³ä½¿ç”¨â€è¿›å…¥æŽ§åˆ¶å°ï¼Œä¸ªäººå¼€å‘å¯ä»¥ä½¿ç”¨å¾®ä¿¡è¿›è¡Œç™»å½•ã€‚ + +### 1.1 新建项目 +项目是为了用户é¢å¯¹ä¸åŒçš„产å“迭代或ä¸åŒçš„项目角色而设计的一ç§éš”离机制，便于用户清晰管ç†ç‰©è”网项目，并能çµæ´»åœ°é…置项目æƒé™ã€‚ + +1. 项目下å¯ä»¥å»ºç«‹å¤šä¸ªäº§å“与应用，应用默认有æƒé™è®¿é—®è¯¥é¡¹ç›®ä¸‹çš„所有产å“ï¼› +2. æ¯ä¸ªé¡¹ç›®ä¼šæœ‰è‡ªå·±çš„唯一 ID，数æ®ä¼šæ ¹æ®é¡¹ç›®è¿›è¡Œéš”离，以确ä¿æ•°æ®å®‰å…¨ï¼› +3. 项目删除åŽï¼Œè¯¥é¡¹ç›®æ‰€å±žäº§å“等数æ®éƒ½å°†è¢«åˆ é™¤ä¸”ä¸èƒ½æ¢å¤ï¼› +4. å¼€å‘å¹³å°æ供资æºçº§çš„æƒé™æŽ§åˆ¶ï¼Œå¯ä¸ºä¸åŒçš„å­ç”¨æˆ·åˆ†é…项目级ã€äº§å“级的æƒé™æŽ§åˆ¶ï¼› + +点击新建项目，填写项目å称和简介： +![](./image/iot01.png) + +### 1.2. 产å“å¼€å‘ +#### 1.2.1 æ–°å»ºäº§å“ +点击项目å称进入到该项目中，点击新建产å“： +![](./image/iot02.png) +填写产å“的一些信æ¯ï¼š +1. 产å“å称：å称为中文ã€å­—æ¯ã€æ•°å­—ã€ä¸‹åˆ’线的组åˆï¼Œ1 - 20ä½ä¸”ä¸èƒ½ä¸ºç©ºã€‚ +2. 产å“å“类：选择您所创建产å“的所属å“类，ä¸åŒç±»åž‹äº§å“的属性ã€äº‹ä»¶ç­‰æ•°æ®æ¨¡æ¿ä¼šæœ‰æ‰€ä¸åŒã€‚详情请å‚è§ æ•°æ®æ¨¡æ¿ã€‚ +3. 设备类型：设备使用2G/3G/4G/Wi-Fi无线通信或有线通信方å¼ï¼Œç½‘å…³å¯æ供云端通信能力，帮助设备与平å°é€šä¿¡ã€‚ +4. 认è¯æ–¹å¼ï¼šç‰©è”网开å‘å¹³å°æ供两ç§è®¤è¯æ–¹å¼ç”¨äºŽè®¾å¤‡ä¸Žå¹³å°ä¹‹é—´é‰´æƒè®¤è¯ã€‚ + è¯ä¹¦è®¤è¯ï¼šåœ¨åˆ›å»ºè®¾å¤‡æ—¶ï¼Œå¹³å°å°†ä¸ºè®¾å¤‡ç”Ÿæˆä¸€ä¸ªè¯ä¹¦æ–‡ä»¶å’Œä¸€ä¸ªç§é’¥æ–‡ä»¶ï¼Œå®žçŽ°è®¾å¤‡ä¸Žäº‘之间的åŒå‘认è¯ã€‚ + 密钥认è¯ï¼šåœ¨åˆ›å»ºè®¾å¤‡æ—¶ï¼Œä½¿ç”¨å¹³å°ä¸ºè®¾å¤‡éšæœºç”Ÿæˆçš„ PSK。 +5. 通信方å¼ï¼šæ‚¨å¯ä»¥é€‰æ‹© Wi-Fiã€ç§»åŠ¨èœ‚çªï¼ˆ2G/3G/4G）和其他通信方å¼ã€‚ +6. æ•°æ®å议：默认采用数æ®æ¨¡æ¿çš„æ•°æ®å议，您也å¯ä»¥è‡ªå®šä¹‰å议进行é€ä¼ ã€‚ +7. æ述：字数ä¸èƒ½è¶…过80个，您å¯ä»¥æ ¹æ®éœ€è¦é€‰å¡«ã€‚ +![](./image/iot03.png) +产å“新建æˆåŠŸåŽï¼Œå¯åœ¨äº§å“列表页查看到“智能ç¯â€ã€‚ +![](./image/iot04.png) + +#### 1.2.2 æ•°æ®æ¨¡ç‰ˆ +æ•°æ®æ¨¡æ¿æ˜¯å°†ç‰©ç†å®žä½“设备进行数字化æ述，构建其数字模型。在物è”网开å‘å¹³å°å®šä¹‰æ•°æ®æ¨¡æ¿å³å®šä¹‰äº§å“功能。完æˆåŠŸèƒ½å®šä¹‰åŽï¼Œç³»ç»Ÿå°†è‡ªåŠ¨ç”Ÿæˆè¯¥äº§å“çš„æ•°æ®æ¨¡æ¿ã€‚ + +点击智能ç¯äº§å“进入。 + +##### 1.2.2.1 +选择“智能ç¯â€ç±»åž‹åŽï¼Œç³»ç»Ÿä¼šè‡ªåŠ¨ç”Ÿæˆæ ‡å‡†åŠŸèƒ½ï¼š +![](./image/iot05.png) +#### 1.2.2.2 +下方的新建功能，å¯ä»¥å¢žåŠ æ–°çš„功能，定义如下: +![](./image/iot06.png) +功能类型包å«ä¸‰å…ƒç´ ï¼š +1. 属性：包括布尔型ã€æ•´æ•°åž‹ã€å­—符型ã€æµ®ç‚¹åž‹ã€æžšä¸¾åž‹å’Œæ—¶é—´åž‹ç­‰6ç§åŸºæœ¬æ•°æ®ç±»åž‹ï¼› +2. 事件：包括告警ã€æ•…障和信æ¯ä¸‰ç§ç±»åž‹ï¼Œäº‹ä»¶åž‹åŠŸèƒ½å±žæ€§å¯ä»¥æ·»åŠ å…·ä½“的事件å‚数，这些å‚æ•°å¯ä»¥ç”±å±žæ€§ä¸­6ç§åŸºæœ¬æ•°æ®ç±»åž‹ç»„æˆï¼› +3. 行为：用于实现更å¤æ‚的业务逻辑，å¯åŒ…å«è¾“å…¥å‚数和输出å‚数，å¯ç”¨äºŽè®©è®¾å¤‡æ‰§è¡ŒæŸé¡¹ç‰¹å®šçš„任务。行为的输入å‚数和输出å‚æ•°å¯æ·»åŠ ä¸Šè¿°6ç§å±žæ€§çš„基本数æ®ç±»åž‹ã€‚ + +| 功能元素 | 功能æè¿° | 功能标识符 | +| -------- | --------- | ----------- | +| 属性 | 用于æ述设备的实时状æ€ï¼Œæ”¯æŒè¯»å–和设置，如模å¼ã€äº®åº¦ã€å¼€å…³ç­‰ã€‚ | PropertiesId | +| 事件 | 用于æ述设备è¿è¡Œæ—¶çš„事件，包括告警ã€ä¿¡æ¯å’Œæ•…障等三ç§äº‹ä»¶ç±»åž‹ï¼Œå¯æ·»åŠ å¤šä¸ªè¾“出å‚数，如环境传感器检测到空气质é‡å¾ˆå·®ï¼Œç©ºè°ƒå¼‚常 | EventId | +| 行为 | 用于æè¿°å¤æ‚的业务逻辑,å¯æ·»åŠ å¤šä¸ªè°ƒç”¨å‚数和返回å‚æ•°,用于让设备执行æŸé¡¹å®šç‰¹å®šçš„任务，例如，开é”动作需è¦çŸ¥é“是哪个用户在什么时间开é”，é”的状æ€å¦‚何等。 | ActionId | + +æ•°æ®ç±»åž‹æ”¯æŒ6ç§ï¼š +1.布尔型：éžçœŸå³å‡çš„二值型å˜é‡ã€‚例如，开关功能。 +2.整数型：å¯ç”¨äºŽçº¿æ€§è°ƒèŠ‚çš„æ•´æ•°å˜é‡ã€‚例如，空调的温度。 +3.字符型：以字符串形å¼è¡¨è¾¾çš„功能点，例如，ç¯çš„ä½ç½®ã€‚ +4.浮点型：精度为浮点型的功能点。例如，压力值的范围：0.0 - 24.0。 +5.枚举型：自定义的有é™é›†åˆå€¼ã€‚例如，ç¯çš„颜色：白色ã€çº¢è‰²ã€é»„色等。 +6.时间型：string 类型的 UTC 时间戳（毫秒）。 + +#### 1.2.3 +æ•°æ®æ¨¡æ¿æ˜¯ä¸€ä¸ª JSON æ ¼å¼çš„文件，使用数æ®æ¨¡æ¿å议，用户的设备需按数æ®æ¨¡æ¿å®šä¹‰è¦æ±‚传输设备数æ®åˆ°äº‘端，并å¯ä½¿ç”¨åŸºäºŽæ•°æ®æ¨¡æ¿çš„诸多业务功能，点击查看jsonå¯ä»¥çœ‹åˆ°ä¸Šé¢åˆ›å»ºåŠŸèƒ½çš„jsonæ ¼å¼ï¼š +![](./image/iot07.png) + +```c +{ + "version": "1.0", + "properties": [ + { + "id": "power_switch", + "name": "电ç¯å¼€å…³", + "desc": "控制电ç¯å¼€ç­", + "required": true, + "mode": "rw", + "define": { + "type": "bool", + "mapping": { + "0": "å…³", + "1": "å¼€" + } + } + }, + { + "id": "color", + "name": "颜色", + "desc": "ç¯å…‰é¢œè‰²", + "mode": "rw", + "define": { + "type": "enum", + "mapping": { + "0": "Red", + "1": "Green", + "2": "Blue" + } + } + }, + { + "id": "brightness", + "name": "亮度", + "desc": "ç¯å…‰äº®åº¦", + "mode": "rw", + "define": { + "type": "int", + "unit": "%", + "step": "1", + "min": "0", + "max": "100", + "start": "1" + } + }, + { + "id": "name", + "name": "ç¯ä½ç½®å称", + "desc": "ç¯ä½ç½®å称：书房ã€å®¢åŽ…ç­‰", + "mode": "rw", + "required": false, + "define": { + "type": "string", + "min": "0", + "max": "64" + } + } + ], + "events": [ + { + "id": "status_report", + "name": "DeviceStatus", + "desc": "Report the device status", + "type": "info", + "required": false, + "params": [ + { + "id": "status", + "name": "running_state", + "desc": "Report current device running state", + "define": { + "type": "bool", + "mapping": { + "0": "normal", + "1": "fault" + } + } + }, + { + "id": "message", + "name": "Message", + "desc": "Some extra message", + "define": { + "type": "string", + "min": "0", + "max": "64" + } + } + ] + }, + { + "id": "low_voltage", + "name": "LowVoltage", + "desc": "Alert for device voltage is low", + "type": "alert", + "required": false, + "params": [ + { + "id": "voltage", + "name": "Voltage", + "desc": "Current voltage", + "define": { + "type": "float", + "unit": "V", + "step": "1", + "min": "0.0", + "max": "24.0", + "start": "1" + } + } + ] + }, + { + "id": "hardware_fault", + "name": "Hardware_fault", + "desc": "Report hardware fault", + "type": "fault", + "required": false, + "params": [ + { + "id": "name", + "name": "Name", + "desc": "Name like: memory,tf card, censors ...", + "define": { + "type": "string", + "min": "0", + "max": "64" + } + }, + { + "id": "error_code", + "name": "Error_Code", + "desc": "Error code for fault", + "define": { + "type": "int", + "unit": "", + "step": "1", + "min": "0", + "max": "2000", + "start": "1" + } + } + ] + } + ], + "actions": [], + "profile": { + "ProductId": "S7271EG5D8", + "CategoryId": "3" + } +} +``` + + +### 1.3. 创建测试设备 +在ã€è®¾å¤‡è°ƒè¯•ã€‘页é¢ä¸­ï¼Œå•å‡»ã€æ–°å»ºè®¾å¤‡ã€‘，设备å为 bdw01_led： +![](./image/iot08.png) + +## 2. 设备侧æ“作 +使用 Keil-MDK 打开 mqttclient_iot_explorer 工程： +TencentOS-tiny\board\BDW01-STM32L496VG\KEIL\mqttclient_iot_explorer +![](./image/iot09.png) + +### 2.1 é…置使用的网络设备 +打开mqttclient_iot_explorer.c文件，修改é…置。 +修改本工程所使用的通信模组，打开USE_M5313，如图： +![](./image/iot10.png) + +#### 2.1.1 修改MQTT对接å‚æ•° +在腾讯云物è”网开å‘å¹³å°å¯ä»¥çœ‹åˆ°ä¸€äº›äº§å“IDã€è®¾å¤‡IDã€è®¾å¤‡ç§˜é’¥ä¸‰ä¸ªå‚数，如图： +![](./image/iot11.png) + +接下æ¥è¿›å…¥TencentOS-tiny仓库中的tools目录，使用pythonè¿è¡Œè„šæœ¬mqtt_config_gen.py，按照æ示输出刚刚在平å°æŸ¥è¯¢åˆ°çš„三个å‚数，脚本会自动生æˆmqtté…ç½®å‚数： +![](./image/iot12.png) +â‘  输入产å“IDï¼› +â‘¡ 输入设备å称； +â‘¢ 输入设备秘钥； +â‘£ ⑤ ä¿æŒé»˜è®¤ï¼Œç›´æŽ¥å›žè½¦ï¼› +⑥ 需è¦çš„生æˆä¿¡æ¯ã€‚ +接下æ¥åœ¨ä»£ç ä¸­ä¿®æ”¹é…置信æ¯ï¼š +![](./image/iot13.png) + +#### 2.1.2 修改mqtt对接topic +设备å‘云端上报数æ®çš„topic如下： +上行请求 Topic： $thing/up/property/{ProductID}/{DeviceName} +上行å“应 Topic： $thing/down/property/{ProductID}/{DeviceName} +这两个topic咋玩呢？ +首先订阅上行å“应topic，接ç€å‘上行请求topic上报数æ®ï¼Œä¸ŠæŠ¥æ•°æ®æ—¶å¹³å°ä¸ä»…规定了topic，还规定了数æ®å†…容，如下： +```c +{ + "method":"report", + "clientToken":"clientToken-145023f5-bc9b-4174-ba3b-430ba5956e5c", + "params": + { + "brightness":55, + "name":"bedroom", + "power_switch":1, + "color":2 + } +} +``` +其中æ¯ä¸€é¡¹çš„æ„义如下： +| å‚æ•° | 类型 | 说明 | +| -------- | --------- | ----------- | +| method | String | report 表示设备属性上报 | +| clientToken | String | 用于上下行消æ¯é…对标识 | +| timestamp | Integer | 属性上报的时间 | +| params | JSON | JSON 结构内为设备上报的属性值 | + +åŒæ—¶ï¼Œå› ä¸ºè®¢é˜…了上行å“应topic，所以模组会收到云端下å‘çš„å“应并通过URC模å¼ä¸ŠæŠ¥ï¼Œäº‘端å“应报文整ç†ä¸€ä¸‹æ ¼å¼å¦‚下： +```c +{ + "method":"report_reply", + "clientToken":"clientToken-145023f5-bc9b-4174-ba3b-430ba5956e5c", + "code":0, + "status":"success"} +ï½ +``` +其中æ¯ä¸€é¡¹ä¹Ÿæœ‰å…·ä½“çš„å«ä¹‰ï¼š +| å‚æ•° | 类型 | 说明 | +| -------- | --------- | ----------- | +| method | String | report_reply 表示云端接收设备上报åŽçš„å“应报文 | +| clientToken | String | 用于上下行消æ¯é…对标识 | +| code | Integer | 0表示云端æˆåŠŸæ”¶åˆ°è®¾å¤‡ä¸ŠæŠ¥çš„属性 | +| status | String | 当codeéž0的时候, æç¤ºé”™è¯¯ä¿¡æ¯ | + +接下æ¥ä¿®æ”¹ä»£ç ï¼Œé¦–å…ˆ**æ ¹æ®è‡ªå·±çš„产å“ID和设备ID修改上报topic**： +![](./image/iot14.png) +然åŽä¿®æ”¹è®¢é˜…topic： +![](./image/iot15.png) + +打开2g模å—M5313的串å£æŽ¥æ”¶ï¼š +![](./image/iot16.png) + +#### 2.1.3 编译下载 +修改完æˆä¹‹åŽç¼–译工程，下载到开å‘æ¿ä¸­ï¼Œé‡æ–°ä¸Šç”µå¼€å§‹è¿è¡Œï¼Œåœ¨ä¸²å£åŠ©æ‰‹ä¸­æŸ¥çœ‹æ‰“å°æ—¥å¿—： +![](./image/iot17.png) +在云端查看上报日志： +![](./image/iot18.png) +点击ã€è®¾å¤‡å±žæ€§ã€‘，点击亮度属性一æ çš„查看，å¯ä»¥æŸ¥çœ‹æ›²çº¿æ˜¾ç¤ºï¼š +![](./image/iot19.png) + +## 3. 腾讯连连å°ç¨‹åºæ“作步骤 +### 3.1 添加家庭 +手机端在ã€å¾®ä¿¡ã€‘æœç´¢ã€è…¾è®¯è¿žè¿žã€‘å°ç¨‹åºï¼Œé¦–次使用需è¦è¿›å…¥åŽç‚¹å‡»ã€æˆ‘的】->ã€å®¶åº­ç®¡ç†ã€‘，添加一个你喜欢的å称å³å¯ã€‚ + +### 3.2 添加设备 +进入åŽåœ¨ä¸­ä¸‹æ–¹ç‚¹å‡»âž•å·ï¼Œå¼€å§‹æ‰«æäºŒç»´ç  +![](./image/iot20.png) +![](./image/iot21.png) +在腾讯云物è”网开å‘å¹³å°è¿›å…¥ã€è®¾å¤‡è°ƒè¯•ã€‘，点击对应设备åŽçš„ã€äºŒç»´ç ã€‘： +![](./image/iot22.png) +腾讯连连扫æ此二维ç å³å¯æˆåŠŸæ·»åŠ è®¾å¤‡ï¼Œæ·»åŠ æˆåŠŸä¹‹åŽå¦‚图： +![](./image/iot23.png) +给设备上电，等一会å¯ä»¥çœ‹åˆ°è®¾å¤‡ä¸Šçº¿ï¼Œç‚¹å‡»è¿›å…¥å¯ä»¥çœ‹åˆ°ä»£ç ä¸Šä¼ çš„äº®åº¦æ•°æ® +![](./image/iotpl.png) + diff --git a/board/BDW01-STM32L496VG/doc/4.对接腾讯云与腾讯连连-电动车追踪.md b/board/BDW01-STM32L496VG/doc/4.对接腾讯云与腾讯连连-电动车追踪.md new file mode 100644 index 00000000..8d81563e --- /dev/null +++ b/board/BDW01-STM32L496VG/doc/4.对接腾讯云与腾讯连连-电动车追踪.md @@ -0,0 +1,159 @@ +# 对接腾讯云与腾讯连连-电动车追踪 +本示例示范如何对接到腾讯云物è”网开å‘å¹³å°IoT Explore和腾讯连连å°ç¨‹åº +并上传GPS定ä½å’Œé€šè¿‡è…¾è®¯äº‘与腾讯连连控制开å‘æ¿ä¸Šçš„LED。 +## 1. 云端æ“作步骤 +登录[腾讯云物è”网开å‘å¹³å°ï¼ˆIoT Explorer）](https://cloud.tencent.com/product/iotexplorer "腾讯云物è”网开å‘å¹³å°ï¼ˆIoT Explorer）")，点击“立å³ä½¿ç”¨â€è¿›å…¥æŽ§åˆ¶å°ï¼Œä¸ªäººå¼€å‘å¯ä»¥ä½¿ç”¨å¾®ä¿¡è¿›è¡Œç™»å½•ã€‚ +### 1.1 新建项目 +具体å¯å‚考《3.对接腾讯云与腾讯连连-测试》新建项目章节，根æ®æ–‡æ¡£å·²ç»åˆ›å»ºäº†ä¸€ä¸ªæ™ºèƒ½ç»ˆç«¯çš„项目 +![](./image/elec01.png) +### 1.2 产å“å¼€å‘ +#### 1.2.1 æ–°å»ºäº§å“ +点击项目å称进入到该项目中，点击新建产å“： +![](./image/elec02.png) + +![](./image/elec03.png) +产å“新建æˆåŠŸåŽï¼Œå¯åœ¨äº§å“列表页查看到“电动车追踪â€ã€‚ +![](./image/elec04.png) + +#### 1.2.2 新建功能 +点击电动车追踪产å“进入。 +##### 1.2.2.1 +å‚照下图建立两个功能：ç¯å’Œä½ç½®ä¸¤ä¸ªåŠŸèƒ½ +![](./image/elec05.png) + +##### 1.2.2.2 +jsonæ ¼å¼ä¸ºï¼š +![](./image/elec06.png) +```c +{ + "version": "1.0", + "profile": { + "ProductId": "OKY0D78DP2", + "CategoryId": "1" + }, + "properties": [ + { + "id": "led", + "name": "ç¯", + "desc": "", + "mode": "rw", + "define": { + "type": "bool", + "mapping": { + "0": "å…³", + "1": "å¼€" + } + }, + "required": false + }, + { + "id": "location", + "name": "ä½ç½®", + "desc": "", + "mode": "r", + "define": { + "type": "string", + "min": "0", + "max": "1024" + }, + "required": false + } + ], + "events": [], + "actions": [] +} +``` +### 1.3 创建测试设备 +在ã€è®¾å¤‡è°ƒè¯•ã€‘页é¢ä¸­ï¼Œå•å‡»ã€æ–°å»ºè®¾å¤‡ã€‘，设备å为 bd_location： +![](./image/elec07.png) + +## 2. 设备侧æ“作 +使用 Keil-MDK 打开 mqttclient_iot_explorer_location 工程： +TencentOS-tiny\board\BDW01-STM32L496VG\KEIL\mqttclient_iot_explorer_location +![](./image/elec08.png) +### 2.1 é…置使用的网络设备 +打开mqttclient_iot_explorer_location.c文件，修改é…置。 +路径为：TencentOS-tiny\board\BDW01-STM32L496VG\BSP\app +修改本工程所使用的通信模组，打开USE_M5313，如图： +![](./image/elec09.png) + +#### 2.1.1 修改MQTT对接å‚æ•° +在腾讯云物è”网开å‘å¹³å°å¯ä»¥çœ‹åˆ°ä¸€äº›äº§å“IDã€è®¾å¤‡IDã€è®¾å¤‡ç§˜é’¥ä¸‰ä¸ªå‚数，如图： +![](./image/elec10.png) +接下æ¥è¿›å…¥TencentOS-tiny仓库中的tools目录，使用pythonè¿è¡Œè„šæœ¬mqtt_config_gen.py，按照æ示输出刚刚在平å°æŸ¥è¯¢åˆ°çš„三个å‚数，脚本会自动生æˆmqtté…ç½®å‚数： +![](./image/elec11.png) +â‘  输入产å“IDï¼› +â‘¡ 输入设备å称 +â‘¢ 输入设备秘钥； +â‘£ ⑤ ä¿æŒé»˜è®¤ï¼Œç›´æŽ¥å›žè½¦ï¼› +⑥ 需è¦çš„生æˆä¿¡æ¯ã€‚ +接下æ¥åœ¨ä»£ç ä¸­ä¿®æ”¹é…置信æ¯ï¼š +![](./image/elec12.png) +#### 2.1.2 修改mqtt对接topic +设备å‘云端上报数æ®çš„topic如下： +上行请求 Topic： $thing/up/property/{ProductID}/{DeviceName} +上行å“应 Topic： $thing/down/property/{ProductID}/{DeviceName} +首先订阅上行å“应topic，数æ®å†…容如下： +```c +{ + "method":"control", + "clientToken":"clientToken-9d2601f3-c36f-46a5-bdf6-1bd21c547406", + "params": + { + "led":1, + } +} +``` +åŒæ—¶ï¼Œå› ä¸ºè®¢é˜…了上行å“应topic，所以模组会收到云端下å‘çš„å“应并通过URC模å¼ä¸ŠæŠ¥ï¼Œäº‘端å“应报文整ç†ä¸€ä¸‹æ ¼å¼å¦‚下： +```c +{ + "method":"report_reply", + "clientToken":"clientToken-9d2601f3-c36f-46a5-bdf6-1bd21c547406", + "code":0, + "status":"success"} +ï½ +``` +修改代ç ï¼Œé¦–å…ˆ**æ ¹æ®è‡ªå·±çš„产å“ID和设备ID修改上报topic**： +![](./image/elec13.png) +然åŽä¿®æ”¹è®¢é˜…topic： +![](./image/elec14.png) +打开2g模å—M5313的串å£æŽ¥æ”¶ï¼š +![](./image/elec15.png) +#### 2.1.3 编译下载 +修改完æˆä¹‹åŽç¼–译工程，下载到开å‘æ¿ä¸­ï¼Œé‡æ–°ä¸Šç”µå¼€å§‹è¿è¡Œï¼Œåœ¨ä¸²å£åŠ©æ‰‹ä¸­æŸ¥çœ‹æ‰“å°æ—¥å¿—： +![](./image/elec16.png) +#### 2.1.4 ä¸ŠæŠ¥å®šä½ +GPS获å–到定ä½æ—¶ï¼Œä¸²å£ä¼šæ‰“å°GPS定ä½ä¿¡æ¯ï¼š +![](./image/elec17.png) +åŒæ—¶å°†å®šä½ä¸Šä¼ åˆ°äº‘端， +在云端查看上报日志： +![](./image/elec18.png) +#### 2.1.5 LED控制 +在设备调试里，打开在线调试，选择ç¯ï¼ŒæœŸæœ›å€¼é€‰æ‹©æ‰“开状æ€ï¼Œç„¶åŽç‚¹å‡»å‘é€ï¼ŒæˆåŠŸæŽ§åˆ¶æ¿å­ä¸Šçš„LEDï¼Œå¹¶è¿”å›žæ•°æ® +![](./image/elec19.png) + +## 3. 腾讯连连å°ç¨‹åºæ“作步骤 +### 3.1 添加家庭 +手机端在ã€å¾®ä¿¡ã€‘æœç´¢ã€è…¾è®¯è¿žè¿žã€‘å°ç¨‹åºï¼Œé¦–次使用需è¦è¿›å…¥åŽç‚¹å‡»ã€æˆ‘的】->ã€å®¶åº­ç®¡ç†ã€‘，添加一个你喜欢的å称å³å¯ã€‚ +### 3.2 添加设备 +进入åŽåœ¨ä¸­ä¸‹æ–¹ç‚¹å‡»âž•å·ï¼Œå¼€å§‹æ‰«æäºŒç»´ç  +![](./image/elec20.png) +![](./image/elec21.png) +在腾讯云物è”网开å‘å¹³å°è¿›å…¥ã€è®¾å¤‡è°ƒè¯•ã€‘，点击对应设备åŽçš„ã€äºŒç»´ç ã€‘： +![](./image/elec22.png) +腾讯连连扫æ此二维ç å³å¯æˆåŠŸæ·»åŠ è®¾å¤‡ï¼Œæ·»åŠ æˆåŠŸä¹‹åŽå¦‚图： +![](./image/elec23.png) +给设备上电，等一会å¯ä»¥çœ‹åˆ°è®¾å¤‡ä¸Šçº¿ï¼Œç‚¹è¿›åŽ»å¯è¿›è¡ŒLED的控制， +å¼€å‘æ¿ä¸Šçš„LED会亮。 +![](./image/elec24.png) +#### 3.2.1 é¢æ¿é…ç½® +å¯ä»¥é‡‡ç”¨H5对å°ç¨‹åºçš„显示页é¢è¿›è¡Œç¼–辑 +![](./image/elec25.png) +![](./image/elec26.png) +上传文件index.jsã€index.css(在source文件夹里) +![](./image/elec27.png) +并将腾讯连连å°ç¨‹åºé‡Œçš„å¸å·æ·»åŠ è‡³ç™½åå•ã€‚ +![](./image/elec28.png) +用å°ç¨‹åºé‡æ–°æ‰«æ设备二维ç ï¼Œç»™è®¾å¤‡é‡æ–°ä¸Šç”µï¼Œå½“有定ä½æ—¶ï¼Œæ•ˆæžœå¦‚下： +![](./image/elec29.png) + diff --git a/board/BDW01-STM32L496VG/doc/OTA-HTTPæ–¹å¼.md b/board/BDW01-STM32L496VG/doc/OTA-HTTPæ–¹å¼.md new file mode 100644 index 00000000..d444179e --- /dev/null +++ b/board/BDW01-STM32L496VG/doc/OTA-HTTPæ–¹å¼.md @@ -0,0 +1,229 @@ +# OTA-HTTPæ–¹å¼ +## 1. TencentOS-tiny OTA +### 1.1 OTA与IAP +IAP全称 In Application Programming，什么是在应用编程呢？ +正常开å‘æµç¨‹å¦‚下： +1. 使用Keil MDK工具编写应用程åºï¼› +2. 编译出.axfå¯æ‰§è¡Œç¨‹åºæˆ–者.bin文件，或者.hex文件； +3. 使用Keil MDK工具直接烧录.axf文件到STM32 Flash中，或者使用类似STM32CubeProg之类的软件烧录.bin文件到STM32 Flash中； +4. å¤ä½ï¼Œå•ç‰‡æœºä»ŽFlash起始地å€å¤„读å–程åºå¹¶æ‰§è¡Œï¼› + +当产å“å¼€å‘完æˆç”¨äºŽç”Ÿäº§åŽï¼Œé€šå¸¸ä¸ä¼šå†å¼•å‡ºä¸‹è½½å™¨æŽ¥å£ç»™ç”¨æˆ·ï¼Œæ‰€ä»¥ä¹Ÿå°±æ— æ³•è¿žæŽ¥å„ç§å„样的下载器，更别说用Keil或者STM32CubeProg这些工具下载程åºï¼Œå¦‚æžœå‘现应用程åºæœ‰æ¼æ´žï¼Œæˆ–者è¦ä¿®æ”¹éƒ¨åˆ†åŠŸèƒ½ï¼Œéƒ½å·²ç»æ— æ³•å®Œæˆã€‚ +#### 1.1.1 IAP设计æ€æƒ³ +IAP巧妙的解决了这个问题，å³åœ¨åº”用程åºæ­£å¸¸å·¥ä½œçš„时候，还å¯ä»¥æŽ¥æ”¶æ–°çš„固件并烧录到Flash中。 + +- 应用程åºå¦‚何接收新的固件？ + + 一般产å“设计时都会留一个用于打å°æ—¥å¿—ä¿¡æ¯çš„串å£ï¼Œå¯ä»¥ç›´æŽ¥åˆ©ç”¨æ­¤ä¸²å£æ¥æŽ¥æ”¶PCå‘é€åˆ°æ–°å›ºä»¶ï¼Œä¼ è¾“å议大多都采用Y-Modemå议。 + +- 接收之åŽçš„新固件存放到哪里？ + + 固件大å°ä¸€èˆ¬éƒ½æœ‰å‡ åKB或者上百KB，应用程åºæŽ¥æ”¶åˆ°æ–°çš„固件之åŽï¼Œå¦‚果是以数组的形å¼æš‚存在RAM空间中，ä¸ä»…会浪费RAM空间，而且容易å‘生固件数æ®ä¸¢å¤±ï¼Œæ‰€ä»¥ç›´æŽ¥å­˜å‚¨åˆ°ç©ºé—²çš„Flash空间中是最好的方å¼ã€‚ +eg. 官方开å‘æ¿ä½¿ç”¨çš„芯片是STM32L496VGTx，Flash空间有1024KB，如果应用程åºçš„大å°åªæœ‰100KB，那么接收进æ¥çš„新固件就å¯ä»¥å­˜æ”¾åœ¨å‰©ä½™çš„156KB空间中。 +åŒæ—¶ä¼šäººä¸ºçš„对Flash划分分区，也就是对æŸä¸€æ®µåœ°å€ç©ºé—´èµ·ä¸ªå字，如下图： +![](./image/ota-http01.png) + +- 如何将è€å›ºä»¶æ›¿æ¢ä¸ºä¸ºæ–°å›ºä»¶ï¼Ÿ +上电之åŽCPU会从Flash的起始地å€å¤„读å–æ•°æ®å¼€å§‹æ‰§è¡Œï¼Œè¿™ç‚¹æ— æ³•æ”¹å˜ï¼Œæ­£åœ¨è¿è¡Œçš„应用程åºå¦‚果进行自己擦除自己的æ“作，设备直接å˜ç –。 +bootloaderå¯ä»¥å®Œç¾Žçš„解决这一问题，å³å†™ä¸€å°æ®µåº”用程åºï¼Œæ”¾åœ¨Flash的起始ä½ç½®å¤„，使得æ¯æ¬¡ä¸Šç”µä¹‹åŽæœ€å…ˆè¿è¡Œbootloader，完æˆä¸¤ä¸ªåŠŸèƒ½ï¼š +â‘  检查å‡çº§æ ‡å¿—，是å¦æœ‰æ–°çš„固件被下载到IAP分区中； +â‘¡ 如果无å‡çº§æ ‡å¿—，则跳转到ActiveAPP分区，开始执行应用程åºï¼› +â‘¢ 如果有å‡çº§æ ‡å¿—，则先将IAP分区中的固件拷è´åˆ°ActiveAPP分区中，然åŽè·³è½¬åˆ°ActiveAPP分区，开始执行新的应用程åºï¼› +加入bootloader之åŽï¼Œæ•´ä¸ªFlash的分区情况如下： +![](./image/ota-http02.png) + +#### 1.1.2 OTA设计æ€æƒ³ +在IAPçš„è¿™ç§è®¾è®¡æ€æƒ³ä¹‹ä¸Šï¼Œå› ä¸ºå½“å‰çš„物è”网设备都已ç»å…·å¤‡åŸºæœ¬çš„网络通信功能，所以无需通过串å£ä¼ è¾“新的固件，直接通过网络传输新的固件å³å¯ï¼Œç§°ä¹‹ä¸ºOTA IAP(Over The Air In Application Programming)，也就是平常所说的空中å‡çº§ï¼Œç®€ç§°OTA。 + +### 1.2 OTA组件概述ã€ç‰¹æ€§åŠä¼˜åŠ¿ +TencentOS-tiny中æ供的OTA组件完全开æºå…费，相较于其他的OTA功能，TencentOS-tiny OTA组件æ供更å°çš„差分å‡çº§åŒ…，耗用更少的传输æµé‡ï¼Œå ç”¨æ›´å°çš„内存空间，æ供更å¯é çš„å‡çº§æœåŠ¡ã€‚ +TencentOS-tiny OTA组件有以下的特性： +传输差分å‡çº§åŒ…，而ä¸æ˜¯æ•´ä¸ªå›ºä»¶ +çµæ´»çš„分区表功能 +支æŒåŽŸåœ°å‡çº§ +支æŒä¹’乓å‡çº§ï¼Œå¯ä»¥åœ¨å‡çº§ä¸­æ–­çš„情况下进行版本回滚 +支æŒé€šè¿‡HTTP从自建æœåŠ¡å™¨æ‹‰å–固件 +支æŒä»Žè…¾è®¯äº‘å¹³å°è¿›è¡Œç»Ÿä¸€çš„固件拉å–å’Œç®¡ç† + +### 1.3 OTA组件开å‘调试推èæµç¨‹ +OTA的整个æµç¨‹è°ƒè¯•è¾ƒå¤æ‚，如果分步æ¥åšä¼šæ¯”较容易： +(1)调试bootloader是å¦å¯ä»¥æ­£å¸¸è¯»å–分区表信æ¯ï¼› +(2)调试bootloader是å¦å¯ä»¥æ­£å¸¸è·³è½¬åˆ°Active APP; +(3)调试bootloader是å¦ç›´æŽ¥å¯ä»¥æ ¹æ®patch包进行å‡çº§; +(4)调试Active APP是å¦å¯ä»¥é€šè¿‡ç½‘络拉å–patchå‡çº§åŒ…并下载到 OTA 分区; +(5)综åˆè°ƒè¯•ã€‚ + +## 2. 分区规划åŠåˆ†åŒºè¡¨çš„生æˆã€çƒ§å½• +### 2.1 分区规划 +TencentOS-tiny支æŒä¸¤ç§å‡çº§æ–¹å¼ï¼Œä¸¤ç§å‡çº§æ–¹å¼å¯¹åº”有ä¸åŒçš„分区表 +原地å‡çº§æ–¹å¼ä¸­ï¼Œbootloader直接根æ®æ—§å›ºä»¶+patchå‡çº§åŒ…生æˆæ–°çš„固件，一旦开始å‡çº§ï¼Œæ— è®ºå‡çº§æˆåŠŸä¸Žå¦éƒ½æ— æ³•å›žæ»šåˆ°ä¸Šä¸€ä¸ªç‰ˆæœ¬ï¼Œä¸»è¦æœ‰äº”个分区： +Bootloader分区：执行引导ã€åˆ†åŒºå‡çº§åŠŸèƒ½ï¼› +Active APP分区：当å‰æ­£åœ¨è¿è¡Œçš„固件存放分区； +OTA分区：新固件存放分区； +KV分区：记录系统å‡çº§ä¸­çš„一些环境å˜é‡ï¼› +分区表：存放分区表（固定大å°32B，一般放在Flash的最åŽä¸€ä¸ªæ‰‡åŒºä¸­ï¼‰ + +乒乓å‡çº§æ–¹å¼ä¸­ï¼Œbootloader在å‡çº§ä¹‹å‰ä¼šå°†åŽŸæ¥çš„固件拷è´ä¸€ä»½ï¼Œä¸€æ—¦å¼€å§‹å‡çº§ï¼Œæ— è®ºæ–°å›ºä»¶å‡çº§æˆåŠŸä¸Žå¦ï¼Œéƒ½å¯ä»¥å›žæ»šåˆ°ä¸Šä¸€ä¸ªç‰ˆæœ¬ï¼Œä¸»è¦æœ‰å…­ä¸ªåˆ†åŒºï¼š +Bootloader分区：执行引导ã€åˆ†åŒºå‡çº§åŠŸèƒ½ï¼› +Active APP分区：当å‰æ­£åœ¨è¿è¡Œçš„固件存放分区； +Backup分区：备份当å‰æ­£åœ¨è¿è¡Œçš„固件； +OTA分区：新固件存放分区； +KV分区：记录系统å‡çº§ä¸­çš„一些环境å˜é‡ï¼› +分区表：存放分区表（固定大å°32B，一般放在Flash的最åŽä¸€ä¸ªæ‰‡åŒºä¸­ï¼‰ + +在实际应用中，两ç§æ–¹å¼çš„选择è¦æ ¹æ®è®¾å¤‡éœ€æ±‚，设备Flash空间大å°ï¼Œè®¾å¤‡Flash扇区大å°ç»¼åˆè€ƒè™‘。 +本文接下æ¥å¦‚无特殊说明，都是以第一ç§æ–¹å¼ï¼ˆåŽŸåœ°å‡çº§ï¼‰ä¸ºä¾‹ï¼Œå®˜æ–¹æ¿çš„Flash大å°ä¸º1024KB，å¯ä»¥å¦‚下分区： +![](./image/ota-http03.png) + +### 2.2 分区表工具的使用方法 +TencentOS-tiny æºç ä¸­æ供了一个生æˆåˆ†åŒºè¡¨çš„命令行工具，需è¦å…ˆä½¿ç”¨gcc编译，没有gcc环境å¯ä»¥å®‰è£…MinGW。 +#### 2.2.1 编译 +进入\components\ota\tools\partition_table目录，执行make命令开始编译，编译之åŽè¿›å…¥åˆ°å½“å‰ç›®å½•ä¸‹çš„out\targetå³å¯çœ‹åˆ°å·¥å…·Â ptbl.exe： +cd out/target/ +该工具有如下å‚数： + +1. h：打å°å¸®åŠ©ä¿¡æ¯ +2. p ：选择å‡çº§æ–¹å¼,ip或者pp +3. a ：Active APP分区的起始和结æŸåœ°å€ +4. b ：Backup 分区的起始和结æŸåœ°å€ï¼Œé€‰äº†ppæ–¹å¼æ‰éœ€è¦ +5. o ：OTA分区的起始和结æŸåœ°å€ +6. k ：KV分区的起始和结æŸåœ°å€ +7. v .：åˆè¯†å›ºä»¶ç‰ˆæœ¬å· + +为官方æ¿ç”Ÿæˆåˆ†åŒºè¡¨æ–‡ä»¶çš„命令如下： +./ptbl.exe -p ip -a 0x08007800,0x080CF800 -o 0x080CF800,0x080F9800 -k 0x080F9800,0x080FF800 -v 0.1 ptbl.bin +è¿è¡Œä¹‹åŽå³å¯åœ¨å½“å‰ç›®å½•ä¸‹çœ‹åˆ°ç”Ÿæˆçš„分区表文件ptbl.bin。 + +### 2.3 分区表烧录方法 +生æˆçš„分区表文件ptbl.binå¯ä»¥é€šè¿‡STM32CubeProg直接烧录到Flash中，按照之å‰è§„划的分区，烧录ä½ç½®ä¸º 0x0803F800 ，烧录方法如下： +(1)使用下载器连接开å‘æ¿åˆ°PC，打开STM32CubeProg工具，点击Connect连接到开å‘æ¿ï¼š +![](./image/ota-http04.png) +(2)如果是第一次使用OTA，点击左侧的烧录按钮，点击全片擦除： +![](./image/ota-http05.png) +第一次使用的时候，KV分区中的数æ®ä¸ç¡®å®šï¼Œå¯é èµ·è§ç›´æŽ¥é€‰æ‹©å…¨ç‰‡æ“¦é™¤ã€‚ + +(3)点击左侧的烧录按钮，选择刚刚生æˆçš„ptbl.bin，下载地å€å¡«å†™ 0x080FF800，点击烧录： +![](./image/ota-http06.png) +出现烧录æˆåŠŸå¼¹çª—å³å¯ã€‚ + +## 3. 测试Bootloaderç¨‹åº +进入board\BDW01-STM32L496VG\KEIL\ota目录，打开官方æ供的bootloader示例工程： ota_bootloader_recovery。 +bootloader其实是一个裸机程åºï¼Œåœ¨ main 函数中主è¦æœ‰ä¸‰éƒ¨åˆ†ï¼Œåˆ†åˆ«å¯¹åº”三个功能： +读å–分区表 +æ ¹æ®patch包进行å‡çº§ +跳转到Active APP分区开始执行 +接下æ¥å°†å®Œæˆ 1.3 节所给出的OTA组件开å‘调试推èæµç¨‹å‰ä¸‰æ­¥ã€‚ +### 3.1 测试bootloader是å¦å¯ä»¥è¯»å–分区表 +首先需è¦æŒ‡å®šåˆ†åŒºè¡¨åœ°å€ï¼š +![](./image/ota-http07.png) +如下åˆå§‹åŒ–环境å˜é‡çš„代ç ï¼Œåœ¨åˆå§‹åŒ–之åŽæ‰“å°åˆ†åŒºè¡¨çš„代ç ï¼Œæœ€åŽçš„while(1)用于åœæ­¢ç¨‹åºï¼Œé˜²æ­¢è¿›è¡ŒåŽé¢çš„功能： +![](./image/ota-http08.png) +修改程åºç¼–译地å€å’Œå¤§å°ï¼Œä¸ŽBootloader分区的划分相对应： +![](./image/ota-http09.png) +编译程åºã€‚ +编译æˆåŠŸä¹‹åŽä¿®æ”¹ä¸‹è½½è®¾ç½®ï¼Œé€‰æ‹©æ‰‡åŒºæ“¦é™¤æ–¹å¼ã€è®¾ç½®ç¨‹åºçƒ§å½•èµ·å§‹åœ°å€ã€è®¾ç½®ç¨‹åºçƒ§å½•å¤§å°ï¼ŒåŒæ ·ä¸Žbootloader分区的划分相对应： +![](./image/ota-http10.png) +下载程åºï¼Œåœ¨ä¸²å£åŠ©æ‰‹ä¸­è§‚察输出： +![](./image/ota-http11.png) + +### 3.2 测试bootloader是å¦å¯ä»¥è·³è½¬åˆ°Active APP分区 +打开和bootloader在一个目录下的app工程：ota_application_download_through_http。 +ç›®å‰æˆ‘们åªæ˜¯æµ‹è¯•bootloader是å¦å¯ä»¥è·³è½¬è¿‡æ¥æ‰§è¡Œæ­¤ç¨‹åºï¼Œæ‰€ä»¥å¦‚图所示修改代ç ï¼Œä¸è¦è§¦å‘OTA固件拉å–功能： +![](./image/ota-http12.png) +å¦å¤–，因为此程åºè¢«çƒ§å½•åˆ° Active APP 分区，是从Active APP分区的起始地å€å¼€å§‹è¿è¡Œçš„，所以需è¦ä¿®æ”¹ä¸­æ–­å‘é‡è¡¨çš„å移地å€ï¼Œå¦‚图： +![](./image/ota-http13.png) +åŒæ ·ä¿®æ”¹ç¨‹åºç¼–译的起始地å€å’Œå¤§å°ï¼Œä¸Žè§„划的 Active APP分区信æ¯ç›¸å¯¹åº”： +![](./image/ota-http14.png) +编译程åºã€‚ +编译æˆåŠŸä¹‹åŽä¿®æ”¹ä¸‹è½½è®¾ç½®ï¼Œçƒ§å½•åˆ°Actice APP分区中： +![](./image/ota-http15.png) +最åŽå†ä¿®æ”¹bootloader程åºï¼Œå±è”½while(1)，å±è”½OTA固件å‡çº§åŠŸèƒ½ï¼Œå¼€å¯è·³è½¬åŠŸèƒ½ï¼š +![](./image/ota-http16.png) +å†æ¬¡ç¼–译，下载bootloader，å¤ä½å¼€å‘æ¿ï¼ŒæŸ¥çœ‹ä¸²å£åŠ©æ‰‹ä¸­çš„输出，å¯ä»¥çœ‹åˆ°bootloaderæˆåŠŸè·³è½¬åˆ°Actice APP开始执行： +![](./image/ota-http17.png) + +### 3.3 差分patch包生æˆæ–¹æ³• +#### 3.3.1 准备è€å›ºä»¶å’Œæ–°å›ºä»¶ +官方示例工程已ç»åœ¨MDK中é…置编译åŽç”Ÿæˆ.bin固件，如图： +![](./image/ota-http18.png) +编译之åŽä¼šåœ¨å·¥ç¨‹ç›®å½•ä¸‹ç”ŸæˆTencentOS_tiny.bin文件，拷è´ä¸€ä»½å‡ºæ¥ï¼Œé‡å‘½å为:TencentOS_tiny_0_1.bin，表示这是0.1版本的固件。 +修改app工程，将打å°ä¿¡æ¯ä¸­çš„0.1改为0.2，以验è¯æ˜¯å¦å‡çº§æˆåŠŸï¼š +![](./image/ota-http18.png) +é‡æ–°ç¼–译，生æˆæ–°å›ºä»¶TencentOS_tiny.bin，åŒæ ·æ‹·è´ä¸€ä»½ï¼Œé‡å‘½å为：TencentOS_tiny_0_2，表示这是0.2版本的固件。 +![](./image/ota-http19.png) + +#### 3.3.2 差分å‡çº§åŒ…生æˆå·¥å…·çš„使用 +编译此工具åŒæ ·éœ€è¦gcc环境。 +进入\components\ota\tools\diff目录，执行make命令开始编译，编译之åŽè¿›å…¥åˆ°å½“å‰ç›®å½•ä¸‹çš„out\targetå³å¯çœ‹åˆ°å·¥å…·Â diff.exe： +cd out/target/ +该工具有如下å‚数： +1. h：打å°å¸®åŠ©ä¿¡æ¯ +2. v：打å°æ›´å¤šä¿¡æ¯ +3. s：<待定...> +4. b ：指定扇区大å°ï¼Œå•ä½ï¼šå­—节Byte +5. n .ï¼šæ–°çš„å›ºä»¶ç‰ˆæœ¬å· +6. o .ï¼šæ—§çš„å›ºä»¶ç‰ˆæœ¬å· + +å°†3.3.1节准备的两个固件拷è´åˆ°å½“å‰å·¥å…·æ‰€åœ¨ç›®å½•ä¸‹ã€‚ +æ ¹æ®å‰é¢å‡†å¤‡çš„两个新旧固件，制作差分å‡çº§åŒ…的命令如下： +./diff.exe -v -b 2048 -n 0.2 -o 0.1 TencentOS_tiny_0_1.bin TencentOS_tiny_0_2.bin patch.bin +è¿è¡Œä¹‹åŽå³å¯åœ¨å½“å‰ç›®å½•ä¸‹çœ‹åˆ°ç”Ÿæˆçš„差分å‡çº§åŒ…patch.bin。 +![](./image/ota-http20.png) + +### 3.4 测试bootloader是å¦å¯ä»¥æ ¹æ®patch进行å‡çº§ +使用STM32CubeProg直接将差分å‡çº§åŒ…patch.bin下载到OTA分区： +![](./image/ota-http21.png) +下载æˆåŠŸåŽï¼Œå› ä¸ºbootloader通过检测KV分区中的环境å˜é‡new_versionæ¥åˆ¤æ–­æ˜¯å¦æœ‰æ–°çš„固件，但是环境å˜é‡åœ¨app程åºæ‹‰å–固件æˆåŠŸä¹‹åŽæ‰ä¼šè®¾ç½®ï¼Œæ‰€ä»¥æˆ‘们手动在bootloader中æ¥è®¾ç½®æ­¤çŽ¯å¢ƒå˜é‡ã€‚ +在main.c中引入KV的头文件： + +```c +#include "tos_kv.h" +``` +在环境å˜é‡åˆå§‹åŒ–代ç ä¹‹åŽï¼Œå‡çº§ä»£ç ä¹‹å‰æ·»åŠ ï¼ˆæ‰“开）如下的代ç ï¼š +![](./image/ota-http22.png) +添加之åŽç¼–译，下载，在串å£åŠ©æ‰‹ä¸­æŸ¥çœ‹è¾“出： +![](./image/ota-http23.png) +å¯ä»¥çœ‹åˆ°bootloaderæˆåŠŸæ ¹æ®patch差分包和旧的固件，还原出了新的固件并æˆåŠŸå‡çº§ã€‚ + +## 4. 使用HTTPæ–¹å¼èŽ·å–固件并å‡çº§ +TencentOS-tiny OTA组件支æŒä½¿ç”¨ HTTP å议拉å–差分å‡çº§patch包，并烧写到OTA分区中。 +### 4.1 准备HTTPæœåŠ¡å™¨ +HTTPæœåŠ¡å™¨çš„选择éžå¸¸å¤šï¼Œå¸¸ç”¨é€‰æ‹©æœ‰ï¼š +在Windows上使用类似MyWebServerçš„å°å·¥å…·å¼€å¯HTTPæœåŠ¡ +1)优点：简å•æ–¹ä¾¿ï¼Œç”¨äºŽæµ‹è¯• +2)缺点：需è¦åœ¨è·¯ç”±ç«¯åšä¸€ä¸ªç«¯å£æ˜ å°„，å¯ä»¥é€šè¿‡å¤–网进行访问 +![](./image/ota-http24.png) +在云æœåŠ¡å™¨ä¸Šå®‰è£…类似Nginx的工具，开å¯HTTP访问 +1)优点：性能强劲ã€æœ‰å…¬ç½‘ipã€æ”¯æŒé«˜å¹¶å‘（大é‡è®¾å¤‡åŒæ—¶å¼€æœºæ‹‰å–固件） +2)缺点：安装过程较å¤æ‚ +除了这两ç§æ–¹å¼å¤–，还有很多的方å¼å¯ä¾›é€‰æ‹©ï¼Œåªéœ€è¦å¼€å¯HTTPæœåŠ¡å³å¯ï¼Œæœ¬æ–‡ä¸­æˆ‘使用第一ç§æ–¹å¼ã€‚ +å¼€å¯ä¹‹åŽå°†ç¬¬3步中生æˆçš„差分å‡çº§å›ºä»¶ patch.bin 上传/å¤åˆ¶åˆ°HTTPæœåŠ¡ç›®å½•ä¸­ï¼Œç„¶åŽä½¿ç”¨æµè§ˆå™¨è®¿é—®http://<å·²ç»å¼€å¯HTTPæœåŠ¡PCçš„ip,外网ip>:/patch.bin，测试正常获å–之åŽæ–¹å¯è¿›è¡ŒåŽç»­æ“作。 +å¼€å¯HTTPæœåŠ¡ä¹‹åŽè®°å¾—关闭å„ç§é˜²ç«å¢™ï¼Œæ¯”如Win10网络防ç«å¢™ï¼Œäº‘æœåŠ¡å™¨å®‰å…¨ç»„等。 +### 4.2 HTTP获å–固件并å‡çº§ +(1)使用STM32CubeMX Prog全片擦除，烧写分区表到0x080ff800; +(2)修改bootloader程åºï¼ŒåŽ»é™¤æ‰‹åŠ¨è®¾ç½®new_version环境å˜é‡ä»£ç ï¼Œç¼–译，下载，**ä¸è¦å¤ä½**: +![](./image/ota-http25.png) + +![](./image/ota-http26.png) +(3)修改Actice APP工程(ota_application_download_through_http)，开å¯HTTP固件拉å–å’Œå‡çº§åŠŸèƒ½: +![](./image/ota-http27.png) +打开串å£å¯æŽ¥æ”¶M5313çš„æ•°æ®ï¼š +![](./image/ota-http28.png) +修改分区表地å€ï¼Œæ ¹æ®è‡ªå·±çš„外网ipé…置： +![](./image/ota-http29.png) +修改之åŽç¼–译，下载，**ä¸è¦å¤ä½**。 +特别注æ„，此时0.1版本的程åºå·²ç»è¢«æˆ‘们修改，所以之å‰ç”Ÿæˆçš„patch包无法完æˆå‡çº§ï¼Œé‡æ–°åœ¨0.1版本的基础上修改处0.2版本的程åºï¼Œå¹¶åˆ¶ä½œpatch包。 +é‡å¤ä¸€é之å‰çš„制作æµç¨‹å³å¯ï¼š +â‘  将当å‰å›ºä»¶æ‹·è´å‡ºæ¥ï¼Œé‡å‘½å为TencentOS_tiny_0_1.bin; +â‘¡ 修改打å°æ示，表示这是0.2版本的程åºï¼š +printf("do sth(v0.2)...\n"); +â‘¢ 将新固件拷è´å‡ºæ¥å‘½å为TencentOS_tiny_0_2.bin; +â‘£ 使用diff命令行工具或者å¯è§†åŒ–工具制作差分å‡çº§åŒ…patch.binï¼› +⑤ 将制作出的差分å‡çº§åŒ…æ‹·è´/上传到HTTPæœåŠ¡å™¨ç›®å½•ï¼› +此时，一切准备就绪，å¤ä½è®¾å¤‡ï¼Œå³å¯åœ¨ä¸²å£åŠ©æ‰‹ä¸­çœ‹åˆ°OTAçš„å‡çº§çŠ¶å†µï¼š +上电å¯åŠ¨ +![](./image/ota-http30.png) +ç­‰å¾…è¿žæŽ¥ï¼Œè¯·æ±‚ï¼Œä¸‹è½½ï¼ŒåŽ +![](./image/ota-http31.png) + + diff --git a/board/BDW01-STM32L496VG/doc/image/board.png b/board/BDW01-STM32L496VG/doc/image/board.png new file mode 100644 index 00000000..53536254 Binary files /dev/null and b/board/BDW01-STM32L496VG/doc/image/board.png differ diff --git a/board/BDW01-STM32L496VG/doc/image/ch340ins01.png b/board/BDW01-STM32L496VG/doc/image/ch340ins01.png new file mode 100644 index 00000000..0dc70e99 Binary files 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e(){u()(this,e),this.mBroadcast=!0,this.mIntervalGuideCodeMillisecond=20,this.mIntervalDataCodeMillisecond=20,this.mTimeoutGuideCodeMillisecond=1500,this.mTimeoutDataCodeMillisecond=5e3,this.mTotalRepeatTime=1,this.mEsptouchResultOneLen=1,this.mEsptouchResultMacLen=6,this.mEsptouchResultIpLen=4,this.mEsptouchResultTotalLen=11,this.mPortListening=18266,this.mTargetPort=7001,this.mWaitUdpReceivingMilliseond=25e3,this.mWaitUdpSendingMillisecond=45e3,this.mThresholdSucBroadcastCount=1,this.mExpectTaskResultCount=1,this._datagramCount=0}return l()(e,[{key:"getIntervalGuideCodeMillisecond",value:function(){return this.mIntervalGuideCodeMillisecond}},{key:"getIntervalDataCodeMillisecond",value:function(){return this.mIntervalDataCodeMillisecond}},{key:"getTimeoutGuideCodeMillisecond",value:function(){return this.mTimeoutGuideCodeMillisecond}},{key:"getTimeoutDataCodeMillisecond",value:function(){return this.mTimeoutDataCodeMillisecond}},{key:"getTimeoutTotalCodeMillisecond",value:function(){return this.mTimeoutGuideCodeMillisecond+this.mTimeoutDataCodeMillisecond}},{key:"getTotalRepeatTime",value:function(){return this.mTotalRepeatTime}},{key:"getEsptouchResultOneLen",value:function(){return this.mEsptouchResultOneLen}},{key:"getEsptouchResultMacLen",value:function(){return this.mEsptouchResultMacLen}},{key:"getEsptouchResultIpLen",value:function(){return this.mEsptouchResultIpLen}},{key:"getEsptouchResultTotalLen",value:function(){return this.mEsptouchResultTotalLen}},{key:"getPortListening",value:function(){return this.mPortListening}},{key:"getTargetHostname",value:function(){if(this.mBroadcast)return"255.255.255.255";var e=this.__getNextDatagramCount();return"234.".concat(e,".").concat(e,".").concat(e)}},{key:"getTargetPort",value:function(){return this.mTargetPort}},{key:"getWaitUdpReceivingMillisecond",value:function(){return this.mWaitUdpReceivingMilliseond}},{key:"getWaitUdpSendingMillisecond",value:function(){return this.mWaitUdpSendingMillisecond}},{key:"getWaitUdpTotalMillisecond",value:function(){return this.mWaitUdpReceivingMilliseond+this.mWaitUdpSendingMillisecond}},{key:"setWaitUdpTotalMillisecond",value:function(e){if(ei)return 1;if(o1&&void 0!==arguments[1]?arguments[1]:0,r=arguments.length>2?arguments[2]:void 0,o=arguments.length>3?arguments[3]:void 0,i=arguments.length>4?arguments[4]:void 0,a=arguments.length>5?arguments[5]:void 0,c=arguments.length>6?arguments[6]:void 0;if(1===r)return this.mSocket.send({address:o,port:i,message:e[n]}),c();setTimeout((function(){var u=Math.min(e.length-1,n+1),s=u>=e.length-1?1:r-1;t.mSocket.send({address:o,port:i,message:e[n]}),t.sendDataSideBySide(e,u,s,o,i,a,c)}),a)}},{key:"sendData",value:(n=a()(o.a.mark((function e(t){var n,r,i,a,c,u,s=arguments;return o.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(n=s.length>1&&void 0!==s[1]?s[1]:0,r=s.length>2?s[2]:void 0,i=s.length>3?s[3]:void 0,a=s.length>4?s[4]:void 0,c=s.length>5?s[5]:void 0,!(null==t||t.length<=0)){e.next=8;break}return console.log(this.TAG,"sendData(): data == null or length <= 0"),e.abrupt("return");case 8:if(!this.isClose){e.next=11;break}return console.log(this.TAG,"udpsocket is close"),e.abrupt("return");case 11:u=n;case 12:if(!(u>>1^this.CRC_POLYNOM:n>>>=1;this.crcTable[t]=n}this.value=this.init=this.CRC_INITIAL}return l()(e,[{key:"updateValue",value:function(e,t,n){for(var r=0;rthis.INDEX_MAX)throw"index > INDEX_MAX";var r=v.splitUint8To2bytes(t);this.mDataHigh=r[0],this.mDataLow=r[1];var o=new N;o.update(v.convertUint8toByte(t)),o.update(n);var i=v.splitUint8To2bytes(v.convertNumberToChar(o.getValue()));this.mCrcHigh=i[0],this.mCrcLow=i[1],this.mSeqHeader=v.convertNumberToByte(n)}return l()(e,[{key:"getBytes",value:function(){var e=new Int8Array(this.DATA_CODE_LEN);return e[0]=0,e[1]=v.combine2bytesToOne(this.mCrcHigh,this.mDataHigh),e[2]=1,e[3]=this.mSeqHeader,e[4]=0,e[5]=v.combine2bytesToOne(this.mCrcLow,this.mDataLow),e}},{key:"toString",value:function(){for(var e="",t=this.getBytes(),n=0;n0&&void 0!==arguments[0]?arguments[0]:"").split("."),t=new Int8Array(e.length),n=0;n127?r-256:r}return t}(o),m=h.length,g=v.convertNumberToChar(this.EXTRA_HEAD_LEN+m+c+p);this.mDataCodes=[],this.mDataCodes.push(new A(g,0)),a^=g,this.mDataCodes.push(new A(c,1)),a^=c,this.mDataCodes.push(new A(l,2)),a^=l,this.mDataCodes.push(new A(f,3)),a^=f;for(var y=0;y=this.mDataCodes.length?this.mDataCodes.push(O):this.mDataCodes.splice(C,0,O),C+=4}}return l()(e,[{key:"getBytes",value:function(){var e=new Int8Array(this.mDataCodes.length*this.DATA_CODE_LEN),t=0;return this.mDataCodes.forEach((function(n){n.getBytes().forEach((function(n){e[t++]=n}))})),e}},{key:"toString",value:function(){for(var e="",t=this.getBytes(),n=0;n2&&void 0!==arguments[2]?arguments[2]:{};i[e]("".concat(c.TAG,"log detail"),{errorCode:t,data:n})},c.logger("info","Welcome Esptouch smartconfig in weapp"),c}var n,r;return C()(t,e),l()(t,[{key:"__checkTaskValid",value:function(){return this.mIsExecuted?(this.logger("error","the Esptouch task could be executed only once"),!1):(this.mIsExecuted=!0,!0)}},{key:"start",value:(r=a()(o.a.mark((function e(){var t,n,r,i=arguments;return o.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(t=i.length>0&&void 0!==i[0]?i[0]:1,this.__checkTaskValid()){e.next=3;break}return e.abrupt("return");case 3:this.mParameter.setExpectTaskResultCount(t),this.logger("info","start smartconfig in promise settimeout"),n=new L(this.mApSsid,this.mApBssid,this.mApPassword,this.mLocalIp,this.mEncryptor),this.mSocketServer.startServer(),this.__listenAsyn(this.mParameter.getEsptouchResultTotalLen()),r=0;case 10:if(!(r0&&void 0!==arguments[0]?arguments[0]:1;if(this.__checkTaskValid()){this.mParameter.setExpectTaskResultCount(t),this.logger("info","start smartconfig in no promise settimeout");var n=new L(this.mApSsid,this.mApBssid,this.mApPassword,this.mLocalIp,this.mEncryptor);this.mSocketServer.startServer(),this.__listenAsyn(this.mParameter.getEsptouchResultTotalLen()),this.__executeInNoPromise(n),setTimeout((function(){e.mIsSuc||e.emit("onError",{code:j.ConnectDeviceErrorCode.SMART_CONFIG_TIMEOUT}),e.emit("result",e.__getEsptouchResultList()),e.interrupt()}),this.mParameter.getWaitUdpReceivingMillisecond())}}},{key:"__executeInNoPromise",value:function(e){var t=Date.now(),n=t-this.mParameter.getTimeoutTotalCodeMillisecond(),r=0,o=this,i=e.getGCBytes2(),a=e.getDCBytes2();function c(){if(!o.mIsInterrupt&&Date.now()-t=o.mParameter.getTimeoutDataCodeMillisecond()?(o.logger("info","send gc code "),c(),n=t):(o.mSocketClient.sendDataSideBySide(a,r,o.ONE_DATA_LEN,o.mParameter.getTargetHostname(),o.mParameter.getTargetPort(),o.mParameter.getIntervalDataCodeMillisecond(),u),r=(r+o.ONE_DATA_LEN)%a.length),t=Date.now())}u(),setTimeout((function(){o.interrupt(),o.emit("result",o.__getEsptouchResultList())}),this.mParameter.getWaitUdpSendingMillisecond())}},{key:"__execute",value:(n=a()(o.a.mark((function e(t){var n,r,i,a,c,u;return o.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:n=Date.now(),i=(r=n)-this.mParameter.getTimeoutTotalCodeMillisecond(),a=t.getGCBytes2(),c=t.getDCBytes2(),u=0;case 6:if(this.mIsInterrupt){e.next=27;break}if(!(r-i>=this.mParameter.getTimeoutDataCodeMillisecond())){e.next=19;break}this.logger("info","send gc code ");case 9:if(this.mIsInterrupt||!(Date.now()-rthis.mParameter.getWaitUdpSendingMillisecond())){e.next=14;break}return e.abrupt("break",16);case 14:e.next=9;break;case 16:i=r,e.next=22;break;case 19:return e.next=21,this.mSocketClient.sendData(c,u,this.ONE_DATA_LEN,this.mParameter.getTargetHostname(),this.mParameter.getTargetPort(),this.mParameter.getIntervalDataCodeMillisecond());case 21:u=(u+this.ONE_DATA_LEN)%c.length;case 22:if(!((r=Date.now())-n>this.mParameter.getWaitUdpSendingMillisecond())){e.next=25;break}return e.abrupt("break",27);case 25:e.next=6;break;case 27:return e.abrupt("return",this.mIsSuc);case 28:case"end":return e.stop()}}),e,this)}))),function(e){return n.apply(this,arguments)})},{key:"__listenAsyn",value:function(){var e=this;this.logger("info","__listenAsyn() start");var t=this.mApSsid,n=this.mApPassword,r=Date.now(),o=v.convertUint8toByte(t.length+n.length+9);this.logger("info","expectOneByte: ".concat(o)),this.mSocketServer.on("recieveCorrectMsg",(function(t){e.logger("info","RECIEVE_MSG",t),function(t){var n,i=t.message,a=t.remoteInfo,c=new Int8Array(i);if(e.logger("info","Int8Array",c),n=null!=c?c[0]:-1,e.logger("info","receiveOneByte: ".concat(n)),n===o){e.logger("info","receive correct broadcast");var u=Date.now()-r,s=Number(e.mParameter.getWaitUdpTotalMillisecond()-u);if(s<0)e.logger("error","esptouch timeout");else if(e.logger("error","mSocketServer's new timeout is ".concat(s," milliseconds")),e.logger("info","receive correct broadcast"),null!=c){var l=v.parseBssid(c,e.mParameter.getEsptouchResultOneLen(),e.mParameter.getEsptouchResultMacLen()),f=function(e,t,n){for(var r="",o=0;o=e.mParameter.getExpectTaskResultCount(),e.mIsSuc&&(e.logger("info","__listenAsyn() finish"),e.interrupt())}))}},{key:"__putEsptouchResult",value:function(e,t,n,r){var o=this.mBssidTaskSucCountMap[t];if(null==o&&(o=0),++o,this.logger("info","PUT_ESPTOUCH_RESULT","__putEsptouchResult(): count = ".concat(o)),this.mBssidTaskSucCountMap[t]=o,o>=this.mParameter.getThresholdSucBroadcastCount()){for(var i=!1,a=0;a=0||Object.prototype.propertyIsEnumerable.call(e,n)&&(i[n]=e[n])}return i}},function(e,t,n){var r=n(16),o=n(17),i=n(18);e.exports=function(e){return r(e)||o(e)||i()}},function(e,t,n){"use strict";var r,o,i,a=n(25),c="0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ_-";function u(){i=!1}function s(e){if(e){if(e!==r){if(e.length!==c.length)throw new Error("Custom alphabet for shortid must be "+c.length+" unique characters. You submitted "+e.length+" characters: "+e);var t=e.split("").filter((function(e,t,n){return t!==n.lastIndexOf(e)}));if(t.length)throw new Error("Custom alphabet for shortid must be "+c.length+" unique characters. These characters were not unique: "+t.join(", "));r=e,u()}}else r!==c&&(r=c,u())}function l(){return i||(i=function(){r||s(c);for(var e,t=r.split(""),n=[],o=a.nextValue();t.length>0;)o=a.nextValue(),e=Math.floor(o*t.length),n.push(t.splice(e,1)[0]);return n.join("")}())}e.exports={get:function(){return r||c},characters:function(e){return s(e),r},seed:function(e){a.seed(e),o!==e&&(u(),o=e)},lookup:function(e){return l()[e]},shuffled:l}},function(e,t,n){var r=n(21),o=n(22),i=n(23);e.exports=function(e,t){return r(e)||o(e,t)||i()}},function(e,t,n){"use strict";var r=n(13),o=n(26),i=n(30),a=n(31)||0;function c(){return o(a)}e.exports=c,e.exports.generate=c,e.exports.seed=function(t){return r.seed(t),e.exports},e.exports.worker=function(t){return a=t,e.exports},e.exports.characters=function(e){return void 0!==e&&r.characters(e),r.shuffled()},e.exports.isValid=i},function(e,t){e.exports=function(e){if(Array.isArray(e)){for(var t=0,n=new Array(e.length);t=0;--o){var i=this.tryEntries[o],a=i.completion;if("root"===i.tryLoc)return r("end");if(i.tryLoc<=this.prev){var c=n.call(i,"catchLoc"),u=n.call(i,"finallyLoc");if(c&&u){if(this.prev=0;--r){var o=this.tryEntries[r];if(o.tryLoc<=this.prev&&n.call(o,"finallyLoc")&&this.prev=0;--t){var n=this.tryEntries[t];if(n.finallyLoc===e)return this.complete(n.completion,n.afterLoc),_(n),s}},catch:function(e){for(var t=this.tryEntries.length-1;t>=0;--t){var n=this.tryEntries[t];if(n.tryLoc===e){var r=n.completion;if("throw"===r.type){var o=r.arg;_(n)}return o}}throw new Error("illegal catch attempt")},delegateYield:function(e,t,n){return this.delegate={iterator:k(e),resultName:t,nextLoc:n},"next"===this.method&&(this.arg=void 0),s}},e}(e.exports);try{regeneratorRuntime=r}catch(e){Function("r","regeneratorRuntime = r")(r)}},function(e,t){function n(t,r){return e.exports=n=Object.setPrototypeOf||function(e,t){return e.__proto__=t,e},n(t,r)}e.exports=n},function(e,t){e.exports=function(e){if(Array.isArray(e))return e}},function(e,t){e.exports=function(e,t){if(Symbol.iterator in Object(e)||"[object Arguments]"===Object.prototype.toString.call(e)){var n=[],r=!0,o=!1,i=void 0;try{for(var a,c=e[Symbol.iterator]();!(r=(a=c.next()).done)&&(n.push(a.value),!t||n.length!==t);r=!0);}catch(e){o=!0,i=e}finally{try{r||null==c.return||c.return()}finally{if(o)throw i}}return n}}},function(e,t){e.exports=function(){throw new TypeError("Invalid attempt to destructure non-iterable instance")}},function(e,t){e.exports=function(e,t){if(null==e)return{};var n,r,o={},i=Object.keys(e);for(r=0;r=0||(o[n]=e[n]);return o}},function(e,t,n){"use strict";var r=1;e.exports={nextValue:function(){return(r=(9301*r+49297)%233280)/233280},seed:function(e){r=e}}},function(e,t,n){"use strict";var r,o,i=n(27);n(13),e.exports=function(e){var t="",n=Math.floor(.001*(Date.now()-1459707606518));return n===o?r++:(r=0,o=n),t+=i(6),t+=i(e),r>0&&(t+=i(r)),t+i(n)}},function(e,t,n){"use strict";var r=n(13),o=n(28),i=n(29);e.exports=function(e){for(var t,n=0,a="";!t;)a+=i(o,r.get(),1),t=e-1&&r.splice(o,1)}else n[e].length=0;return this}},{key:"emit",value:function(e){for(var t=this,n=arguments.length,r=new Array(n>1?n-1:0),o=1;o2?n-2:0),o=2;o1&&void 0!==r[1]&&r[1],e.prev=1,e.next=4,this.callWxApi("createBLEConnection",t);case 4:e.next=24;break;case 6:if(e.prev=6,e.t0=e.catch(1),n||!e.t0||!e.t0.errMsg||!e.t0.errMsg.indexOf(!1)){e.next=23;break}return console.log("already connect, try disconnect"),e.prev=10,e.next=13,this.closeBLEConnection(t);case 13:console.log("disconnect success",t),e.next=19;break;case 16:e.prev=16,e.t1=e.catch(10),console.warn("disconnect fail",e.t1);case 19:return console.log("try connect again",t),e.abrupt("return",this.createBLEConnection(t,!0));case 23:return e.abrupt("return",Promise.reject(e.t0));case 24:case"end":return e.stop()}}),e,this,[[1,6],[10,16]])}))),function(e){return n.apply(this,arguments)})},{key:"closeBLEConnection",value:function(e){return this.callWxApi("closeBLEConnection",e)}},{key:"onBluetoothAdapterStateChange",value:function(e){this._onBluetoothAdapterStateChangeHandler=e}},{key:"offBluetoothAdapterStateChange",value:function(){this._onBluetoothAdapterStateChangeHandler=null}},{key:"onBLEConnectionStateChange",value:function(e){this._onBLEConnectionStateChangeHandler=e}},{key:"offBLEConnectionStateChange",value:function(){this._onBLEConnectionStateChangeHandler=null}},{key:"onBLECharacteristicValueChange",value:function(e){this._onBLECharacteristicValueChangeHandler=e}},{key:"offBLECharacteristicValueChange",value:function(){this._onBLECharacteristicValueChangeHandler=null}},{key:"onBluetoothDeviceFound",value:function(e){this._onBluetoothDeviceFoundHandler=e}},{key:"offBluetoothDeviceFound",value:function(){this._onBluetoothDeviceFoundHandler=null}}]),t}(N),j=n(10),U=n.n(j),F=n(11),B=n.n(F);function V(e,t){var n=Object.keys(e);if(Object.getOwnPropertySymbols){var r=Object.getOwnPropertySymbols(e);t&&(r=r.filter((function(t){return Object.getOwnPropertyDescriptor(e,t).enumerable}))),n.push.apply(n,r)}return n}function W(e){for(var t=1;t0&&void 0!==arguments[0]?arguments[0]:{},t=e.serviceId;t=t||this.serviceId;var n=this.characteristicsMap[t]||{writeIds:[],notifyIds:[],readIds:[],indicateIds:[]};return n.notifyIds[0]||n.indicateIds[0]}},{key:"isDevMode",value:function(){return location.href.indexOf("/developing/")>-1}},{key:"handleBLEMessage",value:function(e,t){return t.serviceId,t.characteristicId,e}},{key:"registerDevice",value:(p=C()(u.a.mark((function e(){return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(this._deviceRegistered){e.next=4;break}return e.next=3,this.sdk.blueToothBridge.control("registryDevice",{deviceName:this._deviceName,productId:this.isDevMode()?this._productId:""});case 3:this._deviceRegistered=!0;case 4:case"end":return e.stop()}}),e,this)}))),function(){return p.apply(this,arguments)})},{key:"_onBleConnectionStateChange",value:function(e){var t=e.connected;this._deviceConnected=t,this.emit("bLEConnectionStateChange",{connected:t}),t?this.emit("connect"):this.disconnectDevice()}},{key:"_onBLECharacteristicValueChange",value:(f=C()(u.a.mark((function e(t){var n,r,o,i,a,c,s,l,f;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(n=t.serviceId,r=t.characteristicId,o=t.value,e.prev=1,i=this.handleBLEMessage(o,{serviceId:n,characteristicId:r}),a=i.shouldIgnore,c=i.reportData,s=B()(i,["shouldIgnore","reportData"]),console.log("shouldIgnore?",a),!a){e.next=6;break}return e.abrupt("return");case 6:if(console.log("receive data",o,s),console.log("should report?",!!c,c),l=Date.now(),f=!1,!this._deviceName||!c){e.next=14;break}return f=!0,e.next=14,this.sdk.requestTokenApi("AppReportDataAsDevice",{ProductId:this._productId,DeviceName:this._deviceName,Data:JSON.stringify(c),DataTimeStamp:l});case 14:this.emit("message",W({},s,{timestamp:l,dataReported:f})),e.next=20;break;case 17:e.prev=17,e.t0=e.catch(1),console.error("onBLECharacteristicValueChange onError,",e.t0);case 20:case"end":return e.stop()}}),e,this,[[1,17]])}))),function(e){return f.apply(this,arguments)})},{key:"disconnectDevice",value:function(){this.sdk.blueToothBridge.closeBLEConnection({deviceId:this._deviceId}),this.emit("disconnect")}},{key:"connectDevice",value:(s=C()(u.a.mark((function e(){var t,n,r,o,i,a,c=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(t=c.length>0&&void 0!==c[0]?c[0]:{},n=t.autoNotify,r=void 0===n||n,o=this.sdk.blueToothBridge,e.prev=2,!this._deviceConnected){e.next=6;break}return console.log("Deviceå·²ç»è¿žæŽ¥",this._deviceId),e.abrupt("return");case 6:return e.next=8,this.registerDevice();case 8:return e.next=10,o.createBLEConnection({deviceId:this._deviceId});case 10:if(console.log("createBLEConnection succ"),!r){e.next=25;break}return e.next=14,this.getBLEDeviceServices();case 14:return i=e.sent,console.log("getBLEDeviceServices succ",i),this.emit("onGetBLEDeviceServices",i),e.next=19,this.getBLEDeviceCharacteristics();case 19:return a=e.sent,console.log("getBLEDeviceCharacteristics succ",a),this.emit("onGetBLEDeviceCharacteristics",a),e.next=24,this.notifyBLECharacteristicValueChange();case 24:console.log("notifyBLECharacteristicValueChange succ");case 25:e.next=31;break;case 27:throw e.prev=27,e.t0=e.catch(2),console.error("connectDevice error",e.t0),e.t0;case 31:case"end":return e.stop()}}),e,this,[[2,27]])}))),function(){return s.apply(this,arguments)})},{key:"bindDevice",value:(c=C()(u.a.mark((function e(){return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return e.next=2,this.registerDevice();case 2:return e.next=4,this.sdk.blueToothBridge.control("bindDevice",{deviceName:this._deviceName,productId:this.isDevMode()?this._productId:""});case 4:return e.abrupt("return",this.explorerDeviceId);case 5:case"end":return e.stop()}}),e,this)}))),function(){return c.apply(this,arguments)})},{key:"write",value:(i=C()(u.a.mark((function e(t){var n,r,o,i,a,c=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return n=c.length>1&&void 0!==c[1]?c[1]:{},r=n.writeId,o=void 0===r?"":r,i=n.serviceId,a=void 0===i?"":i,e.prev=1,e.next=4,this.sdk.blueToothBridge.writeBLECharacteristicValue({deviceId:this._deviceId,characteristicId:o||this._writeId,serviceId:a||this.serviceId,value:t});case 4:e.next=9;break;case 6:return e.prev=6,e.t0=e.catch(1),e.abrupt("return",Promise.reject(e.t0));case 9:case"end":return e.stop()}}),e,this,[[1,6]])}))),function(e){return i.apply(this,arguments)})},{key:"getBLEDeviceServices",value:(o=C()(u.a.mark((function e(){var t,n;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return e.next=2,this.sdk.blueToothBridge.getBLEDeviceServices({deviceId:this._deviceId});case 2:return t=e.sent,n=t.services,this._services=n,e.abrupt("return",n);case 6:case"end":return e.stop()}}),e,this)}))),function(){return o.apply(this,arguments)})},{key:"setCharacteristicsIds",value:function(e,t){var n=this,r=function(e,t){-1===e.indexOf(t)&&e.push(t)};t.forEach((function(e){var t=e.uuid,o=e.properties,i=o.notify,a=o.write,c=o.indicate,u=o.read;i?r(n.map.notifyIds,t):a?r(n.map.writeIds,t):c?r(n.map.indicateIds,t):u&&r(n.map.readIds,t)})),this.characteristicsMap[e]={notifyIds:[],writeIds:[],indicateIds:[],readIds:[]}}},{key:"getBLEDeviceCharacteristics",value:(r=C()(u.a.mark((function e(){var t,n,r,o,i=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=i.length>0&&void 0!==i[0]?i[0]:{},n=(n=t.serviceId)||this.serviceId,e.next=4,this.sdk.blueToothBridge.getBLEDeviceCharacteristics({deviceId:this._deviceId,serviceId:n});case 4:return r=e.sent,o=r.characteristics,this.setCharacteristicsIds(n,o),e.abrupt("return",o);case 8:case"end":return e.stop()}}),e,this)}))),function(){return r.apply(this,arguments)})},{key:"notifyBLECharacteristicValueChange",value:(n=C()(u.a.mark((function e(){var t,n,r,o,i,a=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(t=a.length>0&&void 0!==a[0]?a[0]:{},n=t.characteristicId,r=t.serviceId,o=t.state,i=void 0===o||o,n=n||this._getNotifyId(),r=r||this.serviceId,n){e.next=7;break}console.warn("未找到指定service下的notifyId，该设备å¯èƒ½ä¸æ”¯æŒnotify"),e.next=9;break;case 7:return e.next=9,this.sdk.blueToothBridge.notifyBLECharacteristicValueChange({deviceId:this._deviceId,characteristicId:n,serviceId:r,state:i});case 9:case"end":return e.stop()}}),e,this)}))),function(){return n.apply(this,arguments)})},{key:"deviceId",get:function(){return this._deviceId}},{key:"isConnected",get:function(){return this._deviceConnected}},{key:"originName",get:function(){return this._name}},{key:"explorerDeviceId",get:function(){return"".concat(this._productId,"/").concat(this._deviceName)}},{key:"serviceId",get:function(){return this.constructor.serviceId}},{key:"_writeId",get:function(){return((this.characteristicsMap[this.serviceId]||{}).writeIds||[])[0]}},{key:"_notifyId",get:function(){return((this.characteristicsMap[this.serviceId]||{}).notifyIds||[])[0]}},{key:"_readId",get:function(){return((this.characteristicsMap[this.serviceId]||{}).readIds||[])[0]}},{key:"_indicateId",get:function(){return((this.characteristicsMap[this.serviceId]||{}).indicateIds||[])[0]}}],[{key:"deviceFilter",value:function(e){throw new Error("具体产å“需è¦è‡ªè¡Œå®žçŽ°è¯¥æ–¹æ³•")}}]),t}(N);a()(H,"helper",{hexToArrayBuffer:function(e){return new Uint8Array(e.match(/[\da-f]{2}/gi).map((function(e){return parseInt(e,16)}))).buffer},arrayBufferToHexStringArray:function(e){try{if("[object ArrayBuffer]"!==Object.prototype.toString.call(e))throw"invalid array buffer";for(var t=new DataView(e),n=[],r=0,o=t.byteLength;r0&&void 0!==o[0]?o[0]:{},n=t.devices,r=void 0===n?[]:n,"function"==typeof this._onBluetoothDeviceFoundHandler&&this._onBluetoothDeviceFoundHandler(r);case 2:case"end":return e.stop()}}),e,this)}))),function(){return o.apply(this,arguments)})},{key:"startSearch",value:(r=C()(u.a.mark((function e(t){var n,r,o,i,a,c,s,l,f,d,p,h,v,m=this;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return n=t.serviceId,r=t.serviceIds,o=t.ignoreDeviceIds,i=void 0===o?[]:o,a=t.onSearch,c=void 0===a?R:a,s=t.onError,l=void 0===s?R:s,f=t.timeout,d=void 0===f?2e4:f,n&&!r&&(r=[n]),p=0,h=function(e){m.stopSearch(),l(e)},e.prev=4,e.next=7,this.sdk.blueToothBridge.startBluetoothDevicesDiscovery();case 7:this._onBluetoothDeviceFoundHandler=function(e){try{var t=m._filterDevices({devices:e,serviceIds:r,ignoreDeviceIds:i});p=t.length,c(t)}catch(e){console.log("onSearch error",e),h(e)}},v=function(e){e.available||h({code:10001,msg:"å‘现设备需开å¯æ‰‹æœºè“牙"})},this.on("adapterStateChange",v),this.addCleanupTask("startSearch",(function(){m._onBluetoothDeviceFoundHandler=null,m.off("adapterStateChange",v)})),setTimeout((function(){p||h("未å‘现设备，请确认设备已开å¯")}),d),e.next=18;break;case 14:throw e.prev=14,e.t0=e.catch(4),this.cleanup("startSearch"),e.t0;case 18:case"end":return e.stop()}}),e,this,[[4,14]])}))),function(e){return r.apply(this,arguments)})},{key:"stopSearch",value:function(){this.cleanup("startSearch"),this.sdk.blueToothBridge.stopBluetoothDevicesDiscovery()}},{key:"searchDevice",value:function(){var e=this,t=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},n=t.serviceId,r=t.serviceIds,o=t.deviceName,i=t.ignoreDeviceIds,a=void 0===i?[]:i,c=this.sdk.blueToothBridge;return n&&!r&&(r=[n]),o||console.log("searching for deviceName => ",o),this._searchDevicePromise||(this._searchDevicePromise=new Promise(function(){var t=C()(u.a.mark((function t(n,i){var s,l;return u.a.wrap((function(t){for(;;)switch(t.prev=t.next){case 0:return s=function(t){c.stopBluetoothDevicesDiscovery(),i(t),e._searchDevicePromise=null},l=function(t){c.stopBluetoothDevicesDiscovery(),n(t),e._searchDevicePromise=null},e._onBluetoothDeviceFoundHandler=function(t){try{var n=e._filterDevices({devices:t,serviceIds:r,deviceName:o,ignoreDeviceIds:a});console.log("matchedDevices: ",n),n.length>0&&(console.log("doFindDevice",n[0]),l(n[0]))}catch(e){s(e)}},t.prev=3,t.next=6,c.startBluetoothDevicesDiscovery();case 6:console.log("startBluetoothDevicesDiscovery succ"),setTimeout((function(){l()}),5e3),t.next=13;break;case 10:t.prev=10,t.t0=t.catch(3),s(t.t0);case 13:case"end":return t.stop()}}),t,null,[[3,10]])})));return function(e,n){return t.apply(this,arguments)}}()))}},{key:"getDeviceAdapter",value:function(e){return this._deviceMap[e]}},{key:"connectDevice",value:(n=C()(u.a.mark((function e(t){var n,r,o,i,a,c,s,l,f,d,p=this,h=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(n=t.deviceId,r=t.serviceId,o=t.deviceName,i=t.productId,a=t.name,c=h.length>1&&void 0!==h[1]?h[1]:{},s=c.autoNotify,l=void 0===s||s,e.prev=2,f=this._deviceAdapterMap[r]){e.next=6;break}throw"无匹é…çš„ deviceAdapter!";case 6:if(!this._deviceMap[n]||!this._deviceMap[n].isConnected){e.next=9;break}return console.log("find device adapter",this._deviceMap[n]),e.abrupt("return",this._deviceMap[n]);case 9:return d=this._deviceMap[n]=new f(this.sdk,{deviceId:n,deviceName:o,productId:i,name:a,autoNotify:l}),e.next=12,d.connectDevice();case 12:return console.log("deviceConnected"),d.on("disconnect",(function(){console.log("ondisconnect, cleanup adapter",d),delete p._deviceMap[n]})),console.log("return adapter"),e.abrupt("return",d);case 18:return e.prev=18,e.t0=e.catch(2),delete this._deviceMap[n],e.abrupt("return",Promise.reject(e.t0));case 22:case"end":return e.stop()}}),e,this,[[2,18]])}))),function(e){return n.apply(this,arguments)})}]),t}(N),G=n(15),q=n.n(G);function $(e,t){var n=Object.keys(e);if(Object.getOwnPropertySymbols){var r=Object.getOwnPropertySymbols(e);t&&(r=r.filter((function(t){return Object.getOwnPropertyDescriptor(e,t).enumerable}))),n.push.apply(n,r)}return n}function Q(e){for(var t=1;t ".concat(t._manuallyClose)),t.disconnect(),t.emit("close",n),t.sdk.insightReportor.info("websocket-close",{data:n}),t._manuallyClose&&(t._manuallyClose=!1);case 5:case"end":return e.stop()}}),e)})));return function(t){return e.apply(this,arguments)}}())}catch(e){o(e)}case 2:case"end":return e.stop()}}),e)})));return function(t,n){return e.apply(this,arguments)}}())));case 1:case"end":return e.stop()}}),e,this)}))),function(){return o.apply(this,arguments)})},{key:"connect",value:(r=C()(u.a.mark((function e(){return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:if(this.isConnected()){e.next=3;break}return e.next=3,this.doConnectWs();case 3:return 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f.requestHandlerMap.delete(o)},e.prev=11,e.next=14,Promise.race([new Promise((function(e,t){f.requestHandlerMap.set(o,(function(n,r){if(s.timeCost=Date.now()-a,n)t(n),l();else if(r.error||r.error_message)t({code:r.error,msg:r.error_message}),l();else if(r.data&&"response"===r.data.action){var o=r.data.payload,c=void 0===o?{}:o,u=c.code,d=c.msg,p=B()(c,["code","msg"]);u?t(Q({code:u,msg:d},p)):(e(c),f.sdk.insightReportor.info("h5-websocket-response",Q({},s,{data:c}))),l()}else i&&(e(r.data),f.sdk.insightReportor.info("h5-websocket-response",Q({},s,{data:r.data})))}))})),new Promise((function(e,t){setTimeout((function(){t({code:"TIMEOUT"})}),2e4)}))]);case 14:return e.abrupt("return",e.sent);case 17:return e.prev=17,e.t0=e.catch(11),this.sdk.insightReportor.error("h5-websocket-error",{error:e.t0}),e.abrupt("return",Promise.reject(e.t0));case 21:e.next=24;break;case 23:console.warn("Try send ws message but no ws instance",t,c);case 24:case"end":return e.stop()}}),e,this,[[11,17]])}))),function(e){return n.apply(this,arguments)})},{key:"activeConnect",value:function(){return this.send("ActiveConnect",{},{doNotWaitForClientResponse:!0})}}]),t}(N),X=function(){function e(t){l()(this,e),this.$offlineTips=document.querySelector("#J_offline_modal"),this.$offlineTipsMask=document.querySelector("#J_offline_mask"),this.$offlineTipsCloseBtn=document.querySelector("#J_offline_close"),this.$offlineTipsFeedBack=document.querySelector("#J_offline_feedback"),this.$offlineTipsBackHome=document.querySelector("#J_offline_backHome"),this.sdk=t,this._bindClickEvents()}return d()(e,[{key:"hide",value:function(){this.$offlineTips.classList.add("hide")}},{key:"show",value:function(){this.$offlineTips.classList.remove("hide")}},{key:"_bindClickEvents",value:function(){var e=this;this.$offlineTipsMask.addEventListener("click",(function(){e.hide()})),this.$offlineTipsCloseBtn.addEventListener("click",(function(){e.hide()})),this.$offlineTipsFeedBack.addEventListener("click",(function(){e.sdk.goFeedBackPage()})),this.$offlineTipsBackHome.addEventListener("click",(function(){e.sdk.navBack()}))}}]),e}(),J=["vendor/regenerator-runtime.js","lib/WAService.js"];function Z(e){var t=e.split(/\r?\n/g);return(t=t.filter((function(e){return!J.some((function(t){return e.indexOf(t)>-1}))}))).join("\n")}function ee(e,t){var n=Object.keys(e);if(Object.getOwnPropertySymbols){var r=Object.getOwnPropertySymbols(e);t&&(r=r.filter((function(t){return Object.getOwnPropertyDescriptor(e,t).enumerable}))),n.push.apply(n,r)}return n}function te(e){for(var t=1;t1&&void 0!==arguments[1]?arguments[1]:{},r=n.consumeCountPerTime,o=void 0===r?20:r,i=n.minConsumeCount,c=void 0===i?10:i,u=n.consumeInterval,s=void 0===u?5e3:u,f=n.eventFilter,d=void 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e.stop()}}),e,this,[[1,6]])}))),function(){return t.apply(this,arguments)})}]),e}(),re=["border-radius: 50%","width: 10px","height: 10px","background: #f00","position: absolute","right: 17px","top: 50%","margin-top: -5px","visibility: hidden"].join("; "),oe=function(e){return'
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e.insightReportor.report(t,n)}}),e.appDevSdk.init().then((function(){e.insightReportor.info("app-dev-sdk-init"),e.appDevSdk.subscribeDevices([ye]),e.h5Websocket.connect(),e.insightReportor.startReportPolling()})).catch((function(t){return e.insightReportor.error("app-dev-sdk-fail",{error:t}),Promise.reject(t)}));var r=(ke.find((function(e){return e.RoomId===ge.RoomId}))||{}).RoomName,o=void 0===r?"":r;return e.roomName=o,e.dataTemplate={},e.productInfo=ve,e.wx=window.wx,e.tips=window.iotexplorerH5PanelTips,e.iotexplorerH5PanelDeviceDetail=window.iotexplorerH5PanelDeviceDetail,e.themeColorMap={primary:"#0052d9",success:"#29cc85",grey:"#bbb",danger:"#ff584c",weak:"#888",muted:"#bbb"},e.offlineTip=new X(y()(e)),e.firmwareUpgrade=new ie(y()(e)),e.h5Websocket=new Y(y()(e)),e.blueToothBridge=new L(y()(e)),e.blueToothAdapter=new z(y()(e)),e.injectEventsHandler(),e.on("appShow",(function(){return e.insightReportor.startReportPolling()})).on("appHide",(function(){return e.insightReportor.stopReportPolling()})),e}var n,r,i,a,c,s,f,p,v,g;return w()(t,e),d()(t,[{key:"callMpApi",value:(g=C()(u.a.mark((function e(t){var n,r,o=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return n=o.length>1&&void 0!==o[1]?o[1]:{},e.prev=1,e.next=4,this.wxSdkReady();case 4:return e.next=6,new Promise((function(e,r){try{wx.miniProgram[t](ce({},n,{success:function(t){e(t)},fail:function(e){r(e)}}))}catch(e){r(e)}}));case 6:return r=e.sent,this.insightReportor.info("call-mp-api-success",{action:t,reqBody:n,data:r}),e.abrupt("return",r);case 11:e.prev=11,e.t0=e.catch(1),this.insightReportor.info("call-mp-api-fail",{action:t,reqBody:n,error:e.t0});case 14:case"end":return e.stop()}}),e,this,[[1,11]])}))),function(e){return g.apply(this,arguments)})},{key:"showOfflineTip",value:function(){this.offlineTip.show(),this.insightReportor.info("show-offline-tip")}},{key:"hideOfflineTip",value:function(){this.offlineTip.hide(),this.insightReportor.info("hide-offline-tip")}},{key:"enableBlueToothBridge",value:function(){return this.insightReportor.info("enable-bluetooth-bridge"),this.blueToothBridge.init()}},{key:"injectEventsHandler",value:function(){var e=this;Object.keys(T.EventTypes).forEach((function(t){if(t.startsWith("Ws")){var n=T.EventTypes[t],r="_".concat(n,"Handler");e["on".concat(t[0].toUpperCase()).concat(t.slice(1))]=function(t){return e[r]=t,e},e.appDevSdk.on(n,(function(t){try{switch(n){case T.EventTypes.WsReport:var o=t.deviceId,i=t.deviceData,a={};o===e.deviceId&&(Object.keys(i||{}).forEach((function(e){a[e]=i[e].Value})),Object.assign(e.deviceData,a));break;case T.EventTypes.WsStatusChange:var c=t.deviceId,u=t.deviceStatus;c===e.deviceId&&(e.deviceStatus=u)}}catch(e){console.error("handler event err",e)}e.emit(n,t),"function"==typeof e[r]&&e[r](t)}))}})),this.h5Websocket.on("message",(function(t){var n=t.action,r=t.payload;switch(n){case"appShow":e.emit("appShow",r);break;case"appHide":e.emit("appHide",r);break;case"pageShow":e.emit("pageShow",r);break;case"pageHide":e.emit("pageHide",r)}}))}},{key:"ready",value:function(){return this.appDevSdk.init()}},{key:"wxSdkReady",value:function(){var e=this;return this._wxSdkReadyPromise||(this._wxSdkReadyPromise=new Promise((function(t,n){window.wechatJsSdk?wechatJsSdk.init((function(r){if(r)return n(r),void(e._wxSdkReadyPromise=null);e.insightReportor.info("wxjssdk-init"),t(window.wechatJsSdk)})):(n("微信jssdk未注册"),e._wxSdkReadyPromise=null)})).catch((function(t){return e.insightReportor.error("wxjssdk-fail",{error:t}),Promise.reject(t)})))}},{key:"requestTokenApi",value:function(e,t,n){var r=this;return this.appDevSdk.init().then((function(){return r.appDevSdk.requestApi(e,t,n)}))}},{key:"getDeviceDataHistory",value:function(e){var t=e.FieldName,n=e.MaxTime,r=e.MinTime,o=e.Context,i=e.Limit;return this.requestTokenApi("AppGetDeviceDataHistory",{FieldName:t,MaxTime:n,MinTime:r,DeviceId:ye,Context:o,Limit:i})}},{key:"getShareParams",value:(v=C()(u.a.mark((function e(){var t,n,r,o,i,a,c,s=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=s.length>0&&void 0!==s[0]?s[0]:{},n=(n=t.deviceId)||this.deviceId,r="SHARE_CONTEXT_KEY",o={},e.prev=4,e.next=7,this.requestTokenApi("AppGetUserDeviceConfig",{DeviceId:n,DeviceKey:r});case 7:i=e.sent,a=i.Configs,o=a,e.next=14;break;case 12:e.prev=12,e.t0=e.catch(4);case 14:if("string"==typeof(c=o[r]))try{c=JSON.parse(c)}catch(e){console.warn("parse device value fail",e)}return e.abrupt("return",c);case 17:case"end":return e.stop()}}),e,this,[[4,12]])}))),function(){return v.apply(this,arguments)})},{key:"setShareConfig",value:function(e){var t=e.title,n=e.imgUrl;return this.insightReportor.info("set-share-config",{title:t,imgUrl:n}),this.wxSdkReady().then((function(e){return e.share({default:{title:t,imgUrl:n}})}))}},{key:"controlDeviceData",value:function(e,t){if(t=t||this.deviceId,"string"!=typeof e)try{e=JSON.stringify(e)}catch(e){}return this.requestTokenApi("AppControlDeviceData",{Data:e,DeviceId:t})}},{key:"goDeviceDetailPage",value:(p=C()(u.a.mark((function e(){var t,n,r,o,i,a,c=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=c.length>0&&void 0!==c[0]?c[0]:{},n=t.reload,r=void 0!==n&&n,o=t.deviceId,i=t.isShareDevice,a=t.shareParams,o=o||this.deviceId,i=i||this.isShareDevice,a&&"string"!=typeof a&&(a=JSON.stringify(a)),e.abrupt("return",this.callMpApi("navigateTo",{url:"/pages/Device/DeviceDetail/DeviceDetail?deviceId=".concat(o,"&isShareDevice=").concat(i,"&reload=").concat(r,"&shareParams=").concat(encodeURIComponent(a))}));case 5:case"end":return e.stop()}}),e,this)}))),function(){return p.apply(this,arguments)})},{key:"navBack",value:function(){return this.callMpApi("navigateBack")}},{key:"goFeedBackPage",value:function(){return this.callMpApi("navigateTo",{url:"/pages/User/Feedback/Feedback"})}},{key:"getUserInfo",value:(f=C()(u.a.mark((function e(){var t,n;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return e.next=2,this.requestTokenApi("AppGetUser");case 2:return t=e.sent,(n=t.Data)&&n.PhoneNumber&&(n.originPhoneNumber=n.PhoneNumber,n.PhoneNumber=Ne(n.PhoneNumber)),this.userInfo=n,e.abrupt("return",n);case 7:case"end":return e.stop()}}),e,this)}))),function(){return f.apply(this,arguments)})},{key:"getProductInfo",value:(s=C()(u.a.mark((function e(){var t,n,r,o,i=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=i.length>0&&void 0!==i[0]?i[0]:{},n=(n=t.productId)||this.productId,e.next=4,this.requestTokenApi("AppGetProducts",{ProductIds:[n]});case 4:return r=e.sent,o=r.Products,this.productInfo=o[0],e.abrupt("return",this.productInfo);case 8:case"end":return e.stop()}}),e,this)}))),function(){return s.apply(this,arguments)})},{key:"getDeviceInfo",value:(c=C()(u.a.mark((function e(){var t,n,r,o,i,a,c=this,s=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=s.length>0&&void 0!==s[0]?s[0]:{},n=(n=t.deviceId)||this.deviceId,r=function(){return Se((function(e){var t=e.offset,n=e.limit;return c.requestTokenApi("AppGetFamilyDeviceList",{FamilyId:c.familyId,RoomId:c.roomId,Offset:t,Limit:n}).then((function(e){return{list:e.DeviceList,total:e.Total}}))}))},o=function(){return Se((function(e){var t=e.offset,n=e.limit;return c.requestTokenApi("AppListUserShareDevices",{Offset:t,Limit:n}).then((function(e){return{list:e.ShareDevices,total:e.Total}}))}))},e.next=6,this.isShareDevice?o():r();case 6:return(i=e.sent).length&&(a=i.find((function(e){return e.DeviceId===n}))),e.abrupt("return",a);case 9:case"end":return e.stop()}}),e,this)}))),function(){return c.apply(this,arguments)})},{key:"getDeviceData",value:(a=C()(u.a.mark((function e(){var t,n,r,o,i=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=i.length>0&&void 0!==i[0]?i[0]:{},n=(n=t.deviceId)||this.deviceId,e.next=4,this.requestTokenApi("AppGetDeviceData",{DeviceId:n});case 4:r=e.sent,o=r.Data;try{o=JSON.parse(o)}catch(e){o={}}return e.abrupt("return",o);case 8:case"end":return e.stop()}}),e,this)}))),function(){return a.apply(this,arguments)})},{key:"getDeviceStatus",value:(i=C()(u.a.mark((function e(){var t,n,r,o,i=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=i.length>0&&void 0!==i[0]?i[0]:{},n=(n=t.deviceId)||this.deviceId,e.next=4,this.requestTokenApi("AppGetDeviceStatuses",{ProductId:De,DeviceIds:[n]});case 4:return r=e.sent,o=r.DeviceStatuses,e.abrupt("return",o[0]?o[0].Online:0);case 7:case"end":return e.stop()}}),e,this)}))),function(){return i.apply(this,arguments)})},{key:"reloadAfterUnmount",value:function(){return this.callMpApi("postMessage",{data:{type:"action",params:{action:"reloadAfterUnmount",payload:{href:location.href}}}})}},{key:"goDeviceInfoPage",value:function(){var e=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},t=e.deviceId;return t=t||this.deviceId,this.callMpApi("navigateTo",{url:"/pages/Device/DeviceDetail/DeviceInfo/DeviceInfo?deviceId=".concat(t)})}},{key:"goEditDeviceNamePage",value:function(){var e=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},t=e.deviceId,n=e.name;return t=t||this.deviceId,n=n||this.deviceInfo.AliasName,this.callMpApi("navigateTo",{url:"/pages/Device/EditDeviceName/EditDeviceName?deviceId=".concat(t,"&name=").concat(encodeURIComponent(n))})}},{key:"goRoomSettingPage",value:function(){var e=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},t=e.deviceId;return t=t||this.deviceId,this.callMpApi("navigateTo",{url:"/pages/Device/DeviceDetail/DeviceChooseRoom/DeviceChooseRoom?deviceId=".concat(t)})}},{key:"goShareDevicePage",value:function(){var e=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},t=e.deviceId,n=e.shareParams;return t=t||this.deviceId,n&&"string"!=typeof n&&(n=JSON.stringify(n)),this.callMpApi("navigateTo",{url:"/pages/Device/DeviceDetail/ShareList/ShareList?deviceId=".concat(t,"¶ms=").concat(encodeURIComponent(n))})}},{key:"deleteDevice",value:(r=C()(u.a.mark((function e(){var t,n,r,o,i,a,c,s,l=arguments;return u.a.wrap((function(e){for(;;)switch(e.prev=e.next){case 0:return t=l.length>0&&void 0!==l[0]?l[0]:{},n=(n=t.deviceId)||this.deviceId,this.isShareDevice?(r="确认移除该分享设备å—？",o="",s="移除",i="AppRemoveUserShareDevice",a={DeviceId:n},c="移除æˆåŠŸ"):(r="确认删除设备å—？",o="删除设备åŽä¸Žå…¶ç›¸å…³çš„任务将会失效。",s="删除",i="AppDeleteDeviceInFamily",a={FamilyId:le,DeviceId:n},c="删除æˆåŠŸ"),e.next=5,this.tips.confirm(r,o,{confirmText:s,confirmColor:this.themeColorMap.danger});case 5:if(!e.sent){e.next=21;break}return e.prev=7,e.next=10,this.requestTokenApi(i,a);case 10:return e.next=12,this.reloadAfterUnmount();case 12:return e.next=14,this.tips.showSuccess(c);case 14:return e.next=16,this.navBack();case 16:e.next=21;break;case 18:e.prev=18,e.t0=e.catch(7),this.tips.showError(e.t0);case 21:case"end":return e.stop()}}),e,this,[[7,18]])}))),function(){return r.apply(this,arguments)})},{key:"showDeviceDetail",value:function(){var e=this,t=arguments.length>0&&void 0!==arguments[0]?arguments[0]:{},n=t.deviceInfo,r=t.labelWidth,i=t.marginTop,a=t.extendItems,c=void 0===a?[]:a,u=t.extendButtons,s=void 0===u?[]:u,l=t.containerClassName,f=t.shareParams;n=n||this.deviceInfo;var d=!this.isShareDevice&&this.isFamilyOwner;this.insightReportor.info("show-device-detail",{data:{extendItems:c,extendButtons:s,shareParams:f}});var p=this.iotexplorerH5PanelDeviceDetail.render({labelWidth:r,marginTop:i,items:[{label:"设备å称",content:n.AliasName,onClick:function(){return e.goEditDeviceNamePage({deviceId:n.DeviceId,name:n.AliasName})}},{label:"设备信æ¯",onClick:function(){return e.goDeviceInfoPage({deviceId:n.DeviceId})}}].concat(o()(d?[{label:"房间设置",content:this.roomName,onClick:function(){return e.goRoomSettingPage({deviceId:n.DeviceId})}},{label:"设备分享",onClick:function(){return e.goShareDevicePage({deviceId:n.DeviceId,shareParams:f})}},{label:"固件å‡çº§",content:this.firmwareUpgrade.renderRedDot({deviceId:n.DeviceId}),onClick:function(){return e.firmwareUpgrade.showCheckUpgradeModal({deviceId:n.DeviceId})}}]:[]),o()(c)),buttons:[].concat(o()(this.isShareDevice||d?[{text:_e?"移除分享设备":"删除设备",type:"danger",onClick:function(){return e.deleteDevice({deviceId:n.DeviceId})}}]:[]),o()(s))});this.iotexplorerH5PanelDeviceDetail.$container.innerHTML='\n
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