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fix port_systick_config bug

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This commit is contained in:
acezhao
2019-09-13 22:22:49 +08:00
parent af245f2e5b
commit ad72fb73d2
11 changed files with 83 additions and 1594 deletions
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1226
arch/risc-v/common/riscv_encoding.h
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File diff suppressed because it is too large Load Diff

19
arch/risc-v/common/tos_cpu.c
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@@ -7,9 +7,6 @@
#include <tos.h>
#include <riscv_encoding.h>
// soc code shoud not put here
#define __SYSTEM_CLOCK_108M_PLL_HXTAL (uint32_t)(108000000)
uint32_t SystemCoreClock = __SYSTEM_CLOCK_108M_PLL_HXTAL;
__KERNEL__ void cpu_systick_init(k_cycle_t cycle_per_tick)
{
@@ -20,7 +17,6 @@ __KERNEL__ void cpu_systick_init(k_cycle_t cycle_per_tick)
__KERNEL__ void cpu_init(void) {
k_cpu_cycle_per_tick = TOS_CFG_CPU_CLOCK / k_cpu_tick_per_second;
cpu_systick_init(k_cpu_cycle_per_tick);
//TODO
}
__API__ cpu_cpsr_t tos_cpu_cpsr_save(void)
@@ -122,27 +118,29 @@ __KERNEL__ k_stack_t *cpu_task_stk_init(void *entry,
void cpu_trap_entry(cpu_data_t cause, cpu_context_t *regs)
{
int ddd = cause;
while(1) {
ddd++;
// TODO
}
}
void SysTick_IRQHandler() {
//asm("csrs mip, %0"::"r"(MIP_MTIP));
port_systick_config(k_cpu_cycle_per_tick);
#if 1
if(tos_knl_is_running()) {
tos_knl_irq_enter();
tos_tick_handler();
tos_knl_irq_leave();
}
#endif
}
void cpu_irq_entry(cpu_data_t irq, cpu_context_t *regs)
{
#if 1
if(irq != 7) {
return;
}
SysTick_IRQHandler();
#else
void (*irq_handler)();
extern void (*handler_vector_table[])();
@@ -152,6 +150,7 @@ void cpu_irq_entry(cpu_data_t irq, cpu_context_t *regs)
}
(*irq_handler)();
#endif
}
__API__ uint32_t tos_cpu_clz(uint32_t val)

139
arch/risc-v/rv32i/port_c.c
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@@ -6,140 +6,41 @@
*/
#include "riscv_encoding.h"
#include <tos.h>
#define CLINT_CTRL_ADDR 0x2000000
#define CLINT_MSIP 0x0000
#define CLINT_MTIMECMP 0x4000
#define CLINT_MTIME 0xBFF8
static uint32_t mtime_lo(void)
{
return *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME);
}
static uint32_t mtime_hi(void)
{
return *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
}
uint64_t get_mtime_val()
{
while (1) {
uint32_t hi = mtime_hi();
uint32_t lo = mtime_lo();
uint32_t nhi = mtime_hi();
if (hi == nhi) {
return (((uint64_t)hi) << 32) | lo;
} {
uint32_t a = hi;
uint32_t b = nhi;
}
}
}
void set_mtimecmp_lo(uint32_t v)
{
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP) = v;
}
void set_mtimecmp_hi(uint32_t v)
{
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = v;
}
void set_mtimecmp_val(uint64_t v)
{
uint32_t hi = (v >> 32) & 0xFFFFFFFF;
uint32_t lo = (v >> 0) & 0xFFFFFFFF;
set_mtimecmp_lo(0xFFFFFFFF); // No smaller than old value.
set_mtimecmp_hi(hi); // No smaller than new value.
set_mtimecmp_lo(lo); // New value.
}
__PORT__ void port_systick_config(uint32_t cycle_per_tick)
{
#if 0
asm("csrc mie, %0"::"r"(MIP_MTIP));
#if 1
uint64_t mtime = get_mtime_val();
#else
static uint64_t last_mtime = 0;
if(last_mtime == 0) {
last_mtime = get_mtime_val();
}
uint64_t mtime = get_mtime_val();
if((mtime - last_mtime)/cycle_per_tick >= 4) {
mtime = last_mtime+2*cycle_per_tick;
}
last_mtime = mtime;
#endif
uint64_t mtimecmp;
do {
tick_inc();
mtimecmp = ((uint64_t)tos_get_tick())* cycle_per_tick;
} while(mtimecmp <= mtime);
set_mtimecmp_val(mtimecmp);
asm("csrs mie, %0"::"r"(MIP_MTIP));
#endif
#if 0
clear_csr(mie, MIP_MTIP);
static uint64_t then = 0;
volatile uint64_t * mtime = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
volatile uint64_t * mtimecmp = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
if(then != 0) {
//next timer irq is 1 second from previous
then += 1*cycle_per_tick;
} else{ //first time setting the timer
uint64_t now = *mtime;
then = now + 1*cycle_per_tick;
}
*mtimecmp = then;
set_csr(mie, MIP_MTIP);
#endif
//asm("csrc mie, %0"::"r"(MIP_MTIP));
#if 0
uint64_t next_tick = get_mtime_val();
next_tick += cycle_per_tick;
set_mtimecmp_val(next_tick);
#endif
#if 0
uint64_t new_tick = get_mtime_val() + cycle_per_tick;
uint64_t tick = 0;
if(new_tick - next_tick > 50000) {
tick = get_mtime_val() + cycle_per_tick;
}
next_tick = new_tick;
set_mtimecmp_val(next_tick);
#endif
#if 1
// this is illegal in ricsv-32
// it cost cpu read two times, first mtime_lo and then mtime_hi
// if mtime_lo == 0xFFFFFFFF and mtime_hi = 0 at first read
// then mtime_lo == 0 and mtime_hi = 1 at next read
// the result will be 0x1FFFFFFFF, not 0x100000000
//*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = 0xFFFFFFFF;
//*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF;
uint64_t mtime = 0;
while(1) {
uint32_t mtime_hi = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
uint32_t mtime_lo = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 0);
uint32_t mtime_hn = *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
if(mtime_hi == mtime_hn) {
mtime += ((uint64_t)mtime_hi << 32) | mtime_lo;
break;
}
}
uint64_t mtime = *(volatile uint64_t *)(CLINT_CTRL_ADDR + CLINT_MTIME);
// just set mtime to mtimecmp does not accurately reflect the passage of time
// cause some time cost on the path to deal with the interrupt
// so, we need to to fix the value with a multiple of cycle_per_tick
uint64_t tick = mtime / cycle_per_tick;
uint64_t mtimecmp = (tick + 1) * cycle_per_tick;
mtime += cycle_per_tick;
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = (mtime >> 32) & 0xFFFFFFFF;
asm("csrc mip, %0"::"r"(MIP_MTIP));
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = (mtime >> 0) & 0xFFFFFFFF;
//asm("csrc mip, %0"::"r"(MIP_MTIP));
#endif
//asm("csrs mie, %0"::"r"(MIP_MTIP));
// write to mtimecmp register
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF;
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 4) = 0xFFFFFFFF & (mtimecmp >> 32);
*(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIMECMP + 0) = 0xFFFFFFFF & (mtimecmp >> 0);
}
__PORT__ void port_systick_priority_set(uint32_t prio)

26
arch/risc-v/rv32i/port_s.S
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@@ -4,6 +4,10 @@
.global port_cpsr_save
.global port_cpsr_restore
.global port_systick_resume
.global port_systick_suspend
.global port_systick_pending_reset
.global port_sched_start
.global port_context_switch
.global port_irq_context_switch
@@ -26,7 +30,6 @@ port_int_enable:
.type port_cpsr_save, %function
port_cpsr_save:
csrrci a0, mstatus, MSTATUS_MIE
#csrrci a0, mstatus, MSTATUS_MPIE
ret
.type port_cpsr_restore, %function
@@ -34,6 +37,25 @@ port_cpsr_restore:
csrw mstatus, a0
ret
.type port_systick_resume, %function
port_systick_resume:
li t0, MIE_MTIE
csrs mie, t0
ret
.type port_systick_suspend, %function
port_systick_suspend:
li t0, MIE_MTIE
csrc mie, t0
ret
.type port_systick_pending_reset, %function
port_systick_pending_reset:
li t0, MIP_MTIP
csrc mip, t0
ret
#define REGBYTES 4
#define LOAD lw
@@ -405,3 +427,5 @@ port_irq_context_switch:
irq_context_return:
ret

170
arch/risc-v/rv32i/start.S
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@@ -11,16 +11,8 @@ _start:
la t0, machine_trap_entry
csrw mtvec, t0
#if 1
// before kernel run, the stack is unused
// so just borrow to use
la t0, k_idle_task_stk_addr
lw t1, k_idle_task_stk_size
add sp, t0, t1
#else
// uncomment in link.ld
la sp, _stack_top
#endif
/* Load data section */
la a0, _load_data
@@ -47,163 +39,3 @@ init_finish:
call main
__die:
j __die
.section .text
.weak eclic_msip_handler
.weak eclic_mtip_handler
.weak SysTick_IRQHandler
.weak eclic_bwei_handler
.weak eclic_pmovi_handler
.weak WWDGT_IRQHandler
.weak LVD_IRQHandler
.weak TAMPER_IRQHandler
.weak RTC_IRQHandler
.weak FMC_IRQHandler
.weak RCU_IRQHandler
.weak EXTI0_IRQHandler
.weak EXTI1_IRQHandler
.weak EXTI2_IRQHandler
.weak EXTI3_IRQHandler
.weak EXTI4_IRQHandler
.weak DMA0_Channel0_IRQHandler
.weak DMA0_Channel1_IRQHandler
.weak DMA0_Channel2_IRQHandler
.weak DMA0_Channel3_IRQHandler
.weak DMA0_Channel4_IRQHandler
.weak DMA0_Channel5_IRQHandler
.weak DMA0_Channel6_IRQHandler
.weak ADC0_1_IRQHandler
.weak CAN0_TX_IRQHandler
.weak CAN0_RX0_IRQHandler
.weak CAN0_RX1_IRQHandler
.weak CAN0_EWMC_IRQHandler
.weak EXTI5_9_IRQHandler
.weak TIMER0_BRK_IRQHandler
.weak TIMER0_UP_IRQHandler
.weak TIMER0_TRG_CMT_IRQHandler
.weak TIMER0_Channel_IRQHandler
.weak TIMER1_IRQHandler
.weak TIMER2_IRQHandler
.weak TIMER3_IRQHandler
.weak I2C0_EV_IRQHandler
.weak I2C0_ER_IRQHandler
.weak I2C1_EV_IRQHandler
.weak I2C1_ER_IRQHandler
.weak SPI0_IRQHandler
.weak SPI1_IRQHandler
.weak USART0_IRQHandler
.weak USART1_IRQHandler
.weak USART2_IRQHandler
.weak EXTI10_15_IRQHandler
.weak RTC_Alarm_IRQHandler
.weak USBFS_WKUP_IRQHandler
.weak EXMC_IRQHandler
.weak TIMER4_IRQHandler
.weak SPI2_IRQHandler
.weak UART3_IRQHandler
.weak UART4_IRQHandler
.weak TIMER5_IRQHandler
.weak TIMER6_IRQHandler
.weak DMA1_Channel0_IRQHandler
.weak DMA1_Channel1_IRQHandler
.weak DMA1_Channel2_IRQHandler
.weak DMA1_Channel3_IRQHandler
.weak DMA1_Channel4_IRQHandler
.weak CAN1_TX_IRQHandler
.weak CAN1_RX0_IRQHandler
.weak CAN1_RX1_IRQHandler
.weak CAN1_EWMC_IRQHandler
.weak USBFS_IRQHandler
.global handler_vector_table
.align 2
handler_vector_table:
.word 0
.word 0
.word 0
.word eclic_msip_handler
.word 0
.word 0
.word 0
.word SysTick_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word eclic_bwei_handler
.word eclic_pmovi_handler
.word WWDGT_IRQHandler
.word LVD_IRQHandler
.word TAMPER_IRQHandler
.word RTC_IRQHandler
.word FMC_IRQHandler
.word RCU_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA0_Channel0_IRQHandler
.word DMA0_Channel1_IRQHandler
.word DMA0_Channel2_IRQHandler
.word DMA0_Channel3_IRQHandler
.word DMA0_Channel4_IRQHandler
.word DMA0_Channel5_IRQHandler
.word DMA0_Channel6_IRQHandler
.word ADC0_1_IRQHandler
.word CAN0_TX_IRQHandler
.word CAN0_RX0_IRQHandler
.word CAN0_RX1_IRQHandler
.word CAN0_EWMC_IRQHandler
.word EXTI5_9_IRQHandler
.word TIMER0_BRK_IRQHandler
.word TIMER0_UP_IRQHandler
.word TIMER0_TRG_CMT_IRQHandler
.word TIMER0_Channel_IRQHandler
.word TIMER1_IRQHandler
.word TIMER2_IRQHandler
.word TIMER3_IRQHandler
.word I2C0_EV_IRQHandler
.word I2C0_ER_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word SPI0_IRQHandler
.word SPI1_IRQHandler
.word USART0_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word EXTI10_15_IRQHandler
.word RTC_Alarm_IRQHandler
.word USBFS_WKUP_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word EXMC_IRQHandler
.word 0
.word TIMER4_IRQHandler
.word SPI2_IRQHandler
.word UART3_IRQHandler
.word UART4_IRQHandler
.word TIMER5_IRQHandler
.word TIMER6_IRQHandler
.word DMA1_Channel0_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word 0
.word 0
.word CAN1_TX_IRQHandler
.word CAN1_RX0_IRQHandler
.word CAN1_RX1_IRQHandler
.word CAN1_EWMC_IRQHandler
.word USBFS_IRQHandler