fix bumblebee irq entry aligment, fix eclic

2020-01-09 20:18:18 +08:00
parent 5920066f21
commit bce32faac2
12 changed files with 113 additions and 41 deletions
--- a/arch/risc-v/bumblebee/gcc/riscv_port_s.S
+++ b/arch/risc-v/bumblebee/gcc/riscv_port_s.S
@@ -15,15 +15,23 @@
 * within TencentOS.
 *---------------------------------------------------------------------------*/

-.global eclic_mtip_handler
+//.global eclic_mtip_handler
+//.section .text
+#if 0
 .global irq_entry
 .global trap_entry

 .align 2
 irq_entry:
+	nop
+	nop
+	nop
+	nop
+	j rv32_exception_entry
    j irq_entry

 .align 2
 trap_entry:
    j trap_entry

+#endif