fix board keil compile
This commit is contained in:
daishengdong
File diff suppressed because one or more lines are too long
@@ -223,7 +223,7 @@
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@@ -16,7 +16,7 @@
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<TargetCommonOption>
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<Device>STM32L475VETx</Device>
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<Vendor>STMicroelectronics</Vendor>
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<PackID>Keil.STM32L4xx_DFP.2.1.0</PackID>
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<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
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<PackURL>http://www.keil.com/pack</PackURL>
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<Cpu>IRAM(0x20000000-0x20017FFF) IRAM2(0x10000000-0x10007FFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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@@ -572,11 +572,6 @@
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<FileType>1</FileType>
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@@ -592,11 +587,6 @@
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<FileName>tos_mutex.c</FileName>
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@@ -607,11 +597,6 @@
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<FileType>1</FileType>
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<FileName>tos_queue.c</FileName>
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<File>
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<FileName>tos_robin.c</FileName>
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<FileType>1</FileType>
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@@ -652,6 +637,56 @@
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<FileType>1</FileType>
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<FilePath>..\..\..\kernel\core\tos_timer.c</FilePath>
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<FileName>tos_binary_heap.c</FileName>
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<FileName>tos_char_fifo.c</FileName>
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<FileType>1</FileType>
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<FileName>tos_completion.c</FileName>
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<FileType>1</FileType>
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<FilePath>..\..\..\kernel\core\tos_completion.c</FilePath>
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</File>
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<File>
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<FileName>tos_countdownlatch.c</FileName>
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<FileType>1</FileType>
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<FilePath>..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
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</File>
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<FileName>tos_mail_queue.c</FileName>
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<FileType>1</FileType>
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<FilePath>..\..\..\kernel\core\tos_mail_queue.c</FilePath>
|
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||||
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||||
<FileName>tos_message_queue.c</FileName>
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<FileType>1</FileType>
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<FileName>tos_priority_mail_queue.c</FileName>
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||||
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|
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<FileName>tos_priority_queue.c</FileName>
|
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<FileName>tos_ring_queue.c</FileName>
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</Group>
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<Group>
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@@ -0,0 +1,125 @@
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||||
// File: STM32L4x5_4x6.dbgconf
|
||||
// Version: 1.0.0
|
||||
// Note: refer to STM32L4x5 and STM32L4x6 Reference manual (RM0351)
|
||||
// refer to STM32L475xx, STM32L476xx, STM32L486xx, STM32L496xx and STM32L4A6xx datasheets
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o0.2> DBG_STANDBY
|
||||
// <i> Debug Standby mode
|
||||
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
|
||||
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
|
||||
// <o0.1> DBG_STOP
|
||||
// <i> Debug Stop mode
|
||||
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
|
||||
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
|
||||
// <o0.0> DBG_SLEEP
|
||||
// <i> Debug Sleep mode
|
||||
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
|
||||
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000007;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
|
||||
// <o0.31> DBG_LPTIM1_STOP
|
||||
// <i> LPTIM1 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
|
||||
// <o0.26> DBG_CAN2_STOP
|
||||
// <i> bxCAN2 stopped when core is halted (Reserved on STM32L475xx/476xx/486xx devices)
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The bxCAN2 receive registers are frozen
|
||||
// <o0.25> DBG_CAN_STOP
|
||||
// <i> bxCAN1 stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The bxCAN1 receive registers are frozen
|
||||
// <o0.23> DBG_I2C3_STOP
|
||||
// <i> I2C3 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C3 SMBus timeout is frozen
|
||||
// <o0.22> DBG_I2C2_STOP
|
||||
// <i> I2C2 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C2 SMBus timeout is frozen
|
||||
// <o0.21> DBG_I2C1_STOP
|
||||
// <i> I2C1 SMBUS timeout counter stopped when core is halted
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C1 SMBus timeout is frozen
|
||||
// <o0.12> DBG_IWDG_STOP
|
||||
// <i> Independent watchdog counter stopped when core is halted
|
||||
// <i> 0: The independent watchdog counter clock continues even if the core is halted
|
||||
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
|
||||
// <o0.11> DBG_WWDG_STOP
|
||||
// <i> Window watchdog counter stopped when core is halted
|
||||
// <i> 0: The window watchdog counter clock continues even if the core is halted
|
||||
// <i> 1: The window watchdog counter clock is stopped when the core is halted
|
||||
// <o0.10> DBG_RTC_STOP
|
||||
// <i> RTC counter stopped when core is halted
|
||||
// <i> 0: The clock of the RTC counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the RTC counter is stopped when the core is halted
|
||||
// <o0.5> DBG_TIM7_STOP
|
||||
// <i> TIM7 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
|
||||
// <o0.4> DBG_TIM6_STOP
|
||||
// <i> TIM6 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
|
||||
// <o0.3> DBG_TIM5_STOP
|
||||
// <i> TIM5 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM5 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM5 is stopped when the core is halted
|
||||
// <o0.2> DBG_TIM4_STOP
|
||||
// <i> TIM4 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM4 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM4 is stopped when the core is halted
|
||||
// <o0.1> DBG_TIM3_STOP
|
||||
// <i> TIM3 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM3 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM3 is stopped when the core is halted
|
||||
// <o0.0> DBG_TIM2_STOP
|
||||
// <i> TIM2 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz1 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
|
||||
// <o0.5> DBG_LPTIM2_STOP
|
||||
// <i> LPTIM2 counter stopped when core is halted
|
||||
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
|
||||
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
|
||||
// <o0.1> DBG_I2C4_STOP
|
||||
// <i> I2C4 SMBUS timeout counter stopped when core is halted (Reserved on STM32L475xx/476xx/486xx devices)
|
||||
// <i> 0: Same behavior as in normal mode
|
||||
// <i> 1: The I2C4 SMBus timeout is frozen
|
||||
// </h>
|
||||
DbgMCU_APB1_Fz2 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
|
||||
// <o0.18> DBG_TIM17_STOP
|
||||
// <i> TIM17 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM17 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM17 counter is stopped when the core is halted
|
||||
// <o0.17> DBG_TIM16_STOP
|
||||
// <i> TIM16 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
|
||||
// <o0.16> DBG_TIM15_STOP
|
||||
// <i> TIM15 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
|
||||
// <o0.13> DBG_TIM8_STOP
|
||||
// <i> TIM8 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM8 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM8 counter is stopped when the core is halted
|
||||
// <o0.11> DBG_TIM1_STOP
|
||||
// <i> TIM1 counter stopped when core is halted
|
||||
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
|
||||
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
|
||||
// </h>
|
||||
DbgMCU_APB2_Fz = 0x00000000;
|
||||
// </h>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
@@ -0,0 +1,118 @@
|
||||
<html>
|
||||
<body>
|
||||
<pre>
|
||||
<h1><EFBFBD>Vision Build Log</h1>
|
||||
<h2>Tool Versions:</h2>
|
||||
IDE-Version: <20><>Vision V5.26.2.0
|
||||
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||
License Information: sheldon dai, tencent, LIC=AK1CX-H5HPV-SGF7K-ZGDWF-QC6LB-GRJE8
|
||||
|
||||
Tool Versions:
|
||||
Toolchain: MDK-ARM Professional Version: 5.26.2.0
|
||||
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
|
||||
C Compiler: Armcc.exe V5.06 update 6 (build 750)
|
||||
Assembler: Armasm.exe V5.06 update 6 (build 750)
|
||||
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
|
||||
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
|
||||
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
|
||||
CPU DLL: SARMCM3.DLL V5.26.2.0
|
||||
Dialog DLL: DCM.DLL V1.17.2.0
|
||||
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
|
||||
Dialog DLL: TCM.DLL V1.36.1.0
|
||||
|
||||
<h2>Project:</h2>
|
||||
D:\github\master\TencentOS-tiny\board\ALIENTEK_Pandora_STM32L475\Keil\ALIENTEK_Pandora_STM32L475.uvprojx
|
||||
Project File Date: 10/28/2019
|
||||
|
||||
<h2>Output:</h2>
|
||||
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
|
||||
Build target 'ALIENTEK_Pandora_STM32L475'
|
||||
assembling startup_stm32l475xx.s...
|
||||
compiling usart.c...
|
||||
compiling stm32l4xx_hal_msp.c...
|
||||
compiling mcu_init.c...
|
||||
compiling stm32l4xx_it.c...
|
||||
compiling gpio.c...
|
||||
compiling spi.c...
|
||||
compiling main.c...
|
||||
compiling stm32l4xx_hal_dma_ex.c...
|
||||
compiling stm32l4xx_hal_flash_ramfunc.c...
|
||||
compiling stm32l4xx_hal.c...
|
||||
compiling stm32l4xx_hal_flash_ex.c...
|
||||
compiling stm32l4xx_hal_cortex.c...
|
||||
compiling stm32l4xx_hal_dma.c...
|
||||
compiling stm32l4xx_hal_flash.c...
|
||||
compiling stm32l4xx_hal_i2c_ex.c...
|
||||
compiling stm32l4xx_hal_i2c.c...
|
||||
compiling stm32l4xx_hal_rcc.c...
|
||||
compiling stm32l4xx_hal_gpio.c...
|
||||
compiling stm32l4xx_hal_rcc_ex.c...
|
||||
compiling stm32l4xx_hal_pwr.c...
|
||||
compiling stm32l4xx_hal_pwr_ex.c...
|
||||
compiling stm32l4xx_hal_spi.c...
|
||||
compiling stm32l4xx_hal_tim.c...
|
||||
assembling port_s.S...
|
||||
compiling stm32l4xx_hal_uart.c...
|
||||
compiling system_stm32l4xx.c...
|
||||
compiling stm32l4xx_hal_spi_ex.c...
|
||||
compiling stm32l4xx_hal_tim_ex.c...
|
||||
compiling stm32l4xx_hal_uart_ex.c...
|
||||
compiling port_c.c...
|
||||
compiling tos_global.c...
|
||||
compiling tos_cpu.c...
|
||||
compiling tos_mmblk.c...
|
||||
compiling tos_mutex.c...
|
||||
compiling tos_mmheap.c...
|
||||
compiling tos_event.c...
|
||||
compiling tos_pend.c...
|
||||
compiling tos_robin.c...
|
||||
compiling tos_sched.c...
|
||||
compiling tos_task.c...
|
||||
compiling tos_sys.c...
|
||||
compiling tos_tick.c...
|
||||
compiling tos_sem.c...
|
||||
compiling tos_timer.c...
|
||||
compiling tos_binary_heap.c...
|
||||
compiling tos_countdownlatch.c...
|
||||
compiling tos_time.c...
|
||||
compiling tos_char_fifo.c...
|
||||
compiling tos_completion.c...
|
||||
compiling tos_mail_queue.c...
|
||||
compiling tos_priority_mail_queue.c...
|
||||
compiling tos_message_queue.c...
|
||||
compiling lcd.c...
|
||||
compiling tos_ring_queue.c...
|
||||
compiling tos_priority_message_queue.c...
|
||||
compiling tos_priority_queue.c...
|
||||
compiling hello_world.c...
|
||||
compiling cmsis_os.c...
|
||||
linking...
|
||||
Program Size: Code=20228 RO-data=42016 RW-data=144 ZI-data=45312
|
||||
FromELF: creating hex file...
|
||||
".\OBJ\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
|
||||
|
||||
<h2>Software Packages used:</h2>
|
||||
|
||||
Package Vendor: ARM
|
||||
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
|
||||
ARM.CMSIS.5.6.0
|
||||
CMSIS (Cortex Microcontroller Software Interface Standard)
|
||||
* Component: CORE Version: 5.3.0
|
||||
|
||||
Package Vendor: Keil
|
||||
http://www.keil.com/pack/Keil.STM32L4xx_DFP.2.0.0.pack
|
||||
Keil.STM32L4xx_DFP.2.0.0
|
||||
STMicroelectronics STM32L4 Series Device Support, Drivers and Examples
|
||||
|
||||
<h2>Collection of Component include folders:</h2>
|
||||
.\RTE\_ALIENTEK_Pandora_STM32L475
|
||||
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.6.0\CMSIS\Core\Include
|
||||
C:\Keil_v5\ARM\PACK\Keil\STM32L4xx_DFP\2.0.0\Drivers\CMSIS\Device\ST\STM32L4xx\Include
|
||||
|
||||
<h2>Collection of Component Files used:</h2>
|
||||
|
||||
* Component: ARM::CMSIS:CORE:5.3.0
|
||||
Build Time Elapsed: 00:01:46
|
||||
</pre>
|
||||
</body>
|
||||
</html>
|
||||
2181
board/ALIENTEK_Pandora_STM32L475/Keil/OBJ/TencentOS_tiny.htm
Normal file
2181
board/ALIENTEK_Pandora_STM32L475/Keil/OBJ/TencentOS_tiny.htm
Normal file
File diff suppressed because it is too large
Load Diff
16
board/ALIENTEK_Pandora_STM32L475/Keil/OBJ/TencentOS_tiny.sct
Normal file
16
board/ALIENTEK_Pandora_STM32L475/Keil/OBJ/TencentOS_tiny.sct
Normal file
@@ -0,0 +1,16 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Component Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'ALIENTEK_Pandora_STM32L475'
|
||||
* Target: 'ALIENTEK_Pandora_STM32L475'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "stm32l4xx.h"
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
Reference in New Issue
Block a user