add wifi project.(board/EVB_LN882x, example/wifi_ln882x, platform/vendor_bsp)

This commit is contained in:
wuliang
2020-04-09 21:44:01 +08:00
parent 8123240a91
commit c6894019ec
518 changed files with 202767 additions and 0 deletions

View File

@@ -0,0 +1,28 @@
#ifndef __MAIN_H__
#define __MAIN_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H__ */

View File

@@ -0,0 +1,24 @@
#ifndef __MCU_INIT_H
#define __MCU_INIT_H
#ifdef __cplusplus
extern "C" {
#endif
#include "main.h"
//#include "adc.h"
//#include "i2c.h"
//#include "sdio.h"
//#include "spi.h"
//#include "usart.h"
//#include "usb.h"
//#include "gpio.h"
#include "tos_k.h"
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /*__ __MCU_INIT_H */

View File

@@ -0,0 +1,39 @@
#include "mcu_init.h"
#include "cmsis_os.h"
#include "osal/osal.h"
#define APPLICATION_TASK_STK_SIZE 6*256
extern void application_entry(void *arg);
osThreadDef(application_entry, osPriorityLow, 1, APPLICATION_TASK_STK_SIZE);//osPriorityNormal
__weak void application_entry(void *arg)
{
while (1) {
printf("This is a demo task,please use your task entry!\r\n");
tos_task_delay(1000);
}
}
#include "wifi_manager/wifi_manager.h"
#include "utils/system_parameter.h"
#include "atcmd/at_task.h"
int main(void)
{
board_init();
osKernelInitialize();
os_heap_mem_add_pool(); // after kernel(tos_knl_init) init!!!
at_init();
system_parameter_init();
wifi_init();
lwip_tcpip_init();
wifi_manager_init(wifi_manager_get_handle());
osThreadCreate(osThread(application_entry), NULL); // Create TOS Tiny task
osKernelStart(); // Start TOS Tiny
}

View File

@@ -0,0 +1,84 @@
#include "mcu_init.h"
#include "serial/serial.h"
#include "utils/debug/log.h"
#include "wifi/wifi.h"
#include "tos_kv.h"
#include "hal/flash.h"
#include "hal/hal_interrupt.h"
#include "utils/debug/CmBacktrace/cm_backtrace.h"
uint8_t test_no_init_data[128] __attribute__((section("no_init_data"),zero_init));
extern Serial_t m_LogSerial;
int fputc(int ch, FILE *f)
{
serial_putchar(&m_LogSerial, ch);
return ch;
}
int _write(int fd, char *ptr, int len)
{
len = serial_write(&m_LogSerial, (const void *)ptr, len);
return len;
}
int fgetc(FILE *f)
{
uint8_t ch = 0;
return ch;
}
//int flash_write(uint32_t addr, const void *buf, size_t len){
// FLASH_Program(addr,len, (uint8_t *)buf);
//}
//int flash_read(uint32_t addr, void *buf, size_t len){
// FLASH_ReadByCache(addr, len, (uint8_t *)buf);
//}
//void nvds_kv_init(void)
//{
// kv_flash_drv_t flash_drv;
// kv_flash_prop_t flash_prop;
//
// flash_drv.write = flash_write;
// flash_drv.read = flash_read;
// flash_drv.erase = FLASH_Erase;
//
// flash_prop.sector_size_log2 = 8;
// flash_prop.pgm_type = KV_FLASH_PROGRAM_TYPE_BYTE;
// flash_prop.flash_start = SYSTEM_PARAMETER_OFFSET;
// flash_prop.flash_size = SIZE_4KB*2;
//}
void board_init(void)
{
SetSysClock();
set_interrupt_priority();
switch_global_interrupt(true);
//3.rf preprocess,img cal
wifi_rf_preprocess();
wifi_rf_image_cal();
log_init();//init log serial
cm_backtrace_init("wifi app", "HD_V2", "SW_V0.8");
// nvds_kv_init();
}
void SysTick_Handler(void)
{
if (tos_knl_is_running())
{
tos_knl_irq_enter();
tos_tick_handler();
tos_knl_irq_leave();
}
}

28
board/EVB_LN882x/KEIL/.gitignore vendored Normal file
View File

@@ -0,0 +1,28 @@
JLinkLog.txt
.vscode/
SI/
*.code-workspace
*.scvd
*.IAB
*.IAD
*.IMB
*.PFI
*.PO
*.PR
*.PRI
*.PS
*.IMD
*.SearchResults
*.WK3
Objects/
Listings/
*.asm
*.bin
*.uvguix.*
*.sublime-workspace

View File

@@ -0,0 +1,26 @@
del *.bak /s
del *.ddk /s
del *.edk /s
del *.lst /s
del *.lnp /s
del *.mpf /s
del *.mpj /s
del *.obj /s
del *.omf /s
::del *.opt /s :: Do NOT delete Keil projects.
del *.plg /s
del *.rpt /s
del *.tmp /s
del *.__i /s
del *.crf /s
del *.o /s
del *.d /s
del *.axf /s
del *.tra /s
del *.dep /s
del JLinkLog.txt /s
del *.iex /s
del *.htm /s
del *.orig /s
exit

View File

@@ -0,0 +1,39 @@
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
MonModeVTableAddr = 0xFFFFFFFF
MonModeDebug = 0
MaxNumAPs = 0
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="Cortex-M4"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,8 @@
python ..\..\..\..\platform\vendor_bsp\LN\ln882x\tools\user_cmd\after_build_soc.py firmware_XIP
..\..\..\..\platform\vendor_bsp\LN\ln882x\tools\bin\mkimage.exe ln882x flashimage ..\..\..\..\platform\vendor_bsp\LN\ln882x\lib\boot_ram_ln882x.bin firmware_XIP.bin flashimage.bin release=1 crp_enable=0 app_version=10 hw_version=0
..\..\..\..\platform\vendor_bsp\LN\ln882x\tools\bin\fpu_patch.exe .\firmware_XIP.asm .\flashimage.bin

View File

@@ -0,0 +1,78 @@
#! armcc -E
#include ".\flash_partition_table.h"
#include ".\..\..\..\..\platform\vendor_bsp\LN\ln882x\include\cpu\ARM_CM4F\ln88xx\mem_map_ln882x.h"
LR_FLASH FLASH_BASE+PRIMARY_PARTITION_OFFSET PRIMARY_PATTITION_SIZE
{; load region size_region
ISR_VECTOR RAM_BASE ALIGN 0x100
{
startup_*.o (RESET, +First)
}
ER_FLASH FLASH_BASE+PRIMARY_PARTITION_OFFSET + ImageLength(ISR_VECTOR) PRIMARY_PATTITION_SIZE
{; load address = execution address
*(InRoot$$Sections)
.ANY (+RO)
}
ER_CODE ImageLimit(ISR_VECTOR)
{
;mandatory item
ll_qspi.o(+RO)
ll_cache.o(+RO)
ll_dma.o(+RO)
ll_syscon.o(+RO)
ll_sleep.o(+RO)
ll_rtc.o(+RO)
cache.o(+RO)
qspi.o(+RO)
flash.o(+RO)
hal_dma.o(+RO)
hal_syscon.o(+RO)
hal_sleep.o(+RO)
hal_rtc.o(+RO)
;port.o(XIR)
;optional item
;ll_uart.o(+RO)
;hal_uart.o(+RO)
;log.o(+RO)
;serial.o(+RO)
;serial_art2000.o(+RO)
;fifobuf.o(+RO)
}
ER_STACK +0
{
startup_ln*(+RW +ZI)
}
ER_DATA +0
{
*(.ARM.__at_0x1FFFFFFC)
.ANY (+RW +ZI)
}
;IQ Data area cannot be used by ER_DATA region
;ScatterAssert(ImageLimit(ER_DATA) < (0x20020300))
HEAP_SPACE +0 EMPTY RETENTION_MEM_BASE-ImageLimit(ER_DATA)
{; Heap region
}
NO_INIT_DATA RETENTION_MEM_BASE UNINIT 0x80
{
*(no_init_data)
}
RETENTION RETENTION_MEM_BASE+0x80 ANY_SIZE 0x2000-0x80-16 RETENTION_MEM_SIZE
{
*(retention_data)
phy_LN.o(+RW +ZI)
ch_info.o(+RW +ZI)
}
}

View File

@@ -0,0 +1,32 @@
#ifndef __FLASH_PARTITION_TABLE_H__
#define __FLASH_PARTITION_TABLE_H__
//#define RETENTION_MEM_BASE 0x20028000
//#define RETENTION_MEM_SIZE 0x2000
#ifndef FLASH_BASE
#define FLASH_BASE (0x10000000)
#endif
#ifndef FLASH_SIZE
#define FLASH_SIZE (0x00200000)
#endif
#ifndef PRIMARY_PARTITION_OFFSET
#define PRIMARY_PARTITION_OFFSET (0x0000F000)
#endif
#define PRIMARY_PATTITION_START 0x0000F000
#define PRIMARY_PATTITION_SIZE 0xE1000
//#define USERAPP_SRAM_BASE 0x1FFF0000
#define BACKUP_PATTITION_START 0x000F0000
#define BACKUP_PATTITION_SIZE 0xE1000
#define USERDATA_PATTITION_START 0x001D1000
#define USERDATA_PATTITION_SIZE 0x23000
//memory offset check
#if ((PRIMARY_PATTITION_START < PRIMARY_PARTITION_OFFSET) || (BACKUP_PATTITION_START < PRIMARY_PATTITION_START) || (USERDATA_PATTITION_START < BACKUP_PATTITION_START) || (PRIMARY_PATTITION_START + PRIMARY_PATTITION_SIZE > BACKUP_PATTITION_START) || (BACKUP_PATTITION_START + BACKUP_PATTITION_SIZE > USERDATA_PATTITION_START) || (USERDATA_PATTITION_START + USERDATA_PATTITION_SIZE > FLASH_SIZE))
#error "flash partition define error!"
#endif
#endif /* __FLASH_PARTITION_TABLE_H__ */

View File

@@ -0,0 +1,81 @@
#ifndef _PROJ_CONFIG_H_
#define _PROJ_CONFIG_H_
#define DISABLE 0
#define ENABLE 1
#define CHIP_SLAVE 0 //As a device for the master chip
#define CHIP_MCU 1
#define USE_PLL ENABLE
#ifdef USE_PLL
#define SOURCE_CLOCK (160000000)
#else
#define SOURCE_CLOCK (40000000)
#endif
#define SYSTEM_CLOCK (SOURCE_CLOCK)
#define AHBUS_CLOCK (SYSTEM_CLOCK)
#define APBUS0_CLOCK (AHBUS_CLOCK/2)
#define APBUS1_CLOCK (AHBUS_CLOCK/4)
#define APBUS2_CLOCK (AHBUS_CLOCK)
#if (USE_PLL == ENABLE)
#define QSPI_CLK (APBUS2_CLOCK/4)
#else
#define QSPI_CLK (APBUS2_CLOCK/2)
#endif
#if ((AHBUS_CLOCK % APBUS0_CLOCK) || (AHBUS_CLOCK % APBUS1_CLOCK))
#error "AHBUS_CLOCK % APBUS0_CLOCK != 0 or AHBUS_CLOCK % APBUS1_CLOCK != 0"
#endif
/*
* Module enable/disable control
*/
#define FLASH_XIP ENABLE
#define CHIP_ROLE CHIP_MCU
#define RTOS_FREERTOS 0
#define RTOS_ALIOS 1
#define RTOS_RT_THREAD 2
#define RTOS_UCOS 3
#define RTOS_TENCENT_OS 4
#define __CONFIG_OS_KERNEL RTOS_TENCENT_OS
#define DEBUG_MODE
#define FULL_ASSERT ENABLE
#define PRINT_TO_RTT 0 // 1: print to segger rtt 0: print to uart
/*
* in arm-none-eabi-gcc/7.3, BIG_ENDIAN is defined as 4321 default.
*/
#ifdef BIG_ENDIAN
#undef BIG_ENDIAN
#endif
#define LITTLE_ENDIAN 1234
#define BLE_SUPPORT DISABLE
/*
* Hardware config
*/
#define CFG_UART0_TX_BUF_SIZE 256
#define CFG_UART0_RX_BUF_SIZE 256
#define CFG_UART1_TX_BUF_SIZE 128
#define CFG_UART1_RX_BUF_SIZE 256
#define CFG_UART_BAUDRATE_LOG 2000000
#define CFG_UART_BAUDRATE_CONSOLE 2000000
#endif /* _PROJ_CONFIG_H_ */

View File

@@ -0,0 +1,44 @@
#ifndef _TOS_CONFIG_H_
#define _TOS_CONFIG_H_
#include "ln88xx.h"
#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 1u
#define TOS_CFG_TICKLESS_EN 0u
#define TOS_CFG_TASK_PRIO_MAX 10u
#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 1u
#define TOS_CFG_ROUND_ROBIN_EN 1u
#define TOS_CFG_OBJECT_VERIFY_EN 1u
#define TOS_CFG_EVENT_EN 1u
#define TOS_CFG_MMBLK_EN 1u
#define TOS_CFG_MMHEAP_EN 1u
#define TOS_CFG_MMHEAP_DEFAULT_POOL_EN 0u
#define TOS_CFG_MUTEX_EN 1u
#define TOS_CFG_SEM_EN 1u
#define TOS_CFG_MESSAGE_QUEUE_EN 1u
#define TOS_CFG_MAIL_QUEUE_EN 1u
#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN 1u
#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN 1u
#define TOS_CFG_IDLE_TASK_STK_SIZE 80u
#define TOS_CFG_CPU_TICK_PER_SECOND 1000u
#define TOS_CFG_CPU_CLOCK 160000000//(SystemCoreClock)
#define TOS_CFG_TIMER_EN 1u
#define TOS_CFG_TIMER_AS_PROC 0u
#define TOS_CFG_TIMER_TASK_STK_SIZE 1024u
#define TOS_CFG_TIMER_TASK_PRIO 0u
#endif