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TencentOS tiny port to MSP430FR6972

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bourne-h
2019-11-18 19:43:41 +08:00
parent c4d928a42b
commit c985305927
91 changed files with 34319 additions and 2 deletions
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platform/vendor_bsp/TI/MSP430FR5xx_6xx/adc12_b.c Normal file
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// adc12_b.c - Driver for the adc12_b Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup adc12_b_api adc12_b
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_ADC12_B__
#include "adc12_b.h"
#include <assert.h>
bool ADC12_B_init(uint16_t baseAddress, ADC12_B_initParam *param)
{
//Make sure the ENC bit is cleared before initializing the ADC12
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
bool retVal = STATUS_SUCCESS;
//Turn OFF ADC12B Module & Clear Interrupt Registers
HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12ON + ADC12ENC + ADC12SC);
HWREG16(baseAddress + OFS_ADC12IER0) &= 0x0000; //Reset ALL interrupt enables
HWREG16(baseAddress + OFS_ADC12IER1) &= 0x0000;
HWREG16(baseAddress + OFS_ADC12IER2) &= 0x0000;
HWREG16(baseAddress + OFS_ADC12IFGR0) &= 0x0000; //Reset ALL interrupt flags
HWREG16(baseAddress + OFS_ADC12IFGR1) &= 0x0000;
HWREG16(baseAddress + OFS_ADC12IFGR2) &= 0x0000;
//Set ADC12B Control 1
HWREG16(baseAddress + OFS_ADC12CTL1) =
param->sampleHoldSignalSourceSelect //Setup the Sample-and-Hold Source
+ (param->clockSourceDivider & ADC12DIV_7) //Set Clock Divider
+ (param->clockSourcePredivider & ADC12PDIV__64)
+ param->clockSourceSelect; //Setup Clock Source
//Set ADC12B Control 2
HWREG16(baseAddress + OFS_ADC12CTL2) =
ADC12RES_2; //Default resolution to 12-bits
//Set ADC12B Control 3
HWREG16(baseAddress + OFS_ADC12CTL3) =
param->internalChannelMap; // Map internal channels
return (retVal) ;
}
void ADC12_B_enable (uint16_t baseAddress)
{
// Clear ENC bit
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
//Enable the ADC12B Module
HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ON;
}
void ADC12_B_disable (uint16_t baseAddress)
{
// Clear ENC bit
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
// Must be implemented due to ADC66 errata
// Wait for ADC to finish conversion
while (ADC12_B_isBusy(baseAddress)) ;
//Disable ADC12B module
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ON;
}
void ADC12_B_setupSamplingTimer (uint16_t baseAddress,
uint16_t clockCycleHoldCountLowMem,
uint16_t clockCycleHoldCountHighMem,
uint16_t multipleSamplesEnabled)
{
HWREG16(baseAddress + OFS_ADC12CTL1) |= ADC12SHP;
//Reset clock cycle hold counts and msc bit before setting them
HWREG16(baseAddress + OFS_ADC12CTL0) &=
~(ADC12SHT0_15 + ADC12SHT1_15 + ADC12MSC);
//Set clock cycle hold counts and msc bit
HWREG16(baseAddress + OFS_ADC12CTL0) |= clockCycleHoldCountLowMem
+ (clockCycleHoldCountHighMem << 4)
+ multipleSamplesEnabled;
}
void ADC12_B_disableSamplingTimer (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12SHP);
}
void ADC12_B_configureMemory(uint16_t baseAddress,
ADC12_B_configureMemoryParam *param)
{
//Make sure the ENC bit is cleared before configuring a Memory Buffer Control
assert( !(HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC) );
if(!(HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC))
{
//Set the offset in respect to ADC12MCTL0
uint16_t memoryBufferControlOffset =
(OFS_ADC12MCTL0 + param->memoryBufferControlIndex);
//Reset the memory buffer control and Set the input source
HWREG16(baseAddress + memoryBufferControlOffset) =
param->inputSourceSelect //Set Input Source
+ param->refVoltageSourceSelect //Set Vref+/-
+ param->endOfSequence; //Set End of Sequence
HWREG16(baseAddress + memoryBufferControlOffset)
&= ~(ADC12WINC);
HWREG16(baseAddress + memoryBufferControlOffset)
|= param->windowComparatorSelect;
//(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
HWREG16(baseAddress + memoryBufferControlOffset)
&= ~(ADC12DIF);
HWREG16(baseAddress + memoryBufferControlOffset)
|= param->differentialModeSelect;
//(OFS_ADC12MCTL0_H + memoryIndex) == offset of OFS_ADC12MCTLX_H
}
}
void ADC12_B_setWindowCompAdvanced (uint16_t baseAddress,
uint16_t highThreshold,
uint16_t lowThreshold)
{
HWREG16(baseAddress + OFS_ADC12HI) = highThreshold;
HWREG16(baseAddress + OFS_ADC12LO) = lowThreshold;
}
void ADC12_B_enableInterrupt (uint16_t baseAddress,
uint16_t interruptMask0,
uint16_t interruptMask1,
uint16_t interruptMask2)
{
HWREG16(baseAddress + OFS_ADC12IER0) |= interruptMask0;
HWREG16(baseAddress + OFS_ADC12IER1) |= interruptMask1;
HWREG16(baseAddress + OFS_ADC12IER2) |= interruptMask2;
}
void ADC12_B_disableInterrupt (uint16_t baseAddress,
uint16_t interruptMask0,
uint16_t interruptMask1,
uint16_t interruptMask2)
{
HWREG16(baseAddress + OFS_ADC12IER0) &= ~(interruptMask0);
HWREG16(baseAddress + OFS_ADC12IER1) &= ~(interruptMask1);
HWREG16(baseAddress + OFS_ADC12IER2) &= ~(interruptMask2);
}
void ADC12_B_clearInterrupt (uint16_t baseAddress,
uint8_t interruptRegisterChoice,
uint16_t memoryInterruptFlagMask)
{
HWREG16(baseAddress + OFS_ADC12IFGR0 + 2*interruptRegisterChoice) &=
~(memoryInterruptFlagMask);
}
uint16_t ADC12_B_getInterruptStatus (uint16_t baseAddress,
uint8_t interruptRegisterChoice,
uint16_t memoryInterruptFlagMask)
{
return ( HWREG16(baseAddress + OFS_ADC12IFGR0 + 2*interruptRegisterChoice)
& memoryInterruptFlagMask );
}
void ADC12_B_startConversion (uint16_t baseAddress,
uint16_t startingMemoryBufferIndex,
uint8_t conversionSequenceModeSelect)
{
//Reset the ENC bit to set the starting memory address and conversion mode
//sequence
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
//Reset the bits about to be set
HWREG16(baseAddress + OFS_ADC12CTL3) &= ~(ADC12CSTARTADD_31);
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12CONSEQ_3);
HWREG16(baseAddress + OFS_ADC12CTL3) |= startingMemoryBufferIndex;
HWREG16(baseAddress + OFS_ADC12CTL1) |= conversionSequenceModeSelect;
HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
}
void ADC12_B_disableConversions (uint16_t baseAddress, bool preempt)
{
if (ADC12_B_PREEMPTCONVERSION == preempt){
HWREG8(baseAddress + OFS_ADC12CTL1_L) &= ~(ADC12CONSEQ_3);
//Reset conversion sequence mode to single-channel, single-conversion
} else if (~(HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12CONSEQ_3)){
//To prevent preemption of a single-channel, single-conversion we must
//wait for the ADC core to finish the conversion.
while (ADC12_B_isBusy(baseAddress)) ;
}
HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
}
uint16_t ADC12_B_getResults (uint16_t baseAddress, uint8_t memoryBufferIndex)
{
return ( HWREG16(baseAddress + (OFS_ADC12MEM0 + memoryBufferIndex)) );
//(0x60 + memoryBufferIndex) == offset of ADC12MEMx
}
void ADC12_B_setResolution (uint16_t baseAddress,
uint8_t resolutionSelect)
{
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12RES_3);
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= resolutionSelect;
}
void ADC12_B_setSampleHoldSignalInversion (uint16_t baseAddress,
uint16_t invertedSignal)
{
HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12ISSH);
HWREG16(baseAddress + OFS_ADC12CTL1) |= invertedSignal;
}
void ADC12_B_setDataReadBackFormat (uint16_t baseAddress,
uint8_t readBackFormat)
{
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12DF);
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= readBackFormat;
}
void ADC12_B_setAdcPowerMode (uint16_t baseAddress,
uint8_t powerMode)
{
HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12PWRMD);
HWREG8(baseAddress + OFS_ADC12CTL2_L) |= powerMode;
}
uint32_t ADC12_B_getMemoryAddressForDMA (uint16_t baseAddress,
uint8_t memoryIndex)
{
return ( baseAddress + (OFS_ADC12MEM0 + memoryIndex) );
//(0x60 + memoryIndex) == offset of ADC12MEMx
}
uint8_t ADC12_B_isBusy (uint16_t baseAddress)
{
return (HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12BUSY);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for adc12_b_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// aes256.c - Driver for the aes256 Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup aes256_api aes256
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_AES256__
#include "aes256.h"
#include <assert.h>
uint8_t AES256_setCipherKey (uint16_t baseAddress,
const uint8_t * cipherKey,
uint16_t keyLength)
{
uint8_t i;
uint16_t sCipherKey;
HWREG16(baseAddress + OFS_AESACTL0) &= (~(AESKL_1 + AESKL_2));
switch(keyLength)
{
case AES256_KEYLENGTH_128BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
break;
case AES256_KEYLENGTH_192BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
break;
case AES256_KEYLENGTH_256BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
break;
default :
return STATUS_FAIL;
}
keyLength = keyLength / 8;
for (i = 0; i < keyLength; i = i + 2)
{
sCipherKey = (uint16_t)(cipherKey[i]);
sCipherKey = sCipherKey | ((uint16_t)(cipherKey[i + 1]) << 8);
HWREG16(baseAddress + OFS_AESAKEY) = sCipherKey;
}
// Wait until key is written
while(0x00 == (HWREG16(baseAddress + OFS_AESASTAT) & AESKEYWR ));
return STATUS_SUCCESS;
}
void AES256_encryptData (uint16_t baseAddress,
const uint8_t * data,
uint8_t * encryptedData)
{
uint8_t i;
uint16_t tempData = 0;
uint16_t tempVariable = 0;
// Set module to encrypt mode
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
// Write data to encrypt to module
for (i = 0; i < 16; i = i + 2)
{
tempVariable = (uint16_t)(data[i]);
tempVariable = tempVariable | ((uint16_t)(data[i+1]) << 8);
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
}
// Key that is already written shall be used
// Encryption is initialized by setting AESKEYWR to 1
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
// Wait unit finished ~167 MCLK
while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY) );
// Write encrypted data back to variable
for (i = 0; i < 16; i = i + 2)
{
tempData = HWREG16(baseAddress + OFS_AESADOUT);
*(encryptedData + i) = (uint8_t)tempData;
*(encryptedData +i + 1) = (uint8_t)(tempData >> 8);
}
}
void AES256_decryptData (uint16_t baseAddress,
const uint8_t * data,
uint8_t * decryptedData)
{
uint8_t i;
uint16_t tempData = 0;
uint16_t tempVariable = 0;
// Set module to decrypt mode
HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
// Write data to decrypt to module
for (i = 0; i < 16; i = i + 2)
{
tempVariable = (uint16_t)(data[i+1] << 8);
tempVariable = tempVariable | ((uint16_t)(data[i]));
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
}
// Key that is already written shall be used
// Now decryption starts
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
// Wait unit finished ~167 MCLK
while(AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY ));
// Write encrypted data back to variable
for (i = 0; i < 16; i = i + 2)
{
tempData = HWREG16(baseAddress + OFS_AESADOUT);
*(decryptedData + i) = (uint8_t)tempData;
*(decryptedData +i + 1) = (uint8_t)(tempData >> 8);
}
}
uint8_t AES256_setDecipherKey (uint16_t baseAddress,
const uint8_t * cipherKey,
uint16_t keyLength
)
{
uint8_t i;
uint16_t tempVariable = 0;
// Set module to decrypt mode
HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
switch(keyLength)
{
case AES256_KEYLENGTH_128BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
break;
case AES256_KEYLENGTH_192BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
break;
case AES256_KEYLENGTH_256BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
break;
default :
return STATUS_FAIL;
}
keyLength = keyLength / 8;
// Write cipher key to key register
for (i = 0; i < keyLength; i = i + 2)
{
tempVariable = (uint16_t)(cipherKey[i]);
tempVariable = tempVariable | ((uint16_t)(cipherKey[i + 1]) << 8);
HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
}
// Wait until key is processed ~52 MCLK
while((HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY) == AESBUSY);
return STATUS_SUCCESS;
}
void AES256_clearInterrupt (uint16_t baseAddress )
{
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIFG;
}
uint32_t AES256_getInterruptStatus (uint16_t baseAddress)
{
return ((HWREG16(baseAddress + OFS_AESACTL0) & AESRDYIFG) << 0x04);
}
void AES256_enableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_AESACTL0) |= AESRDYIE;
}
void AES256_disableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESRDYIE;
}
void AES256_reset (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_AESACTL0) |= AESSWRST;
}
void AES256_startEncryptData (uint16_t baseAddress,
const uint8_t * data)
{
uint8_t i;
uint16_t tempVariable = 0;
// Set module to encrypt mode
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESOP_3;
// Write data to encrypt to module
for (i = 0; i < 16; i = i + 2)
{
tempVariable = (uint16_t)(data[i]);
tempVariable = tempVariable | ((uint16_t)(data[i+1 ]) << 8);
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
}
// Key that is already written shall be used
// Encryption is initialized by setting AESKEYWR to 1
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
}
void AES256_startDecryptData (uint16_t baseAddress,
const uint8_t * data)
{
uint8_t i;
uint16_t tempVariable = 0;
// Set module to decrypt mode
HWREG16(baseAddress + OFS_AESACTL0) |= (AESOP_3);
// Write data to decrypt to module
for (i = 0; i < 16; i = i + 2)
{
tempVariable = (uint16_t)(data[i+1] << 8);
tempVariable = tempVariable | ((uint16_t)(data[i]));
HWREG16(baseAddress + OFS_AESADIN) = tempVariable;
}
// Key that is already written shall be used
// Now decryption starts
HWREG16(baseAddress + OFS_AESASTAT) |= AESKEYWR;
}
uint8_t AES256_startSetDecipherKey (uint16_t baseAddress,
const uint8_t * cipherKey,
uint16_t keyLength)
{
uint8_t i;
uint16_t tempVariable = 0;
HWREG16(baseAddress + OFS_AESACTL0) &= ~(AESOP0);
HWREG16(baseAddress + OFS_AESACTL0) |= AESOP1;
switch(keyLength)
{
case AES256_KEYLENGTH_128BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__128;
break;
case AES256_KEYLENGTH_192BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__192;
break;
case AES256_KEYLENGTH_256BIT :
HWREG16(baseAddress + OFS_AESACTL0) |= AESKL__256;
break;
default :
return STATUS_FAIL;
}
keyLength = keyLength / 8;
// Write cipher key to key register
for (i = 0; i < keyLength; i = i + 2)
{
tempVariable = (uint16_t)(cipherKey[i]);
tempVariable = tempVariable | ((uint16_t)(cipherKey[i+1]) << 8);
HWREG16(baseAddress + OFS_AESAKEY) = tempVariable;
}
return STATUS_SUCCESS;
}
uint8_t AES256_getDataOut(uint16_t baseAddress,
uint8_t *outputData
)
{
uint8_t i;
uint16_t tempData = 0;
// If module is busy, exit and return failure
if( AESBUSY == (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY))
return STATUS_FAIL;
// Write encrypted data back to variable
for (i = 0; i < 16; i = i + 2)
{
tempData = HWREG16(baseAddress + OFS_AESADOUT);
*(outputData + i ) = (uint8_t)tempData;
*(outputData +i + 1) = (uint8_t)(tempData >> 8);
}
return STATUS_SUCCESS;
}
uint16_t AES256_isBusy (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_AESASTAT) & AESBUSY);
}
void AES256_clearErrorFlag (uint16_t baseAddress )
{
HWREG16(baseAddress + OFS_AESACTL0) &= ~AESERRFG;
}
uint32_t AES256_getErrorFlagStatus (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_AESACTL0) & AESERRFG);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for aes256_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// aes256.h - Driver for the AES256 Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_AES256_H__
#define __MSP430WARE_AES256_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_AES256__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the keyLength parameter for
// functions: AES256_setCipherKey(), AES256_setDecipherKey(), and
// AES256_startSetDecipherKey().
//
//*****************************************************************************
#define AES256_KEYLENGTH_128BIT 128
#define AES256_KEYLENGTH_192BIT 192
#define AES256_KEYLENGTH_256BIT 256
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the AES256_getErrorFlagStatus() function.
//
//*****************************************************************************
#define AES256_ERROR_OCCURRED AESERRFG
#define AES256_NO_ERROR 0x00
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the AES256_isBusy() function.
//
//*****************************************************************************
#define AES256_BUSY AESBUSY
#define AES256_NOT_BUSY 0x00
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the AES256_getInterruptStatus() function.
//
//*****************************************************************************
#define AES256_READY_INTERRUPT AESRDYIE
#define AES256_NOTREADY_INTERRUPT 0x00
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Loads a 128, 192 or 256 bit cipher key to AES256 module.
//!
//! This function loads a 128, 192 or 256 bit cipher key to AES256 module.
//! Requires both a key as well as the length of the key provided. Acceptable
//! key lengths are AES256_KEYLENGTH_128BIT, AES256_KEYLENGTH_192BIT, or
//! AES256_KEYLENGTH_256BIT
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
//! that contains a 128 bit cipher key.
//! \param keyLength is the length of the key.
//! Valid values are:
//! - \b AES256_KEYLENGTH_128BIT
//! - \b AES256_KEYLENGTH_192BIT
//! - \b AES256_KEYLENGTH_256BIT
//!
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
//
//*****************************************************************************
extern uint8_t AES256_setCipherKey(uint16_t baseAddress,
const uint8_t *cipherKey,
uint16_t keyLength);
//*****************************************************************************
//
//! \brief Encrypts a block of data using the AES256 module.
//!
//! The cipher key that is used for encryption should be loaded in advance by
//! using function AES256_setCipherKey()
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
//! contains data to be encrypted.
//! \param encryptedData is a pointer to an uint8_t array with a length of 16
//! bytes in that the encrypted data will be written.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_encryptData(uint16_t baseAddress,
const uint8_t *data,
uint8_t *encryptedData);
//*****************************************************************************
//
//! \brief Decrypts a block of data using the AES256 module.
//!
//! This function requires a pregenerated decryption key. A key can be loaded
//! and pregenerated by using function AES256_setDecipherKey() or
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
//! contains encrypted data to be decrypted.
//! \param decryptedData is a pointer to an uint8_t array with a length of 16
//! bytes in that the decrypted data will be written.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_decryptData(uint16_t baseAddress,
const uint8_t *data,
uint8_t *decryptedData);
//*****************************************************************************
//
//! \brief Sets the decipher key.
//!
//! The API AES256_startSetDecipherKey or AES256_setDecipherKey must be invoked
//! before invoking AES256_startDecryptData.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
//! that contains a 128 bit cipher key.
//! \param keyLength is the length of the key.
//! Valid values are:
//! - \b AES256_KEYLENGTH_128BIT
//! - \b AES256_KEYLENGTH_192BIT
//! - \b AES256_KEYLENGTH_256BIT
//!
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
//
//*****************************************************************************
extern uint8_t AES256_setDecipherKey(uint16_t baseAddress,
const uint8_t *cipherKey,
uint16_t keyLength);
//*****************************************************************************
//
//! \brief Clears the AES256 ready interrupt flag.
//!
//! This function clears the AES256 ready interrupt flag. This flag is
//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
//! AES256ADIN is written. This function should be used when the flag needs to
//! be reset and it has not been automatically cleared by one of the previous
//! actions.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! Modified bits are \b AESRDYIFG of \b AESACTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_clearInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Gets the AES256 ready interrupt flag status.
//!
//! This function checks the AES256 ready interrupt flag. This flag is
//! automatically cleared when AES256ADOUT is read, or when AES256AKEY or
//! AES256ADIN is written. This function can be used to confirm that this has
//! been done.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! \return One of the following:
//! - \b AES256_READY_INTERRUPT
//! - \b AES256_NOTREADY_INTERRUPT
//! \n indicating the status of the AES256 ready status
//
//*****************************************************************************
extern uint32_t AES256_getInterruptStatus(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables AES256 ready interrupt.
//!
//! Enables AES256 ready interrupt. This interrupt is reset by a PUC, but not
//! reset by AES256_reset.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_enableInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables AES256 ready interrupt.
//!
//! Disables AES256 ready interrupt. This interrupt is reset by a PUC, but not
//! reset by AES256_reset.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! Modified bits are \b AESRDYIE of \b AESACTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_disableInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Resets AES256 Module immediately.
//!
//! This function performs a software reset on the AES256 Module, note that
//! this does not affect the AES256 ready interrupt.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! Modified bits are \b AESSWRST of \b AESACTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_reset(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Starts an encryption process on the AES256 module.
//!
//! The cipher key that is used for decryption should be loaded in advance by
//! using function AES256_setCipherKey(). This is a non-blocking equivalent of
//! AES256_encryptData(). It is recommended to use the interrupt functionality
//! to check for procedure completion then use the AES256_getDataOut() API to
//! retrieve the encrypted data.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
//! contains data to be encrypted.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_startEncryptData(uint16_t baseAddress,
const uint8_t *data);
//*****************************************************************************
//
//! \brief Decrypts a block of data using the AES256 module.
//!
//! This is the non-blocking equivalent of AES256_decryptData(). This function
//! requires a pregenerated decryption key. A key can be loaded and
//! pregenerated by using function AES256_setDecipherKey() or
//! AES256_startSetDecipherKey(). The decryption takes 167 MCLK. It is
//! recommended to use interrupt to check for procedure completion then use the
//! AES256_getDataOut() API to retrieve the decrypted data.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param data is a pointer to an uint8_t array with a length of 16 bytes that
//! contains encrypted data to be decrypted.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_startDecryptData(uint16_t baseAddress,
const uint8_t *data);
//*****************************************************************************
//
//! \brief Sets the decipher key
//!
//! The API AES256_startSetDecipherKey() or AES256_setDecipherKey() must be
//! invoked before invoking AES256_startDecryptData.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param cipherKey is a pointer to an uint8_t array with a length of 16 bytes
//! that contains a 128 bit cipher key.
//! \param keyLength is the length of the key.
//! Valid values are:
//! - \b AES256_KEYLENGTH_128BIT
//! - \b AES256_KEYLENGTH_192BIT
//! - \b AES256_KEYLENGTH_256BIT
//!
//! \return STATUS_SUCCESS or STATUS_FAIL of key loading
//
//*****************************************************************************
extern uint8_t AES256_startSetDecipherKey(uint16_t baseAddress,
const uint8_t *cipherKey,
uint16_t keyLength);
//*****************************************************************************
//
//! \brief Reads back the output data from AES256 module.
//!
//! This function is meant to use after an encryption or decryption process
//! that was started and finished by initiating an interrupt by use of
//! AES256_startEncryptData or AES256_startDecryptData functions.
//!
//! \param baseAddress is the base address of the AES256 module.
//! \param outputData is a pointer to an uint8_t array with a length of 16
//! bytes in that the data will be written.
//!
//! \return STATUS_SUCCESS if data is valid, otherwise STATUS_FAIL
//
//*****************************************************************************
extern uint8_t AES256_getDataOut(uint16_t baseAddress,
uint8_t *outputData);
//*****************************************************************************
//
//! \brief Gets the AES256 module busy status.
//!
//! Gets the AES256 module busy status. If a key or data are written while the
//! AES256 module is busy, an error flag will be thrown.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! \return One of the following:
//! - \b AES256_BUSY
//! - \b AES256_NOT_BUSY
//! \n indicating if the AES256 module is busy
//
//*****************************************************************************
extern uint16_t AES256_isBusy(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Clears the AES256 error flag.
//!
//! Clears the AES256 error flag that results from a key or data being written
//! while the AES256 module is busy.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! Modified bits are \b AESERRFG of \b AESACTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void AES256_clearErrorFlag(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Gets the AES256 error flag status.
//!
//! Checks the AES256 error flag that results from a key or data being written
//! while the AES256 module is busy. If the flag is set, it needs to be cleared
//! using AES256_clearErrorFlag.
//!
//! \param baseAddress is the base address of the AES256 module.
//!
//! \return One of the following:
//! - \b AES256_ERROR_OCCURRED
//! - \b AES256_NO_ERROR
//! \n indicating the error flag status
//
//*****************************************************************************
extern uint32_t AES256_getErrorFlagStatus(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_AES256_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// comp_e.c - Driver for the comp_e Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup comp_e_api comp_e
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_COMP_E__
#include "comp_e.h"
#include <assert.h>
static uint16_t __getRegisterSettingForInput(uint32_t input)
{
switch(input)
{
case COMP_E_INPUT0:
return CEIPSEL_0;
case COMP_E_INPUT1:
return CEIPSEL_1;
case COMP_E_INPUT2:
return CEIPSEL_2;
case COMP_E_INPUT3:
return CEIPSEL_3;
case COMP_E_INPUT4:
return CEIPSEL_4;
case COMP_E_INPUT5:
return CEIPSEL_5;
case COMP_E_INPUT6:
return CEIPSEL_6;
case COMP_E_INPUT7:
return CEIPSEL_7;
case COMP_E_INPUT8:
return CEIPSEL_8;
case COMP_E_INPUT9:
return CEIPSEL_9;
case COMP_E_INPUT10:
return CEIPSEL_10;
case COMP_E_INPUT11:
return CEIPSEL_11;
case COMP_E_INPUT12:
return CEIPSEL_12;
case COMP_E_INPUT13:
return CEIPSEL_13;
case COMP_E_INPUT14:
return CEIPSEL_14;
case COMP_E_INPUT15:
return CEIPSEL_15;
case COMP_E_VREF:
return COMP_E_VREF;
default:
return 0x11;
}
}
bool Comp_E_init(uint16_t baseAddress, Comp_E_initParam *param)
{
uint8_t positiveTerminalInput = __getRegisterSettingForInput(
param->posTerminalInput);
uint8_t negativeTerminalInput = __getRegisterSettingForInput(
param->negTerminalInput);
bool retVal = STATUS_SUCCESS;
//Reset COMPE Control 1 & Interrupt Registers for initialization (OFS_CECTL3
//is not reset because it controls the input buffers of the analog signals
//and may cause parasitic effects if an analog signal is still attached and
//the buffer is re-enabled
HWREG16(baseAddress + OFS_CECTL0) &= 0x0000;
HWREG16(baseAddress + OFS_CEINT) &= 0x0000;
//Clear reference voltage and reference source
HWREG16(baseAddress + OFS_CECTL2) &= ~(CERS_3 | CEREFL_3);
//Set the Positive Terminal
if (COMP_E_VREF != positiveTerminalInput){
//Enable Positive Terminal Input Mux and Set it to the appropriate input
HWREG16(baseAddress + OFS_CECTL0) |= CEIPEN + positiveTerminalInput;
//Disable the input buffer
HWREG16(baseAddress + OFS_CECTL3) |= (1 << positiveTerminalInput);
} else {
//Reset and Set COMPE Control 2 Register
HWREG16(baseAddress + OFS_CECTL2) &= ~(CERSEL); //Set Vref to go to (+)terminal
}
//Set the Negative Terminal
if (COMP_E_VREF != negativeTerminalInput){
//Enable Negative Terminal Input Mux and Set it to the appropriate input
HWREG16(baseAddress + OFS_CECTL0) |= CEIMEN + (negativeTerminalInput << 8);
//Disable the input buffer
HWREG16(baseAddress + OFS_CECTL3) |= (1 << negativeTerminalInput);
} else {
//Reset and Set COMPE Control 2 Register
HWREG16(baseAddress + OFS_CECTL2) |= CERSEL; //Set Vref to go to (-) terminal
}
//Reset and Set COMPE Control 1 Register
HWREG16(baseAddress + OFS_CECTL1) =
+ param->outputFilterEnableAndDelayLevel //Set the filter enable bit and delay
+ param->invertedOutputPolarity; //Set the polarity of the output
return (retVal);
}
void Comp_E_setReferenceVoltage (uint16_t baseAddress,
uint16_t supplyVoltageReferenceBase,
uint16_t lowerLimitSupplyVoltageFractionOf32,
uint16_t upperLimitSupplyVoltageFractionOf32)
{
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEMRVS); //Set to VREF0
//Reset COMPE Control 2 Bits (Except for CERSEL which is set in Comp_Init() )
HWREG16(baseAddress + OFS_CECTL2) &= CERSEL;
//Set Voltage Source (Vcc | Vref, resistor ladder or not)
if (COMP_E_REFERENCE_AMPLIFIER_DISABLED == supplyVoltageReferenceBase){
HWREG16(baseAddress + OFS_CECTL2) |= CERS_1; //Vcc with resistor ladder
} else if (lowerLimitSupplyVoltageFractionOf32 == 32){
//If the lower limit is 32, then the upper limit has to be 32 due to the
//assertion that upper must be >= to the lower limit. If the numerator is
//equal to 32, then the equation would be 32/32 == 1, therefore no resistor
//ladder is needed
HWREG16(baseAddress + OFS_CECTL2) |= CERS_3; //Vref, no resistor ladder
} else {
HWREG16(baseAddress + OFS_CECTL2) |= CERS_2; //Vref with resistor ladder
}
//Set COMPE Control 2 Register
HWREG16(baseAddress + OFS_CECTL2) |=
supplyVoltageReferenceBase //Set Supply Voltage Base
+ ((upperLimitSupplyVoltageFractionOf32 - 1) << 8) //Set Supply Voltage Num.
+ (lowerLimitSupplyVoltageFractionOf32 - 1);
}
void Comp_E_setReferenceAccuracy (uint16_t baseAddress,
uint16_t referenceAccuracy)
{
HWREG16(baseAddress + OFS_CECTL2) &= ~(CEREFACC);
HWREG16(baseAddress + OFS_CECTL2) |= referenceAccuracy;
}
void Comp_E_setPowerMode (uint16_t baseAddress,
uint16_t powerMode)
{
HWREG16(baseAddress + OFS_CECTL1) &= ~(COMP_E_NORMAL_MODE | COMP_E_ULTRA_LOW_POWER_MODE);
HWREG16(baseAddress + OFS_CECTL1) |= powerMode;
}
void Comp_E_enableInterrupt (uint16_t baseAddress,
uint16_t interruptMask)
{
//Set the Interrupt enable bit
HWREG16(baseAddress + OFS_CEINT) |= interruptMask;
}
void Comp_E_disableInterrupt (uint16_t baseAddress,
uint16_t interruptMask)
{
HWREG16(baseAddress + OFS_CEINT) &= ~(interruptMask);
}
void Comp_E_clearInterrupt (uint16_t baseAddress,
uint16_t interruptFlagMask)
{
HWREG16(baseAddress + OFS_CEINT) &= ~(interruptFlagMask);
}
uint8_t Comp_E_getInterruptStatus (uint16_t baseAddress,
uint16_t interruptFlagMask)
{
return ( HWREG16(baseAddress + OFS_CEINT) & interruptFlagMask );
}
void Comp_E_setInterruptEdgeDirection (uint16_t baseAddress,
uint16_t edgeDirection)
{
//Set the edge direction that will trigger an interrupt
if (COMP_E_RISINGEDGE == edgeDirection){
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEIES);
} else if (COMP_E_FALLINGEDGE == edgeDirection){
HWREG16(baseAddress + OFS_CECTL1) |= CEIES;
}
}
void Comp_E_toggleInterruptEdgeDirection (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) ^= CEIES;
}
void Comp_E_enable (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) |= CEON;
}
void Comp_E_disable (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) &= ~(CEON);
}
void Comp_E_shortInputs (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) |= CESHORT;
}
void Comp_E_unshortInputs (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) &= ~(CESHORT);
}
void Comp_E_disableInputBuffer (uint16_t baseAddress,
uint16_t inputPort)
{
HWREG16(baseAddress + OFS_CECTL3) |= (inputPort);
}
void Comp_E_enableInputBuffer (uint16_t baseAddress, uint16_t inputPort)
{
HWREG16(baseAddress + OFS_CECTL3) &= ~(inputPort);
}
void Comp_E_swapIO (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_CECTL1) ^= CEEX; //Toggle CEEX bit
}
uint16_t Comp_E_outputValue (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_CECTL1) & CEOUT);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for comp_e_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// comp_e.h - Driver for the COMP_E Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_COMP_E_H__
#define __MSP430WARE_COMP_E_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_COMP_E__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the Comp_E_init() function as the param parameter.
//
//*****************************************************************************
typedef struct Comp_E_initParam {
//! Selects the input to the positive terminal.
//! \n Valid values are:
//! - \b COMP_E_INPUT0 [Default]
//! - \b COMP_E_INPUT1
//! - \b COMP_E_INPUT2
//! - \b COMP_E_INPUT3
//! - \b COMP_E_INPUT4
//! - \b COMP_E_INPUT5
//! - \b COMP_E_INPUT6
//! - \b COMP_E_INPUT7
//! - \b COMP_E_INPUT8
//! - \b COMP_E_INPUT9
//! - \b COMP_E_INPUT10
//! - \b COMP_E_INPUT11
//! - \b COMP_E_INPUT12
//! - \b COMP_E_INPUT13
//! - \b COMP_E_INPUT14
//! - \b COMP_E_INPUT15
//! - \b COMP_E_VREF
uint16_t posTerminalInput;
//! Selects the input to the negative terminal.
//! \n Valid values are:
//! - \b COMP_E_INPUT0 [Default]
//! - \b COMP_E_INPUT1
//! - \b COMP_E_INPUT2
//! - \b COMP_E_INPUT3
//! - \b COMP_E_INPUT4
//! - \b COMP_E_INPUT5
//! - \b COMP_E_INPUT6
//! - \b COMP_E_INPUT7
//! - \b COMP_E_INPUT8
//! - \b COMP_E_INPUT9
//! - \b COMP_E_INPUT10
//! - \b COMP_E_INPUT11
//! - \b COMP_E_INPUT12
//! - \b COMP_E_INPUT13
//! - \b COMP_E_INPUT14
//! - \b COMP_E_INPUT15
//! - \b COMP_E_VREF
uint16_t negTerminalInput;
//! Controls the output filter delay state, which is either off or enabled
//! with a specified delay level. This parameter is device specific and
//! delay levels should be found in the device's datasheet.
//! \n Valid values are:
//! - \b COMP_E_FILTEROUTPUT_OFF [Default]
//! - \b COMP_E_FILTEROUTPUT_DLYLVL1
//! - \b COMP_E_FILTEROUTPUT_DLYLVL2
//! - \b COMP_E_FILTEROUTPUT_DLYLVL3
//! - \b COMP_E_FILTEROUTPUT_DLYLVL4
uint8_t outputFilterEnableAndDelayLevel;
//! Controls if the output will be inverted or not
//! \n Valid values are:
//! - \b COMP_E_NORMALOUTPUTPOLARITY - indicates the output should be
//! normal
//! - \b COMP_E_INVERTEDOUTPUTPOLARITY - the output should be inverted
uint16_t invertedOutputPolarity;
} Comp_E_initParam;
//*****************************************************************************
//
// The following are values that can be passed to the
// outputFilterEnableAndDelayLevel parameter for functions: Comp_E_init(); the
// param parameter for functions: Comp_E_init().
//
//*****************************************************************************
#define COMP_E_FILTEROUTPUT_OFF 0x00
#define COMP_E_FILTEROUTPUT_DLYLVL1 (CEF + CEFDLY_0)
#define COMP_E_FILTEROUTPUT_DLYLVL2 (CEF + CEFDLY_1)
#define COMP_E_FILTEROUTPUT_DLYLVL3 (CEF + CEFDLY_2)
#define COMP_E_FILTEROUTPUT_DLYLVL4 (CEF + CEFDLY_3)
//*****************************************************************************
//
// The following are values that can be passed to the posTerminalInput
// parameter for functions: Comp_E_init(); the inputPort parameter for
// functions: Comp_E_disableInputBuffer(), and Comp_E_enableInputBuffer(); the
// param parameter for functions: Comp_E_init(), and Comp_E_init(); the
// negTerminalInput parameter for functions: Comp_E_init().
//
//*****************************************************************************
#define COMP_E_INPUT0 (0x01)
#define COMP_E_INPUT1 (0x02)
#define COMP_E_INPUT2 (0x04)
#define COMP_E_INPUT3 (0x08)
#define COMP_E_INPUT4 (0x10)
#define COMP_E_INPUT5 (0x20)
#define COMP_E_INPUT6 (0x40)
#define COMP_E_INPUT7 (0x80)
#define COMP_E_INPUT8 (0x100)
#define COMP_E_INPUT9 (0x200)
#define COMP_E_INPUT10 (0x400)
#define COMP_E_INPUT11 (0x800)
#define COMP_E_INPUT12 (0x1000)
#define COMP_E_INPUT13 (0x2000)
#define COMP_E_INPUT14 (0x4000)
#define COMP_E_INPUT15 (0x8000)
#define COMP_E_VREF (0x9F)
//*****************************************************************************
//
// The following are values that can be passed to the invertedOutputPolarity
// parameter for functions: Comp_E_init(); the param parameter for functions:
// Comp_E_init().
//
//*****************************************************************************
#define COMP_E_NORMALOUTPUTPOLARITY (!(CEOUTPOL))
#define COMP_E_INVERTEDOUTPUTPOLARITY (CEOUTPOL)
//*****************************************************************************
//
// The following are values that can be passed to the
// supplyVoltageReferenceBase parameter for functions:
// Comp_E_setReferenceVoltage().
//
//*****************************************************************************
#define COMP_E_REFERENCE_AMPLIFIER_DISABLED (CEREFL_0)
#define COMP_E_VREFBASE1_2V (CEREFL_1)
#define COMP_E_VREFBASE2_0V (CEREFL_2)
#define COMP_E_VREFBASE2_5V (CEREFL_3)
//*****************************************************************************
//
// The following are values that can be passed to the referenceAccuracy
// parameter for functions: Comp_E_setReferenceAccuracy().
//
//*****************************************************************************
#define COMP_E_ACCURACY_STATIC (!CEREFACC)
#define COMP_E_ACCURACY_CLOCKED (CEREFACC)
//*****************************************************************************
//
// The following are values that can be passed to the powerMode parameter for
// functions: Comp_E_setPowerMode().
//
//*****************************************************************************
#define COMP_E_HIGH_SPEED_MODE (CEPWRMD_0)
#define COMP_E_NORMAL_MODE (CEPWRMD_1)
#define COMP_E_ULTRA_LOW_POWER_MODE (CEPWRMD_2)
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: Comp_E_enableInterrupt(), and Comp_E_disableInterrupt().
//
//*****************************************************************************
#define COMP_E_OUTPUT_INTERRUPT (CEIE)
#define COMP_E_INVERTED_POLARITY_INTERRUPT (CEIIE)
#define COMP_E_READY_INTERRUPT (CERDYIE)
//*****************************************************************************
//
// The following are values that can be passed to the interruptFlagMask
// parameter for functions: Comp_E_clearInterrupt(), and
// Comp_E_getInterruptStatus() as well as returned by the
// Comp_E_getInterruptStatus() function.
//
//*****************************************************************************
#define COMP_E_OUTPUT_INTERRUPT_FLAG (CEIFG)
#define COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY (CEIIFG)
#define COMP_E_INTERRUPT_FLAG_READY (CERDYIFG)
//*****************************************************************************
//
// The following are values that can be passed to the edgeDirection parameter
// for functions: Comp_E_setInterruptEdgeDirection().
//
//*****************************************************************************
#define COMP_E_RISINGEDGE (!(CEIES))
#define COMP_E_FALLINGEDGE (CEIES)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the Comp_E_outputValue() function.
//
//*****************************************************************************
#define COMP_E_LOW (0x0)
#define COMP_E_HIGH (CEOUT)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Initializes the Comp_E Module.
//!
//! Upon successful initialization of the Comp_E module, this function will
//! have reset all necessary register bits and set the given options in the
//! registers. To actually use the Comp_E module, the Comp_E_enable() function
//! must be explicitly called before use. If a Reference Voltage is set to a
//! terminal, the Voltage should be set using the setReferenceVoltage()
//! function.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param param is the pointer to struct for initialization.
//!
//! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process
//
//*****************************************************************************
extern bool Comp_E_init(uint16_t baseAddress,
Comp_E_initParam *param);
//*****************************************************************************
//
//! \brief Generates a Reference Voltage to the terminal selected during
//! initialization.
//!
//! Use this function to generate a voltage to serve as a reference to the
//! terminal selected at initialization. The voltage is determined by the
//! equation: Vbase * (Numerator / 32). If the upper and lower limit voltage
//! numerators are equal, then a static reference is defined, whereas they are
//! different then a hysteresis effect is generated.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param supplyVoltageReferenceBase decides the source and max amount of
//! Voltage that can be used as a reference.
//! Valid values are:
//! - \b COMP_E_REFERENCE_AMPLIFIER_DISABLED
//! - \b COMP_E_VREFBASE1_2V
//! - \b COMP_E_VREFBASE2_0V
//! - \b COMP_E_VREFBASE2_5V
//! \n Modified bits are \b CEREFL of \b CECTL2 register.
//! \param lowerLimitSupplyVoltageFractionOf32 is the numerator of the equation
//! to generate the reference voltage for the lower limit reference
//! voltage.
//! \n Modified bits are \b CEREF0 of \b CECTL2 register.
//! \param upperLimitSupplyVoltageFractionOf32 is the numerator of the equation
//! to generate the reference voltage for the upper limit reference
//! voltage.
//! \n Modified bits are \b CEREF1 of \b CECTL2 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_setReferenceVoltage(uint16_t baseAddress,
uint16_t supplyVoltageReferenceBase,
uint16_t lowerLimitSupplyVoltageFractionOf32,
uint16_t upperLimitSupplyVoltageFractionOf32);
//*****************************************************************************
//
//! \brief Sets the reference accuracy
//!
//! The reference accuracy is set to the desired setting. Clocked is better for
//! low power operations but has a lower accuracy.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param referenceAccuracy is the reference accuracy setting of the COMP_E.
//! Valid values are:
//! - \b COMP_E_ACCURACY_STATIC
//! - \b COMP_E_ACCURACY_CLOCKED - for low power / low accuracy
//! \n Modified bits are \b CEREFACC of \b CECTL2 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_setReferenceAccuracy(uint16_t baseAddress,
uint16_t referenceAccuracy);
//*****************************************************************************
//
//! \brief Sets the power mode
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param powerMode decides the power mode
//! Valid values are:
//! - \b COMP_E_HIGH_SPEED_MODE
//! - \b COMP_E_NORMAL_MODE
//! - \b COMP_E_ULTRA_LOW_POWER_MODE
//! \n Modified bits are \b CEPWRMD of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_setPowerMode(uint16_t baseAddress,
uint16_t powerMode);
//*****************************************************************************
//
//! \brief Enables selected Comp_E interrupt sources.
//!
//! Enables the indicated Comp_E interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. <b>Does not clear interrupt flags.</b>
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_OUTPUT_INTERRUPT - Output interrupt
//! - \b COMP_E_INVERTED_POLARITY_INTERRUPT - Output interrupt inverted
//! polarity
//! - \b COMP_E_READY_INTERRUPT - Ready interrupt
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_enableInterrupt(uint16_t baseAddress,
uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Disables selected Comp_E interrupt sources.
//!
//! Disables the indicated Comp_E interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_OUTPUT_INTERRUPT - Output interrupt
//! - \b COMP_E_INVERTED_POLARITY_INTERRUPT - Output interrupt inverted
//! polarity
//! - \b COMP_E_READY_INTERRUPT - Ready interrupt
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_disableInterrupt(uint16_t baseAddress,
uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Clears Comp_E interrupt flags.
//!
//! The Comp_E interrupt source is cleared, so that it no longer asserts. The
//! highest interrupt flag is automatically cleared when an interrupt vector
//! generator is used.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param interruptFlagMask
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG - Output interrupt flag
//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY - Output interrupt flag
//! inverted polarity
//! - \b COMP_E_INTERRUPT_FLAG_READY - Ready interrupt flag
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_clearInterrupt(uint16_t baseAddress,
uint16_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Gets the current Comp_E interrupt status.
//!
//! This returns the interrupt status for the Comp_E module based on which flag
//! is passed.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param interruptFlagMask
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG - Output interrupt flag
//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY - Output interrupt flag
//! inverted polarity
//! - \b COMP_E_INTERRUPT_FLAG_READY - Ready interrupt flag
//!
//! \return Logical OR of any of the following:
//! - \b COMP_E_OUTPUT_INTERRUPT_FLAG Output interrupt flag
//! - \b COMP_E_INTERRUPT_FLAG_INVERTED_POLARITY Output interrupt flag
//! inverted polarity
//! - \b COMP_E_INTERRUPT_FLAG_READY Ready interrupt flag
//! \n indicating the status of the masked flags
//
//*****************************************************************************
extern uint8_t Comp_E_getInterruptStatus(uint16_t baseAddress,
uint16_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Explicitly sets the edge direction that would trigger an interrupt.
//!
//! This function will set which direction the output will have to go, whether
//! rising or falling, to generate an interrupt based on a non-inverted
//! interrupt.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param edgeDirection determines which direction the edge would have to go
//! to generate an interrupt based on the non-inverted interrupt flag.
//! Valid values are:
//! - \b COMP_E_RISINGEDGE [Default] - sets the bit to generate an
//! interrupt when the output of the Comp_E rises from LOW to HIGH if
//! the normal interrupt bit is set(and HIGH to LOW if the inverted
//! interrupt enable bit is set).
//! - \b COMP_E_FALLINGEDGE - sets the bit to generate an interrupt when
//! the output of the Comp_E falls from HIGH to LOW if the normal
//! interrupt bit is set(and LOW to HIGH if the inverted interrupt
//! enable bit is set).
//! \n Modified bits are \b CEIES of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_setInterruptEdgeDirection(uint16_t baseAddress,
uint16_t edgeDirection);
//*****************************************************************************
//
//! \brief Toggles the edge direction that would trigger an interrupt.
//!
//! This function will toggle which direction the output will have to go,
//! whether rising or falling, to generate an interrupt based on a non-inverted
//! interrupt. If the direction was rising, it is now falling, if it was
//! falling, it is now rising.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! Modified bits are \b CEIES of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_toggleInterruptEdgeDirection(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Turns on the Comp_E module.
//!
//! This function sets the bit that enables the operation of the Comp_E module.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_enable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Turns off the Comp_E module.
//!
//! This function clears the CEON bit disabling the operation of the Comp_E
//! module, saving from excess power consumption.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! Modified bits are \b CEON of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_disable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Shorts the two input pins chosen during initialization.
//!
//! This function sets the bit that shorts the devices attached to the input
//! pins chosen from the initialization of the Comp_E.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! Modified bits are \b CESHORT of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_shortInputs(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the short of the two input pins chosen during
//! initialization.
//!
//! This function clears the bit that shorts the devices attached to the input
//! pins chosen from the initialization of the Comp_E.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! Modified bits are \b CESHORT of \b CECTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_unshortInputs(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the input buffer of the selected input port to effectively
//! allow for analog signals.
//!
//! This function sets the bit to disable the buffer for the specified input
//! port to allow for analog signals from any of the Comp_E input pins. This
//! bit is automatically set when the input is initialized to be used with the
//! Comp_E module. This function should be used whenever an analog input is
//! connected to one of these pins to prevent parasitic voltage from causing
//! unexpected results.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param inputPort is the port in which the input buffer will be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_INPUT0 [Default]
//! - \b COMP_E_INPUT1
//! - \b COMP_E_INPUT2
//! - \b COMP_E_INPUT3
//! - \b COMP_E_INPUT4
//! - \b COMP_E_INPUT5
//! - \b COMP_E_INPUT6
//! - \b COMP_E_INPUT7
//! - \b COMP_E_INPUT8
//! - \b COMP_E_INPUT9
//! - \b COMP_E_INPUT10
//! - \b COMP_E_INPUT11
//! - \b COMP_E_INPUT12
//! - \b COMP_E_INPUT13
//! - \b COMP_E_INPUT14
//! - \b COMP_E_INPUT15
//! - \b COMP_E_VREF
//! \n Modified bits are \b CEPDx of \b CECTL3 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_disableInputBuffer(uint16_t baseAddress,
uint16_t inputPort);
//*****************************************************************************
//
//! \brief Enables the input buffer of the selected input port to allow for
//! digital signals.
//!
//! This function clears the bit to enable the buffer for the specified input
//! port to allow for digital signals from any of the Comp_E input pins. This
//! should not be reset if there is an analog signal connected to the specified
//! input pin to prevent from unexpected results.
//!
//! \param baseAddress is the base address of the COMP_E module.
//! \param inputPort is the port in which the input buffer will be enabled.
//! Mask value is the logical OR of any of the following:
//! - \b COMP_E_INPUT0 [Default]
//! - \b COMP_E_INPUT1
//! - \b COMP_E_INPUT2
//! - \b COMP_E_INPUT3
//! - \b COMP_E_INPUT4
//! - \b COMP_E_INPUT5
//! - \b COMP_E_INPUT6
//! - \b COMP_E_INPUT7
//! - \b COMP_E_INPUT8
//! - \b COMP_E_INPUT9
//! - \b COMP_E_INPUT10
//! - \b COMP_E_INPUT11
//! - \b COMP_E_INPUT12
//! - \b COMP_E_INPUT13
//! - \b COMP_E_INPUT14
//! - \b COMP_E_INPUT15
//! - \b COMP_E_VREF
//! \n Modified bits are \b CEPDx of \b CECTL3 register.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_enableInputBuffer(uint16_t baseAddress,
uint16_t inputPort);
//*****************************************************************************
//
//! \brief Toggles the bit that swaps which terminals the inputs go to, while
//! also inverting the output of the Comp_E.
//!
//! This function toggles the bit that controls which input goes to which
//! terminal. After initialization, this bit is set to 0, after toggling it
//! once the inputs are routed to the opposite terminal and the output is
//! inverted.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! \return None
//
//*****************************************************************************
extern void Comp_E_swapIO(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the output value of the Comp_E module.
//!
//! Returns the output value of the Comp_E module.
//!
//! \param baseAddress is the base address of the COMP_E module.
//!
//! \return One of the following:
//! - \b COMP_E_LOW
//! - \b COMP_E_HIGH
//! \n indicating the output value of the Comp_E module
//
//*****************************************************************************
extern uint16_t Comp_E_outputValue(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_COMP_E_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// crc.c - Driver for the crc Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup crc_api crc
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_CRC__
#include "crc.h"
#include <assert.h>
void CRC_setSeed (uint16_t baseAddress,
uint16_t seed)
{
HWREG16(baseAddress + OFS_CRCINIRES) = seed;
}
void CRC_set16BitData (uint16_t baseAddress,
uint16_t dataIn)
{
HWREG16(baseAddress + OFS_CRCDI) = dataIn;
}
void CRC_set8BitData (uint16_t baseAddress,
uint8_t dataIn)
{
HWREG8(baseAddress + OFS_CRCDI_L) = dataIn;
}
void CRC_set16BitDataReversed (uint16_t baseAddress,
uint16_t dataIn)
{
HWREG16(baseAddress + OFS_CRCDIRB) = dataIn;
}
void CRC_set8BitDataReversed (uint16_t baseAddress,
uint8_t dataIn)
{
HWREG8(baseAddress + OFS_CRCDIRB_L) = dataIn;
}
uint16_t CRC_getData (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_CRCDI) );
}
uint16_t CRC_getResult (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_CRCINIRES) );
}
uint16_t CRC_getResultBitsReversed (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_CRCRESR) );
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for crc_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// crc.h - Driver for the CRC Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_CRC_H__
#define __MSP430WARE_CRC_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_CRC__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the seed for the CRC.
//!
//! This function sets the seed for the CRC to begin generating a signature
//! with the given seed and all passed data. Using this function resets the CRC
//! signature.
//!
//! \param baseAddress is the base address of the CRC module.
//! \param seed is the seed for the CRC to start generating a signature from.
//! \n Modified bits are \b CRCINIRES of \b CRCINIRES register.
//!
//! \return None
//
//*****************************************************************************
extern void CRC_setSeed(uint16_t baseAddress,
uint16_t seed);
//*****************************************************************************
//
//! \brief Sets the 16 bit data to add into the CRC module to generate a new
//! signature.
//!
//! This function sets the given data into the CRC module to generate the new
//! signature from the current signature and new data.
//!
//! \param baseAddress is the base address of the CRC module.
//! \param dataIn is the data to be added, through the CRC module, to the
//! signature.
//! \n Modified bits are \b CRCDI of \b CRCDI register.
//!
//! \return None
//
//*****************************************************************************
extern void CRC_set16BitData(uint16_t baseAddress,
uint16_t dataIn);
//*****************************************************************************
//
//! \brief Sets the 8 bit data to add into the CRC module to generate a new
//! signature.
//!
//! This function sets the given data into the CRC module to generate the new
//! signature from the current signature and new data.
//!
//! \param baseAddress is the base address of the CRC module.
//! \param dataIn is the data to be added, through the CRC module, to the
//! signature.
//! \n Modified bits are \b CRCDI of \b CRCDI register.
//!
//! \return None
//
//*****************************************************************************
extern void CRC_set8BitData(uint16_t baseAddress,
uint8_t dataIn);
//*****************************************************************************
//
//! \brief Translates the 16 bit data by reversing the bits in each byte and
//! then sets this data to add into the CRC module to generate a new signature.
//!
//! This function first reverses the bits in each byte of the data and then
//! generates the new signature from the current signature and new translated
//! data.
//!
//! \param baseAddress is the base address of the CRC module.
//! \param dataIn is the data to be added, through the CRC module, to the
//! signature.
//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
//!
//! \return None
//
//*****************************************************************************
extern void CRC_set16BitDataReversed(uint16_t baseAddress,
uint16_t dataIn);
//*****************************************************************************
//
//! \brief Translates the 8 bit data by reversing the bits in each byte and
//! then sets this data to add into the CRC module to generate a new signature.
//!
//! This function first reverses the bits in each byte of the data and then
//! generates the new signature from the current signature and new translated
//! data.
//!
//! \param baseAddress is the base address of the CRC module.
//! \param dataIn is the data to be added, through the CRC module, to the
//! signature.
//! \n Modified bits are \b CRCDIRB of \b CRCDIRB register.
//!
//! \return None
//
//*****************************************************************************
extern void CRC_set8BitDataReversed(uint16_t baseAddress,
uint8_t dataIn);
//*****************************************************************************
//
//! \brief Returns the value currently in the Data register.
//!
//! This function returns the value currently in the data register. If set in
//! byte bits reversed format, then the translated data would be returned.
//!
//! \param baseAddress is the base address of the CRC module.
//!
//! \return The value currently in the data register
//
//*****************************************************************************
extern uint16_t CRC_getData(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the value pf the Signature Result.
//!
//! This function returns the value of the signature result generated by the
//! CRC.
//!
//! \param baseAddress is the base address of the CRC module.
//!
//! \return The value currently in the data register
//
//*****************************************************************************
extern uint16_t CRC_getResult(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the bit-wise reversed format of the Signature Result.
//!
//! This function returns the bit-wise reversed format of the Signature Result.
//!
//! \param baseAddress is the base address of the CRC module.
//!
//! \return The bit-wise reversed format of the Signature Result
//
//*****************************************************************************
extern uint16_t CRC_getResultBitsReversed(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_CRC_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// crc32.c - Driver for the crc32 Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup crc32_api crc32
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_CRC32__
#include "crc32.h"
#include <assert.h>
void CRC32_setSeed(uint32_t seed, uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
HWREG16(CRC32_BASE + OFS_CRC16INIRESW0) = seed;
}
else
{
HWREG16(CRC32_BASE + OFS_CRC32INIRESW1) = ((seed & 0xFFFF0000)
>> 16);
HWREG16(CRC32_BASE + OFS_CRC32INIRESW0) = (seed & 0xFFFF);
}
}
void CRC32_set8BitData(uint8_t dataIn, uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
HWREG8(CRC32_BASE + OFS_CRC16DIW0_L) = dataIn;
}
else {
HWREG8(CRC32_BASE + OFS_CRC32DIW0_L) = dataIn;
}
}
void CRC32_set16BitData(uint16_t dataIn, uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
HWREG16(CRC32_BASE + OFS_CRC16DIW0) = dataIn;
}
else {
HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn;
}
}
void CRC32_set32BitData(uint32_t dataIn)
{
HWREG16(CRC32_BASE + OFS_CRC32DIW0) = dataIn & 0xFFFF;
HWREG16(CRC32_BASE + OFS_CRC32DIW1) = (uint16_t) ((dataIn & 0xFFFF0000)
>> 16);
}
void CRC32_set8BitDataReversed(uint8_t dataIn, uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
HWREG8(CRC32_BASE + OFS_CRC16DIRBW0_L) = dataIn;
} else {
HWREG8(CRC32_BASE + OFS_CRC32DIRBW1_L) = dataIn;
}
}
void CRC32_set16BitDataReversed(uint16_t dataIn, uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
HWREG16(CRC32_BASE + OFS_CRC16DIRBW0) = dataIn;
} else {
HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn;
}
}
void CRC32_set32BitDataReversed(uint32_t dataIn)
{
HWREG16(CRC32_BASE + OFS_CRC32DIRBW1) = dataIn & 0xFFFF;
HWREG16(CRC32_BASE + OFS_CRC32DIRBW0) = (uint16_t) ((dataIn & 0xFFFF0000)
>> 16);
}
uint32_t CRC32_getResult(uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
return (HWREG16(CRC32_BASE + OFS_CRC16INIRESW0) );
}
else
{
uint32_t result = 0;
result = HWREG16(CRC32_BASE + OFS_CRC32INIRESW1);
result = (result << 16);
result |= HWREG16(CRC32_BASE + OFS_CRC32INIRESW0);
return (result);
}
}
uint32_t CRC32_getResultReversed(uint8_t crcMode)
{
if (CRC16_MODE == crcMode) {
return (HWREG16(CRC32_BASE + OFS_CRC16RESRW0) );
}
else
{
uint32_t result = 0;
result = HWREG16(CRC32_BASE + OFS_CRC32RESRW0);
result = (result << 16);
result |= HWREG16(CRC32_BASE + OFS_CRC32RESRW1);
return (result);
}
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for crc32_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// crc32.h - Driver for the CRC32 Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_CRC32_H__
#define __MSP430WARE_CRC32_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_CRC32__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the crcMode parameter for
// functions: CRC32_setSeed(), CRC32_getResult(), CRC32_getResultReversed(),
// CRC32_set8BitDataReversed(), CRC32_set16BitDataReversed(),
// CRC32_set8BitData(), and CRC32_set16BitData().
//
//*****************************************************************************
#define CRC32_MODE (0x01)
#define CRC16_MODE (0x00)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the seed for the CRC32.
//!
//! This function sets the seed for the CRC32 to begin generating a signature
//! with the given seed and all passed data. Using this function resets the
//! CRC32 signature.
//!
//! \param seed is the seed for the CRC32 to start generating a signature from.
//! \n Modified bits are \b CRC32INIRESL0 of \b CRC32INIRESL0 register.
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_setSeed(uint32_t seed,
uint8_t crcMode);
//*****************************************************************************
//
//! \brief Sets the 8 bit data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function sets the given data into the CRC32 module to generate the new
//! signature from the current signature and new data. Bit 0 is treated as the
//! LSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set8BitData(uint8_t dataIn,
uint8_t crcMode);
//*****************************************************************************
//
//! \brief Sets the 16 bit data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function sets the given data into the CRC32 module to generate the new
//! signature from the current signature and new data. Bit 0 is treated as the
//! LSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set16BitData(uint16_t dataIn,
uint8_t crcMode);
//*****************************************************************************
//
//! \brief Sets the 32 bit data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function sets the given data into the CRC32 module to generate the new
//! signature from the current signature and new data. Bit 0 is treated as the
//! LSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set32BitData(uint32_t dataIn);
//*****************************************************************************
//
//! \brief Translates the data by reversing the bits in each 8 bit data and
//! then sets this data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function first reverses the bits in each byte of the data and then
//! generates the new signature from the current signature and new translated
//! data. Bit 0 is treated as the MSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set8BitDataReversed(uint8_t dataIn,
uint8_t crcMode);
//*****************************************************************************
//
//! \brief Translates the data by reversing the bits in each 16 bit data and
//! then sets this data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function first reverses the bits in each byte of the data and then
//! generates the new signature from the current signature and new translated
//! data. Bit 0 is treated as the MSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set16BitDataReversed(uint16_t dataIn,
uint8_t crcMode);
//*****************************************************************************
//
//! \brief Translates the data by reversing the bits in each 32 bit data and
//! then sets this data to add into the CRC32 module to generate a new
//! signature.
//!
//! This function first reverses the bits in each byte of the data and then
//! generates the new signature from the current signature and new translated
//! data. Bit 0 is treated as the MSB.
//!
//! \param dataIn is the data to be added, through the CRC32 module, to the
//! signature.
//!
//! \return None
//
//*****************************************************************************
extern void CRC32_set32BitDataReversed(uint32_t dataIn);
//*****************************************************************************
//
//! \brief Returns the value of the signature result.
//!
//! This function returns the value of the signature result generated by the
//! CRC32. Bit 0 is treated as LSB.
//!
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return The signature result
//
//*****************************************************************************
extern uint32_t CRC32_getResult(uint8_t crcMode);
//*****************************************************************************
//
//! \brief Returns the bit-wise reversed format of the 32 bit signature result.
//!
//! This function returns the bit-wise reversed format of the signature result.
//! Bit 0 is treated as MSB.
//!
//! \param crcMode selects the mode of operation for the CRC32
//! Valid values are:
//! - \b CRC32_MODE - 32 Bit Mode
//! - \b CRC16_MODE - 16 Bit Mode
//!
//! \return The bit-wise reversed format of the signature result
//
//*****************************************************************************
extern uint32_t CRC32_getResultReversed(uint8_t crcMode);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_CRC32_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// cs.c - Driver for the cs Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup cs_api cs
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#if defined(__MSP430_HAS_CS__) || defined(__MSP430_HAS_SFR__)
#include "cs.h"
#include <assert.h>
//*****************************************************************************
//
// The following value is used by CS_getACLK, CS_getSMCLK, CS_getMCLK to
// determine the operating frequency based on the available DCO frequencies.
//
//*****************************************************************************
#define CS_DCO_FREQ_1 1000000
#define CS_DCO_FREQ_2 2670000
#define CS_DCO_FREQ_3 3330000
#define CS_DCO_FREQ_4 4000000
#define CS_DCO_FREQ_5 5330000
#define CS_DCO_FREQ_6 6670000
#define CS_DCO_FREQ_7 8000000
#define CS_DCO_FREQ_8 16000000
#define CS_DCO_FREQ_9 20000000
#define CS_DCO_FREQ_10 24000000
//*****************************************************************************
//
// Internal very low power VLOCLK, low frequency oscillator with 10kHz typical
// frequency, internal low-power oscillator MODCLK with 5 MHz typical
// frequency and LFMODCLK is MODCLK divided by 128.
//
//*****************************************************************************
#define CS_VLOCLK_FREQUENCY 10000
#define CS_MODCLK_FREQUENCY 5000000
#define CS_LFMODCLK_FREQUENCY 39062
//*****************************************************************************
//
// The following value is used by CS_XT1Start, CS_bypassXT1,
// CS_XT1StartWithTimeout, CS_bypassXT1WithTimeout to properly set
// the XTS bit. This frequency threshold is specified in the User's Guide.
//
//*****************************************************************************
#define LFXT_FREQUENCY_THRESHOLD 50000
//*****************************************************************************
//
// LFXT crystal frequency. Should be set with
// CS_externalClockSourceInit if LFXT is used and user intends to invoke
// CS_getSMCLK, CS_getMCLK, CS_getACLK and
// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,
// CS_LFXTByPassWithTimeout.
//
//*****************************************************************************
static uint32_t privateLFXTClockFrequency = 0;
//*****************************************************************************
//
// The HFXT crystal frequency. Should be set with
// CS_externalClockSourceInit if HFXT is used and user intends to invoke
// CS_getSMCLK, CS_getMCLK, CS_getACLK,
// CS_turnOnLFXT, CS_LFXTByPass, CS_turnOnLFXTWithTimeout,
// CS_LFXTByPassWithTimeout.
//
//*****************************************************************************
static uint32_t privateHFXTClockFrequency = 0;
static uint32_t privateCSASourceClockFromDCO (uint8_t clockdivider)
{
uint32_t CLKFrequency = 0;
if (HWREG16(CS_BASE + OFS_CSCTL1)& DCORSEL) {
switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7) {
case DCOFSEL_0:
CLKFrequency=CS_DCO_FREQ_1/clockdivider;
break;
case DCOFSEL_1:
CLKFrequency=CS_DCO_FREQ_5/clockdivider;
break;
case DCOFSEL_2:
CLKFrequency=CS_DCO_FREQ_6/clockdivider;
break;
case DCOFSEL_3:
CLKFrequency=CS_DCO_FREQ_7/clockdivider;
break;
case DCOFSEL_4:
CLKFrequency=CS_DCO_FREQ_8/clockdivider;
break;
case DCOFSEL_5:
CLKFrequency=CS_DCO_FREQ_9/clockdivider;
break;
case DCOFSEL_6:
case DCOFSEL_7:
CLKFrequency=CS_DCO_FREQ_10/clockdivider;
break;
default:
CLKFrequency=0;
break;
}
}
else {
switch(HWREG16(CS_BASE + OFS_CSCTL1) & DCOFSEL_7) {
case DCOFSEL_0:
CLKFrequency=CS_DCO_FREQ_1/clockdivider;
break;
case DCOFSEL_1:
CLKFrequency=CS_DCO_FREQ_2/clockdivider;
break;
case DCOFSEL_2:
CLKFrequency=CS_DCO_FREQ_3/clockdivider;
break;
case DCOFSEL_3:
CLKFrequency=CS_DCO_FREQ_4/clockdivider;
break;
case DCOFSEL_4:
CLKFrequency=CS_DCO_FREQ_5/clockdivider;
break;
case DCOFSEL_5:
CLKFrequency=CS_DCO_FREQ_6/clockdivider;
break;
case DCOFSEL_6:
case DCOFSEL_7:
CLKFrequency=CS_DCO_FREQ_7/clockdivider;
break;
default:
CLKFrequency=0;
break;
}
}
return (CLKFrequency);
}
static uint32_t privateCSAComputeCLKFrequency (uint16_t CLKSource,
uint16_t CLKSourceDivider
)
{
uint32_t CLKFrequency = 0;
uint8_t CLKSourceFrequencyDivider = 1;
uint8_t i = 0;
//Determine Frequency divider
for ( i = 0; i < CLKSourceDivider; i++) {
CLKSourceFrequencyDivider *= 2;
}
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Determine clock source based on CLKSource
switch (CLKSource) {
//If LFXT is selected as clock source
case SELM__LFXTCLK:
CLKFrequency = (privateLFXTClockFrequency /
CLKSourceFrequencyDivider);
//Check if LFXTOFFG is not set. If fault flag is set
//VLO is used as source clock
if (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) {
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
//Clear OFIFG fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
if (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) {
CLKFrequency = CS_LFMODCLK_FREQUENCY;
}
}
break;
case SELM__VLOCLK:
CLKFrequency =
(CS_VLOCLK_FREQUENCY / CLKSourceFrequencyDivider);
break;
case SELM__LFMODOSC:
CLKFrequency =
(CS_LFMODCLK_FREQUENCY / CLKSourceFrequencyDivider);
break;
case SELM__DCOCLK:
CLKFrequency =
privateCSASourceClockFromDCO( CLKSourceFrequencyDivider);
break;
case SELM__MODOSC:
CLKFrequency =
(CS_MODCLK_FREQUENCY / CLKSourceFrequencyDivider);
break;
case SELM__HFXTCLK:
CLKFrequency =
(privateHFXTClockFrequency / CLKSourceFrequencyDivider);
if (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
HWREG8(CS_BASE + OFS_CSCTL5) &= ~HFXTOFFG;
//Clear OFIFG fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
if (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
CLKFrequency = CS_MODCLK_FREQUENCY;
}
break;
}
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (CLKFrequency);
}
void CS_setExternalClockSource (uint32_t LFXTCLK_frequency,
uint32_t HFXTCLK_frequency
)
{
privateLFXTClockFrequency = LFXTCLK_frequency;
privateHFXTClockFrequency = HFXTCLK_frequency;
}
void CS_initClockSignal (uint8_t selectedClockSignal,
uint16_t clockSource,
uint16_t clockSourceDivider
)
{
//Verify User has selected a valid Frequency divider
assert(
(CS_CLOCK_DIVIDER_1 == clockSourceDivider) ||
(CS_CLOCK_DIVIDER_2 == clockSourceDivider) ||
(CS_CLOCK_DIVIDER_4 == clockSourceDivider) ||
(CS_CLOCK_DIVIDER_8 == clockSourceDivider) ||
(CS_CLOCK_DIVIDER_16 == clockSourceDivider) ||
(CS_CLOCK_DIVIDER_32 == clockSourceDivider)
);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
uint16_t temp = HWREG16(CS_BASE + OFS_CSCTL3);
switch (selectedClockSignal) {
case CS_ACLK:
assert(
(CS_LFXTCLK_SELECT == clockSource) ||
(CS_VLOCLK_SELECT == clockSource) ||
(CS_LFMODOSC_SELECT == clockSource)
);
clockSourceDivider = clockSourceDivider << 8;
clockSource = clockSource << 8;
HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELA_7);
HWREG16(CS_BASE + OFS_CSCTL2) |= (clockSource);
HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVA0 + DIVA1 + DIVA2) |
clockSourceDivider;
break;
case CS_SMCLK:
assert(
(CS_LFXTCLK_SELECT == clockSource) ||
(CS_VLOCLK_SELECT == clockSource) ||
(CS_DCOCLK_SELECT == clockSource) ||
(CS_HFXTCLK_SELECT == clockSource) ||
(CS_LFMODOSC_SELECT== clockSource) ||
(CS_MODOSC_SELECT == clockSource)
);
clockSource = clockSource << 4;
clockSourceDivider = clockSourceDivider << 4;
HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELS_7);
HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVS0 + DIVS1 + DIVS2) |
clockSourceDivider;
break;
case CS_MCLK:
assert(
(CS_LFXTCLK_SELECT == clockSource) ||
(CS_VLOCLK_SELECT == clockSource) ||
(CS_DCOCLK_SELECT == clockSource) ||
(CS_HFXTCLK_SELECT == clockSource) ||
(CS_LFMODOSC_SELECT== clockSource) ||
(CS_MODOSC_SELECT == clockSource)
);
HWREG16(CS_BASE + OFS_CSCTL2) &= ~(SELM_7);
HWREG16(CS_BASE + OFS_CSCTL2) |= clockSource;
HWREG16(CS_BASE + OFS_CSCTL3) = temp & ~(DIVM0 + DIVM1 + DIVM2) |
clockSourceDivider;
break;
}
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_turnOnLFXT (uint16_t lfxtdrive
)
{
assert(privateLFXTClockFrequency != 0);
assert((lfxtdrive == CS_LFXT_DRIVE_0 ) ||
(lfxtdrive == CS_LFXT_DRIVE_1 ) ||
(lfxtdrive == CS_LFXT_DRIVE_2 ) ||
(lfxtdrive == CS_LFXT_DRIVE_3 ));
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch ON LFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;
//Highest drive setting for LFXTstartup
HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;
HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;
//Wait for Crystal to stabilize
while (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)
{
//Clear OSC flaut Flags fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
//Clear OFIFG fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
//Set requested Drive mode
HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
~(LFXTDRIVE_3)
) |
(lfxtdrive);
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_turnOffSMCLK(void)
{
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG16(CS_BASE + OFS_CSCTL4) |= SMCLKOFF;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_turnOnSMCLK(void)
{
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG16(CS_BASE + OFS_CSCTL4) &= ~SMCLKOFF;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_bypassLFXT (void)
{
//Verify user has set frequency of LFXT with SetExternalClockSource
assert(privateLFXTClockFrequency != 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);
//Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode
HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);
//Wait until LFXT stabilizes
while (HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG)
{
//Clear OSC flaut Flags fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
//Clear the global fault flag. In case the LFXT caused the global fault
//flag to get set this will clear the global error condition. If any
//error condition persists, global flag will get again.
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
bool CS_turnOnLFXTWithTimeout (uint16_t lfxtdrive,
uint32_t timeout
)
{
assert(privateLFXTClockFrequency != 0);
assert((lfxtdrive == CS_LFXT_DRIVE_0 ) ||
(lfxtdrive == CS_LFXT_DRIVE_1 ) ||
(lfxtdrive == CS_LFXT_DRIVE_2 ) ||
(lfxtdrive == CS_LFXT_DRIVE_3 ));
assert(timeout > 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch ON LFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTOFF;
//Highest drive setting for LFXTstartup
HWREG16(CS_BASE + OFS_CSCTL4_L) |= LFXTDRIVE1_L + LFXTDRIVE0_L;
HWREG16(CS_BASE + OFS_CSCTL4) &= ~LFXTBYPASS;
while ((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)
{
//Clear OSC fault Flags fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
//Clear the global fault flag. In case the LFXT caused the global fault
//flag to get set this will clear the global error condition. If any
//error condition persists, global flag will get again.
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
if(timeout) {
//Set requested Drive mode
HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
~(LFXTDRIVE_3)
) |
(lfxtdrive);
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (STATUS_SUCCESS);
}
else {
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (STATUS_FAIL);
}
}
bool CS_bypassLFXTWithTimeout (uint32_t timeout
)
{
assert(privateLFXTClockFrequency != 0);
assert(privateLFXTClockFrequency < LFXT_FREQUENCY_THRESHOLD);
assert(timeout > 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Set LFXT in LF mode Switch off LFXT oscillator and enable BYPASS mode
HWREG16(CS_BASE + OFS_CSCTL4) |= (LFXTBYPASS + LFXTOFF);
while ((HWREG8(CS_BASE + OFS_CSCTL5) & LFXTOFFG) && --timeout)
{
//Clear OSC fault Flags fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG);
//Clear the global fault flag. In case the LFXT caused the global fault
//flag to get set this will clear the global error condition. If any
//error condition persists, global flag will get again.
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
if (timeout) {
return (STATUS_SUCCESS);
}
else {
return (STATUS_FAIL);
}
}
void CS_turnOffLFXT (void)
{
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch off LFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) |= LFXTOFF;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_turnOnHFXT (uint16_t hfxtdrive
)
{
assert(privateHFXTClockFrequency != 0);
assert((hfxtdrive == CS_HFXT_DRIVE_4MHZ_8MHZ )||
(hfxtdrive == CS_HFXT_DRIVE_8MHZ_16MHZ )||
(hfxtdrive == CS_HFXT_DRIVE_16MHZ_24MHZ )||
(hfxtdrive == CS_HFXT_DRIVE_24MHZ_32MHZ ));
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch ON HFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;
//Disable HFXTBYPASS mode and Switch on HFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;
//If HFFrequency is (16, 24] MHz
if (privateHFXTClockFrequency > 16000000) {
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
}
//If HFFrequency is (8, 16] MHz
else if (privateHFXTClockFrequency > 8000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
}
//If HFFrequency is (4, 8] MHz
else if (privateHFXTClockFrequency > 4000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
}
//If HFFrequency is [0, 4] MHz
else {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
}
while (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
//Clear OSC fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
//Clear OFIFG fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
~(CS_HFXT_DRIVE_24MHZ_32MHZ)
) |
(hfxtdrive);
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_bypassHFXT (void)
{
//Verify user has initialized value of HFXTClock
assert(privateHFXTClockFrequency != 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch off HFXT oscillator and set it to BYPASS mode
HWREG16(CS_BASE + OFS_CSCTL4) |= ( HFXTBYPASS + HFXTOFF );
//If HFFrequency is (16, 24] MHz
if (privateHFXTClockFrequency > 16000000) {
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
}
//If HFFrequency is (8, 16] MHz
else if (privateHFXTClockFrequency > 8000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
}
//If HFFrequency is (4, 8] MHz
else if (privateHFXTClockFrequency > 4000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
}
//If HFFrequency is [0, 4] MHz
else {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
}
while (HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) {
//Clear OSC fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
//Clear OFIFG fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
bool CS_turnOnHFXTWithTimeout (uint16_t hfxtdrive,
uint32_t timeout
)
{
//Verify user has initialized value of HFXTClock
assert(privateHFXTClockFrequency != 0);
assert(timeout > 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch on HFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTOFF;
//Disable HFXTBYPASS mode
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFXTBYPASS;
//If HFFrequency is (16, 24] MHz
if (privateHFXTClockFrequency > 16000000) {
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
}
//If HFFrequency is (8, 16] MHz
else if (privateHFXTClockFrequency > 8000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
}
//If HFFrequency is (4, 8] MHz
else if (privateHFXTClockFrequency > 4000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
}
//If HFFrequency is [0, 4] MHz
else {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
}
while ((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)
{
//Clear OSC fault Flags fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
// Clear the global fault flag. In case the LFXT caused the global fault
// flag to get set this will clear the global error condition. If any
// error condition persists, global flag will get again.
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
if (timeout) {
//Set drive strength for HFXT
HWREG16(CS_BASE + OFS_CSCTL4) = ( HWREG16(CS_BASE + OFS_CSCTL4) &
~(CS_HFXT_DRIVE_24MHZ_32MHZ)
) |
(hfxtdrive);
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (STATUS_SUCCESS);
}
else {
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (STATUS_FAIL);
}
}
bool CS_bypassHFXTWithTimeout (uint32_t timeout
)
{
//Verify user has initialized value of HFXTClock
assert(privateHFXTClockFrequency != 0);
assert(timeout > 0);
// Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//If HFFrequency is (16, 24] MHz
if (privateHFXTClockFrequency > 16000000) {
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_3;
}
//If HFFrequency is (8, 16] MHz
else if (privateHFXTClockFrequency > 8000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_2;
}
//If HFFrequency is (4, 8] MHz
else if (privateHFXTClockFrequency > 4000000) {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
HWREG16(CS_BASE + OFS_CSCTL4) |= HFFREQ_1;
}
//If HFFrequency is [0, 4] MHz
else {
HWREG16(CS_BASE + OFS_CSCTL4) &= ~HFFREQ_3;
}
//Switch off HFXT oscillator and enable BYPASS mode
HWREG16(CS_BASE + OFS_CSCTL4) |= (HFXTBYPASS + HFXTOFF);
while ((HWREG8(CS_BASE + OFS_CSCTL5) & HFXTOFFG) && --timeout)
{
//Clear OSC fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(HFXTOFFG);
// Clear the global fault flag. In case the LFXT caused the global fault
// flag to get set this will clear the global error condition. If any
// error condition persists, global flag will get again.
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
}
// Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
if (timeout) {
return (STATUS_SUCCESS);
}
else {
return (STATUS_FAIL);
}
}
void CS_turnOffHFXT (void)
{
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Switch off HFXT oscillator
HWREG16(CS_BASE + OFS_CSCTL4) |= HFXTOFF;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_enableClockRequest (uint8_t selectClock
)
{
assert(
(CS_ACLK == selectClock )||
(CS_SMCLK == selectClock )||
(CS_MCLK == selectClock )||
(CS_MODOSC== selectClock ));
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG8(CS_BASE + OFS_CSCTL6) |= selectClock;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
void CS_disableClockRequest (uint8_t selectClock
)
{
assert(
(CS_ACLK == selectClock )||
(CS_SMCLK == selectClock )||
(CS_MCLK == selectClock )||
(CS_MODOSC== selectClock ));
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG8(CS_BASE + OFS_CSCTL6) &= ~selectClock;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
uint8_t CS_getFaultFlagStatus (uint8_t mask
)
{
assert(
(CS_HFXTOFFG == mask )||
(CS_LFXTOFFG == mask )
);
return (HWREG8(CS_BASE + OFS_CSCTL5) & mask);
}
void CS_clearFaultFlag (uint8_t mask
)
{
assert(
(CS_HFXTOFFG == mask )||
(CS_LFXTOFFG == mask )
);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG8(CS_BASE + OFS_CSCTL5) &= ~mask;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
uint32_t CS_getACLK (void)
{
//Find ACLK source
uint16_t ACLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELA_7);
ACLKSource = ACLKSource >> 8;
//Find ACLK frequency divider
uint16_t ACLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELA_7;
ACLKSourceDivider = ACLKSourceDivider >> 8;
return (privateCSAComputeCLKFrequency(
ACLKSource,
ACLKSourceDivider));
}
uint32_t CS_getSMCLK (void)
{
//Find SMCLK source
uint16_t SMCLKSource = HWREG8(CS_BASE + OFS_CSCTL2) & SELS_7;
SMCLKSource = SMCLKSource >> 4;
//Find SMCLK frequency divider
uint16_t SMCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELS_7;
SMCLKSourceDivider = SMCLKSourceDivider >> 4;
return (privateCSAComputeCLKFrequency(
SMCLKSource,
SMCLKSourceDivider )
);
}
uint32_t CS_getMCLK (void)
{
//Find MCLK source
uint16_t MCLKSource = (HWREG16(CS_BASE + OFS_CSCTL2) & SELM_7);
//Find MCLK frequency divider
uint16_t MCLKSourceDivider = HWREG16(CS_BASE + OFS_CSCTL3) & SELM_7;
return (privateCSAComputeCLKFrequency(
MCLKSource,
MCLKSourceDivider )
);
}
void CS_turnOffVLO(void)
{
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
HWREG16(CS_BASE + OFS_CSCTL4) |= VLOOFF;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
uint16_t CS_clearAllOscFlagsWithTimeout(uint32_t timeout)
{
assert(timeout > 0);
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
do {
//Clear all osc fault flags
HWREG8(CS_BASE + OFS_CSCTL5) &= ~(LFXTOFFG + HFXTOFFG);
//Clear the global osc fault flag
HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
//Check LFXT fault flags
} while ((HWREG8(SFR_BASE + OFS_SFRIFG1) & OFIFG) && --timeout);
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
return (HWREG8(CS_BASE + OFS_CSCTL5) & (LFXTOFFG + HFXTOFFG));
}
void CS_setDCOFreq(uint16_t dcorsel,
uint16_t dcofsel)
{
assert(
(dcofsel==CS_DCOFSEL_0)||
(dcofsel==CS_DCOFSEL_1)||
(dcofsel==CS_DCOFSEL_2)||
(dcofsel==CS_DCOFSEL_3)||
(dcofsel==CS_DCOFSEL_4)||
(dcofsel==CS_DCOFSEL_5)||
(dcofsel==CS_DCOFSEL_6)
);
//Verify user has selected a valid DCO Frequency Range option
assert(
(dcorsel==CS_DCORSEL_0)||
(dcorsel==CS_DCORSEL_1));
uint16_t tempCSCTL3 = 0;
//Unlock CS control register
HWREG16(CS_BASE + OFS_CSCTL0) = CSKEY;
//Assuming SMCLK and MCLK are sourced from DCO
//Store CSCTL3 settings to recover later
tempCSCTL3 = HWREG16(CS_BASE + OFS_CSCTL3);
//Keep overshoot transient within specification by setting clk
//sources to divide by 4
//Clear the DIVS & DIVM masks (~0x77) and set both fields to 4 divider
HWREG16(CS_BASE + OFS_CSCTL3) = HWREG16(CS_BASE + OFS_CSCTL3) &
(~(0x77)) | DIVS1 | DIVM1;
//Set user's frequency selection for DCO
HWREG16(CS_BASE + OFS_CSCTL1) = (dcorsel + dcofsel);
//Delay by ~10us to let DCO settle. cycles to wait = 20 cycles buffer +
//(10us * (x MHz/4))
switch(dcofsel)
{
case(CS_DCOFSEL_0):
//1 MHz or 1 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(23) : __delay_cycles(23);
break;
case(CS_DCOFSEL_1):
//2.67 MHz or 5.33 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(27) : __delay_cycles(34);
break;
case(CS_DCOFSEL_2):
//3.33 MHz or 6.67 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(29) : __delay_cycles(37);
break;
case(CS_DCOFSEL_3):
//4 MHz or 8 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(30) : __delay_cycles(40);
break;
case(CS_DCOFSEL_4):
//5.33 MHz or 16 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(34) : __delay_cycles(60);
break;
case(CS_DCOFSEL_5):
//6.67 MHz or 21 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(37) : __delay_cycles(73);
break;
case(CS_DCOFSEL_6):
//8 MHz or 24 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(40) : __delay_cycles(80);
break;
default:
//Should not be used, but default is 8 MHz or 24 MHz
(dcorsel == CS_DCORSEL_0) ? __delay_cycles(40) : __delay_cycles(80);
break;
}
//Set all dividers
HWREG16(CS_BASE + OFS_CSCTL3) = tempCSCTL3;
//Lock CS control register
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for cs_api
//! @}
//
//*****************************************************************************

644
platform/vendor_bsp/TI/MSP430FR5xx_6xx/cs.h Normal file
View File

@@ -0,0 +1,644 @@
/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// cs.h - Driver for the CS Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_CS_H__
#define __MSP430WARE_CS_H__
#include "inc/hw_memmap.h"
#if defined(__MSP430_HAS_CS__) || defined(__MSP430_HAS_SFR__)
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the clockSourceDivider
// parameter for functions: CS_initClockSignal().
//
//*****************************************************************************
#define CS_CLOCK_DIVIDER_1 DIVM__1
#define CS_CLOCK_DIVIDER_2 DIVM__2
#define CS_CLOCK_DIVIDER_4 DIVM__4
#define CS_CLOCK_DIVIDER_8 DIVM__8
#define CS_CLOCK_DIVIDER_16 DIVM__16
#define CS_CLOCK_DIVIDER_32 DIVM__32
//*****************************************************************************
//
// The following are values that can be passed to the selectClock parameter for
// functions: CS_enableClockRequest(), and CS_disableClockRequest(); the
// selectedClockSignal parameter for functions: CS_initClockSignal().
//
//*****************************************************************************
#define CS_ACLK 0x01
#define CS_MCLK 0x02
#define CS_SMCLK 0x04
#define CS_MODOSC MODCLKREQEN
//*****************************************************************************
//
// The following are values that can be passed to the clockSource parameter for
// functions: CS_initClockSignal().
//
//*****************************************************************************
#define CS_VLOCLK_SELECT SELM__VLOCLK
#define CS_DCOCLK_SELECT SELM__DCOCLK
#define CS_LFXTCLK_SELECT SELM__LFXTCLK
#define CS_HFXTCLK_SELECT SELM__HFXTCLK
#define CS_LFMODOSC_SELECT SELM__LFMODOSC
#define CS_MODOSC_SELECT SELM__MODOSC
//*****************************************************************************
//
// The following are values that can be passed to the lfxtdrive parameter for
// functions: CS_turnOnLFXT(), and CS_turnOnLFXTWithTimeout().
//
//*****************************************************************************
#define CS_LFXT_DRIVE_0 LFXTDRIVE_0
#define CS_LFXT_DRIVE_1 LFXTDRIVE_1
#define CS_LFXT_DRIVE_2 LFXTDRIVE_2
#define CS_LFXT_DRIVE_3 LFXTDRIVE_3
//*****************************************************************************
//
// The following are values that can be passed to the hfxtdrive parameter for
// functions: CS_turnOnHFXT(), and CS_turnOnHFXTWithTimeout().
//
//*****************************************************************************
#define CS_HFXT_DRIVE_4MHZ_8MHZ HFXTDRIVE_0
#define CS_HFXT_DRIVE_8MHZ_16MHZ HFXTDRIVE_1
#define CS_HFXT_DRIVE_16MHZ_24MHZ HFXTDRIVE_2
#define CS_HFXT_DRIVE_24MHZ_32MHZ HFXTDRIVE_3
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: CS_getFaultFlagStatus(), and CS_clearFaultFlag() as well as
// returned by the CS_getFaultFlagStatus() function.
//
//*****************************************************************************
#define CS_LFXTOFFG LFXTOFFG
#define CS_HFXTOFFG HFXTOFFG
//*****************************************************************************
//
// The following are values that can be passed to the dcorsel parameter for
// functions: CS_setDCOFreq().
//
//*****************************************************************************
#define CS_DCORSEL_0 0x00
#define CS_DCORSEL_1 DCORSEL
//*****************************************************************************
//
// The following are values that can be passed to the dcofsel parameter for
// functions: CS_setDCOFreq().
//
//*****************************************************************************
#define CS_DCOFSEL_0 DCOFSEL_0
#define CS_DCOFSEL_1 DCOFSEL_1
#define CS_DCOFSEL_2 DCOFSEL_2
#define CS_DCOFSEL_3 DCOFSEL_3
#define CS_DCOFSEL_4 DCOFSEL_4
#define CS_DCOFSEL_5 DCOFSEL_5
#define CS_DCOFSEL_6 DCOFSEL_6
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the external clock source
//!
//! This function sets the external clock sources LFXT and HFXT crystal
//! oscillator frequency values. This function must be called if an external
//! crystal LFXT or HFXT is used and the user intends to call CS_getMCLK,
//! CS_getSMCLK, CS_getACLK and CS_turnOnLFXT, CS_LFXTByPass,
//! CS_turnOnLFXTWithTimeout, CS_LFXTByPassWithTimeout, CS_turnOnHFXT,
//! CS_HFXTByPass, CS_turnOnHFXTWithTimeout, CS_HFXTByPassWithTimeout.
//!
//! \param LFXTCLK_frequency is the LFXT crystal frequencies in Hz
//! \param HFXTCLK_frequency is the HFXT crystal frequencies in Hz
//!
//! \return None
//
//*****************************************************************************
extern void CS_setExternalClockSource(uint32_t LFXTCLK_frequency,
uint32_t HFXTCLK_frequency);
//*****************************************************************************
//
//! \brief Initializes clock signal
//!
//! This function initializes each of the clock signals. The user must ensure
//! that this function is called for each clock signal. If not, the default
//! state is assumed for the particular clock signal. Refer to MSP430ware
//! documentation for CS module or Device Family User's Guide for details of
//! default clock signal states.
//!
//! \param selectedClockSignal Selected clock signal
//! Valid values are:
//! - \b CS_ACLK
//! - \b CS_MCLK
//! - \b CS_SMCLK
//! - \b CS_MODOSC
//! \param clockSource is the selected clock signal
//! Valid values are:
//! - \b CS_VLOCLK_SELECT
//! - \b CS_DCOCLK_SELECT - [Not available for ACLK]
//! - \b CS_LFXTCLK_SELECT
//! - \b CS_HFXTCLK_SELECT - [Not available for ACLK]
//! - \b CS_LFMODOSC_SELECT
//! - \b CS_MODOSC_SELECT - [Not available for ACLK]
//! \param clockSourceDivider is the selected clock divider to calculate clock
//! signal from clock source.
//! Valid values are:
//! - \b CS_CLOCK_DIVIDER_1 - [Default for ACLK]
//! - \b CS_CLOCK_DIVIDER_2
//! - \b CS_CLOCK_DIVIDER_4
//! - \b CS_CLOCK_DIVIDER_8 - [Default for SMCLK and MCLK]
//! - \b CS_CLOCK_DIVIDER_16
//! - \b CS_CLOCK_DIVIDER_32
//!
//! Modified bits of \b CSCTL0 register, bits of \b CSCTL3 register and bits of
//! \b CSCTL2 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_initClockSignal(uint8_t selectedClockSignal,
uint16_t clockSource,
uint16_t clockSourceDivider);
//*****************************************************************************
//
//! \brief Initializes the LFXT crystal in low frequency mode.
//!
//! Initializes the LFXT crystal oscillator in low frequency mode. Loops until
//! all oscillator fault flags are cleared, with no timeout. See the device-
//! specific data sheet for appropriate drive settings. IMPORTANT: User must
//! call CS_setExternalClockSource function to set frequency of external clocks
//! before calling this function.
//!
//! \param lfxtdrive is the target drive strength for the LFXT crystal
//! oscillator.
//! Valid values are:
//! - \b CS_LFXT_DRIVE_0
//! - \b CS_LFXT_DRIVE_1
//! - \b CS_LFXT_DRIVE_2
//! - \b CS_LFXT_DRIVE_3 [Default]
//!
//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
//! CSCTL4 register and bits of \b SFRIFG1 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOnLFXT(uint16_t lfxtdrive);
//*****************************************************************************
//
//! \brief Turns off SMCLK using the SMCLKOFF bit.
//!
//!
//! Modified bits of \b CSCTL4 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOffSMCLK(void);
//*****************************************************************************
//
//! \brief Turns on SMCLK using the SMCLKOFF bit.
//!
//!
//! Modified bits of \b CSCTL4 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOnSMCLK(void);
//*****************************************************************************
//
//! \brief Bypasses the LFXT crystal oscillator.
//!
//! Bypasses the LFXT crystal oscillator. Loops until all oscillator fault
//! flags are cleared, with no timeout. IMPORTANT: User must call
//! CS_setExternalClockSource function to set frequency of external clocks
//! before calling this function.
//!
//!
//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
//! CSCTL4 register and bits of \b SFRIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_bypassLFXT(void);
//*****************************************************************************
//
//! \brief Initializes the LFXT crystal oscillator in low frequency mode with
//! timeout.
//!
//! Initializes the LFXT crystal oscillator in low frequency mode with timeout.
//! Loops until all oscillator fault flags are cleared or until a timeout
//! counter is decremented and equals to zero. See the device-specific
//! datasheet for appropriate drive settings. IMPORTANT: User must call
//! CS_setExternalClockSource to set frequency of external clocks before
//! calling this function.
//!
//! \param lfxtdrive is the target drive strength for the LFXT crystal
//! oscillator.
//! Valid values are:
//! - \b CS_LFXT_DRIVE_0
//! - \b CS_LFXT_DRIVE_1
//! - \b CS_LFXT_DRIVE_2
//! - \b CS_LFXT_DRIVE_3 [Default]
//! \param timeout is the count value that gets decremented every time the loop
//! that clears oscillator fault flags gets executed.
//!
//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
//! CSCTL4 register and bits of \b SFRIFG1 register.
//!
//! \return STATUS_SUCCESS or STATUS_FAIL indicating if the LFXT crystal
//! oscillator was initialized successfully
//
//*****************************************************************************
extern bool CS_turnOnLFXTWithTimeout(uint16_t lfxtdrive,
uint32_t timeout);
//*****************************************************************************
//
//! \brief Bypass the LFXT crystal oscillator with timeout.
//!
//! Bypasses the LFXT crystal oscillator with timeout. Loops until all
//! oscillator fault flags are cleared or until a timeout counter is
//! decremented and equals to zero. NOTE: User must call
//! CS_setExternalClockSource to set frequency of external clocks before
//! calling this function.
//!
//! \param timeout is the count value that gets decremented every time the loop
//! that clears oscillator fault flags gets executed.
//!
//! Modified bits of \b CSCTL0 register, bits of \b CSCTL5 register, bits of \b
//! CSCTL4 register and bits of \b SFRIFG register.
//!
//! \return STATUS_SUCCESS or STATUS_FAIL
//
//*****************************************************************************
extern bool CS_bypassLFXTWithTimeout(uint32_t timeout);
//*****************************************************************************
//
//! \brief Stops the LFXT oscillator using the LFXTOFF bit.
//!
//!
//! Modified bits of \b CSCTL4 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOffLFXT(void);
//*****************************************************************************
//
//! \brief Starts the HFXFT crystal
//!
//! Initializes the HFXT crystal oscillator, which supports crystal frequencies
//! between 0 MHz and 24 MHz, depending on the selected drive strength. Loops
//! until all oscillator fault flags are cleared, with no timeout. See the
//! device-specific data sheet for appropriate drive settings. NOTE: User must
//! call CS_setExternalClockSource to set frequency of external clocks before
//! calling this function.
//!
//! \param hfxtdrive is the target drive strength for the HFXT crystal
//! oscillator.
//! Valid values are:
//! - \b CS_HFXT_DRIVE_4MHZ_8MHZ
//! - \b CS_HFXT_DRIVE_8MHZ_16MHZ
//! - \b CS_HFXT_DRIVE_16MHZ_24MHZ
//! - \b CS_HFXT_DRIVE_24MHZ_32MHZ [Default]
//!
//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
//! \b SFRIFG1 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOnHFXT(uint16_t hfxtdrive);
//*****************************************************************************
//
//! \brief Bypasses the HFXT crystal oscillator
//!
//! Bypasses the HFXT crystal oscillator, which supports crystal frequencies
//! between 0 MHz and 24 MHz. Loops until all oscillator fault flags are
//! cleared, with no timeout.NOTE: User must call CS_setExternalClockSource to
//! set frequency of external clocks before calling this function.
//!
//!
//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
//! \b SFRIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_bypassHFXT(void);
//*****************************************************************************
//
//! \brief Initializes the HFXT crystal oscillator with timeout.
//!
//! Initializes the HFXT crystal oscillator, which supports crystal frequencies
//! between 0 MHz and 24 MHz, depending on the selected drive strength. Loops
//! until all oscillator fault flags are cleared or until a timeout counter is
//! decremented and equals to zero. See the device-specific data sheet for
//! appropriate drive settings. NOTE: User must call CS_setExternalClockSource
//! to set frequency of external clocks before calling this function.
//!
//! \param hfxtdrive is the target drive strength for the HFXT crystal
//! oscillator.
//! Valid values are:
//! - \b CS_HFXT_DRIVE_4MHZ_8MHZ
//! - \b CS_HFXT_DRIVE_8MHZ_16MHZ
//! - \b CS_HFXT_DRIVE_16MHZ_24MHZ
//! - \b CS_HFXT_DRIVE_24MHZ_32MHZ [Default]
//! \param timeout is the count value that gets decremented every time the loop
//! that clears oscillator fault flags gets executed.
//!
//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
//! \b SFRIFG1 register.
//!
//! \return STATUS_SUCCESS or STATUS_FAIL
//
//*****************************************************************************
extern bool CS_turnOnHFXTWithTimeout(uint16_t hfxtdrive,
uint32_t timeout);
//*****************************************************************************
//
//! \brief Bypasses the HFXT crystal oscillator with timeout
//!
//! Bypasses the HFXT crystal oscillator, which supports crystal frequencies
//! between 0 MHz and 24 MHz. Loops until all oscillator fault flags are
//! cleared or until a timeout counter is decremented and equals to zero. NOTE:
//! User must call CS_setExternalClockSource to set frequency of external
//! clocks before calling this function.
//!
//! \param timeout is the count value that gets decremented every time the loop
//! that clears oscillator fault flags gets executed.
//!
//! Modified bits of \b CSCTL5 register, bits of \b CSCTL4 register and bits of
//! \b SFRIFG1 register.
//!
//! \return STATUS_SUCCESS or STATUS_FAIL
//
//*****************************************************************************
extern bool CS_bypassHFXTWithTimeout(uint32_t timeout);
//*****************************************************************************
//
//! \brief Stops the HFXT oscillator using the HFXTOFF bit.
//!
//!
//! Modified bits of \b CSCTL4 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOffHFXT(void);
//*****************************************************************************
//
//! \brief Enables conditional module requests
//!
//! \param selectClock selects specific request enables.
//! Valid values are:
//! - \b CS_ACLK
//! - \b CS_MCLK
//! - \b CS_SMCLK
//! - \b CS_MODOSC
//!
//! Modified bits of \b CSCTL6 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_enableClockRequest(uint8_t selectClock);
//*****************************************************************************
//
//! \brief Disables conditional module requests
//!
//! \param selectClock selects specific request enables.
//! Valid values are:
//! - \b CS_ACLK
//! - \b CS_MCLK
//! - \b CS_SMCLK
//! - \b CS_MODOSC
//!
//! Modified bits of \b CSCTL6 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_disableClockRequest(uint8_t selectClock);
//*****************************************************************************
//
//! \brief Gets the current CS fault flag status.
//!
//! \param mask is the masked interrupt flag status to be returned. Mask
//! parameter can be either any of the following selection.
//! Mask value is the logical OR of any of the following:
//! - \b CS_LFXTOFFG - LFXT oscillator fault flag
//! - \b CS_HFXTOFFG - HFXT oscillator fault flag
//!
//! \return Logical OR of any of the following:
//! - \b CS_LFXTOFFG LFXT oscillator fault flag
//! - \b CS_HFXTOFFG HFXT oscillator fault flag
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t CS_getFaultFlagStatus(uint8_t mask);
//*****************************************************************************
//
//! \brief Clears the current CS fault flag status for the masked bit.
//!
//! \param mask is the masked interrupt flag status to be returned. mask
//! parameter can be any one of the following
//! Mask value is the logical OR of any of the following:
//! - \b CS_LFXTOFFG - LFXT oscillator fault flag
//! - \b CS_HFXTOFFG - HFXT oscillator fault flag
//!
//! Modified bits of \b CSCTL5 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_clearFaultFlag(uint8_t mask);
//*****************************************************************************
//
//! \brief Get the current ACLK frequency.
//!
//! If a oscillator fault is set, the frequency returned will be based on the
//! fail safe mechanism of CS module. The user of this API must ensure that
//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
//! being used.
//!
//!
//! \return Current ACLK frequency in Hz
//
//*****************************************************************************
extern uint32_t CS_getACLK(void);
//*****************************************************************************
//
//! \brief Get the current SMCLK frequency.
//!
//! If a oscillator fault is set, the frequency returned will be based on the
//! fail safe mechanism of CS module. The user of this API must ensure that
//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
//! being used.
//!
//!
//! \return Current SMCLK frequency in Hz
//
//*****************************************************************************
extern uint32_t CS_getSMCLK(void);
//*****************************************************************************
//
//! \brief Get the current MCLK frequency.
//!
//! If a oscillator fault is set, the frequency returned will be based on the
//! fail safe mechanism of CS module. The user of this API must ensure that
//! CS_externalClockSourceInit API was invoked before in case LFXT or HFXT is
//! being used.
//!
//!
//! \return Current MCLK frequency in Hz
//
//*****************************************************************************
extern uint32_t CS_getMCLK(void);
//*****************************************************************************
//
//! \brief Turns off VLO
//!
//!
//! Modified bits of \b CSCTL4 register.
//!
//! \return None
//
//*****************************************************************************
extern void CS_turnOffVLO(void);
//*****************************************************************************
//
//! \brief Clears all the Oscillator Flags
//!
//! \param timeout is the count value that gets decremented every time the loop
//! that clears oscillator fault flags gets executed.
//!
//! Modified bits of \b CSCTL5 register and bits of \b SFRIFG1 register.
//!
//! \return the mask of the oscillator flag status
//
//*****************************************************************************
extern uint16_t CS_clearAllOscFlagsWithTimeout(uint32_t timeout);
//*****************************************************************************
//
//! \brief Set DCO frequency
//!
//! \param dcorsel selects frequency range option.
//! Valid values are:
//! - \b CS_DCORSEL_0 [Default] - Low Frequency Option
//! - \b CS_DCORSEL_1 - High Frequency Option
//! \param dcofsel selects valid frequency options based on dco frequency range
//! selection (dcorsel)
//! Valid values are:
//! - \b CS_DCOFSEL_0 - Low frequency option 1MHz. High frequency option
//! 1MHz.
//! - \b CS_DCOFSEL_1 - Low frequency option 2.67MHz. High frequency
//! option 5.33MHz.
//! - \b CS_DCOFSEL_2 - Low frequency option 3.33MHz. High frequency
//! option 6.67MHz.
//! - \b CS_DCOFSEL_3 - Low frequency option 4MHz. High frequency option
//! 8MHz.
//! - \b CS_DCOFSEL_4 - Low frequency option 5.33MHz. High frequency
//! option 16MHz.
//! - \b CS_DCOFSEL_5 - Low frequency option 6.67MHz. High frequency
//! option 20MHz.
//! - \b CS_DCOFSEL_6 - Low frequency option 8MHz. High frequency option
//! 24MHz.
//!
//! \return None
//
//*****************************************************************************
extern void CS_setDCOFreq(uint16_t dcorsel,
uint16_t dcofsel);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_CS_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// dma.c - Driver for the dma Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup dma_api dma
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
#include "dma.h"
#include <assert.h>
void DMA_init( DMA_initParam *param){
uint8_t triggerOffset = (param->channelSelect >> 4);
//Reset and Set DMA Control 0 Register
HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0CTL) =
param->transferModeSelect //Set Transfer Mode
+ param->transferUnitSelect //Set Transfer Unit Size
+ param->triggerTypeSelect; //Set Trigger Type
//Set Transfer Size Amount
HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0SZ) = param->transferSize;
if (triggerOffset & 0x01){ //Odd Channel
HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0x00FF; //Reset Trigger Select
HWREG16(DMA_BASE +
(triggerOffset & 0x0E)) |= (param->triggerSourceSelect << 8);
} else { //Even Channel
HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0xFF00; //Reset Trigger Select
HWREG16(DMA_BASE + (triggerOffset & 0x0E)) |= param->triggerSourceSelect;
}
}
void DMA_setTransferSize (uint8_t channelSelect,
uint16_t transferSize)
{
//Set Transfer Size Amount
HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ) = transferSize;
}
uint16_t DMA_getTransferSize (uint8_t channelSelect)
{
//Get Transfer Size Amount
return HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ);
}
void DMA_setSrcAddress (uint8_t channelSelect,
uint32_t srcAddress,
uint16_t directionSelect)
{
//Set the Source Address
__data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0SA),
srcAddress);
//Reset bits before setting them
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMASRCINCR_3);
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= directionSelect;
}
void DMA_setDstAddress (uint8_t channelSelect,
uint32_t dstAddress,
uint16_t directionSelect)
{
//Set the Destination Address
__data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0DA),
dstAddress);
//Reset bits before setting them
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMADSTINCR_3);
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= (directionSelect << 2);
}
void DMA_enableTransfers (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAEN;
}
void DMA_disableTransfers (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAEN);
}
void DMA_startTransfer (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAREQ;
}
void DMA_enableInterrupt (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAIE;
}
void DMA_disableInterrupt (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIE);
}
uint16_t DMA_getInterruptStatus (uint8_t channelSelect)
{
return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAIFG);
}
void DMA_clearInterrupt (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIFG);
}
uint16_t DMA_getNMIAbortStatus (uint8_t channelSelect)
{
return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAABORT);
}
void DMA_clearNMIAbort (uint8_t channelSelect)
{
HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAABORT);
}
void DMA_disableTransferDuringReadModifyWrite (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) |= DMARMWDIS;
}
void DMA_enableTransferDuringReadModifyWrite (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(DMARMWDIS);
}
void DMA_enableRoundRobinPriority (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) |= ROUNDROBIN;
}
void DMA_disableRoundRobinPriority (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ROUNDROBIN);
}
void DMA_enableNMIAbort (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) |= ENNMI;
}
void DMA_disableNMIAbort (void)
{
HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ENNMI);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for dma_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// dma.h - Driver for the DMA Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_DMA_H__
#define __MSP430WARE_DMA_H__
#include "inc/hw_memmap.h"
#if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the DMA_init() function as the param parameter.
//
//*****************************************************************************
typedef struct DMA_initParam {
//! Is the specified channel to initialize.
//! \n Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
uint8_t channelSelect;
//! Is the transfer mode of the selected channel.
//! \n Valid values are:
//! - \b DMA_TRANSFER_SINGLE [Default] - Single transfer, transfers
//! disabled after transferAmount of transfers.
//! - \b DMA_TRANSFER_BLOCK - Multiple transfers of transferAmount,
//! transfers disabled once finished.
//! - \b DMA_TRANSFER_BURSTBLOCK - Multiple transfers of transferAmount
//! interleaved with CPU activity, transfers disabled once finished.
//! - \b DMA_TRANSFER_REPEATED_SINGLE - Repeated single transfer by
//! trigger.
//! - \b DMA_TRANSFER_REPEATED_BLOCK - Multiple transfers of transferAmount
//! by trigger.
//! - \b DMA_TRANSFER_REPEATED_BURSTBLOCK - Multiple transfers of
//! transferAmount by trigger interleaved with CPU activity.
uint16_t transferModeSelect;
//! Is the amount of transfers to complete in a block transfer mode, as
//! well as how many transfers to complete before the interrupt flag is
//! set. Valid value is between 1-65535, if 0, no transfers will occur.
uint16_t transferSize;
//! Is the source that will trigger the start of each transfer, note that
//! the sources are device specific.
//! \n Valid values are:
//! - \b DMA_TRIGGERSOURCE_0 [Default]
//! - \b DMA_TRIGGERSOURCE_1
//! - \b DMA_TRIGGERSOURCE_2
//! - \b DMA_TRIGGERSOURCE_3
//! - \b DMA_TRIGGERSOURCE_4
//! - \b DMA_TRIGGERSOURCE_5
//! - \b DMA_TRIGGERSOURCE_6
//! - \b DMA_TRIGGERSOURCE_7
//! - \b DMA_TRIGGERSOURCE_8
//! - \b DMA_TRIGGERSOURCE_9
//! - \b DMA_TRIGGERSOURCE_10
//! - \b DMA_TRIGGERSOURCE_11
//! - \b DMA_TRIGGERSOURCE_12
//! - \b DMA_TRIGGERSOURCE_13
//! - \b DMA_TRIGGERSOURCE_14
//! - \b DMA_TRIGGERSOURCE_15
//! - \b DMA_TRIGGERSOURCE_16
//! - \b DMA_TRIGGERSOURCE_17
//! - \b DMA_TRIGGERSOURCE_18
//! - \b DMA_TRIGGERSOURCE_19
//! - \b DMA_TRIGGERSOURCE_20
//! - \b DMA_TRIGGERSOURCE_21
//! - \b DMA_TRIGGERSOURCE_22
//! - \b DMA_TRIGGERSOURCE_23
//! - \b DMA_TRIGGERSOURCE_24
//! - \b DMA_TRIGGERSOURCE_25
//! - \b DMA_TRIGGERSOURCE_26
//! - \b DMA_TRIGGERSOURCE_27
//! - \b DMA_TRIGGERSOURCE_28
//! - \b DMA_TRIGGERSOURCE_29
//! - \b DMA_TRIGGERSOURCE_30
//! - \b DMA_TRIGGERSOURCE_31
uint8_t triggerSourceSelect;
//! Is the specified size of transfers.
//! \n Valid values are:
//! - \b DMA_SIZE_SRCWORD_DSTWORD [Default]
//! - \b DMA_SIZE_SRCBYTE_DSTWORD
//! - \b DMA_SIZE_SRCWORD_DSTBYTE
//! - \b DMA_SIZE_SRCBYTE_DSTBYTE
uint8_t transferUnitSelect;
//! Is the type of trigger that the trigger signal needs to be to start a
//! transfer.
//! \n Valid values are:
//! - \b DMA_TRIGGER_RISINGEDGE [Default]
//! - \b DMA_TRIGGER_HIGH - A trigger would be a high signal from the
//! trigger source, to be held high through the length of the
//! transfer(s).
uint8_t triggerTypeSelect;
} DMA_initParam;
//*****************************************************************************
//
// The following are values that can be passed to the triggerSourceSelect
// parameter for functions: DMA_init(); the param parameter for functions:
// DMA_init().
//
//*****************************************************************************
#define DMA_TRIGGERSOURCE_0 (0x00)
#define DMA_TRIGGERSOURCE_1 (0x01)
#define DMA_TRIGGERSOURCE_2 (0x02)
#define DMA_TRIGGERSOURCE_3 (0x03)
#define DMA_TRIGGERSOURCE_4 (0x04)
#define DMA_TRIGGERSOURCE_5 (0x05)
#define DMA_TRIGGERSOURCE_6 (0x06)
#define DMA_TRIGGERSOURCE_7 (0x07)
#define DMA_TRIGGERSOURCE_8 (0x08)
#define DMA_TRIGGERSOURCE_9 (0x09)
#define DMA_TRIGGERSOURCE_10 (0x0A)
#define DMA_TRIGGERSOURCE_11 (0x0B)
#define DMA_TRIGGERSOURCE_12 (0x0C)
#define DMA_TRIGGERSOURCE_13 (0x0D)
#define DMA_TRIGGERSOURCE_14 (0x0E)
#define DMA_TRIGGERSOURCE_15 (0x0F)
#define DMA_TRIGGERSOURCE_16 (0x10)
#define DMA_TRIGGERSOURCE_17 (0x11)
#define DMA_TRIGGERSOURCE_18 (0x12)
#define DMA_TRIGGERSOURCE_19 (0x13)
#define DMA_TRIGGERSOURCE_20 (0x14)
#define DMA_TRIGGERSOURCE_21 (0x15)
#define DMA_TRIGGERSOURCE_22 (0x16)
#define DMA_TRIGGERSOURCE_23 (0x17)
#define DMA_TRIGGERSOURCE_24 (0x18)
#define DMA_TRIGGERSOURCE_25 (0x19)
#define DMA_TRIGGERSOURCE_26 (0x1A)
#define DMA_TRIGGERSOURCE_27 (0x1B)
#define DMA_TRIGGERSOURCE_28 (0x1C)
#define DMA_TRIGGERSOURCE_29 (0x1D)
#define DMA_TRIGGERSOURCE_30 (0x1E)
#define DMA_TRIGGERSOURCE_31 (0x1F)
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: DMA_init(); the transferModeSelect parameter for functions:
// DMA_init().
//
//*****************************************************************************
#define DMA_TRANSFER_SINGLE (DMADT_0)
#define DMA_TRANSFER_BLOCK (DMADT_1)
#define DMA_TRANSFER_BURSTBLOCK (DMADT_2)
#define DMA_TRANSFER_REPEATED_SINGLE (DMADT_4)
#define DMA_TRANSFER_REPEATED_BLOCK (DMADT_5)
#define DMA_TRANSFER_REPEATED_BURSTBLOCK (DMADT_6)
//*****************************************************************************
//
// The following are values that can be passed to the channelSelect parameter
// for functions: DMA_init(), DMA_setTransferSize(), DMA_getTransferSize(),
// DMA_setSrcAddress(), DMA_setDstAddress(), DMA_enableTransfers(),
// DMA_disableTransfers(), DMA_startTransfer(), DMA_enableInterrupt(),
// DMA_disableInterrupt(), DMA_getInterruptStatus(), DMA_clearInterrupt(),
// DMA_getNMIAbortStatus(), and DMA_clearNMIAbort(); the param parameter for
// functions: DMA_init().
//
//*****************************************************************************
#define DMA_CHANNEL_0 (0x00)
#define DMA_CHANNEL_1 (0x10)
#define DMA_CHANNEL_2 (0x20)
#define DMA_CHANNEL_3 (0x30)
#define DMA_CHANNEL_4 (0x40)
#define DMA_CHANNEL_5 (0x50)
#define DMA_CHANNEL_6 (0x60)
#define DMA_CHANNEL_7 (0x70)
//*****************************************************************************
//
// The following are values that can be passed to the triggerTypeSelect
// parameter for functions: DMA_init(); the param parameter for functions:
// DMA_init().
//
//*****************************************************************************
#define DMA_TRIGGER_RISINGEDGE (!(DMALEVEL))
#define DMA_TRIGGER_HIGH (DMALEVEL)
//*****************************************************************************
//
// The following are values that can be passed to the transferUnitSelect
// parameter for functions: DMA_init(); the param parameter for functions:
// DMA_init().
//
//*****************************************************************************
#define DMA_SIZE_SRCWORD_DSTWORD (!(DMASRCBYTE + DMADSTBYTE))
#define DMA_SIZE_SRCBYTE_DSTWORD (DMASRCBYTE)
#define DMA_SIZE_SRCWORD_DSTBYTE (DMADSTBYTE)
#define DMA_SIZE_SRCBYTE_DSTBYTE (DMASRCBYTE + DMADSTBYTE)
//*****************************************************************************
//
// The following are values that can be passed to the directionSelect parameter
// for functions: DMA_setSrcAddress(), and DMA_setDstAddress().
//
//*****************************************************************************
#define DMA_DIRECTION_UNCHANGED (DMASRCINCR_0)
#define DMA_DIRECTION_DECREMENT (DMASRCINCR_2)
#define DMA_DIRECTION_INCREMENT (DMASRCINCR_3)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the DMA_getInterruptStatus() function.
//
//*****************************************************************************
#define DMA_INT_INACTIVE (0x0)
#define DMA_INT_ACTIVE (DMAIFG)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the DMA_getNMIAbortStatus() function.
//
//*****************************************************************************
#define DMA_NOTABORTED (0x0)
#define DMA_ABORTED (DMAABORT)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Initializes the specified DMA channel.
//!
//! This function initializes the specified DMA channel. Upon successful
//! completion of initialization of the selected channel the control registers
//! will be cleared and the given variables will be set. Please note, if
//! transfers have been enabled with the enableTransfers() function, then a
//! call to disableTransfers() is necessary before re-initialization. Also
//! note, that the trigger sources are device dependent and can be found in the
//! device family data sheet. The amount of DMA channels available are also
//! device specific.
//!
//! \param param is the pointer to struct for initialization.
//!
//! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process.
//
//*****************************************************************************
extern void DMA_init(DMA_initParam *param);
//*****************************************************************************
//
//! \brief Sets the specified amount of transfers for the selected DMA channel.
//!
//! This function sets the specified amount of transfers for the selected DMA
//! channel without having to reinitialize the DMA channel.
//!
//! \param channelSelect is the specified channel to set source address
//! direction for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//! \param transferSize is the amount of transfers to complete in a block
//! transfer mode, as well as how many transfers to complete before the
//! interrupt flag is set. Valid value is between 1-65535, if 0, no
//! transfers will occur.
//! \n Modified bits are \b DMAxSZ of \b DMAxSZ register.
//!
//! \return None
//
//*****************************************************************************
extern void DMA_setTransferSize(uint8_t channelSelect,
uint16_t transferSize);
//*****************************************************************************
//
//! \brief Gets the amount of transfers for the selected DMA channel.
//!
//! This function gets the amount of transfers for the selected DMA channel
//! without having to reinitialize the DMA channel.
//!
//! \param channelSelect is the specified channel to set source address
//! direction for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return the amount of transfers
//
//*****************************************************************************
extern uint16_t DMA_getTransferSize(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Sets source address and the direction that the source address will
//! move after a transfer.
//!
//! This function sets the source address and the direction that the source
//! address will move after a transfer is complete. It may be incremented,
//! decremented or unchanged.
//!
//! \param channelSelect is the specified channel to set source address
//! direction for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//! \param srcAddress is the address of where the data will be transferred
//! from.
//! \n Modified bits are \b DMAxSA of \b DMAxSA register.
//! \param directionSelect is the specified direction of the source address
//! after a transfer.
//! Valid values are:
//! - \b DMA_DIRECTION_UNCHANGED
//! - \b DMA_DIRECTION_DECREMENT
//! - \b DMA_DIRECTION_INCREMENT
//! \n Modified bits are \b DMASRCINCR of \b DMAxCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void DMA_setSrcAddress(uint8_t channelSelect,
uint32_t srcAddress,
uint16_t directionSelect);
//*****************************************************************************
//
//! \brief Sets the destination address and the direction that the destination
//! address will move after a transfer.
//!
//! This function sets the destination address and the direction that the
//! destination address will move after a transfer is complete. It may be
//! incremented, decremented, or unchanged.
//!
//! \param channelSelect is the specified channel to set the destination
//! address direction for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//! \param dstAddress is the address of where the data will be transferred to.
//! \n Modified bits are \b DMAxDA of \b DMAxDA register.
//! \param directionSelect is the specified direction of the destination
//! address after a transfer.
//! Valid values are:
//! - \b DMA_DIRECTION_UNCHANGED
//! - \b DMA_DIRECTION_DECREMENT
//! - \b DMA_DIRECTION_INCREMENT
//! \n Modified bits are \b DMADSTINCR of \b DMAxCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void DMA_setDstAddress(uint8_t channelSelect,
uint32_t dstAddress,
uint16_t directionSelect);
//*****************************************************************************
//
//! \brief Enables transfers to be triggered.
//!
//! This function enables transfers upon appropriate trigger of the selected
//! trigger source for the selected channel.
//!
//! \param channelSelect is the specified channel to enable transfer for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_enableTransfers(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Disables transfers from being triggered.
//!
//! This function disables transfer from being triggered for the selected
//! channel. This function should be called before any re-initialization of the
//! selected DMA channel.
//!
//! \param channelSelect is the specified channel to disable transfers for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_disableTransfers(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Starts a transfer if using the default trigger source selected in
//! initialization.
//!
//! This functions triggers a transfer of data from source to destination if
//! the trigger source chosen from initialization is the DMA_TRIGGERSOURCE_0.
//! Please note, this function needs to be called for each (repeated-)single
//! transfer, and when transferAmount of transfers have been complete in
//! (repeated-)block transfers.
//!
//! \param channelSelect is the specified channel to start transfers for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_startTransfer(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Enables the DMA interrupt for the selected channel.
//!
//! Enables the DMA interrupt source. Only the sources that are enabled can be
//! reflected to the processor interrupt; disabled sources have no effect on
//! the processor. Does not clear interrupt flags.
//!
//! \param channelSelect is the specified channel to enable the interrupt for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_enableInterrupt(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Disables the DMA interrupt for the selected channel.
//!
//! Disables the DMA interrupt source. Only the sources that are enabled can be
//! reflected to the processor interrupt; disabled sources have no effect on
//! the processor.
//!
//! \param channelSelect is the specified channel to disable the interrupt for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_disableInterrupt(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Returns the status of the interrupt flag for the selected channel.
//!
//! Returns the status of the interrupt flag for the selected channel.
//!
//! \param channelSelect is the specified channel to return the interrupt flag
//! status from.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return One of the following:
//! - \b DMA_INT_INACTIVE
//! - \b DMA_INT_ACTIVE
//! \n indicating the status of the current interrupt flag
//
//*****************************************************************************
extern uint16_t DMA_getInterruptStatus(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Clears the interrupt flag for the selected channel.
//!
//! This function clears the DMA interrupt flag is cleared, so that it no
//! longer asserts.
//!
//! \param channelSelect is the specified channel to clear the interrupt flag
//! for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_clearInterrupt(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Returns the status of the NMIAbort for the selected channel.
//!
//! This function returns the status of the NMI Abort flag for the selected
//! channel. If this flag has been set, it is because a transfer on this
//! channel was aborted due to a interrupt from an NMI.
//!
//! \param channelSelect is the specified channel to return the status of the
//! NMI Abort flag for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return One of the following:
//! - \b DMA_NOTABORTED
//! - \b DMA_ABORTED
//! \n indicating the status of the NMIAbort for the selected channel
//
//*****************************************************************************
extern uint16_t DMA_getNMIAbortStatus(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Clears the status of the NMIAbort to proceed with transfers for the
//! selected channel.
//!
//! This function clears the status of the NMI Abort flag for the selected
//! channel to allow for transfers on the channel to continue.
//!
//! \param channelSelect is the specified channel to clear the NMI Abort flag
//! for.
//! Valid values are:
//! - \b DMA_CHANNEL_0
//! - \b DMA_CHANNEL_1
//! - \b DMA_CHANNEL_2
//! - \b DMA_CHANNEL_3
//! - \b DMA_CHANNEL_4
//! - \b DMA_CHANNEL_5
//! - \b DMA_CHANNEL_6
//! - \b DMA_CHANNEL_7
//!
//! \return None
//
//*****************************************************************************
extern void DMA_clearNMIAbort(uint8_t channelSelect);
//*****************************************************************************
//
//! \brief Disables the DMA from stopping the CPU during a Read-Modify-Write
//! Operation to start a transfer.
//!
//! This function allows the CPU to finish any read-modify-write operations it
//! may be in the middle of before transfers of and DMA channel stop the CPU.
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_disableTransferDuringReadModifyWrite(void);
//*****************************************************************************
//
//! \brief Enables the DMA to stop the CPU during a Read-Modify-Write Operation
//! to start a transfer.
//!
//! This function allows the DMA to stop the CPU in the middle of a read-
//! modify-write operation to transfer data.
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_enableTransferDuringReadModifyWrite(void);
//*****************************************************************************
//
//! \brief Enables Round Robin prioritization.
//!
//! This function enables Round Robin Prioritization of DMA channels. In the
//! case of Round Robin Prioritization, the last DMA channel to have
//! transferred data then has the last priority, which comes into play when
//! multiple DMA channels are ready to transfer at the same time.
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_enableRoundRobinPriority(void);
//*****************************************************************************
//
//! \brief Disables Round Robin prioritization.
//!
//! This function disables Round Robin Prioritization, enabling static
//! prioritization of the DMA channels. In static prioritization, the DMA
//! channels are prioritized with the lowest DMA channel index having the
//! highest priority (i.e. DMA Channel 0 has the highest priority).
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_disableRoundRobinPriority(void);
//*****************************************************************************
//
//! \brief Enables a NMI to interrupt a DMA transfer.
//!
//! This function allow NMI's to interrupting any DMA transfer currently in
//! progress and stops any future transfers to begin before the NMI is done
//! processing.
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_enableNMIAbort(void);
//*****************************************************************************
//
//! \brief Disables any NMI from interrupting a DMA transfer.
//!
//! This function disables NMI's from interrupting any DMA transfer currently
//! in progress.
//!
//!
//! \return None
//
//*****************************************************************************
extern void DMA_disableNMIAbort(void);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_DMA_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
#include "inc/hw_memmap.h"
#include "hspll.h"
#include "sysctl.h"
#include "dma.h"
#include "eusci_b_i2c.h"
#include "rtc_b.h"
#include "crc.h"
#include "adc12_b.h"
#include "esi.h"
#include "saph.h"
#include "cs.h"
#include "ram.h"
#include "mpy32.h"
#include "crc32.h"
#include "comp_e.h"
#include "framctl.h"
#include "aes256.h"
#include "sfr.h"
#include "wdt_a.h"
#include "saph_a.h"
#include "timer_a.h"
#include "pmm.h"
#include "rtc_c.h"
#include "uups.h"
#include "framctl_a.h"
#include "eusci_a_uart.h"
#include "gpio.h"
#include "mpu.h"
#include "tlv.h"
#include "sdhs.h"
#include "eusci_a_spi.h"
#include "timer_b.h"
#include "ref_a.h"
#include "eusci_b_spi.h"
#include "mtif.h"
#include "lcd_c.h"

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platform/vendor_bsp/TI/MSP430FR5xx_6xx/esi.c Normal file
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platform/vendor_bsp/TI/MSP430FR5xx_6xx/esi.h Normal file
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// esi.h - Driver for the ESI Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_ESI_H__
#define __MSP430WARE_ESI_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_ESI__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
uint16_t ESI_getCounter0(void);
uint16_t ESI_getCounter1(void);
uint16_t ESI_getCounter2(void);
uint16_t ESI_getOscCounter(void);
//*****************************************************************************
//
//The following are values that can be passed to excitationCircuitSelect
//parameter in ESI_AFE_InitParams
//
//*****************************************************************************
#define ESI_EXCITATION_CIRCUIT_DISABLED 0x0
#define ESI_EXCITATION_CIRCUIT_ENABLED ESITEN
//*****************************************************************************
//
//The following are values that can be passed to sampleAndHoldSelect
//parameter in ESI_AFE_InitParams
//
//*****************************************************************************
#define ESI_SAMPLE_HOLD_DISABLED 0x0
#define ESI_SAMPLE_HOLD_ENABLED ESISH
//*****************************************************************************
//
//The following are values that can be passed to midVoltageGeneratorSelect
//parameter in ESI_AFE_InitParams
//
//*****************************************************************************
#define ESI_MID_VOLTAGE_GENERATOR_DISABLED 0x0
#define ESI_MID_VOLTAGE_GENERATOR_ENABLED ESIVCC2
//*****************************************************************************
//
//The following are values that can be passed to sampleAndHoldVSSConnect
//parameter in ESI_AFE_InitParams
//
//*****************************************************************************
#define ESI_SAMPLE_HOLD_VSS_TO_ESIVSS 0x0
#define ESI_SAMPLE_HOLD_VSS_BY_TSM ESIVSS
//*****************************************************************************
//
//The following are values that can be passed to
//inputSelectAFE1 parameter in ESI_AFE1_InitParams
//
//*****************************************************************************
#define ESI_AFE1_INPUT_SELECT_CHx 0
#define ESI_AFE1_INPUT_SELECT_CIx 1
#define ESI_AFE1_INPUT_SELECT_CI3 2
#define ESI_AFE1_INPUT_SELECT_CI 3
//*****************************************************************************
//
//The following are values that can be passed to
//inputSelectAFE2 parameter in ESI_AFE2_InitParams
//
//*****************************************************************************
#define ESI_AFE2_INPUT_SELECT_CHx 0
#define ESI_AFE2_INPUT_SELECT_CIx ESICA2X
//*****************************************************************************
//
//The following are values that can be passed to
//inverterSelectOutputAFE1 parameter in ESI_AFE1_InitParams
//
//*****************************************************************************
#define ESI_INVERTER_FOR_AFE1_DISABLE 0x0
#define ESI_INVERTER_FOR_AFE1_ENABLE ESICA1INV
//*****************************************************************************
//
//The following are values that can be passed to
//inverterSelectOutputAFE2 parameter in ESI_AFE2_InitParams
//
//*****************************************************************************
#define ESI_INVERTER_FOR_AFE2_DISABLE 0x0
#define ESI_INVERTER_FOR_AFE2_ENABLE ESICA2INV
//*****************************************************************************
//
//The following are values that can be passed to
//tsmControlOfComparatorAFE2 parameter in ESI_AFE2_InitParams
//
//*****************************************************************************
#define ESI_TSM_COMPARATOR_CONTROL_AFE2_DISABLE 0x0
#define ESI_TSM_COMPARATOR_CONTROL_AFE2_ENABLE ESICA2EN
//*****************************************************************************
//
//The following are values that can be passed to
//tsmControlDacAFE2 parameter in ESI_AFE2_InitParams
//
//*****************************************************************************
#define ESI_TSM_DAC_CONTROL_AFE2_DISABLE 0x0
#define ESI_TSM_DAC_CONTROL_AFE2_ENABLE ESIDAC2EN
typedef struct ESI_AFE1_InitParams {
uint16_t excitationCircuitSelect;
uint16_t sampleAndHoldSelect;
uint16_t midVoltageGeneratorSelect;
uint16_t sampleAndHoldVSSConnect;
uint16_t inputSelectAFE1;
uint16_t inverterSelectOutputAFE1;
} ESI_AFE1_InitParams;
extern const ESI_AFE1_InitParams ESI_AFE1_INITPARAMS_DEFAULT;
void ESI_AFE1_init (ESI_AFE1_InitParams *params);
typedef struct ESI_AFE2_InitParams {
uint16_t inputSelectAFE2;
uint16_t inverterSelectOutputAFE2;
uint16_t tsmControlComparatorAFE2;
uint16_t tsmControlDacAFE2;
} ESI_AFE2_InitParams;
extern const ESI_AFE2_InitParams ESI_AFE2_INITPARAMS_DEFAULT;
void ESI_AFE2_init (ESI_AFE2_InitParams *params);
//*****************************************************************************
//
//The following are values that can be passed to
//channelSelect parameter in ESI_getLatchedComparatorOutput
//
//*****************************************************************************
#define ESI_AFE1_CHANNEL0_SELECT ESIOUT0
#define ESI_AFE1_CHANNEL1_SELECT ESIOUT1
#define ESI_AFE1_CHANNEL2_SELECT ESIOUT2
#define ESI_AFE1_CHANNEL3_SELECT ESIOUT3
#define ESI_AFE2_CHANNEL0_SELECT ESIOUT4
#define ESI_AFE2_CHANNEL1_SELECT ESIOUT5
#define ESI_AFE2_CHANNEL2_SELECT ESIOUT6
#define ESI_AFE2_CHANNEL3_SELECT ESIOUT7
#define ESI_AFE1_TEST_CHANNEL0_SELECT ESITCHOUT0
#define ESI_AFE1_TEST_CHANNEL1_SELECT ESITCHOUT1
//*****************************************************************************
//
//The following are values that are returned by ESI_getLatchedComparatorOutput
//
//*****************************************************************************
#define ESI_AFE_OUTPUT_HIGH 0x1
#define ESI_AFE_OUTPUT_LOW 0x0
uint16_t ESI_getLatchedComparatorOutput (
uint16_t channelSelect);
//*****************************************************************************
//
//The following are values that can be passed to
//smclkDivider parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_SMCLK_DIV_1 0x0
#define ESI_TSM_SMCLK_DIV_2 ESIDIV10
#define ESI_TSM_SMCLK_DIV_4 ESIDIV11
#define ESI_TSM_SMCLK_DIV_8 ESIDIV10 + ESIDIV11
//*****************************************************************************
//
//The following are values that can be passed to
//aclkDivider parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_ACLK_DIV_1 0x0
#define ESI_TSM_ACLK_DIV_2 ESIDIV20
#define ESI_TSM_ACLK_DIV_4 ESIDIV21
#define ESI_TSM_ACLK_DIV_8 ESIDIV20 + ESIDIV21
//*****************************************************************************
//
//The following are values that can be passed to
//startTriggerAclkDivider parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_START_TRIGGER_DIV_2 0x0
#define ESI_TSM_START_TRIGGER_DIV_6 ESIDIV3A0
#define ESI_TSM_START_TRIGGER_DIV_10 ESIDIV3A1
#define ESI_TSM_START_TRIGGER_DIV_14 ESIDIV3A0 + ESIDIV3A1
#define ESI_TSM_START_TRIGGER_DIV_18 ESIDIV3A2
#define ESI_TSM_START_TRIGGER_DIV_22 ESIDIV3A2 + ESIDIV3A0
#define ESI_TSM_START_TRIGGER_DIV_26 ESIDIV3A2 + ESIDIV3A1
#define ESI_TSM_START_TRIGGER_DIV_30 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0
#define ESI_TSM_START_TRIGGER_DIV_42 ESIDIV3A0 + ESIDIV3A1 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_50 ESIDIV3A1 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_54 ESIDIV3A2 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_66 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_70 ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_78 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_90 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_98 ESIDIV3A0 + ESIDIV3A1 + ESIDIV3B0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_110 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_126 ESIDIV3A2 + ESIDIV3B0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_130 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_150 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_154 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_162 ESIDIV3A2 + ESIDIV3B2
#define ESI_TSM_START_TRIGGER_DIV_182 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_198 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B2
#define ESI_TSM_START_TRIGGER_DIV_210 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B0 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_234 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2
#define ESI_TSM_START_TRIGGER_DIV_242 ESIDIV3A2 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_270 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2
#define ESI_TSM_START_TRIGGER_DIV_286 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_330 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B0
#define ESI_TSM_START_TRIGGER_DIV_338 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3B2 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_390 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B1
#define ESI_TSM_START_TRIGGER_DIV_450 ESIDIV3A2 + ESIDIV3A1 + ESIDIV3A0 + ESIDIV3B2 + ESIDIV3B1 + ESIDIV3B0
//*****************************************************************************
//
//The following are values that can be passed to
//repeatMode parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_REPEAT_NEW_TRIGGER 0x0
#define ESI_TSM_REPEAT_END_OF_PREVIOUS_SEQ ESITSMRP
//*****************************************************************************
//
//The following are values that can be passed to
//startTriggerSelection parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_STOP_SEQUENCE 0x0
#define ESI_TSM_START_TRIGGER_ACLK ESITSMTRG0
#define ESI_TSM_START_TRIGGER_SOFTWARE ESITSMTRG1
#define ESI_TSM_START_TRIGGER_ACLK_OR_SOFTWARE ESITSMTRG1 + ESITSMTRG0
//*****************************************************************************
//
//The following are values that can be passed to
//tsmFunctionalitySelection parameter in ESI_TSM_InitParams
//
//*****************************************************************************
#define ESI_TSM_HIGH_FREQ_CLK_FUNCTION_ON 0x0
#define ESI_TSM_AUTOZERO_CYCLE_FUNCTION_ON ESICLKAZSEL
typedef struct ESI_TSM_InitParams {
uint16_t smclkDivider;
uint16_t aclkDivider;
uint16_t startTriggerAclkDivider;
uint16_t repeatMode;
uint16_t startTriggerSelection;
uint16_t tsmFunctionSelection;
} ESI_TSM_InitParams;
extern const ESI_TSM_InitParams ESI_TSM_INITPARAMS_DEFAULT;
void ESI_TSM_init (ESI_TSM_InitParams *params);
void ESI_TSM_clearTable(void);
void ESI_TSM_copyTable(uint16_t* tsmTable, uint16_t size);
void ESI_TSM_softwareTrigger(void);
uint8_t ESI_TSM_getTSMStateDuration(uint8_t stateRegNum);
void ESI_TSM_setTSMStateDuration(uint8_t stateRegNum, uint8_t duration);
//*****************************************************************************
//
//The following are values that can be passed to
//Q6Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_Q6_DISABLE 0x0
#define ESI_PSM_Q6_ENABLE ESIQ6EN
//*****************************************************************************
//
//The following are values that can be passed to
//Q7TriggerSelect parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_Q7_TRIGGER_DISABLE 0x0
#define ESI_PSM_Q7_TRIGGER_ENABLE ESIQ7TRG
//*****************************************************************************
//
//The following are values that can be passed to
//count0Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT0_DISABLE 0x0
#define ESI_PSM_CNT0_ENABLE ESICNT0EN
//*****************************************************************************
//
//The following are values that can be passed to
//count0Reset parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT0_NO_RESET 0x0
#define ESI_PSM_CNT0_RESET ESICNT0RST
//*****************************************************************************
//
//The following are values that can be passed to
//count1Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT1_DISABLE 0x0
#define ESI_PSM_CNT1_ENABLE ESICNT1EN
//*****************************************************************************
//
//The following are values that can be passed to
//count1Reset parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT1_NO_RESET 0x0
#define ESI_PSM_CNT1_RESET ESICNT1RST
//*****************************************************************************
//
//The following are values that can be passed to
//count2Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT2_DISABLE 0x0
#define ESI_PSM_CNT2_ENABLE ESICNT2EN
//*****************************************************************************
//
//The following are values that can be passed to
//count2Reset parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_CNT2_NO_RESET 0x0
#define ESI_PSM_CNT2_RESET ESICNT2RST
//*****************************************************************************
//
//The following are values that can be passed to
//V2Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_S3_SELECT 0x0
#define ESI_PSM_Q0_SELECT ESIV2SEL
//*****************************************************************************
//
//The following are values that can be passed to
//TEST4Select parameter in ESI_PSM_InitParams
//
//*****************************************************************************
#define ESI_PSM_TEST4_IS_Q2 0x0
#define ESI_PSM_TEST4_IS_Q1 ESITEST4SEL0
#define ESI_PSM_TEST4_IS_TSM_CLK ESITEST4SEL1
#define ESI_PSM_TEST4_IS_AFE1_COMPARATOR ESITEST4SEL0 + ESITEST4SEL1
typedef struct ESI_PSM_InitParams {
uint16_t Q6Select;
uint16_t Q7TriggerSelect;
uint16_t count0Select;
uint16_t count0Reset;
uint16_t count1Select;
uint16_t count1Reset;
uint16_t count2Select;
uint16_t count2Reset;
uint16_t V2Select;
uint16_t TEST4Select;
} ESI_PSM_InitParams;
extern const ESI_PSM_InitParams ESI_PSM_INITPARAMS_DEFAULT;
void ESI_PSM_init (ESI_PSM_InitParams *params);
void ESI_PSM_clearTable(void);
void ESI_PSM_copyTable(uint8_t * psmTable, uint8_t size);
//*****************************************************************************
//
//The following are values that can be passed to
//counterToReset parameter in ESI_PSM_counterReset
//
//*****************************************************************************
#define ESI_PSM_CNT0_RST ESICNT0RST
#define ESI_PSM_CNT1_RST ESICNT1RST
#define ESI_PSM_CNT2_RST ESICNT2RST
void ESI_PSM_resetCounter (uint16_t counterToReset);
//*****************************************************************************
//
//The following are values that can be passed to
//testCycleInsertion parameter in ESI_InitParams
//
//*****************************************************************************
#define ESI_TEST_CYCLE_INSERTION_DISABLE 0x0
#define ESI_TEST_CYCLE_INSERTION_ENABLE ESITESTD
//*****************************************************************************
//
//The following are values that can be passed to
//timerAInputSelection parameter in ESI_InitParams
//
//*****************************************************************************
#define ESI_TIMERA_INPUT_TSM_COMPOUT 0x0
#define ESI_TIMERA_INPUT_TSM_PPUSRC ESICS
//*****************************************************************************
//
//The following are values that can be passed to
//testChannel0Select parameter in ESI_InitParams
//
//*****************************************************************************
#define ESI_TEST_CHANNEL0_SOURCE_IS_CH0_CI0 0x0
#define ESI_TEST_CHANNEL0_SOURCE_IS_CH1_CI1 ESITCH00
#define ESI_TEST_CHANNEL0_SOURCE_IS_CH2_CI2 ESITCH01
#define ESI_TEST_CHANNEL0_SOURCE_IS_CH3_CI3 ESITCH00 + ESITCH01
//*****************************************************************************
//
//The following are values that can be passed to
//testChannel1Select parameter in ESI_InitParams
//
//*****************************************************************************
#define ESI_TEST_CHANNEL1_SOURCE_IS_CH0_CI0 0x0
#define ESI_TEST_CHANNEL1_SOURCE_IS_CH1_CI1 ESITCH10
#define ESI_TEST_CHANNEL1_SOURCE_IS_CH2_CI2 ESITCH11
#define ESI_TEST_CHANNEL1_SOURCE_IS_CH3_CI3 ESITCH10 + ESITCH11
//*****************************************************************************
//
//The following are values that can be passed to
//internalOscSelect parameter in ESI_InitParams
//
//*****************************************************************************
#define ESI_INTERNAL_OSC_DISABLE 0x0
#define ESI_INTERNAL_OSC_ENABLE ESIHFSEL
//*****************************************************************************
//
//The following are values that can be passed to
//sourceNum parameter in ESI_psmSourceSelect
//
//*****************************************************************************
#define PSM_S1_SOURCE 1
#define PSM_S2_SOURCE 2
#define PSM_S3_SOURCE 3
//*****************************************************************************
//
//The following are values that can be passed to
//sourceSelect parameter in ESI_psmSourceSelect
//
//*****************************************************************************
#define ESI_PSM_SOURCE_IS_ESIOUT0 0
#define ESI_PSM_SOURCE_IS_ESIOUT1 1
#define ESI_PSM_SOURCE_IS_ESIOUT2 2
#define ESI_PSM_SOURCE_IS_ESIOUT3 3
#define ESI_PSM_SOURCE_IS_ESIOUT4 4
#define ESI_PSM_SOURCE_IS_ESIOUT5 5
#define ESI_PSM_SOURCE_IS_ESIOUT6 6
#define ESI_PSM_SOURCE_IS_ESIOUT7 7
void ESI_timerAInputSelect(uint16_t select);
void ESI_psmSourceSelect(uint16_t sourceNum, uint16_t sourceSelect);
void ESI_testChannel0SourceSelect(uint16_t sourceSelect);
void ESI_testChannel1SourceSelect(uint16_t sourceSelect);
void ESI_enable(void);
void ESI_disable(void);
void ESI_enableInternalOscillator();
void ESI_disableInternalOscillator();
void ESI_startInternalOscCal(void);
void ESI_stopInternalOscCal(void);
//*****************************************************************************
//
//The following are values that can be passed to
//oversample parameter in ESI_measureESIOSCOversample
//
//*****************************************************************************
#define ESI_ESIOSC_NO_OVERSAMPLE 0
#define ESI_ESIOSC_OVERSAMPLE_2 2
#define ESI_ESIOSC_OVERSAMPLE_4 4
#define ESI_ESIOSC_OVERSAMPLE_8 8
uint16_t ESI_measureESIOSC(uint8_t oversample);
uint8_t ESI_getESICLKFQ(void);
//*****************************************************************************
//
//The following are values that can be passed to
//incOrDec parameter in ESI_adjustInternalOscFreq
//
//*****************************************************************************
#define ESI_INTERNAL_OSC_FREQ_DECREASE 0x0
#define ESI_INTERNAL_OSC_FREQ_INCREASE 0x1
void ESI_adjustInternalOscFreq(uint16_t incOrDec);
void ESI_setNominalInternalOscFreq(void);
void ESI_calibrateInternalOscFreq(uint16_t targetAclkCounts);
void ESI_setPSMCounter1IncreaseThreshold(
uint16_t threshold);
void ESI_setPSMCounter1DecreaseThreshold(
uint16_t threshold);
//*****************************************************************************
//
//The following are values that can be passed to
//resultNum parameter in ESI_getConversionResult
//
//*****************************************************************************
#define ESI_CONVERSION_RESULT_1 ESIADMEM1
#define ESI_CONVERSION_RESULT_2 ESIADMEM2
#define ESI_CONVERSION_RESULT_3 ESIADMEM3
#define ESI_CONVERSION_RESULT_4 ESIADMEM4
uint16_t ESI_getConversionResult(uint16_t resultNum);
//*****************************************************************************
//
//The following are values that can be passed to
//dacRegNum parameter in ESI_setAFE1DACValue and ESI_getAFE1DACValue
//
//*****************************************************************************
#define ESI_DAC1_REG0 0
#define ESI_DAC1_REG1 1
#define ESI_DAC1_REG2 2
#define ESI_DAC1_REG3 3
#define ESI_DAC1_REG4 4
#define ESI_DAC1_REG5 5
#define ESI_DAC1_REG6 6
#define ESI_DAC1_REG7 7
void ESI_setAFE1DACValue(uint16_t dacValue,
uint8_t dacRegNum);
uint16_t ESI_getAFE1DACValue(uint8_t dacRegNum);
//*****************************************************************************
//
//The following are values that can be passed to
//dacRegNum parameter in ESI_setAFE2DACValue and ESI_getAFE2DACValue
//
//*****************************************************************************
#define ESI_DAC2_REG0 0
#define ESI_DAC2_REG1 1
#define ESI_DAC2_REG2 2
#define ESI_DAC2_REG3 3
#define ESI_DAC2_REG4 4
#define ESI_DAC2_REG5 5
#define ESI_DAC2_REG6 6
#define ESI_DAC2_REG7 7
void ESI_setAFE2DACValue(uint16_t dacValue,
uint8_t dacRegNum);
uint16_t ESI_getAFE2DACValue(uint8_t dacRegNum);
//*****************************************************************************
//
//The following are values that can be passed to
//stateRegNum parameter in ESI_setTSMstateReg
//
//*****************************************************************************
#define ESI_TSM_STATE_REG_0 0
#define ESI_TSM_STATE_REG_1 1
#define ESI_TSM_STATE_REG_2 2
#define ESI_TSM_STATE_REG_3 3
#define ESI_TSM_STATE_REG_4 4
#define ESI_TSM_STATE_REG_5 5
#define ESI_TSM_STATE_REG_6 6
#define ESI_TSM_STATE_REG_7 7
#define ESI_TSM_STATE_REG_8 8
#define ESI_TSM_STATE_REG_9 9
#define ESI_TSM_STATE_REG_10 10
#define ESI_TSM_STATE_REG_11 11
#define ESI_TSM_STATE_REG_12 12
#define ESI_TSM_STATE_REG_13 13
#define ESI_TSM_STATE_REG_14 14
#define ESI_TSM_STATE_REG_15 15
#define ESI_TSM_STATE_REG_16 16
#define ESI_TSM_STATE_REG_17 17
#define ESI_TSM_STATE_REG_18 18
#define ESI_TSM_STATE_REG_19 19
#define ESI_TSM_STATE_REG_20 20
#define ESI_TSM_STATE_REG_21 21
#define ESI_TSM_STATE_REG_22 22
#define ESI_TSM_STATE_REG_23 23
#define ESI_TSM_STATE_REG_24 24
#define ESI_TSM_STATE_REG_25 25
#define ESI_TSM_STATE_REG_26 26
#define ESI_TSM_STATE_REG_27 27
#define ESI_TSM_STATE_REG_28 28
#define ESI_TSM_STATE_REG_29 29
#define ESI_TSM_STATE_REG_30 30
#define ESI_TSM_STATE_REG_31 31
//*****************************************************************************
//
//The following are values that can be passed to
//inputChannelSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_CHANNEL_SELECT_CH0 0
#define ESI_TSM_STATE_CHANNEL_SELECT_CH1 ESICH0
#define ESI_TSM_STATE_CHANNEL_SELECT_CH2 ESICH1
#define ESI_TSM_STATE_CHANNEL_SELECT_CH3 (ESICH1 | ESICH0)
//*****************************************************************************
//
//The following are values that can be passed to
//LCDampingSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_LC_DAMPING_DISABLE 0x0
#define ESI_TSM_STATE_LC_DAMPING_ENABLE ESILCEN
//*****************************************************************************
//
//The following are values that can be passed to
//excitationSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_EXCITATION_DISABLE 0x0
#define ESI_TSM_STATE_EXCITATION_ENABLE ESIEX
//*****************************************************************************
//
//The following are values that can be passed to
//comparatorSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_COMPARATOR_DISABLE 0x0
#define ESI_TSM_STATE_COMPARATOR_ENABLE ESICA
//*****************************************************************************
//
//The following are values that can be passed to
//highFreqClkOn_or_compAutoZeroCycle parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_HIGH_FREQ_CLK_ON 0x0
#define ESI_TSM_STATE_COMP_AUTOZERO_CYCLE ESICLKON
//*****************************************************************************
//
//The following are values that can be passed to
//outputLatchSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_OUTPUT_LATCH_DISABLE 0x0
#define ESI_TSM_STATE_OUTPUT_LATCH_ENABLE ESIRSON
//*****************************************************************************
//
//The following are values that can be passed to
//testCycleSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_TEST_CYCLE_DISABLE 0x0
#define ESI_TSM_STATE_TEST_CYCLE_ENABLE ESITESTS1
//*****************************************************************************
//
//The following are values that can be passed to
//dacSelect parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_DAC_DISABLE 0x0
#define ESI_TSM_STATE_DAC_ENABLE ESIDAC
//*****************************************************************************
//
//The following are values that can be passed to
//tsmStop parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_CONTINUE 0x0
#define ESI_TSM_STATE_STOP ESISTOP
//*****************************************************************************
//
//The following are values that can be passed to
//tsmClkSrc parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_HIGH_FREQ_CLK 0x0
#define ESI_TSM_STATE_ACLK ESICLK
//*****************************************************************************
//
//Values between these min and max can be pased to
//duration parameter in ESI_TSM_StateParams
//
//*****************************************************************************
#define ESI_TSM_STATE_DURATION_MIN 0x00
#define ESI_TSM_STATE_DURATION_MAX 0x1F
typedef struct ESI_TSM_StateParams {
uint16_t inputChannelSelect;
uint16_t LCDampingSelect;
uint16_t excitationSelect;
uint16_t comparatorSelect;
uint16_t highFreqClkOn_or_compAutoZeroCycle;
uint16_t outputLatchSelect;
uint16_t testCycleSelect;
uint16_t dacSelect;
uint16_t tsmStop;
uint16_t tsmClkSrc;
uint16_t duration;
} ESI_TSM_StateParams;
void ESI_setTSMstateReg(ESI_TSM_StateParams *params,
uint8_t stateRegNum);
uint16_t ESIgetInterruptVectorRegister(void);
//*****************************************************************************
//
//The following values can be be used to form the interrupt mask for
//ESI_enableInterrupt and ESI_disableInterrupt
//
//*****************************************************************************
#define ESI_INTERRUPT_AFE1_ESIOUTX ESIIE0
#define ESI_INTERRUPT_ESISTOP ESIIE1
#define ESI_INTERRUPT_ESISTART ESIIE2
#define ESI_INTERRUPT_ESICNT1 ESIIE3
#define ESI_INTERRUPT_ESICNT2 ESIIE4
#define ESI_INTERRUPT_Q6_BIT_SET ESIIE5
#define ESI_INTERRUPT_Q7_BIT_SET ESIIE6
#define ESI_INTERRUPT_ESICNT0_COUNT_INTERVAL ESIIE7
#define ESI_INTERRUPT_AFE2_ESIOUTX ESIIE8
void ESI_enableInterrupt(uint16_t interruptMask);
void ESI_disableInterrupt(uint16_t interruptMask);
//*****************************************************************************
//
//Return values for ESI_getInterruptStatus
//
//*****************************************************************************
#define ESI_INTERRUPT_FLAG_AFE1_ESIOUTX ESIIFG0
#define ESI_INTERRUPT_FLAG_ESISTOP ESIIFG1
#define ESI_INTERRUPT_FLAG_ESISTART ESIIFG2
#define ESI_INTERRUPT_FLAG_ESICNT1 ESIIFG3
#define ESI_INTERRUPT_FLAG_ESICNT2 ESIIFG4
#define ESI_INTERRUPT_FLAG_Q6_BIT_SET ESIIFG5
#define ESI_INTERRUPT_FLAG_Q7_BIT_SET ESIIFG6
#define ESI_INTERRUPT_FLAG_ESICNT0_COUNT_INTERVAL ESIIFG7
#define ESI_INTERRUPT_FLAG_AFE2_ESIOUTX ESIIFG8
uint16_t ESI_getInterruptStatus ( uint16_t interruptMask);
void ESI_clearInterrupt (uint16_t interruptMask);
//*****************************************************************************
//
//Values for ifg0Src in ESI_setIFG0Source
//
//*****************************************************************************
#define ESI_IFG0_SET_WHEN_ESIOUT0_SET ESIIFGSET1_0
#define ESI_IFG0_SET_WHEN_ESIOUT0_RESET ESIIFGSET1_1
#define ESI_IFG0_SET_WHEN_ESIOUT1_SET ESIIFGSET1_2
#define ESI_IFG0_SET_WHEN_ESIOUT1_RESET ESIIFGSET1_3
#define ESI_IFG0_SET_WHEN_ESIOUT2_SET ESIIFGSET1_4
#define ESI_IFG0_SET_WHEN_ESIOUT2_RESET ESIIFGSET1_5
#define ESI_IFG0_SET_WHEN_ESIOUT3_SET ESIIFGSET1_6
#define ESI_IFG0_SET_WHEN_ESIOUT3_RESET ESIIFGSET1_7
void ESI_setIFG0Source(uint16_t ifg0Src);
//*****************************************************************************
//
//Values for ifg8Src in ESI_setIFG8Source
//
//*****************************************************************************
#define ESI_IFG8_SET_WHEN_ESIOUT4_SET ESIIFGSET2_0
#define ESI_IFG8_SET_WHEN_ESIOUT4_RESET ESIIFGSET2_1
#define ESI_IFG8_SET_WHEN_ESIOUT5_SET ESIIFGSET2_2
#define ESI_IFG8_SET_WHEN_ESIOUT5_RESET ESIIFGSET2_3
#define ESI_IFG8_SET_WHEN_ESIOUT6_SET ESIIFGSET2_4
#define ESI_IFG8_SET_WHEN_ESIOUT6_RESET ESIIFGSET2_5
#define ESI_IFG8_SET_WHEN_ESIOUT7_SET ESIIFGSET2_6
#define ESI_IFG8_SET_WHEN_ESIOUT7_RESET ESIIFGSET2_7
void ESI_setIFG8Source(uint16_t ifg8Src);
//*****************************************************************************
//
//Values for ifg7Src in ESI_setIFG7Source
//
//*****************************************************************************
#define ESI_IFG7_SOURCE_EVERY_COUNT_OF_CNT0 ESIIS0_0
#define ESI_IFG7_SOURCE_CNT0_MOD4 ESIIS0_1
#define ESI_IFG7_SOURCE_CNT0_MOD256 ESIIS0_2
#define ESI_IFG7_SOURCE_CNT0_ROLLOVER ESIIS0_3
void ESI_setIFG7Source(uint16_t ifg7Src);
//*****************************************************************************
//
//Values for ifg4Src in ESI_setIFG4Source
//
//*****************************************************************************
#define ESI_IFG4_SOURCE_EVERY_COUNT_OF_CNT2 ESIIS2_0
#define ESI_IFG4_SOURCE_CNT2_MOD4 ESIIS2_1
#define ESI_IFG4_SOURCE_CNT2_MOD256 ESIIS2_2
#define ESI_IFG4_SOURCE_CNT2_ROLLOVER ESIIS2_3
void ESI_setIFG4Source(uint16_t ifg4Src);
void ESI_setPSMCounter1UpperThreshold(uint16_t threshold);
void ESI_setPSMCounter1LowerThreshold(uint16_t threshold);
//*****************************************************************************
//
// Set correct DAC values for LC sensors
//
//*****************************************************************************
void ESI_LC_DAC_calibration(uint8_t selected_channel);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_a_spi.c - Driver for the eusci_a_spi Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup eusci_a_spi_api eusci_a_spi
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Ax__
#include "eusci_a_spi.h"
#include <assert.h>
void EUSCI_A_SPI_initMaster (uint16_t baseAddress,
EUSCI_A_SPI_initMasterParam *param)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
//Reset OFS_UCAxCTLW0 values
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
UCMST + UCMODE_3 + UCSYNC);
//Reset OFS_UCAxCTLW0 values
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSSEL_3);
//Select Clock
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (uint16_t)param->selectClockSource;
HWREG16(baseAddress + OFS_UCAxBRW) =
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
/*
* Configure as SPI master mode.
* Clock phase select, polarity, msb
* UCMST = Master mode
* UCSYNC = Synchronous mode
* UCMODE_0 = 3-pin SPI
*/
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
param->msbFirst +
param->clockPhase +
param->clockPolarity +
UCMST +
UCSYNC +
param->spiMode
);
//No modulation
HWREG16(baseAddress + OFS_UCAxMCTLW) = 0;
}
void EUSCI_A_SPI_select4PinFunctionality (uint16_t baseAddress,
uint16_t select4PinFunctionality
)
{
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSTEM;
HWREG16(baseAddress + OFS_UCAxCTLW0) |= select4PinFunctionality;
}
void EUSCI_A_SPI_changeMasterClock (uint16_t baseAddress,
EUSCI_A_SPI_changeMasterClockParam *param)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCAxBRW) =
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
}
void EUSCI_A_SPI_initSlave (uint16_t baseAddress, EUSCI_A_SPI_initSlaveParam *param)
{
//Disable USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
//Reset OFS_UCAxCTLW0 register
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCMSB +
UC7BIT +
UCMST +
UCCKPL +
UCCKPH +
UCMODE_3
);
//Clock polarity, phase select, msbFirst, SYNC, Mode0
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (param->clockPhase +
param->clockPolarity +
param->msbFirst +
UCSYNC +
param->spiMode
);
}
void EUSCI_A_SPI_changeClockPhasePolarity (uint16_t baseAddress,
uint16_t clockPhase,
uint16_t clockPolarity
)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCCKPH + UCCKPL);
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (
clockPhase +
clockPolarity
);
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
}
void EUSCI_A_SPI_transmitData ( uint16_t baseAddress,
uint8_t transmitData
)
{
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
}
uint8_t EUSCI_A_SPI_receiveData (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_UCAxRXBUF)) ;
}
void EUSCI_A_SPI_enableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCAxIE) |= mask;
}
void EUSCI_A_SPI_disableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCAxIE) &= ~mask;
}
uint8_t EUSCI_A_SPI_getInterruptStatus (uint16_t baseAddress,
uint8_t mask
)
{
return ( HWREG16(baseAddress + OFS_UCAxIFG) & mask );
}
void EUSCI_A_SPI_clearInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCAxIFG) &= ~mask;
}
void EUSCI_A_SPI_enable (uint16_t baseAddress)
{
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
}
void EUSCI_A_SPI_disable (uint16_t baseAddress)
{
//Set the UCSWRST bit to disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
}
uint32_t EUSCI_A_SPI_getReceiveBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCAxRXBUF );
}
uint32_t EUSCI_A_SPI_getTransmitBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCAxTXBUF );
}
uint16_t EUSCI_A_SPI_isBusy (uint16_t baseAddress)
{
//Return the bus busy status.
return (HWREG16(baseAddress + OFS_UCAxSTATW) & UCBUSY);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for eusci_a_spi_api
//! @}
//
//*****************************************************************************

526
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_a_spi.h - Driver for the EUSCI_A_SPI Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_EUSCI_A_SPI_H__
#define __MSP430WARE_EUSCI_A_SPI_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Ax__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the EUSCI_A_SPI_changeMasterClock() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct EUSCI_A_SPI_changeMasterClockParam {
//! Is the frequency of the selected clock source in Hz
uint32_t clockSourceFrequency;
//! Is the desired clock rate in Hz for SPI communication
uint32_t desiredSpiClock;
} EUSCI_A_SPI_changeMasterClockParam;
//*****************************************************************************
//
//! \brief Used in the EUSCI_A_SPI_initSlave() function as the param parameter.
//
//*****************************************************************************
typedef struct EUSCI_A_SPI_initSlaveParam {
//! Controls the direction of the receive and transmit shift register.
//! \n Valid values are:
//! - \b EUSCI_A_SPI_MSB_FIRST
//! - \b EUSCI_A_SPI_LSB_FIRST [Default]
uint16_t msbFirst;
//! Is clock phase select.
//! \n Valid values are:
//! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
//! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
uint16_t clockPhase;
//! Is clock polarity select
//! \n Valid values are:
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
uint16_t clockPolarity;
//! Is SPI mode select
//! \n Valid values are:
//! - \b EUSCI_A_SPI_3PIN
//! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH
//! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW
uint16_t spiMode;
} EUSCI_A_SPI_initSlaveParam;
//*****************************************************************************
//
//! \brief Used in the EUSCI_A_SPI_initMaster() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct EUSCI_A_SPI_initMasterParam {
//! Selects Clock source. Refer to device specific datasheet for available
//! options.
//! \n Valid values are:
//! - \b EUSCI_A_SPI_CLOCKSOURCE_ACLK
//! - \b EUSCI_A_SPI_CLOCKSOURCE_SMCLK
uint8_t selectClockSource;
//! Is the frequency of the selected clock source in Hz
uint32_t clockSourceFrequency;
//! Is the desired clock rate in Hz for SPI communication
uint32_t desiredSpiClock;
//! Controls the direction of the receive and transmit shift register.
//! \n Valid values are:
//! - \b EUSCI_A_SPI_MSB_FIRST
//! - \b EUSCI_A_SPI_LSB_FIRST [Default]
uint16_t msbFirst;
//! Is clock phase select.
//! \n Valid values are:
//! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
//! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
uint16_t clockPhase;
//! Is clock polarity select
//! \n Valid values are:
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
uint16_t clockPolarity;
//! Is SPI mode select
//! \n Valid values are:
//! - \b EUSCI_A_SPI_3PIN
//! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH
//! - \b EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW
uint16_t spiMode;
} EUSCI_A_SPI_initMasterParam;
//*****************************************************************************
//
// The following are values that can be passed to the clockPhase parameter for
// functions: EUSCI_A_SPI_changeClockPhasePolarity(); the param parameter for
// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
#define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_A_SPI_MSB_FIRST UCMSB
#define EUSCI_A_SPI_LSB_FIRST 0x00
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave(); the
// clockPolarity parameter for functions:
// EUSCI_A_SPI_changeClockPhasePolarity().
//
//*****************************************************************************
#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_SPI_initMaster().
//
//*****************************************************************************
#define EUSCI_A_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
#define EUSCI_A_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_SPI_initMaster(), and EUSCI_A_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_A_SPI_3PIN UCMODE_0
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
//*****************************************************************************
//
// The following are values that can be passed to the select4PinFunctionality
// parameter for functions: EUSCI_A_SPI_select4PinFunctionality().
//
//*****************************************************************************
#define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x0000
#define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: EUSCI_A_SPI_enableInterrupt(), EUSCI_A_SPI_disableInterrupt(),
// EUSCI_A_SPI_getInterruptStatus(), and EUSCI_A_SPI_clearInterrupt() as well
// as returned by the EUSCI_A_SPI_getInterruptStatus() function.
//
//*****************************************************************************
#define EUSCI_A_SPI_TRANSMIT_INTERRUPT UCTXIE
#define EUSCI_A_SPI_RECEIVE_INTERRUPT UCRXIE
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the EUSCI_A_SPI_isBusy() function.
//
//*****************************************************************************
#define EUSCI_A_SPI_BUSY UCBUSY
#define EUSCI_A_SPI_NOT_BUSY 0x00
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Initializes the SPI Master block.
//!
//! Upon successful initialization of the SPI master block, this function will
//! have set the bus speed for the master, but the SPI Master block still
//! remains disabled and must be enabled with EUSCI_A_SPI_enable()
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI Master module.
//! \param param is the pointer to struct for master initialization.
//!
//! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB, \b UCSSELx and
//! \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return STATUS_SUCCESS
//
//*****************************************************************************
extern void EUSCI_A_SPI_initMaster(uint16_t baseAddress,
EUSCI_A_SPI_initMasterParam *param);
//*****************************************************************************
//
//! \brief Selects 4Pin Functionality
//!
//! This function should be invoked only in 4-wire mode. Invoking this function
//! has no effect in 3-wire mode.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param select4PinFunctionality selects 4 pin functionality
//! Valid values are:
//! - \b EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
//! - \b EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
//!
//! Modified bits are \b UCSTEM of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_select4PinFunctionality(uint16_t baseAddress,
uint16_t select4PinFunctionality);
//*****************************************************************************
//
//! \brief Initializes the SPI Master clock. At the end of this function call,
//! SPI module is left enabled.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param param is the pointer to struct for master clock setting.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_changeMasterClock(uint16_t baseAddress,
EUSCI_A_SPI_changeMasterClockParam *param);
//*****************************************************************************
//
//! \brief Initializes the SPI Slave block.
//!
//! Upon successful initialization of the SPI slave block, this function will
//! have initialized the slave block, but the SPI Slave block still remains
//! disabled and must be enabled with EUSCI_A_SPI_enable()
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI Slave module.
//! \param param is the pointer to struct for slave initialization.
//!
//! Modified bits are \b UCMSB, \b UCMST, \b UC7BIT, \b UCCKPL, \b UCCKPH, \b
//! UCMODE and \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return STATUS_SUCCESS
//
//*****************************************************************************
extern void EUSCI_A_SPI_initSlave(uint16_t baseAddress,
EUSCI_A_SPI_initSlaveParam *param);
//*****************************************************************************
//
//! \brief Changes the SPI clock phase and polarity. At the end of this
//! function call, SPI module is left enabled.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param clockPhase is clock phase select.
//! Valid values are:
//! - \b EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
//! [Default]
//! - \b EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
//! \param clockPolarity is clock polarity select
//! Valid values are:
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
//!
//! Modified bits are \b UCCKPL, \b UCCKPH and \b UCSWRST of \b UCAxCTLW0
//! register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_changeClockPhasePolarity(uint16_t baseAddress,
uint16_t clockPhase,
uint16_t clockPolarity);
//*****************************************************************************
//
//! \brief Transmits a byte from the SPI Module.
//!
//! This function will place the supplied data into SPI transmit data register
//! to start transmission.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param transmitData data to be transmitted from the SPI module
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_transmitData(uint16_t baseAddress,
uint8_t transmitData);
//*****************************************************************************
//
//! \brief Receives a byte that has been sent to the SPI Module.
//!
//! This function reads a byte of data from the SPI receive data Register.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! \return Returns the byte received from by the SPI module, cast as an
//! uint8_t.
//
//*****************************************************************************
extern uint8_t EUSCI_A_SPI_receiveData(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables individual SPI interrupt sources.
//!
//! Enables the indicated SPI interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. Does not clear interrupt flags.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param mask is the bit mask of the interrupt sources to be enabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIFG register and bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_enableInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Disables individual SPI interrupt sources.
//!
//! Disables the indicated SPI interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param mask is the bit mask of the interrupt sources to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_disableInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Gets the current SPI interrupt status.
//!
//! This returns the interrupt status for the SPI module based on which flag is
//! passed.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param mask is the masked interrupt flag status to be returned.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
//!
//! \return Logical OR of any of the following:
//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Clears the selected SPI interrupt status flag.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//! \param mask is the masked interrupt flag to be cleared.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_A_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_clearInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Enables the SPI block.
//!
//! This will enable operation of the SPI block.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_enable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the SPI block.
//!
//! This will disable operation of the SPI block.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_SPI_disable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the RX Buffer of the SPI for the DMA module.
//!
//! Returns the address of the SPI RX Buffer. This can be used in conjunction
//! with the DMA to store the received data directly to memory.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! \return the address of the RX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_A_SPI_getReceiveBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the TX Buffer of the SPI for the DMA module.
//!
//! Returns the address of the SPI TX Buffer. This can be used in conjunction
//! with the DMA to obtain transmitted data directly from memory.
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! \return the address of the TX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_A_SPI_getTransmitBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Indicates whether or not the SPI bus is busy.
//!
//! This function returns an indication of whether or not the SPI bus is
//! busy.This function checks the status of the bus via UCBBUSY bit
//!
//! \param baseAddress is the base address of the EUSCI_A_SPI module.
//!
//! \return One of the following:
//! - \b EUSCI_A_SPI_BUSY
//! - \b EUSCI_A_SPI_NOT_BUSY
//! \n indicating if the EUSCI_A_SPI is busy
//
//*****************************************************************************
extern uint16_t EUSCI_A_SPI_isBusy(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_EUSCI_A_SPI_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_a_uart.c - Driver for the eusci_a_uart Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup eusci_a_uart_api eusci_a_uart
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Ax__
#include "eusci_a_uart.h"
#include <assert.h>
bool EUSCI_A_UART_init(uint16_t baseAddress, EUSCI_A_UART_initParam *param)
{
bool retVal = STATUS_SUCCESS;
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
//Clock source select
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSSEL_3;
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (uint16_t)param->selectClockSource;
//MSB, LSB select
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCMSB;
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->msborLsbFirst;
//UCSPB = 0(1 stop bit) OR 1(2 stop bits)
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCSPB;
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->numberofStopBits;
//Parity
switch (param->parity){
case EUSCI_A_UART_NO_PARITY:
//No Parity
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPEN;
break;
case EUSCI_A_UART_ODD_PARITY:
//Odd Parity
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCPAR;
break;
case EUSCI_A_UART_EVEN_PARITY:
//Even Parity
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPEN;
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCPAR;
break;
}
//BaudRate Control Register
HWREG16(baseAddress + OFS_UCAxBRW ) = param->clockPrescalar;
//Modulation Control Register
HWREG16(baseAddress + OFS_UCAxMCTLW) = ((param->secondModReg <<8)
+ (param->firstModReg <<4) + param->overSampling );
//Asynchronous mode & 8 bit character select & clear mode
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSYNC +
UC7BIT +
UCMODE_3
);
//Configure UART mode.
HWREG16(baseAddress + OFS_UCAxCTLW0) |= param->uartMode ;
//Reset UCRXIE, UCBRKIE, UCDORM, UCTXADDR, UCTXBRK
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCRXEIE + UCBRKIE + UCDORM +
UCTXADDR + UCTXBRK
);
return (retVal);
}
void EUSCI_A_UART_transmitData ( uint16_t baseAddress,
uint8_t transmitData
)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE)){
//Poll for transmit interrupt flag
while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG));
}
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitData;
}
uint8_t EUSCI_A_UART_receiveData (uint16_t baseAddress)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCRXIE)){
//Poll for receive interrupt flag
while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCRXIFG));
}
return ( HWREG16(baseAddress + OFS_UCAxRXBUF)) ;
}
void EUSCI_A_UART_enableInterrupt (uint16_t baseAddress,
uint8_t mask
)
{
uint8_t locMask;
locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
| EUSCI_A_UART_TRANSMIT_INTERRUPT
| EUSCI_A_UART_STARTBIT_INTERRUPT
| EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
HWREG16(baseAddress + OFS_UCAxIE) |= (uint16_t)locMask;
locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
| EUSCI_A_UART_BREAKCHAR_INTERRUPT));
HWREG16(baseAddress + OFS_UCAxCTLW0) |= (uint16_t)locMask;
}
void EUSCI_A_UART_disableInterrupt (uint16_t baseAddress,
uint8_t mask
)
{
uint8_t locMask;
locMask = (mask & (EUSCI_A_UART_RECEIVE_INTERRUPT
| EUSCI_A_UART_TRANSMIT_INTERRUPT
| EUSCI_A_UART_STARTBIT_INTERRUPT
| EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT));
HWREG16(baseAddress + OFS_UCAxIE) &= (uint16_t)~locMask;
locMask = (mask & (EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT
| EUSCI_A_UART_BREAKCHAR_INTERRUPT));
HWREG16(baseAddress + OFS_UCAxCTLW0) &= (uint16_t)~locMask;
}
uint8_t EUSCI_A_UART_getInterruptStatus (uint16_t baseAddress,
uint8_t mask)
{
return ( HWREG16(baseAddress + OFS_UCAxIFG) & mask );
}
void EUSCI_A_UART_clearInterrupt (uint16_t baseAddress, uint16_t mask)
{
//Clear the UART interrupt source.
HWREG16(baseAddress + OFS_UCAxIFG) &= ~(mask);
}
void EUSCI_A_UART_enable (uint16_t baseAddress)
{
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~(UCSWRST);
}
void EUSCI_A_UART_disable (uint16_t baseAddress)
{
//Set the UCSWRST bit to disable the USCI Module
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCSWRST;
}
uint8_t EUSCI_A_UART_queryStatusFlags (uint16_t baseAddress,
uint8_t mask)
{
return ( HWREG16(baseAddress + OFS_UCAxSTATW) & mask );
}
void EUSCI_A_UART_setDormant (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCDORM;
}
void EUSCI_A_UART_resetDormant (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UCAxCTLW0) &= ~UCDORM;
}
void EUSCI_A_UART_transmitAddress (uint16_t baseAddress,
uint8_t transmitAddress)
{
//Set UCTXADDR bit
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXADDR;
//Place next byte to be sent into the transmit buffer
HWREG16(baseAddress + OFS_UCAxTXBUF) = transmitAddress;
}
void EUSCI_A_UART_transmitBreak (uint16_t baseAddress)
{
//Set UCTXADDR bit
HWREG16(baseAddress + OFS_UCAxCTLW0) |= UCTXBRK;
//If current mode is automatic baud-rate detection
if (EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE ==
(HWREG16(baseAddress + OFS_UCAxCTLW0) &
EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE)){
HWREG16(baseAddress + OFS_UCAxTXBUF) = EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC;
} else {
HWREG16(baseAddress + OFS_UCAxTXBUF) = DEFAULT_SYNC;
}
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCAxIE) & UCTXIE)){
//Poll for transmit interrupt flag
while (!(HWREG16(baseAddress + OFS_UCAxIFG) & UCTXIFG));
}
}
uint32_t EUSCI_A_UART_getReceiveBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCAxRXBUF );
}
uint32_t EUSCI_A_UART_getTransmitBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCAxTXBUF );
}
void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
uint16_t deglitchTime
)
{
HWREG16(baseAddress + OFS_UCAxCTLW1) &= ~(UCGLIT1 + UCGLIT0);
HWREG16(baseAddress + OFS_UCAxCTLW1) |= deglitchTime;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for eusci_a_uart_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_a_uart.h - Driver for the EUSCI_A_UART Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_EUSCI_A_UART_H__
#define __MSP430WARE_EUSCI_A_UART_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Ax__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
// The following values are the sync characters possible.
//
//*****************************************************************************
#define DEFAULT_SYNC 0x00
#define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
//*****************************************************************************
//
//! \brief Used in the EUSCI_A_UART_init() function as the param parameter.
//
//*****************************************************************************
typedef struct EUSCI_A_UART_initParam {
//! Selects Clock source. Refer to device specific datasheet for available
//! options.
//! \n Valid values are:
//! - \b EUSCI_A_UART_CLOCKSOURCE_SMCLK
//! - \b EUSCI_A_UART_CLOCKSOURCE_ACLK
uint8_t selectClockSource;
//! Is the value to be written into UCBRx bits
uint16_t clockPrescalar;
//! Is First modulation stage register setting. This value is a pre-
//! calculated value which can be obtained from the Device Users Guide.
//! This value is written into UCBRFx bits of UCAxMCTLW.
uint8_t firstModReg;
//! Is Second modulation stage register setting. This value is a pre-
//! calculated value which can be obtained from the Device Users Guide.
//! This value is written into UCBRSx bits of UCAxMCTLW.
uint8_t secondModReg;
//! Is the desired parity.
//! \n Valid values are:
//! - \b EUSCI_A_UART_NO_PARITY [Default]
//! - \b EUSCI_A_UART_ODD_PARITY
//! - \b EUSCI_A_UART_EVEN_PARITY
uint8_t parity;
//! Controls direction of receive and transmit shift register.
//! \n Valid values are:
//! - \b EUSCI_A_UART_MSB_FIRST
//! - \b EUSCI_A_UART_LSB_FIRST [Default]
uint16_t msborLsbFirst;
//! Indicates one/two STOP bits
//! \n Valid values are:
//! - \b EUSCI_A_UART_ONE_STOP_BIT [Default]
//! - \b EUSCI_A_UART_TWO_STOP_BITS
uint16_t numberofStopBits;
//! Selects the mode of operation
//! \n Valid values are:
//! - \b EUSCI_A_UART_MODE [Default]
//! - \b EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE
//! - \b EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE
//! - \b EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE
uint16_t uartMode;
//! Indicates low frequency or oversampling baud generation
//! \n Valid values are:
//! - \b EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION
//! - \b EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION
uint8_t overSampling;
} EUSCI_A_UART_initParam;
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_NO_PARITY 0x00
#define EUSCI_A_UART_ODD_PARITY 0x01
#define EUSCI_A_UART_EVEN_PARITY 0x02
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_MSB_FIRST UCMSB
#define EUSCI_A_UART_LSB_FIRST 0x00
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_MODE UCMODE_0
#define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1
#define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2
#define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
#define EUSCI_A_UART_CLOCKSOURCE_ACLK UCSSEL__ACLK
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_ONE_STOP_BIT 0x00
#define EUSCI_A_UART_TWO_STOP_BITS UCSPB
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_A_UART_init().
//
//*****************************************************************************
#define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
#define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: EUSCI_A_UART_enableInterrupt(), and
// EUSCI_A_UART_disableInterrupt().
//
//*****************************************************************************
#define EUSCI_A_UART_RECEIVE_INTERRUPT UCRXIE
#define EUSCI_A_UART_TRANSMIT_INTERRUPT UCTXIE
#define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE
#define EUSCI_A_UART_BREAKCHAR_INTERRUPT UCBRKIE
#define EUSCI_A_UART_STARTBIT_INTERRUPT UCSTTIE
#define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT UCTXCPTIE
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: EUSCI_A_UART_getInterruptStatus(), and
// EUSCI_A_UART_clearInterrupt() as well as returned by the
// EUSCI_A_UART_getInterruptStatus() function.
//
//*****************************************************************************
#define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG UCRXIFG
#define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG
#define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG UCSTTIFG
#define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG UCTXCPTIFG
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: EUSCI_A_UART_queryStatusFlags() as well as returned by the
// EUSCI_A_UART_queryStatusFlags() function.
//
//*****************************************************************************
#define EUSCI_A_UART_LISTEN_ENABLE UCLISTEN
#define EUSCI_A_UART_FRAMING_ERROR UCFE
#define EUSCI_A_UART_OVERRUN_ERROR UCOE
#define EUSCI_A_UART_PARITY_ERROR UCPE
#define EUSCI_A_UART_BREAK_DETECT UCBRK
#define EUSCI_A_UART_RECEIVE_ERROR UCRXERR
#define EUSCI_A_UART_ADDRESS_RECEIVED UCADDR
#define EUSCI_A_UART_IDLELINE UCIDLE
#define EUSCI_A_UART_BUSY UCBUSY
//*****************************************************************************
//
// The following are values that can be passed to the deglitchTime parameter
// for functions: EUSCI_A_UART_selectDeglitchTime().
//
//*****************************************************************************
#define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
#define EUSCI_A_UART_DEGLITCH_TIME_50ns UCGLIT0
#define EUSCI_A_UART_DEGLITCH_TIME_100ns UCGLIT1
#define EUSCI_A_UART_DEGLITCH_TIME_200ns (UCGLIT0 + UCGLIT1)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Advanced initialization routine for the UART block. The values to be
//! written into the clockPrescalar, firstModReg, secondModReg and overSampling
//! parameters should be pre-computed and passed into the initialization
//! function.
//!
//! Upon successful initialization of the UART block, this function will have
//! initialized the module, but the UART block still remains disabled and must
//! be enabled with EUSCI_A_UART_enable(). To calculate values for
//! clockPrescalar, firstModReg, secondModReg and overSampling please use the
//! link below.
//!
//! http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param param is the pointer to struct for initialization.
//!
//! Modified bits are \b UCPEN, \b UCPAR, \b UCMSB, \b UC7BIT, \b UCSPB, \b
//! UCMODEx and \b UCSYNC of \b UCAxCTL0 register; bits \b UCSSELx and \b
//! UCSWRST of \b UCAxCTL1 register.
//!
//! \return STATUS_SUCCESS or STATUS_FAIL of the initialization process
//
//*****************************************************************************
extern bool EUSCI_A_UART_init(uint16_t baseAddress,
EUSCI_A_UART_initParam *param);
//*****************************************************************************
//
//! \brief Transmits a byte from the UART Module.Please note that if TX
//! interrupt is disabled, this function manually polls the TX IFG flag waiting
//! for an indication that it is safe to write to the transmit buffer and does
//! not time-out
//!
//! This function will place the supplied data into UART transmit data register
//! to start transmission
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param transmitData data to be transmitted from the UART module
//!
//! Modified bits of \b UCAxTXBUF register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_transmitData(uint16_t baseAddress,
uint8_t transmitData);
//*****************************************************************************
//
//! \brief Receives a byte that has been sent to the UART Module.
//!
//! This function reads a byte of data from the UART receive data Register.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits of \b UCAxRXBUF register.
//!
//! \return Returns the byte received from by the UART module, cast as an
//! uint8_t.
//
//*****************************************************************************
extern uint8_t EUSCI_A_UART_receiveData(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables individual UART interrupt sources.
//!
//! Enables the indicated UART interrupt sources. The interrupt flag is first
//! and then the corresponding interrupt is enabled. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. Does not clear interrupt flags.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param mask is the bit mask of the interrupt sources to be enabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
//! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
//! erroneous-character interrupt enable
//! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
//! interrupt enable
//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
//! enable
//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
//! interrupt enable
//!
//! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_enableInterrupt(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Disables individual UART interrupt sources.
//!
//! Disables the indicated UART interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param mask is the bit mask of the interrupt sources to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
//! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
//! erroneous-character interrupt enable
//! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
//! interrupt enable
//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
//! enable
//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
//! interrupt enable
//!
//! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_disableInterrupt(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Gets the current UART interrupt status.
//!
//! This returns the interrupt status for the UART module based on which flag
//! is passed.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param mask is the masked interrupt flag status to be returned.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
//!
//! Modified bits of \b UCAxIFG register.
//!
//! \return Logical OR of any of the following:
//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
//! \n indicating the status of the masked flags
//
//*****************************************************************************
extern uint8_t EUSCI_A_UART_getInterruptStatus(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Clears UART interrupt sources.
//!
//! The UART interrupt source is cleared, so that it no longer asserts. The
//! highest interrupt flag is automatically cleared when an interrupt vector
//! generator is used.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param mask is a bit mask of the interrupt sources to be cleared.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
//! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
//!
//! Modified bits of \b UCAxIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_clearInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Enables the UART block.
//!
//! This will enable operation of the UART block.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_enable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the UART block.
//!
//! This will disable operation of the UART block.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_disable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Gets the current UART status flags.
//!
//! This returns the status for the UART module based on which flag is passed.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param mask is the masked interrupt flag status to be returned.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_A_UART_LISTEN_ENABLE
//! - \b EUSCI_A_UART_FRAMING_ERROR
//! - \b EUSCI_A_UART_OVERRUN_ERROR
//! - \b EUSCI_A_UART_PARITY_ERROR
//! - \b EUSCI_A_UART_BREAK_DETECT
//! - \b EUSCI_A_UART_RECEIVE_ERROR
//! - \b EUSCI_A_UART_ADDRESS_RECEIVED
//! - \b EUSCI_A_UART_IDLELINE
//! - \b EUSCI_A_UART_BUSY
//!
//! Modified bits of \b UCAxSTAT register.
//!
//! \return Logical OR of any of the following:
//! - \b EUSCI_A_UART_LISTEN_ENABLE
//! - \b EUSCI_A_UART_FRAMING_ERROR
//! - \b EUSCI_A_UART_OVERRUN_ERROR
//! - \b EUSCI_A_UART_PARITY_ERROR
//! - \b EUSCI_A_UART_BREAK_DETECT
//! - \b EUSCI_A_UART_RECEIVE_ERROR
//! - \b EUSCI_A_UART_ADDRESS_RECEIVED
//! - \b EUSCI_A_UART_IDLELINE
//! - \b EUSCI_A_UART_BUSY
//! \n indicating the status of the masked interrupt flags
//
//*****************************************************************************
extern uint8_t EUSCI_A_UART_queryStatusFlags(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Sets the UART module in dormant mode
//!
//! Puts USCI in sleep mode Only characters that are preceded by an idle-line
//! or with address bit set UCRXIFG. In UART mode with automatic baud-rate
//! detection, only the combination of a break and sync field sets UCRXIFG.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_setDormant(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Re-enables UART module from dormant mode
//!
//! Not dormant. All received characters set UCRXIFG.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits are \b UCDORM of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_resetDormant(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Transmits the next byte to be transmitted marked as address
//! depending on selected multiprocessor mode
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param transmitAddress is the next byte to be transmitted
//!
//! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_transmitAddress(uint16_t baseAddress,
uint8_t transmitAddress);
//*****************************************************************************
//
//! \brief Transmit break.
//!
//! Transmits a break with the next write to the transmit buffer. In UART mode
//! with automatic baud-rate detection,
//! EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC(0x55) must be written into UCAxTXBUF to
//! generate the required break/sync fields. Otherwise, DEFAULT_SYNC(0x00) must
//! be written into the transmit buffer. Also ensures module is ready for
//! transmitting the next data.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_transmitBreak(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the RX Buffer of the UART for the DMA module.
//!
//! Returns the address of the UART RX Buffer. This can be used in conjunction
//! with the DMA to store the received data directly to memory.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! \return Address of RX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_A_UART_getReceiveBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the TX Buffer of the UART for the DMA module.
//!
//! Returns the address of the UART TX Buffer. This can be used in conjunction
//! with the DMA to obtain transmitted data directly from memory.
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//!
//! \return Address of TX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_A_UART_getTransmitBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets the deglitch time
//!
//! \param baseAddress is the base address of the EUSCI_A_UART module.
//! \param deglitchTime is the selected deglitch time
//! Valid values are:
//! - \b EUSCI_A_UART_DEGLITCH_TIME_2ns
//! - \b EUSCI_A_UART_DEGLITCH_TIME_50ns
//! - \b EUSCI_A_UART_DEGLITCH_TIME_100ns
//! - \b EUSCI_A_UART_DEGLITCH_TIME_200ns
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
uint16_t deglitchTime);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_EUSCI_A_UART_H__

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platform/vendor_bsp/TI/MSP430FR5xx_6xx/eusci_b_i2c.c Normal file
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@@ -0,0 +1,609 @@
/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_b_i2c.c - Driver for the eusci_b_i2c Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup eusci_b_i2c_api eusci_b_i2c
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Bx__
#include "eusci_b_i2c.h"
#include <assert.h>
void EUSCI_B_I2C_initMaster (uint16_t baseAddress,
EUSCI_B_I2C_initMasterParam *param
)
{
uint16_t preScalarValue;
//Disable the USCI module and clears the other bits of control register
HWREG16(baseAddress + OFS_UCBxCTLW0) = UCSWRST;
//Configure Automatic STOP condition generation
HWREG16(baseAddress + OFS_UCBxCTLW1) &= ~UCASTP_3;
HWREG16(baseAddress + OFS_UCBxCTLW1) |= (uint16_t)param->autoSTOPGeneration;
//Byte Count Threshold
HWREG16(baseAddress + OFS_UCBxTBCNT) = param->byteCounterThreshold;
/*
* Configure as I2C master mode.
* UCMST = Master mode
* UCMODE_3 = I2C mode
* UCSYNC = Synchronous mode
*/
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMST + UCMODE_3 + UCSYNC;
//Configure I2C clock source
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (param->selectClockSource + UCSWRST);
/*
* Compute the clock divider that achieves the fastest speed less than or
* equal to the desired speed. The numerator is biased to favor a larger
* clock divider so that the resulting clock is always less than or equal
* to the desired clock, never greater.
*/
preScalarValue = (uint16_t)(param->i2cClk / param->dataRate);
HWREG16(baseAddress + OFS_UCBxBRW) = preScalarValue;
}
void EUSCI_B_I2C_initSlave (uint16_t baseAddress,
EUSCI_B_I2C_initSlaveParam *param
)
{
//Disable the USCI module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
//Clear USCI master mode
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCMST;
//Configure I2C as Slave and Synchronous mode
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMODE_3 + UCSYNC;
//Set up the slave address.
HWREG16(baseAddress + OFS_UCBxI2COA0 + param->slaveAddressOffset)
= param->slaveAddress + param->slaveOwnAddressEnable;
}
void EUSCI_B_I2C_enable (uint16_t baseAddress)
{
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
}
void EUSCI_B_I2C_disable (uint16_t baseAddress)
{
//Set the UCSWRST bit to disable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
}
void EUSCI_B_I2C_setSlaveAddress (uint16_t baseAddress,
uint8_t slaveAddress
)
{
//Set the address of the slave with which the master will communicate.
HWREG16(baseAddress + OFS_UCBxI2CSA) = (slaveAddress);
}
void EUSCI_B_I2C_setMode (uint16_t baseAddress,
uint16_t mode
)
{
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~EUSCI_B_I2C_TRANSMIT_MODE;
HWREG16(baseAddress + OFS_UCBxCTLW0) |= mode;
}
uint8_t EUSCI_B_I2C_getMode (uint16_t baseAddress)
{
//Read the I2C mode.
return ((HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTR));
}
void EUSCI_B_I2C_slavePutData (uint16_t baseAddress,
uint8_t transmitData
)
{
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = transmitData;
}
uint8_t EUSCI_B_I2C_slaveGetData (uint16_t baseAddress)
{
//Read a byte.
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
}
uint16_t EUSCI_B_I2C_isBusBusy (uint16_t baseAddress)
{
//Return the bus busy status.
return (HWREG16(baseAddress + OFS_UCBxSTATW) & UCBBUSY);
}
uint16_t EUSCI_B_I2C_masterIsStopSent (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP);
}
uint16_t EUSCI_B_I2C_masterIsStartSent (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTT);
}
void EUSCI_B_I2C_enableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
//Enable the interrupt masked bit
HWREG16(baseAddress + OFS_UCBxIE) |= mask;
}
void EUSCI_B_I2C_disableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
//Disable the interrupt masked bit
HWREG16(baseAddress + OFS_UCBxIE) &= ~(mask);
}
void EUSCI_B_I2C_clearInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
//Clear the I2C interrupt source.
HWREG16(baseAddress + OFS_UCBxIFG) &= ~(mask);
}
uint16_t EUSCI_B_I2C_getInterruptStatus (uint16_t baseAddress,
uint16_t mask
)
{
//Return the interrupt status of the request masked bit.
return (HWREG16(baseAddress + OFS_UCBxIFG) & mask);
}
void EUSCI_B_I2C_masterSendSingleByte (uint16_t baseAddress,
uint8_t txData
)
{
//Store current TXIE status
uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
//Disable transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
//Send start condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
//Clear transmit interrupt flag before enabling interrupt again
HWREG16(baseAddress + OFS_UCBxIFG) &= ~(UCTXIFG);
//Reinstate transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
}
uint8_t EUSCI_B_I2C_masterReceiveSingleByte (uint16_t baseAddress)
{
//Set USCI in Receive mode
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCTR;
//Send start condition
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
//Poll for start condition transmission
while(HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTT);
//Send stop condition
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
//Poll for receive interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG));
//Send single byte data.
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
}
bool EUSCI_B_I2C_masterSendSingleByteWithTimeout (uint16_t baseAddress,
uint8_t txData,
uint32_t timeout
)
{
// Creating variable for second timeout scenario
uint32_t timeout2 = timeout;
//Store current TXIE status
uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
//Disable transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
//Send start condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout2);
//Check if transfer timed out
if (timeout2 == 0){
return (STATUS_FAIL);
}
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
//Clear transmit interrupt flag before enabling interrupt again
HWREG16(baseAddress + OFS_UCBxIFG) &= ~(UCTXIFG);
//Reinstate transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
return (STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterSendMultiByteStart (uint16_t baseAddress,
uint8_t txData
)
{
//Store current transmit interrupt enable
uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
//Disable transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
//Send start condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Reinstate transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
}
bool EUSCI_B_I2C_masterSendMultiByteStartWithTimeout (uint16_t baseAddress,
uint8_t txData,
uint32_t timeout
)
{
//Store current transmit interrupt enable
uint16_t txieStatus = HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE;
//Disable transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) &= ~(UCTXIE);
//Send start condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTR + UCTXSTT;
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Reinstate transmit interrupt enable
HWREG16(baseAddress + OFS_UCBxIE) |= txieStatus;
return(STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterSendMultiByteNext (uint16_t baseAddress,
uint8_t txData
)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
}
bool EUSCI_B_I2C_masterSendMultiByteNextWithTimeout (uint16_t baseAddress,
uint8_t txData,
uint32_t timeout
)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout);
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
return(STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterSendMultiByteFinish (uint16_t baseAddress,
uint8_t txData
)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
}
bool EUSCI_B_I2C_masterSendMultiByteFinishWithTimeout (uint16_t baseAddress,
uint8_t txData,
uint32_t timeout
)
{
uint32_t timeout2 = timeout;
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout) ;
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
}
//Send single byte data.
HWREG16(baseAddress + OFS_UCBxTXBUF) = txData;
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout2) ;
//Check if transfer timed out
if (timeout2 == 0){
return (STATUS_FAIL);
}
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
return(STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterSendStart (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
}
void EUSCI_B_I2C_masterSendMultiByteStop (uint16_t baseAddress)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) ;
}
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
}
bool EUSCI_B_I2C_masterSendMultiByteStopWithTimeout (uint16_t baseAddress,
uint32_t timeout)
{
//If interrupts are not used, poll for flags
if (!(HWREG16(baseAddress + OFS_UCBxIE) & UCTXIE)){
//Poll for transmit interrupt flag.
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCTXIFG)) && --timeout) ;
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
}
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
return (STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterReceiveStart (uint16_t baseAddress)
{
//Set USCI in Receive mode
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCTR;
//Send start
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTT;
}
uint8_t EUSCI_B_I2C_masterReceiveMultiByteNext (uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
}
uint8_t EUSCI_B_I2C_masterReceiveMultiByteFinish (uint16_t baseAddress)
{
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
//Wait for Stop to finish
while (HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP)
// Wait for RX buffer
while (!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG)) ;
//Capture data from receive buffer after setting stop bit due to
//MSP430 I2C critical timing.
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
}
bool EUSCI_B_I2C_masterReceiveMultiByteFinishWithTimeout (uint16_t baseAddress,
uint8_t *txData,
uint32_t timeout
)
{
uint32_t timeout2 = timeout;
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
//Wait for Stop to finish
while ((HWREG16(baseAddress + OFS_UCBxCTLW0) & UCTXSTP) && --timeout);
//Check if transfer timed out
if (timeout == 0){
return (STATUS_FAIL);
}
// Wait for RX buffer
while ((!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG)) && --timeout2);
//Check if transfer timed out
if (timeout2 == 0){
return (STATUS_FAIL);
}
//Capture data from receive buffer after setting stop bit due to
//MSP430 I2C critical timing.
*txData = (HWREG8(baseAddress + OFS_UCBxRXBUF));
return (STATUS_SUCCESS);
}
void EUSCI_B_I2C_masterReceiveMultiByteStop (uint16_t baseAddress)
{
//Send stop condition.
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCTXSTP;
}
void EUSCI_B_I2C_enableMultiMasterMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCMM;
}
void EUSCI_B_I2C_disableMultiMasterMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCMM;
}
uint8_t EUSCI_B_I2C_masterReceiveSingle (uint16_t baseAddress)
{
//Polling RXIFG0 if RXIE is not enabled
if(!(HWREG16(baseAddress + OFS_UCBxIE) & UCRXIE0)) {
while(!(HWREG16(baseAddress + OFS_UCBxIFG) & UCRXIFG0));
}
//Read a byte.
return (HWREG16(baseAddress + OFS_UCBxRXBUF));
}
uint32_t EUSCI_B_I2C_getReceiveBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCBxRXBUF );
}
uint32_t EUSCI_B_I2C_getTransmitBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCBxTXBUF );
}
void EUSCI_B_I2C_setTimeout(uint16_t baseAddress, uint16_t timeout)
{
uint16_t tempUCBxCTLW0;
//Save value of UCSWRST bit before we disable eUSCI module
tempUCBxCTLW0 = HWREG16(baseAddress + OFS_UCBxCTLW0);
//Disable the USCI module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
//Set timeout
HWREG16(baseAddress + OFS_UCBxCTLW1) = (HWREG16(baseAddress + OFS_UCBxCTLW1) & (~UCCLTO_3)) | timeout;
//Restore value of UCSWRST bit
HWREG16(baseAddress + OFS_UCBxCTLW0) = tempUCBxCTLW0;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for eusci_b_i2c_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_b_spi.c - Driver for the eusci_b_spi Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup eusci_b_spi_api eusci_b_spi
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Bx__
#include "eusci_b_spi.h"
#include <assert.h>
void EUSCI_B_SPI_initMaster (uint16_t baseAddress,
EUSCI_B_SPI_initMasterParam *param)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
//Reset OFS_UCBxCTLW0 values
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB +
UCMST + UCMODE_3 + UCSYNC);
//Reset OFS_UCBxCTLW0 values
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSSEL_3);
//Select Clock
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (uint16_t)param->selectClockSource;
HWREG16(baseAddress + OFS_UCBxBRW) =
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
/*
* Configure as SPI master mode.
* Clock phase select, polarity, msb
* UCMST = Master mode
* UCSYNC = Synchronous mode
* UCMODE_0 = 3-pin SPI
*/
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
param->msbFirst +
param->clockPhase +
param->clockPolarity +
UCMST +
UCSYNC +
param->spiMode
);
}
void EUSCI_B_SPI_select4PinFunctionality (uint16_t baseAddress,
uint16_t select4PinFunctionality
)
{
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~UCSTEM;
HWREG16(baseAddress + OFS_UCBxCTLW0) |= select4PinFunctionality;
}
void EUSCI_B_SPI_changeMasterClock (uint16_t baseAddress,
EUSCI_B_SPI_changeMasterClockParam *param)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCBxBRW) =
(uint16_t)(param->clockSourceFrequency / param->desiredSpiClock);
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
}
void EUSCI_B_SPI_initSlave (uint16_t baseAddress, EUSCI_B_SPI_initSlaveParam *param)
{
//Disable USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
//Reset OFS_UCBxCTLW0 register
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCMSB +
UC7BIT +
UCMST +
UCCKPL +
UCCKPH +
UCMODE_3
);
//Clock polarity, phase select, msbFirst, SYNC, Mode0
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (param->clockPhase +
param->clockPolarity +
param->msbFirst +
UCSYNC +
param->spiMode
);
}
void EUSCI_B_SPI_changeClockPhasePolarity (uint16_t baseAddress,
uint16_t clockPhase,
uint16_t clockPolarity
)
{
//Disable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCCKPH + UCCKPL);
HWREG16(baseAddress + OFS_UCBxCTLW0) |= (
clockPhase +
clockPolarity
);
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
}
void EUSCI_B_SPI_transmitData ( uint16_t baseAddress,
uint8_t transmitData
)
{
HWREG16(baseAddress + OFS_UCBxTXBUF) = transmitData;
}
uint8_t EUSCI_B_SPI_receiveData (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_UCBxRXBUF)) ;
}
void EUSCI_B_SPI_enableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCBxIE) |= mask;
}
void EUSCI_B_SPI_disableInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCBxIE) &= ~mask;
}
uint8_t EUSCI_B_SPI_getInterruptStatus (uint16_t baseAddress,
uint8_t mask
)
{
return ( HWREG16(baseAddress + OFS_UCBxIFG) & mask );
}
void EUSCI_B_SPI_clearInterrupt (uint16_t baseAddress,
uint16_t mask
)
{
HWREG16(baseAddress + OFS_UCBxIFG) &= ~mask;
}
void EUSCI_B_SPI_enable (uint16_t baseAddress)
{
//Reset the UCSWRST bit to enable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) &= ~(UCSWRST);
}
void EUSCI_B_SPI_disable (uint16_t baseAddress)
{
//Set the UCSWRST bit to disable the USCI Module
HWREG16(baseAddress + OFS_UCBxCTLW0) |= UCSWRST;
}
uint32_t EUSCI_B_SPI_getReceiveBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCBxRXBUF );
}
uint32_t EUSCI_B_SPI_getTransmitBufferAddress (uint16_t baseAddress)
{
return ( baseAddress + OFS_UCBxTXBUF );
}
uint16_t EUSCI_B_SPI_isBusy (uint16_t baseAddress)
{
//Return the bus busy status.
return (HWREG16(baseAddress + OFS_UCBxSTATW) & UCBUSY);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for eusci_b_spi_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// eusci_b_spi.h - Driver for the EUSCI_B_SPI Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_EUSCI_B_SPI_H__
#define __MSP430WARE_EUSCI_B_SPI_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_EUSCI_Bx__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the EUSCI_B_SPI_initMaster() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct EUSCI_B_SPI_initMasterParam {
//! Selects Clock source. Refer to device specific datasheet for available
//! options.
//! \n Valid values are:
//! - \b EUSCI_B_SPI_CLOCKSOURCE_ACLK
//! - \b EUSCI_B_SPI_CLOCKSOURCE_SMCLK
uint8_t selectClockSource;
//! Is the frequency of the selected clock source in Hz
uint32_t clockSourceFrequency;
//! Is the desired clock rate in Hz for SPI communication
uint32_t desiredSpiClock;
//! Controls the direction of the receive and transmit shift register.
//! \n Valid values are:
//! - \b EUSCI_B_SPI_MSB_FIRST
//! - \b EUSCI_B_SPI_LSB_FIRST [Default]
uint16_t msbFirst;
//! Is clock phase select.
//! \n Valid values are:
//! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
//! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
uint16_t clockPhase;
//! Is clock polarity select
//! \n Valid values are:
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
uint16_t clockPolarity;
//! Is SPI mode select
//! \n Valid values are:
//! - \b EUSCI_B_SPI_3PIN
//! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH
//! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW
uint16_t spiMode;
} EUSCI_B_SPI_initMasterParam;
//*****************************************************************************
//
//! \brief Used in the EUSCI_B_SPI_initSlave() function as the param parameter.
//
//*****************************************************************************
typedef struct EUSCI_B_SPI_initSlaveParam {
//! Controls the direction of the receive and transmit shift register.
//! \n Valid values are:
//! - \b EUSCI_B_SPI_MSB_FIRST
//! - \b EUSCI_B_SPI_LSB_FIRST [Default]
uint16_t msbFirst;
//! Is clock phase select.
//! \n Valid values are:
//! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default]
//! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
uint16_t clockPhase;
//! Is clock polarity select
//! \n Valid values are:
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
uint16_t clockPolarity;
//! Is SPI mode select
//! \n Valid values are:
//! - \b EUSCI_B_SPI_3PIN
//! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH
//! - \b EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW
uint16_t spiMode;
} EUSCI_B_SPI_initSlaveParam;
//*****************************************************************************
//
//! \brief Used in the EUSCI_B_SPI_changeMasterClock() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct EUSCI_B_SPI_changeMasterClockParam {
//! Is the frequency of the selected clock source in Hz
uint32_t clockSourceFrequency;
//! Is the desired clock rate in Hz for SPI communication
uint32_t desiredSpiClock;
} EUSCI_B_SPI_changeMasterClockParam;
//*****************************************************************************
//
// The following are values that can be passed to the clockPhase parameter for
// functions: EUSCI_B_SPI_changeClockPhasePolarity(); the param parameter for
// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
#define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_B_SPI_MSB_FIRST UCMSB
#define EUSCI_B_SPI_LSB_FIRST 0x00
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave(); the
// clockPolarity parameter for functions:
// EUSCI_B_SPI_changeClockPhasePolarity().
//
//*****************************************************************************
#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_B_SPI_initMaster().
//
//*****************************************************************************
#define EUSCI_B_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
#define EUSCI_B_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: EUSCI_B_SPI_initMaster(), and EUSCI_B_SPI_initSlave().
//
//*****************************************************************************
#define EUSCI_B_SPI_3PIN UCMODE_0
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
//*****************************************************************************
//
// The following are values that can be passed to the select4PinFunctionality
// parameter for functions: EUSCI_B_SPI_select4PinFunctionality().
//
//*****************************************************************************
#define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x0000
#define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: EUSCI_B_SPI_enableInterrupt(), EUSCI_B_SPI_disableInterrupt(),
// EUSCI_B_SPI_getInterruptStatus(), and EUSCI_B_SPI_clearInterrupt() as well
// as returned by the EUSCI_B_SPI_getInterruptStatus() function.
//
//*****************************************************************************
#define EUSCI_B_SPI_TRANSMIT_INTERRUPT UCTXIE
#define EUSCI_B_SPI_RECEIVE_INTERRUPT UCRXIE
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the EUSCI_B_SPI_isBusy() function.
//
//*****************************************************************************
#define EUSCI_B_SPI_BUSY UCBUSY
#define EUSCI_B_SPI_NOT_BUSY 0x00
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Initializes the SPI Master block.
//!
//! Upon successful initialization of the SPI master block, this function will
//! have set the bus speed for the master, but the SPI Master block still
//! remains disabled and must be enabled with EUSCI_B_SPI_enable()
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI Master module.
//! \param param is the pointer to struct for master initialization.
//!
//! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB, \b UCSSELx and
//! \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return STATUS_SUCCESS
//
//*****************************************************************************
extern void EUSCI_B_SPI_initMaster(uint16_t baseAddress,
EUSCI_B_SPI_initMasterParam *param);
//*****************************************************************************
//
//! \brief Selects 4Pin Functionality
//!
//! This function should be invoked only in 4-wire mode. Invoking this function
//! has no effect in 3-wire mode.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param select4PinFunctionality selects 4 pin functionality
//! Valid values are:
//! - \b EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
//! - \b EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
//!
//! Modified bits are \b UCSTEM of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_select4PinFunctionality(uint16_t baseAddress,
uint16_t select4PinFunctionality);
//*****************************************************************************
//
//! \brief Initializes the SPI Master clock. At the end of this function call,
//! SPI module is left enabled.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param param is the pointer to struct for master clock setting.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_changeMasterClock(uint16_t baseAddress,
EUSCI_B_SPI_changeMasterClockParam *param);
//*****************************************************************************
//
//! \brief Initializes the SPI Slave block.
//!
//! Upon successful initialization of the SPI slave block, this function will
//! have initialized the slave block, but the SPI Slave block still remains
//! disabled and must be enabled with EUSCI_B_SPI_enable()
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI Slave module.
//! \param param is the pointer to struct for slave initialization.
//!
//! Modified bits are \b UCMSB, \b UCMST, \b UC7BIT, \b UCCKPL, \b UCCKPH, \b
//! UCMODE and \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return STATUS_SUCCESS
//
//*****************************************************************************
extern void EUSCI_B_SPI_initSlave(uint16_t baseAddress,
EUSCI_B_SPI_initSlaveParam *param);
//*****************************************************************************
//
//! \brief Changes the SPI clock phase and polarity. At the end of this
//! function call, SPI module is left enabled.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param clockPhase is clock phase select.
//! Valid values are:
//! - \b EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
//! [Default]
//! - \b EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
//! \param clockPolarity is clock polarity select
//! Valid values are:
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
//! - \b EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
//!
//! Modified bits are \b UCCKPL, \b UCCKPH and \b UCSWRST of \b UCAxCTLW0
//! register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_changeClockPhasePolarity(uint16_t baseAddress,
uint16_t clockPhase,
uint16_t clockPolarity);
//*****************************************************************************
//
//! \brief Transmits a byte from the SPI Module.
//!
//! This function will place the supplied data into SPI transmit data register
//! to start transmission.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param transmitData data to be transmitted from the SPI module
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_transmitData(uint16_t baseAddress,
uint8_t transmitData);
//*****************************************************************************
//
//! \brief Receives a byte that has been sent to the SPI Module.
//!
//! This function reads a byte of data from the SPI receive data Register.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! \return Returns the byte received from by the SPI module, cast as an
//! uint8_t.
//
//*****************************************************************************
extern uint8_t EUSCI_B_SPI_receiveData(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables individual SPI interrupt sources.
//!
//! Enables the indicated SPI interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. Does not clear interrupt flags.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param mask is the bit mask of the interrupt sources to be enabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIFG register and bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_enableInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Disables individual SPI interrupt sources.
//!
//! Disables the indicated SPI interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param mask is the bit mask of the interrupt sources to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIE register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_disableInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Gets the current SPI interrupt status.
//!
//! This returns the interrupt status for the SPI module based on which flag is
//! passed.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param mask is the masked interrupt flag status to be returned.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
//!
//! \return Logical OR of any of the following:
//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint16_t baseAddress,
uint8_t mask);
//*****************************************************************************
//
//! \brief Clears the selected SPI interrupt status flag.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//! \param mask is the masked interrupt flag to be cleared.
//! Mask value is the logical OR of any of the following:
//! - \b EUSCI_B_SPI_TRANSMIT_INTERRUPT
//! - \b EUSCI_B_SPI_RECEIVE_INTERRUPT
//!
//! Modified bits of \b UCAxIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_clearInterrupt(uint16_t baseAddress,
uint16_t mask);
//*****************************************************************************
//
//! \brief Enables the SPI block.
//!
//! This will enable operation of the SPI block.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_enable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the SPI block.
//!
//! This will disable operation of the SPI block.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! Modified bits are \b UCSWRST of \b UCAxCTLW0 register.
//!
//! \return None
//
//*****************************************************************************
extern void EUSCI_B_SPI_disable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the RX Buffer of the SPI for the DMA module.
//!
//! Returns the address of the SPI RX Buffer. This can be used in conjunction
//! with the DMA to store the received data directly to memory.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! \return the address of the RX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_B_SPI_getReceiveBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the address of the TX Buffer of the SPI for the DMA module.
//!
//! Returns the address of the SPI TX Buffer. This can be used in conjunction
//! with the DMA to obtain transmitted data directly from memory.
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! \return the address of the TX Buffer
//
//*****************************************************************************
extern uint32_t EUSCI_B_SPI_getTransmitBufferAddress(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Indicates whether or not the SPI bus is busy.
//!
//! This function returns an indication of whether or not the SPI bus is
//! busy.This function checks the status of the bus via UCBBUSY bit
//!
//! \param baseAddress is the base address of the EUSCI_B_SPI module.
//!
//! \return One of the following:
//! - \b EUSCI_B_SPI_BUSY
//! - \b EUSCI_B_SPI_NOT_BUSY
//! \n indicating if the EUSCI_B_SPI is busy
//
//*****************************************************************************
extern uint16_t EUSCI_B_SPI_isBusy(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_EUSCI_B_SPI_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// framctl.c - Driver for the framctl Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup framctl_api framctl
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_FRAM__
#include "framctl.h"
#include <assert.h>
void FRAMCtl_write8(uint8_t *dataPtr,
uint8_t *framPtr,
uint16_t numberOfBytes
)
{
while (numberOfBytes > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
numberOfBytes--;
}
}
void FRAMCtl_write16(uint16_t *dataPtr,uint16_t *framPtr,
uint16_t numberOfWords)
{
while (numberOfWords > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
numberOfWords--;
}
}
void FRAMCtl_write32(uint32_t *dataPtr,uint32_t *framPtr,
uint16_t count)
{
while (count > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
count--;
}
}
void FRAMCtl_fillMemory32 (uint32_t value,
uint32_t *framPtr,
uint16_t count
)
{
while (count> 0)
{
//Write to Fram
*framPtr++ = value;
count--;
}
}
void FRAMCtl_enableInterrupt (uint16_t interruptMask)
{
uint8_t waitSelection;
waitSelection=(HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
// Clear lock in FRAM control registers
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
// Enable user selected interrupt sources
HWREG16(FRAM_BASE + OFS_GCCTL0) |= interruptMask;
}
uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask)
{
return ( HWREG16(FRAM_BASE + OFS_GCCTL1) & interruptFlagMask );
}
void FRAMCtl_disableInterrupt(uint16_t interruptMask)
{
uint8_t waitSelection;
waitSelection=(HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
//Clear lock in FRAM control registers
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
HWREG16(FRAM_BASE + OFS_GCCTL0) &= ~(interruptMask);
}
void FRAMCtl_configureWaitStateControl(uint8_t waitState )
{
uint8_t tempVariable = HWREG8(FRAM_BASE + OFS_FRCTL0_L);
tempVariable &= ~NWAITS_7;
tempVariable |= waitState;
HWREG16(FRAM_BASE + OFS_FRCTL0) = ( FWPW | tempVariable );
}
void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus)
{
#ifdef FRLPMPWR
uint8_t waitSelection;
waitSelection = (HWREG8(FRAM_BASE + OFS_FRCTL0) & 0xFF);
// Clear lock in FRAM control registers
HWREG16(FRAM_BASE + OFS_FRCTL0) = FWPW | waitSelection;
HWREG8(FRAM_BASE + OFS_GCCTL0_L) &= ~FRLPMPWR;
HWREG8(FRAM_BASE + OFS_GCCTL0_L) |= delayStatus;
#endif
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for framctl_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// framctl.h - Driver for the FRAMCTL Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_FRAMCTL_H__
#define __MSP430WARE_FRAMCTL_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_FRAM__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: FRAMCtl_enableInterrupt(), and FRAMCtl_disableInterrupt().
//
//*****************************************************************************
#define FRAMCTL_PUC_ON_UNCORRECTABLE_BIT UBDRSTEN
#define FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT UBDIE
#define FRAMCTL_CORRECTABLE_BIT_INTERRUPT CBDIE
//*****************************************************************************
//
// The following are values that can be passed to the interruptFlagMask
// parameter for functions: FRAMCtl_getInterruptStatus() as well as returned by
// the FRAMCtl_getInterruptStatus() function.
//
//*****************************************************************************
#define FRAMCTL_ACCESS_TIME_ERROR_FLAG ACCTEIFG
#define FRAMCTL_UNCORRECTABLE_BIT_FLAG UBDIFG
#define FRAMCTL_CORRECTABLE_BIT_FLAG CBDIFG
//*****************************************************************************
//
// The following are values that can be passed to the waitState parameter for
// functions: FRAMCtl_configureWaitStateControl().
//
//*****************************************************************************
#define FRAMCTL_ACCESS_TIME_CYCLES_0 NWAITS_0
#define FRAMCTL_ACCESS_TIME_CYCLES_1 NWAITS_1
#define FRAMCTL_ACCESS_TIME_CYCLES_2 NWAITS_2
#define FRAMCTL_ACCESS_TIME_CYCLES_3 NWAITS_3
#define FRAMCTL_ACCESS_TIME_CYCLES_4 NWAITS_4
#define FRAMCTL_ACCESS_TIME_CYCLES_5 NWAITS_5
#define FRAMCTL_ACCESS_TIME_CYCLES_6 NWAITS_6
#define FRAMCTL_ACCESS_TIME_CYCLES_7 NWAITS_7
//*****************************************************************************
//
// The following are values that can be passed to the delayStatus parameter for
// functions: FRAMCtl_delayPowerUpFromLPM().
//
//*****************************************************************************
#define FRAMCTL_DELAY_FROM_LPM_ENABLE 0x00
#define FRAMCTL_DELAY_FROM_LPM_DISABLE 0x02
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Write data into the fram memory in byte format.
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param numberOfBytes is the number of bytes to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_write8(uint8_t *dataPtr,
uint8_t *framPtr,
uint16_t numberOfBytes);
//*****************************************************************************
//
//! \brief Write data into the fram memory in word format.
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param numberOfWords is the number of words to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_write16(uint16_t *dataPtr,
uint16_t *framPtr,
uint16_t numberOfWords);
//*****************************************************************************
//
//! \brief Write data into the fram memory in long format, pass by reference
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param count is the number of 32 bit words to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_write32(uint32_t *dataPtr,
uint32_t *framPtr,
uint16_t count);
//*****************************************************************************
//
//! \brief Write data into the fram memory in long format, pass by value
//!
//! \param value is the value to written to FRAMCTL memory
//! \param framPtr is the pointer into which to write the data
//! \param count is the number of 32 bit addresses to fill
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_fillMemory32(uint32_t value,
uint32_t *framPtr,
uint16_t count);
//*****************************************************************************
//
//! \brief Enables selected FRAMCtl interrupt sources.
//!
//! Enables the indicated FRAMCtl interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. Does not clear interrupt flags.
//!
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
//! to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
//! uncorrectable bit error detected.
//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
//! uncorrectable bit error is detected.
//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
//! correctable bit error is detected.
//!
//! Modified bits of \b GCCTL0 register and bits of \b FRCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_enableInterrupt(uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the status of the selected FRAMCtl interrupt flags.
//!
//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
//! returned.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
//! time is not hold.
//! - \b FRAMCTL_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
//! uncorrectable bit error has been detected in the FRAMCtl memory
//! error detection logic.
//! - \b FRAMCTL_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
//! correctable bit error has been detected and corrected in the
//! FRAMCtl memory error detection logic.
//!
//! \return Logical OR of any of the following:
//! - \b FRAMCTL_ACCESS_TIME_ERROR_FLAG Interrupt flag is set if a
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl access
//! time is not hold.
//! - \b FRAMCTL_UNCORRECTABLE_BIT_FLAG Interrupt flag is set if an
//! uncorrectable bit error has been detected in the FRAMCtl memory
//! error detection logic.
//! - \b FRAMCTL_CORRECTABLE_BIT_FLAG Interrupt flag is set if a
//! correctable bit error has been detected and corrected in the
//! FRAMCtl memory error detection logic.
//! \n indicating the status of the masked flags
//
//*****************************************************************************
extern uint8_t FRAMCtl_getInterruptStatus(uint16_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Disables selected FRAMCtl interrupt sources.
//!
//! Disables the indicated FRAMCtl interrupt sources. Only the sources that
//! are enabled can be reflected to the processor interrupt; disabled sources
//! have no effect on the processor.
//!
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
//! to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if FRAMCtl
//! uncorrectable bit error detected.
//! - \b FRAMCTL_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
//! uncorrectable bit error is detected.
//! - \b FRAMCTL_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
//! correctable bit error is detected.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_disableInterrupt(uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Configures the access time of the FRAMCtl module
//!
//! Configures the access time of the FRAMCtl module.
//!
//! \param waitState defines the number of CPU cycles required for access time
//! defined in the datasheet
//! Valid values are:
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_0
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_1
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_2
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_3
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_4
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_5
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_6
//! - \b FRAMCTL_ACCESS_TIME_CYCLES_7
//!
//! Modified bits are \b NWAITS of \b GCCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_configureWaitStateControl(uint8_t waitState);
//*****************************************************************************
//
//! \brief Configures when the FRAMCtl module will power up after LPM exit
//!
//! Configures when the FRAMCtl module will power up after LPM exit. The module
//! can either wait until the first FRAMCtl access to power up or power up
//! immediately after leaving LPM. If FRAMCtl power is disabled, a memory
//! access will automatically insert wait states to ensure sufficient timing
//! for the FRAMCtl power-up and access.
//!
//! \param delayStatus chooses if FRAMCTL should power up instantly with LPM
//! exit or to wait until first FRAMCTL access after LPM exit
//! Valid values are:
//! - \b FRAMCTL_DELAY_FROM_LPM_ENABLE
//! - \b FRAMCTL_DELAY_FROM_LPM_DISABLE
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_delayPowerUpFromLPM(uint8_t delayStatus);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_FRAMCTL_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// framctl_a.c - Driver for the framctl_a Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup framctl_a_api framctl_a
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_FRCTL_A__
#include "framctl_a.h"
#include <assert.h>
void FRAMCtl_A_write8(uint8_t *dataPtr,
uint8_t *framPtr,
uint16_t numberOfBytes
)
{
while (numberOfBytes > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
numberOfBytes--;
}
}
void FRAMCtl_A_write16(uint16_t *dataPtr,uint16_t *framPtr,
uint16_t numberOfWords)
{
while (numberOfWords > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
numberOfWords--;
}
}
void FRAMCtl_A_write32(uint32_t *dataPtr,uint32_t *framPtr,
uint16_t count)
{
while (count > 0)
{
//Write to Fram
*framPtr++ = *dataPtr++;
count--;
}
}
void FRAMCtl_A_fillMemory32 (uint32_t value,
uint32_t *framPtr,
uint16_t count
)
{
while (count> 0)
{
//Write to Fram
*framPtr++ = value;
count--;
}
}
void FRAMCtl_A_enableInterrupt (uint8_t interruptMask)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
// Clear lock in FRAM control registers
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
// Enable user selected interrupt sources
HWREG16(FRCTL_A_BASE + OFS_GCCTL0) |= interruptMask;
}
uint8_t FRAMCtl_A_getInterruptStatus(uint16_t interruptFlagMask)
{
return ( HWREG16(FRCTL_A_BASE + OFS_GCCTL1) & interruptFlagMask );
}
void FRAMCtl_A_disableInterrupt(uint16_t interruptMask)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
//Clear lock in FRAM control registers
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
HWREG16(FRCTL_A_BASE + OFS_GCCTL0) &= ~(interruptMask);
}
void FRAMCtl_A_clearInterrupt(uint16_t interruptFlagMask)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
//Clear lock in FRAM control registers
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
HWREG16(FRCTL_A_BASE + OFS_GCCTL1) &= ~interruptFlagMask;
}
void FRAMCtl_A_configureWaitStateControl(uint8_t waitState )
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
temp &= ~NWAITS_15;
temp |= waitState;
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
}
void FRAMCtl_A_delayPowerUpFromLPM(uint8_t delayStatus)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
// Clear lock in FRAM control registers
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
HWREG8(FRCTL_A_BASE + OFS_GCCTL0_L) &= ~FRPWR;
HWREG8(FRCTL_A_BASE + OFS_GCCTL0_L) |= delayStatus;
}
void FRAMCtl_A_enableWriteProtection(void)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
temp |= WPROT;
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
}
void FRAMCtl_A_disableWriteProtection(void)
{
uint8_t temp = HWREG8(FRCTL_A_BASE + OFS_FRCTL0_L);
temp &= ~WPROT;
HWREG16(FRCTL_A_BASE + OFS_FRCTL0) = FRCTLPW | temp;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for framctl_a_api
//! @}
//
//*****************************************************************************

396
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// framctl_a.h - Driver for the FRAMCTL_A Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_FRAMCTL_A_H__
#define __MSP430WARE_FRAMCTL_A_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_FRCTL_A__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: FRAMCtl_A_enableInterrupt(), and
// FRAMCtl_A_disableInterrupt().
//
//*****************************************************************************
#define FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT UBDRSTEN
#define FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT UBDIE
#define FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT CBDIE
#define FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT ACCTEIE
#define FRAMCTL_A_WRITE_PROTECTION_INTERRUPT WPIE
//*****************************************************************************
//
// The following are values that can be passed to the interruptFlagMask
// parameter for functions: FRAMCtl_A_getInterruptStatus(), and
// FRAMCtl_A_clearInterrupt() as well as returned by the
// FRAMCtl_A_getInterruptStatus() function.
//
//*****************************************************************************
#define FRAMCTL_A_ACCESS_TIME_ERROR_FLAG ACCTEIFG
#define FRAMCTL_A_UNCORRECTABLE_BIT_FLAG UBDIFG
#define FRAMCTL_A_CORRECTABLE_BIT_FLAG CBDIFG
#define FRAMCTL_A_WRITE_PROTECTION_FLAG WPIFG
//*****************************************************************************
//
// The following are values that can be passed to the waitState parameter for
// functions: FRAMCtl_A_configureWaitStateControl().
//
//*****************************************************************************
#define FRAMCTL_A_ACCESS_TIME_CYCLES_0 NWAITS_0
#define FRAMCTL_A_ACCESS_TIME_CYCLES_1 NWAITS_1
#define FRAMCTL_A_ACCESS_TIME_CYCLES_2 NWAITS_2
#define FRAMCTL_A_ACCESS_TIME_CYCLES_3 NWAITS_3
#define FRAMCTL_A_ACCESS_TIME_CYCLES_4 NWAITS_4
#define FRAMCTL_A_ACCESS_TIME_CYCLES_5 NWAITS_5
#define FRAMCTL_A_ACCESS_TIME_CYCLES_6 NWAITS_6
#define FRAMCTL_A_ACCESS_TIME_CYCLES_7 NWAITS_7
#define FRAMCTL_A_ACCESS_TIME_CYCLES_8 NWAITS_8
#define FRAMCTL_A_ACCESS_TIME_CYCLES_9 NWAITS_9
#define FRAMCTL_A_ACCESS_TIME_CYCLES_10 NWAITS_10
#define FRAMCTL_A_ACCESS_TIME_CYCLES_11 NWAITS_11
#define FRAMCTL_A_ACCESS_TIME_CYCLES_12 NWAITS_12
#define FRAMCTL_A_ACCESS_TIME_CYCLES_13 NWAITS_13
#define FRAMCTL_A_ACCESS_TIME_CYCLES_14 NWAITS_14
#define FRAMCTL_A_ACCESS_TIME_CYCLES_15 NWAITS_15
//*****************************************************************************
//
// The following are values that can be passed to the delayStatus parameter for
// functions: FRAMCtl_A_delayPowerUpFromLPM().
//
//*****************************************************************************
#define FRAMCTL_A_DELAY_FROM_LPM_ENABLE 0x00
#define FRAMCTL_A_DELAY_FROM_LPM_DISABLE FRPWR
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Write data into the fram memory in byte format.
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param numberOfBytes is the number of bytes to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_write8(uint8_t *dataPtr,
uint8_t *framPtr,
uint16_t numberOfBytes);
//*****************************************************************************
//
//! \brief Write data into the fram memory in word format.
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param numberOfWords is the number of words to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_write16(uint16_t *dataPtr,
uint16_t *framPtr,
uint16_t numberOfWords);
//*****************************************************************************
//
//! \brief Write data into the fram memory in long format, pass by reference
//!
//! \param dataPtr is the pointer to the data to be written
//! \param framPtr is the pointer into which to write the data
//! \param count is the number of 32 bit words to be written
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_write32(uint32_t *dataPtr,
uint32_t *framPtr,
uint16_t count);
//*****************************************************************************
//
//! \brief Write data into the fram memory in long format, pass by value
//!
//! \param value is the value to written to FRAMCTL_A memory
//! \param framPtr is the pointer into which to write the data
//! \param count is the number of 32 bit addresses to fill
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_fillMemory32(uint32_t value,
uint32_t *framPtr,
uint16_t count);
//*****************************************************************************
//
//! \brief Enables selected FRAMCtl_A interrupt sources.
//!
//! Enables the indicated FRAMCtl_A interrupt sources. Only the sources that
//! are enabled can be reflected to the processor interrupt; disabled sources
//! have no effect on the processor. Does not clear interrupt flags.
//!
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
//! to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if
//! FRAMCtl_A uncorrectable bit error detected.
//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
//! uncorrectable bit error is detected.
//! - \b FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
//! correctable bit error is detected.
//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT - Interrupts when an
//! access time error occurs.
//! - \b FRAMCTL_A_WRITE_PROTECTION_INTERRUPT - Interrupts when
//! detecting a write access to FRAM.
//!
//! Modified bits of \b GCCTL0 register and bits of \b FRCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_enableInterrupt(uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the status of the selected FRAMCtl_A interrupt flags.
//!
//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
//! returned.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
//! time is not hold.
//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
//! uncorrectable bit error has been detected in the FRAMCtl_A memory
//! error detection logic.
//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
//! correctable bit error has been detected and corrected in the
//! FRAMCtl_A memory error detection logic.
//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG - Interrupt flag is set if a
//! write access to FRAM memory
//!
//! \return Logical OR of any of the following:
//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG Interrupt flag is set if a
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
//! time is not hold.
//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG Interrupt flag is set if an
//! uncorrectable bit error has been detected in the FRAMCtl_A memory
//! error detection logic.
//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG Interrupt flag is set if a
//! correctable bit error has been detected and corrected in the
//! FRAMCtl_A memory error detection logic.
//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG Interrupt flag is set if a
//! write access to FRAM memory
//! \n indicating the status of the masked flags
//
//*****************************************************************************
extern uint8_t FRAMCtl_A_getInterruptStatus(uint16_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Disables selected FRAMCtl_A interrupt sources.
//!
//! Disables the indicated FRAMCtl_A interrupt sources. Only the sources that
//! are enabled can be reflected to the processor interrupt; disabled sources
//! have no effect on the processor.
//!
//! \param interruptMask is the bit mask of the memory buffer interrupt sources
//! to be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_A_PUC_ON_UNCORRECTABLE_BIT - Enable PUC reset if
//! FRAMCtl_A uncorrectable bit error detected.
//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_INTERRUPT - Interrupts when an
//! uncorrectable bit error is detected.
//! - \b FRAMCTL_A_CORRECTABLE_BIT_INTERRUPT - Interrupts when a
//! correctable bit error is detected.
//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_INTERRUPT - Interrupts when an
//! access time error occurs.
//! - \b FRAMCTL_A_WRITE_PROTECTION_INTERRUPT - Interrupts when
//! detecting a write access to FRAM.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_disableInterrupt(uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Clears selected FRAMCtl_A interrupt status flag.
//!
//! Clears the indicated FRAMCtl_A interrupt status flag. These interrupt
//! status flag can also be cleared through reading the system reset vector
//! word SYSRSTIV.
//!
//! \param interruptFlagMask is a bit mask of the interrupt flags status to be
//! cleared.
//! Mask value is the logical OR of any of the following:
//! - \b FRAMCTL_A_ACCESS_TIME_ERROR_FLAG - Interrupt flag is set if a
//! wrong setting for NPRECHG and NACCESS is set and FRAMCtl_A access
//! time is not hold.
//! - \b FRAMCTL_A_UNCORRECTABLE_BIT_FLAG - Interrupt flag is set if an
//! uncorrectable bit error has been detected in the FRAMCtl_A memory
//! error detection logic.
//! - \b FRAMCTL_A_CORRECTABLE_BIT_FLAG - Interrupt flag is set if a
//! correctable bit error has been detected and corrected in the
//! FRAMCtl_A memory error detection logic.
//! - \b FRAMCTL_A_WRITE_PROTECTION_FLAG - Interrupt flag is set if a
//! write access to FRAM memory
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_clearInterrupt(uint16_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Configures the access time of the FRAMCtl_A module
//!
//! Configures the access time of the FRAMCtl_A module.
//!
//! \param waitState defines the number of CPU cycles required for access time
//! defined in the datasheet
//! Valid values are:
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_0
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_1
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_2
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_3
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_4
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_5
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_6
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_7
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_8
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_9
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_10
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_11
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_12
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_13
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_14
//! - \b FRAMCTL_A_ACCESS_TIME_CYCLES_15
//!
//! Modified bits are \b NWAITS of \b GCCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_configureWaitStateControl(uint8_t waitState);
//*****************************************************************************
//
//! \brief Configures when the FRAMCtl_A module will power up after LPM exit
//!
//! Configures when the FRAMCtl_A module will power up after LPM exit. The
//! module can either wait until the first FRAM access to power up or power up
//! immediately after leaving LPM. If FRAM power is disabled, the FRAM memory
//! remains in inactive mode until the FRAM memory is actually accessed. If
//! FRAM power is enabled, the FRAM wil be immediately powered up (active
//! mode).
//!
//! \param delayStatus chooses if FRAMCTL_A should power up instantly with LPM
//! exit or to wait until first FRAMCTL_A access after LPM exit
//! Valid values are:
//! - \b FRAMCTL_A_DELAY_FROM_LPM_ENABLE
//! - \b FRAMCTL_A_DELAY_FROM_LPM_DISABLE
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_delayPowerUpFromLPM(uint8_t delayStatus);
//*****************************************************************************
//
//! \brief Enables FRAM write protection
//!
//! This function enables FRAM write protection and protect entire FRAM memory
//! from unintended write. It should be used as temporary protection. The
//! permanent FRAM memory protection should be done via MPU segments related
//! APIs.
//!
//!
//! Modified bits are \b WPROT of \b FRCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_enableWriteProtection(void);
//*****************************************************************************
//
//! \brief Disables FRAM write protection
//!
//! Disables the FRAM write protection. Writing to FRAM memory is allowed.
//!
//!
//! Modified bits are \b WPROT of \b FRCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void FRAMCtl_A_disableWriteProtection(void);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_FRAMCTL_A_H__

489
platform/vendor_bsp/TI/MSP430FR5xx_6xx/gpio.c Normal file
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// gpio.c - Driver for the gpio Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup gpio_api gpio
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__) ||\
defined(__MSP430_HAS_PORTA_R__)
#include "gpio.h"
#include <assert.h>
static const uint16_t GPIO_PORT_TO_BASE[] = {
0x00,
#if defined(__MSP430_HAS_PORT1_R__)
__MSP430_BASEADDRESS_PORT1_R__,
#elif defined(__MSP430_HAS_PORT1__)
__MSP430_BASEADDRESS_PORT1__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT2_R__)
__MSP430_BASEADDRESS_PORT2_R__,
#elif defined(__MSP430_HAS_PORT2__)
__MSP430_BASEADDRESS_PORT2__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT3_R__)
__MSP430_BASEADDRESS_PORT3_R__,
#elif defined(__MSP430_HAS_PORT3__)
__MSP430_BASEADDRESS_PORT3__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT4_R__)
__MSP430_BASEADDRESS_PORT4_R__,
#elif defined(__MSP430_HAS_PORT4__)
__MSP430_BASEADDRESS_PORT4__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT5_R__)
__MSP430_BASEADDRESS_PORT5_R__,
#elif defined(__MSP430_HAS_PORT5__)
__MSP430_BASEADDRESS_PORT5__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT6_R__)
__MSP430_BASEADDRESS_PORT6_R__,
#elif defined(__MSP430_HAS_PORT6__)
__MSP430_BASEADDRESS_PORT6__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT7_R__)
__MSP430_BASEADDRESS_PORT7_R__,
#elif defined(__MSP430_HAS_PORT7__)
__MSP430_BASEADDRESS_PORT7__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT8_R__)
__MSP430_BASEADDRESS_PORT8_R__,
#elif defined(__MSP430_HAS_PORT8__)
__MSP430_BASEADDRESS_PORT8__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT9_R__)
__MSP430_BASEADDRESS_PORT9_R__,
#elif defined(__MSP430_HAS_PORT9__)
__MSP430_BASEADDRESS_PORT9__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT10_R__)
__MSP430_BASEADDRESS_PORT10_R__,
#elif defined(__MSP430_HAS_PORT10__)
__MSP430_BASEADDRESS_PORT10__,
#else
0xFFFF,
#endif
#if defined(__MSP430_HAS_PORT11_R__)
__MSP430_BASEADDRESS_PORT11_R__,
#elif defined(__MSP430_HAS_PORT11__)
__MSP430_BASEADDRESS_PORT11__,
#else
0xFFFF,
#endif
0xFFFF,
#if defined(__MSP430_HAS_PORTJ_R__)
__MSP430_BASEADDRESS_PORTJ_R__
#elif defined(__MSP430_HAS_PORTJ__)
__MSP430_BASEADDRESS_PORTJ__
#else
0xFFFF
#endif
};
void GPIO_setAsOutputPin(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
return;
}
void GPIO_setAsInputPin(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
HWREG16(baseAddress + OFS_PAREN) &= ~selectedPins;
}
void GPIO_setAsPeripheralModuleFunctionOutputPin(uint8_t selectedPort,
uint16_t selectedPins
,uint8_t mode) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PADIR) |= selectedPins;
switch (mode){
case GPIO_PRIMARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
break;
case GPIO_SECONDARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
break;
case GPIO_TERNARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
break;
}
}
void GPIO_setAsPeripheralModuleFunctionInputPin(uint8_t selectedPort,
uint16_t selectedPins
,uint8_t mode) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
switch (mode){
case GPIO_PRIMARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
break;
case GPIO_SECONDARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
break;
case GPIO_TERNARY_MODULE_FUNCTION:
HWREG16(baseAddress + OFS_PASEL0) |= selectedPins;
HWREG16(baseAddress + OFS_PASEL1) |= selectedPins;
break;
}
}
void GPIO_setOutputHighOnPin (uint8_t selectedPort,
uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
}
void GPIO_setOutputLowOnPin (uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
}
void GPIO_toggleOutputOnPin (uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAOUT) ^= selectedPins;
}
void GPIO_setAsInputPinWithPullDownResistor(uint8_t selectedPort,
uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
HWREG16(baseAddress + OFS_PAOUT) &= ~selectedPins;
}
void GPIO_setAsInputPinWithPullUpResistor(uint8_t selectedPort,
uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PASEL0) &= ~selectedPins;
HWREG16(baseAddress + OFS_PASEL1) &= ~selectedPins;
HWREG16(baseAddress + OFS_PADIR) &= ~selectedPins;
HWREG16(baseAddress + OFS_PAREN) |= selectedPins;
HWREG16(baseAddress + OFS_PAOUT) |= selectedPins;
}
uint8_t GPIO_getInputPinValue(uint8_t selectedPort,
uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
uint16_t inputPinValue = HWREG16(baseAddress + OFS_PAIN) & (selectedPins);
if(inputPinValue > 0){
return (GPIO_INPUT_PIN_HIGH);
}
return (GPIO_INPUT_PIN_LOW);
}
void GPIO_enableInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAIE) |= selectedPins;
}
void GPIO_disableInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAIE) &= ~selectedPins;
}
uint16_t GPIO_getInterruptStatus(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
if((baseAddress & 0x1) ^ 0x1)
{
return (HWREG8(baseAddress + OFS_PAIFG_H) & selectedPins);
}
else
{
return (HWREG8(baseAddress + OFS_PAIFG) & selectedPins);
}
}
else {
return (HWREG16(baseAddress + OFS_PAIFG) & selectedPins);
}
}
void GPIO_clearInterrupt(uint8_t selectedPort, uint16_t selectedPins) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
HWREG16(baseAddress + OFS_PAIFG) &= ~selectedPins;
}
void GPIO_selectInterruptEdge(uint8_t selectedPort, uint16_t selectedPins,
uint8_t edgeSelect) {
uint16_t baseAddress = GPIO_PORT_TO_BASE[selectedPort];
#ifndef NDEBUG
if(baseAddress == 0xFFFF) {
return;
}
#endif
// Shift by 8 if port is even (upper 8-bits)
if((selectedPort & 1) ^ 1) {
selectedPins <<= 8;
}
if (GPIO_LOW_TO_HIGH_TRANSITION == edgeSelect){
HWREG16(baseAddress + OFS_PAIES) &= ~selectedPins;
}
else {
HWREG16(baseAddress + OFS_PAIES) |= selectedPins;
}
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for gpio_api
//! @}
//
//*****************************************************************************

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119
platform/vendor_bsp/TI/MSP430FR5xx_6xx/hspll.c Normal file
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// hspll.c - Driver for the HSPLL Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup hspll_api hspll
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_HSPLL__
#include "hspll.h"
#include <assert.h>
void HSPLL_init(uint16_t baseAddress, HSPLL_initParam *param)
{
assert (param->multiplier > 15);
assert (param->multiplier < 40);
HWREG16(baseAddress + OFS_HSPLLCTL) =
(param->multiplier << 10)
| param->frequency
| param->lockStatus;
}
void HSPLL_xtalInit(uint16_t baseAddress, HSPLL_xtalInitParam *param)
{
HWREG16(baseAddress + OFS_HSPLLUSSXTLCTL) =
param->oscillatorType
| param->xtlOutput
| param->oscillatorEnable;
}
uint16_t HSPLL_getInterruptStatus(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_HSPLLRIS) & PLLUNLOCK);
}
uint16_t HSPLL_getInterruptMaskStatus(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_HSPLLIMSC) & PLLUNLOCK);
}
void HSPLL_enableInterrupt(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_HSPLLIMSC) |= PLLUNLOCK;
}
void HSPLL_disableInterrupt(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_HSPLLIMSC) &= ~PLLUNLOCK;
}
void HSPLL_clearInterrupt(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_HSPLLICR) |= PLLUNLOCK;
}
void HSPLL_setInterrupt(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_HSPLLISR) |= PLLUNLOCK;
}
uint16_t HSPLL_getOscillatorStatus(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_HSPLLUSSXTLCTL) & OSCSTATE);
}
uint16_t HSPLL_isLocked(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_HSPLLCTL) & PLL_LOCK);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for hspll_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// hspll.h - Driver for the HSPLL Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_HSPLL_H__
#define __MSP430WARE_HSPLL_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_HSPLL__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be returned by the
// HSPLL_getInterruptStatus(), HSPLL_getInterruptMaskStatus() API
//
//*****************************************************************************
#define HSPLL_PLL_STATE_UNCHANGED PLLUNLOCK_0
#define HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK PLLUNLOCK_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: HSPLL_init(); the frequency parameter for
// functions: HSPLL_init().
//
//*****************************************************************************
#define HSPLL_LESSER_OR_EQUAL_TO_6MHZ PLLINFREQ_0
#define HSPLL_GREATER_THAN_6MHZ PLLINFREQ_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: HSPLL_init(); the lockStatus parameter for
// functions: HSPLL_init(). As well as returned by the
// HSPLL_isLocked() function.
//
//*****************************************************************************
#define HSPLL_UNLOCKED PLL_LOCK_0
#define HSPLL_LOCKED PLL_LOCK_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: HSPLL_xtalInit(); the oscillatorType parameter for
// functions: HSPLL_xtalInit().
//
//*****************************************************************************
#define HSPLL_XTAL_GATING_COUNTER_LENGTH_4096 OSCTYPE_0
#define HSPLL_XTAL_GATING_COUNTER_LENGTH_512 OSCTYPE_1
#define HSPLL_XTAL_OSCTYPE_XTAL OSCTYPE__XTAL
#define HSPLL_XTAL_OSCTYPE_CERAMIC OSCTYPE__CERAMIC
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: HSPLL_xtalInit(); the xtlOutput parameter for
// functions: HSPLL_xtalInit().
//
//*****************************************************************************
#define HSPLL_XTAL_OUTPUT_DISABLE XTOUTOFF_1
#define HSPLL_XTAL_OUTPUT_ENABLE XTOUTOFF_0
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: HSPLL_xtalInit(); the oscillatorEnable parameter for
// functions: HSPLL_xtalInit().
//
//*****************************************************************************
#define HSPLL_XTAL_ENABLE USSXTEN_1
#define HSPLL_XTAL_DISABLE USSXTEN_0
//*****************************************************************************
//
// The following are values that can be returned by HSPLL_getOscillatorStatus()
//
//*****************************************************************************
#define HSPLL_OSCILLATOR_STABILIZED OSCSTATE_0
#define HSPLL_OSCILLATOR_NOT_STABILIZED OSCSTATE_1
#define HSPLL_OSCILLATOR_NOT_STARTED OSCSTATE_0
#define HSPLL_OSCILLATOR_STARTED OSCSTATE_1
//*****************************************************************************
//
//! \brief Used in the HSPLL_init() function as the param parameter.
//
//*****************************************************************************
typedef struct HSPLL_initParam
{
//! PLL Multiplier
//! \n Valid values are 16 thru 39. Default value is 16
//! \n Alternative valid values are any OR of PLLM_x_H bits
uint16_t multiplier;
//! Selects MSB shift from filter out
//! - \b HSPLL_LESSER_OR_EQUAL_TO_6MHZ [Default]
//! - \b HSPLL_GREATER_THAN_6MHZ
uint16_t frequency;
//! Selects the output bit resolution
//! \n Valid values are:
//! - \b HSPLL_UNLOCKED [Default]
//! - \b HSPLL_LOCKED
uint16_t lockStatus;
} HSPLL_initParam;
//*****************************************************************************
//
//! \brief Used in the HSPLL_xtalInit() function as the param parameter.
//
//*****************************************************************************
typedef struct HSPLL_xtalInitParam
{
//! Selects the oscillator type
//! \n Valid values are:
//! - \b HSPLL_XTAL_GATING_COUNTER_LENGTH_4096 [Default]
//! - \b HSPLL_XTAL_GATING_COUNTER_LENGTH_512
//! - \b HSPLL_XTAL_OSCTYPE_XTAL [Default]
//! - \b HSPLL_XTAL_OSCTYPE_CERAMIC
uint16_t oscillatorType;
//! Disables/Enables the oscillator output
//! \n Valid values are:
//! - \b HSPLL_XTAL_OUTPUT_DISABLE [Default]
//! - \b HSPLL_XTAL_OUTPUT_ENABLE
uint16_t xtlOutput;
//! Selects the Auto Sample Start
//! \n Valid values are:
//! - \b HSPLL_XTAL_DISABLE [Default]
//! - \b HSPLL_XTAL_ENABLE
uint16_t oscillatorEnable;
} HSPLL_xtalInitParam;
//*****************************************************************************
//
//! \brief Initializes the HSPLL module
//!
//! Initializes the HSPLL module
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! \param params is the pointer to the initialization structure
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_init(uint16_t baseAddress, HSPLL_initParam *param);
//*****************************************************************************
//
//! \brief Initializes the HSPLL XTAL module
//!
//! Initializes the HSPLL XTAL module
//!
//! \param baseAddress is the base address of the HSPLL XTAL module.
//!
//! \param params is the pointer to the initialization structure
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_xtalInit(uint16_t baseAddress, HSPLL_xtalInitParam *param);
//*****************************************************************************
//
//! \brief Returns the status of the selected interrupt flags.
//!
//! Returns the status of the selected interrupt flag.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! \return \b HSPLL_PLL_STATE_UNCHANGED or
//! \b HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK
//!
//
//*****************************************************************************
extern uint16_t HSPLL_getInterruptStatus(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the mask status of the selected interrupt flags.
//!
//! Returns the mask status of the selected interrupt flag.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! \return \b HSPLL_PLL_STATE_UNCHANGED or
//! \b HSPLL_PLL_STATE_CHANGED_LOCK_TO_UNLOCK
//!
//
//*****************************************************************************
extern uint16_t HSPLL_getInterruptMaskStatus(uint16_t baseAddress);
//*****************************************************************************
//
///! \brief Enable HSPLL PLLUNLOCK interrupt.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! Modified registers are HSPLLIMSC
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_enableInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
///! \brief Disable HSPLL PLLUNLOCK interrupt.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! Modified registers are HSPLLIMSC
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_disableInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
///! \brief Clear HSPLL PLLUNLOCK interrupt.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! Modified registers are HSPLLICR
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_clearInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
///! \brief Set HSPLL PLLUNLOCK interrupt.
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! Modified registers are HSPLLISR
//!
//! \return None
//
//*****************************************************************************
extern void HSPLL_setInterrupt(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the oscillator status
//!
//! Returns the oscillator status
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! \return \b HSPLL_OSCILLATOR_NOT_STARTED or
//! \b HSPLL_OSCILLATOR_STARTED
//!
//
//*****************************************************************************
extern uint16_t HSPLL_getOscillatorStatus(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the PLL status
//!
//! Returns the PLL status
//!
//! \param baseAddress is the base address of the HSPLL module.
//!
//! \return \b HSPLL_UNLOCKED or
//! \b HSPLL_LOCKED
//!
//
//*****************************************************************************
extern uint16_t HSPLL_isLocked(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_HSPLL_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
#ifndef __HW_MEMMAP__
#define __HW_MEMMAP__
#define __DRIVERLIB_MSP430FR5XX_6XX_FAMILY__
//*****************************************************************************
//
// Include device specific header file
//
//*****************************************************************************
#include <msp430.h>
#ifndef __AUTOGENERATED__
#include "msp430fr5xx_6xxgeneric.h"
#endif
#include "stdint.h"
#include "stdbool.h"
//*****************************************************************************
//
// SUCCESS and FAILURE for API return value
//
//*****************************************************************************
#define STATUS_SUCCESS 0x01
#define STATUS_FAIL 0x00
//*****************************************************************************
//
// Macro for enabling assert statements for debugging
//
//*****************************************************************************
#define NDEBUG
//*****************************************************************************
//
// Macros for hardware access
//
//*****************************************************************************
#define HWREG32(x) \
(*((volatile uint32_t *)((uint16_t)x)))
#define HWREG16(x) \
(*((volatile uint16_t *)((uint16_t)x)))
#define HWREG8(x) \
(*((volatile uint8_t *)((uint16_t)x)))
#endif // #ifndef __HW_MEMMAP__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
#ifndef __DRIVERLIB_VERSION__
#define DRIVERLIB_VER_MAJOR 2
#define DRIVERLIB_VER_MINOR 91
#define DRIVERLIB_VER_PATCH 11
#define DRIVERLIB_VER_BUILD 01
#endif
#define getVersion() ((uint32_t)DRIVERLIB_VER_MAJOR<<24 | \
(uint32_t)DRIVERLIB_VER_MINOR<<16 | \
(uint32_t)DRIVERLIB_VER_PATCH<<8 | \
(uint32_t)DRIVERLIB_VER_BUILD)

439
platform/vendor_bsp/TI/MSP430FR5xx_6xx/lcd_c.c Normal file
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// lcd_c.c - Driver for the lcd_c Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup lcd_c_api lcd_c
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_LCD_C__
#include "lcd_c.h"
#include <assert.h>
//*****************************************************************************
//
// Initialization parameter instance
//
//*****************************************************************************
const LCD_C_initParam LCD_C_INIT_PARAM = {
LCD_C_CLOCKSOURCE_ACLK,
LCD_C_CLOCKDIVIDER_1,
LCD_C_CLOCKPRESCALAR_1,
LCD_C_STATIC,
LCD_C_STANDARD_WAVEFORMS,
LCD_C_SEGMENTS_DISABLED
};
static void setLCDFunction(uint16_t baseAddress, uint8_t index, uint16_t value)
{
switch(index) {
case 0:
HWREG16(baseAddress + OFS_LCDCPCTL0) |= value;
break;
case 1:
HWREG16(baseAddress + OFS_LCDCPCTL1) |= value;
break;
case 2:
HWREG16(baseAddress + OFS_LCDCPCTL2) |= value;
break;
case 3:
#ifdef LCDS48
HWREG16(baseAddress + OFS_LCDCPCTL3) |= value;
#endif //LCDS48
break;
default: break;
}
}
void LCD_C_init(uint16_t baseAddress, LCD_C_initParam *initParams)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~(LCDMX0 | LCDMX1 | LCDMX2 | LCDSSEL
| LCDLP | LCDSON | LCDDIV_31);
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->muxRate;
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockSource;
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->waveforms;
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->segments;
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockDivider;
HWREG16(baseAddress + OFS_LCDCCTL0) |= initParams->clockPrescalar;
}
void LCD_C_on(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCCTL0) |= LCDON;
}
void LCD_C_off(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
}
void LCD_C_clearInterrupt(uint16_t baseAddress, uint16_t mask)
{
HWREG8(baseAddress + OFS_LCDCCTL1_L) &= ~(mask>>8);
}
uint16_t LCD_C_getInterruptStatus(uint16_t baseAddress, uint16_t mask)
{
return (HWREG8(baseAddress + OFS_LCDCCTL1_L) & (mask>>8));
}
void LCD_C_enableInterrupt(uint16_t baseAddress, uint16_t mask)
{
HWREG16(baseAddress + OFS_LCDCCTL1) |= mask;
}
void LCD_C_disableInterrupt (uint16_t baseAddress, uint16_t mask)
{
HWREG16(baseAddress + OFS_LCDCCTL1) &= ~mask;
}
void LCD_C_clearMemory(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRM;
}
void LCD_C_clearBlinkingMemory(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= LCDCLRBM;
}
void LCD_C_selectDisplayMemory(uint16_t baseAddress, uint16_t displayMemory)
{
HWREG16(baseAddress + OFS_LCDCMEMCTL) &= ~LCDDISP;
HWREG16(baseAddress + OFS_LCDCMEMCTL) |= displayMemory;
}
void LCD_C_setBlinkingControl (uint16_t baseAddress,
uint8_t clockDivider,
uint8_t clockPrescalar,
uint8_t mode)
{
HWREG16(baseAddress + OFS_LCDCBLKCTL) &= ~(LCDBLKDIV0 | LCDBLKDIV1 | LCDBLKDIV2 |
LCDBLKPRE0 | LCDBLKPRE1 | LCDBLKPRE2 |
LCDBLKMOD0 | LCDBLKMOD1
);
HWREG16(baseAddress + OFS_LCDCBLKCTL) |= clockDivider | clockPrescalar | mode;
}
void LCD_C_enableChargePump(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCVCTL) |= LCDCPEN;
}
void LCD_C_disableChargePump(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDCPEN;
}
void LCD_C_selectBias(uint16_t baseAddress, uint16_t bias)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCD2B;
HWREG16(baseAddress + OFS_LCDCVCTL) |= bias;
}
void LCD_C_selectChargePumpReference(uint16_t baseAddress, uint16_t reference)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDREF_3;
HWREG16(baseAddress + OFS_LCDCVCTL) |= reference;
}
void LCD_C_setVLCDSource(uint16_t baseAddress, uint16_t vlcdSource,
uint16_t v2v3v4Source,
uint16_t v5Source)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCDEXT;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDREXT;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~LCDEXTBIAS;
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~R03EXT;
HWREG16(baseAddress + OFS_LCDCVCTL) |= vlcdSource;
HWREG16(baseAddress + OFS_LCDCVCTL) |= v2v3v4Source;
HWREG16(baseAddress + OFS_LCDCVCTL) |= v5Source;
}
void LCD_C_setVLCDVoltage(uint16_t baseAddress, uint16_t voltage)
{
HWREG16(baseAddress + OFS_LCDCVCTL) &= ~VLCD_15;
HWREG16(baseAddress + OFS_LCDCVCTL) |= voltage;
}
void LCD_C_setPinAsLCDFunction(uint16_t baseAddress, uint8_t pin)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
uint8_t idx = pin>>4;
uint16_t val = 1<<(pin & 0xF);
setLCDFunction(baseAddress, idx, val);
}
void LCD_C_setPinAsPortFunction (uint16_t baseAddress, uint8_t pin)
{
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
uint8_t idx = pin >> 4;
uint16_t val = 1 << (pin & 0xF);
switch(idx) {
case 0:
HWREG16(baseAddress + OFS_LCDCPCTL0) &= ~val;
break;
case 1:
HWREG16(baseAddress + OFS_LCDCPCTL1) &= ~val;
break;
case 2:
HWREG16(baseAddress + OFS_LCDCPCTL2) &= ~val;
break;
case 3:
#ifdef LCDS48
HWREG16(baseAddress + OFS_LCDCPCTL3) &= ~val;
#endif //LCDS48
break;
default: break;
}
}
void LCD_C_setPinAsLCDFunctionEx(uint16_t baseAddress, uint8_t startPin,
uint8_t endPin)
{
uint8_t startIdx = startPin>>4;
uint8_t endIdx = endPin>>4;
uint8_t startPos = startPin & 0xF;
uint8_t endPos = endPin & 0xF;
uint16_t val = 0;
uint8_t i = 0;
HWREG16(baseAddress + OFS_LCDCCTL0) &= ~LCDON;
if (startIdx == endIdx) {
val = (0xFFFF>>(15-endPos)) & (0xFFFF<<startPos);
setLCDFunction(baseAddress, startIdx, val);
}
else {
val = 0xFFFF>>(15-endPos);
setLCDFunction(baseAddress, endIdx, val);
for (i=endIdx-1; i>startIdx; i--)
setLCDFunction(baseAddress, i, 0xFFFF);
val = 0xFFFF<<startPos;
setLCDFunction(baseAddress, startIdx, val);
}
}
void LCD_C_setMemory(uint16_t baseAddress, uint8_t pin, uint8_t value)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
// static, 2-mux, 3-mux, 4-mux
if (muxRate <= (LCDMX1 | LCDMX0)) {
if (pin & 1) {
HWREG8(baseAddress + OFS_LCDM1 + pin/2) &= 0x0F;
HWREG8(baseAddress + OFS_LCDM1 + pin/2) |= (value & 0xF) << 4;
}
else {
HWREG8(baseAddress + OFS_LCDM1 + pin/2) &= 0xF0;
HWREG8(baseAddress + OFS_LCDM1 + pin/2) |= (value & 0xF);
}
}
else {
//5-mux, 6-mux, 7-mux, 8-mux
HWREG8(baseAddress + OFS_LCDM1 + pin) = value;
}
}
uint8_t LCD_C_getMemory(uint16_t baseAddress, uint8_t pin)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
// static, 2-mux, 3-mux, 4-mux
if(muxRate <= (LCDMX1 | LCDMX0))
{
if(pin & 1)
{
return (HWREG8(baseAddress + OFS_LCDM1 + pin / 2) >> 4);
}
else
{
return (HWREG8(baseAddress + OFS_LCDM1 + pin / 2) & 0xF);
}
}
else
{
//5-mux, 6-mux, 7-mux, 8-mux
return HWREG8(baseAddress + OFS_LCDM1 + pin);
}
}
void LCD_C_setMemoryWithoutOverwrite(uint16_t baseAddress, uint8_t pin, uint8_t value)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
value |= LCD_C_getMemory(baseAddress, pin);
// static, 2-mux, 3-mux, 4-mux
if(muxRate <= (LCDMX1 | LCDMX0))
{
if(pin & 1)
{
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0x0F;
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF) << 4;
}
else
{
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) &= 0xF0;
HWREG8(baseAddress + OFS_LCDM1 + pin / 2) |= (value & 0xF);
}
}
else
{
//5-mux, 6-mux, 7-mux, 8-mux
HWREG8(baseAddress + OFS_LCDM1 + pin) = value;
}
}
void LCD_C_setBlinkingMemory(uint16_t baseAddress, uint8_t pin, uint8_t value)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
// static, 2-mux, 3-mux, 4-mux
if (muxRate <= (LCDMX1 | LCDMX0)) {
if (pin & 1) {
HWREG8(baseAddress + OFS_LCDBM1 + pin/2) &= 0x0F;
HWREG8(baseAddress + OFS_LCDBM1 + pin/2) |= (value & 0xF) << 4;
}
else {
HWREG8(baseAddress + OFS_LCDBM1 + pin/2) &= 0xF0;
HWREG8(baseAddress + OFS_LCDBM1 + pin/2) |= (value & 0xF);
}
}
else {
//5-mux, 6-mux, 7-mux, 8-mux
HWREG8(baseAddress + OFS_LCDBM1 + pin) = value;
}
}
uint8_t LCD_C_getBlinkingMemory(uint16_t baseAddress, uint8_t pin)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
// static, 2-mux, 3-mux, 4-mux
if(muxRate <= (LCDMX1 | LCDMX0))
{
if(pin & 1)
{
return (HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) >> 4);
}
else
{
return (HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) & 0xF);
}
}
else
{
//5-mux, 6-mux, 7-mux, 8-mux
return HWREG8(baseAddress + OFS_LCDBM1 + pin);
}
}
void LCD_C_setBlinkingMemoryWithoutOverwrite(uint16_t baseAddress, uint8_t pin, uint8_t value)
{
uint8_t muxRate = HWREG16(baseAddress + OFS_LCDCCTL0)
& (LCDMX2 | LCDMX1 | LCDMX0);
value |= LCD_C_getBlinkingMemory(baseAddress, pin);
// static, 2-mux, 3-mux, 4-mux
if(muxRate <= (LCDMX1 | LCDMX0))
{
if(pin & 1)
{
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0x0F;
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF) << 4;
}
else
{
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) &= 0xF0;
HWREG8(baseAddress + OFS_LCDBM1 + pin / 2) |= (value & 0xF);
}
}
else
{
//5-mux, 6-mux, 7-mux, 8-mux
HWREG8(baseAddress + OFS_LCDBM1 + pin) = value;
}
}
void LCD_C_configChargePump(uint16_t baseAddress, uint16_t syncToClock,
uint16_t functionControl)
{
HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPCLKSYNC);
HWREG16(baseAddress + OFS_LCDCCPCTL) &= ~(LCDCPDIS7 | LCDCPDIS6 | LCDCPDIS5
| LCDCPDIS4 | LCDCPDIS3 | LCDCPDIS2 | LCDCPDIS1 | LCDCPDIS0);
HWREG16(baseAddress + OFS_LCDCCPCTL) |= syncToClock | functionControl;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for lcd_c_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mpu.c - Driver for the mpu Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup mpu_api mpu
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MPU__
#include "mpu.h"
#include <assert.h>
//*****************************************************************************
//
// The following value is used by createTwoSegments, createThreeSegments to
// check the user has passed a valid segmentation value. This value was
// obtained from the User's Guide.
//
//*****************************************************************************
#define MPU_MAX_SEG_VALUE 0x13C1
void MPU_initTwoSegments(uint16_t baseAddress,
uint16_t seg1boundary,
uint8_t seg1accmask,
uint8_t seg2accmask
)
{
// Write MPU password to allow MPU register configuration
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
// Create two memory segmentations
HWREG16(baseAddress + OFS_MPUSEGB1) = seg1boundary;
HWREG16(baseAddress + OFS_MPUSEGB2) = seg1boundary;
// Set access rights based on user's selection for segment1
switch (seg1accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE +MPUSEG1WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
break;
default:
break;
}
// Set access rights based on user's selection for segment2
switch (seg2accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3WE + MPUSEG2WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE +
MPUSEG2XE + MPUSEG2RE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG2XE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE +
MPUSEG2RE + MPUSEG2WE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
MPUSEG2XE + MPUSEG2WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG2RE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE +
MPUSEG3RE + MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE +
MPUSEG3RE + MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
break;
default:
break;
}
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_initThreeSegments(uint16_t baseAddress,
MPU_initThreeSegmentsParam *param)
{
// Write MPU password to allow MPU register configuration
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
// Create two memory segmentations
HWREG16(baseAddress + OFS_MPUSEGB1) = param->seg1boundary;
HWREG16(baseAddress + OFS_MPUSEGB2) = param->seg2boundary;
// Set access rights based on user's selection for segment1
switch (param->seg1accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1WE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1XE + MPUSEG1RE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG1XE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE + MPUSEG1WE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE +MPUSEG1WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG1RE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG1XE + MPUSEG1WE + MPUSEG1RE);
break;
default:
break;
}
// Set access rights based on user's selection for segment2
switch (param->seg2accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2WE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2XE + MPUSEG2RE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG2XE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE + MPUSEG2WE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG2XE +MPUSEG2WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG2RE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG2XE + MPUSEG2WE + MPUSEG2RE);
break;
default:
break;
}
// Set access rights based on user's selection for segment3
switch (param->seg3accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3WE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3XE + MPUSEG3RE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEG3XE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE + MPUSEG3WE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE +MPUSEG3WE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEG3RE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEG3XE + MPUSEG3WE + MPUSEG3RE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEG3XE + MPUSEG3WE + MPUSEG3RE);
break;
default:
break;
}
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_initInfoSegment(uint16_t baseAddress, uint8_t accmask)
{
// Write MPU password to allow MPU register configuration
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
// Set access rights based on user's selection for segment1
switch (accmask) {
case MPU_EXEC|MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIWE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIXE + MPUSEGIRE;
break;
case MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) &= ~MPUSEGIXE;
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE + MPUSEGIWE;
break;
case MPU_READ:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE);
HWREG16(baseAddress + OFS_MPUSAM) |= MPUSEGIRE;
break;
case MPU_EXEC|MPU_READ|MPU_WRITE:
HWREG16(baseAddress + OFS_MPUSAM) |= (MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
break;
case MPU_NO_READ_WRITE_EXEC:
HWREG16(baseAddress + OFS_MPUSAM) &= ~(MPUSEGIXE + MPUSEGIWE + MPUSEGIRE);
break;
default:
break;
}
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_enableNMIevent(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUSEGIE |
HWREG8(baseAddress + OFS_MPUCTL0);
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_start(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPUENA | HWREG8(baseAddress + OFS_MPUCTL0);
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_enablePUCOnViolation(uint16_t baseAddress,
uint16_t segment
)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
HWREG16(baseAddress + OFS_MPUSAM) |= segment;
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
void MPU_disablePUCOnViolation(uint16_t baseAddress,
uint16_t segment
)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
HWREG16(baseAddress + OFS_MPUSAM) &= ~segment;
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
uint16_t memAccFlag
)
{
return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
}
uint16_t MPU_clearInterrupt(uint16_t baseAddress,
uint16_t memAccFlag
)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
HWREG16(baseAddress + OFS_MPUCTL1) &= ~memAccFlag;
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
return (HWREG16(baseAddress + OFS_MPUCTL1) & memAccFlag);
}
uint16_t MPU_clearAllInterrupts(uint16_t baseAddress
)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | HWREG8(baseAddress + OFS_MPUCTL0);
HWREG16(baseAddress + OFS_MPUCTL1) &= ~(MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG);
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
return (HWREG16(baseAddress + OFS_MPUCTL1) & (MPUSEG1IFG + MPUSEG2IFG + MPUSEG3IFG));
}
void MPU_lockMPU(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MPUCTL0) = MPUPW | MPULOCK |
HWREG8(baseAddress + OFS_MPUCTL0);
//Lock MPU to disable writing to all registers
HWREG8(baseAddress + OFS_MPUCTL0_H) = 0x00;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for mpu_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mpu.h - Driver for the MPU Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_MPU_H__
#define __MSP430WARE_MPU_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MPU__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the MPU_initThreeSegments() function as the param parameter.
//
//*****************************************************************************
typedef struct MPU_initThreeSegmentsParam {
//! Valid values can be found in the Family User's Guide
uint16_t seg1boundary;
//! Valid values can be found in the Family User's Guide
uint16_t seg2boundary;
//! Is the bit mask of access right for memory segment 1.
//! \n Logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
uint8_t seg1accmask;
//! Is the bit mask of access right for memory segment 2.
//! \n Logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
uint8_t seg2accmask;
//! Is the bit mask of access right for memory segment 3.
//! \n Logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
uint8_t seg3accmask;
} MPU_initThreeSegmentsParam;
//*****************************************************************************
//
// The following are values that can be passed to the accmask parameter for
// functions: MPU_initInfoSegment(); the seg2accmask parameter for functions:
// MPU_initTwoSegments(); the seg1accmask parameter for functions:
// MPU_initTwoSegments(); the param parameter for functions:
// MPU_initThreeSegments(), MPU_initThreeSegments(), and
// MPU_initThreeSegments().
//
//*****************************************************************************
#define MPU_READ MPUSEG1RE
#define MPU_WRITE MPUSEG1WE
#define MPU_EXEC MPUSEG1XE
#define MPU_NO_READ_WRITE_EXEC (0x0000)
//*****************************************************************************
//
// The following are values that can be passed to the segment parameter for
// functions: MPU_enablePUCOnViolation(), and MPU_disablePUCOnViolation().
//
//*****************************************************************************
#define MPU_FIRST_SEG MPUSEG1VS
#define MPU_SECOND_SEG MPUSEG2VS
#define MPU_THIRD_SEG MPUSEG3VS
#define MPU_INFO_SEG MPUSEGIVS
//*****************************************************************************
//
// The following are values that can be passed to the memAccFlag parameter for
// functions: MPU_getInterruptStatus(), and MPU_clearInterrupt() as well as
// returned by the MPU_getInterruptStatus() function, the
// MPU_clearAllInterrupts() function and the MPU_clearInterrupt() function.
//
//*****************************************************************************
#define MPU_SEG_1_ACCESS_VIOLATION MPUSEG1IFG
#define MPU_SEG_2_ACCESS_VIOLATION MPUSEG2IFG
#define MPU_SEG_3_ACCESS_VIOLATION MPUSEG3IFG
#define MPU_SEG_INFO_ACCESS_VIOLATION MPUSEGIIFG
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Initializes MPU with two memory segments
//!
//! This function creates two memory segments in FRAM allowing the user to set
//! access right to each segment. To set the correct value for seg1boundary,
//! the user must consult the Device Family User's Guide and provide the MPUSBx
//! value corresponding to the memory address where the user wants to create
//! the partition. Consult the "Segment Border Setting" section in the User's
//! Guide to find the options available for MPUSBx.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param seg1boundary Valid values can be found in the Family User's Guide
//! \param seg1accmask is the bit mask of access right for memory segment 1.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
//! \param seg2accmask is the bit mask of access right for memory segment 2
//! Mask value is the logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
//!
//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
//! \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_initTwoSegments(uint16_t baseAddress,
uint16_t seg1boundary,
uint8_t seg1accmask,
uint8_t seg2accmask);
//*****************************************************************************
//
//! \brief Initializes MPU with three memory segments
//!
//! This function creates three memory segments in FRAM allowing the user to
//! set access right to each segment. To set the correct value for
//! seg1boundary, the user must consult the Device Family User's Guide and
//! provide the MPUSBx value corresponding to the memory address where the user
//! wants to create the partition. Consult the "Segment Border Setting" section
//! in the User's Guide to find the options available for MPUSBx.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param param is the pointer to struct for initializing three segments.
//!
//! Modified bits of \b MPUSAM register, bits of \b MPUSEG register and bits of
//! \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_initThreeSegments(uint16_t baseAddress,
MPU_initThreeSegmentsParam *param);
//*****************************************************************************
//
//! \brief Initializes user information memory segment
//!
//! This function initializes user information memory segment with specified
//! access rights.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param accmask is the bit mask of access right for user information memory
//! segment.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_READ - Read rights
//! - \b MPU_WRITE - Write rights
//! - \b MPU_EXEC - Execute rights
//! - \b MPU_NO_READ_WRITE_EXEC - no read/write/execute rights
//!
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_initInfoSegment(uint16_t baseAddress,
uint8_t accmask);
//*****************************************************************************
//
//! \brief The following function enables the NMI Event if a Segment violation
//! has occurred.
//!
//! \param baseAddress is the base address of the MPU module.
//!
//! Modified bits of \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_enableNMIevent(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief The following function enables the MPU module in the device.
//!
//! This function needs to be called once all memory segmentation has been
//! done. If this function is not called the MPU module will not be activated.
//!
//! \param baseAddress is the base address of the MPU module.
//!
//! Modified bits of \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_start(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief The following function enables PUC generation when an access
//! violation has occurred on the memory segment selected by the user.
//!
//! Note that only specified segments for PUC generation are enabled. Other
//! segments for PUC generation are left untouched. Users may call
//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
//! all the bits will be set and/or cleared.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param segment is the bit mask of memory segment that will generate a PUC
//! when an access violation occurs.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
//! - \b MPU_INFO_SEG - PUC generation on user information memory
//! segment
//!
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_enablePUCOnViolation(uint16_t baseAddress,
uint16_t segment);
//*****************************************************************************
//
//! \brief The following function disables PUC generation when an access
//! violation has occurred on the memory segment selected by the user.
//!
//! Note that only specified segments for PUC generation are disabled. Other
//! segments for PUC generation are left untouched. Users may call
//! MPU_enablePUCOnViolation() and MPU_disablePUCOnViolation() to assure that
//! all the bits will be set and/or cleared.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param segment is the bit mask of memory segment that will NOT generate a
//! PUC when an access violation occurs.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_FIRST_SEG - PUC generation on first memory segment
//! - \b MPU_SECOND_SEG - PUC generation on second memory segment
//! - \b MPU_THIRD_SEG - PUC generation on third memory segment
//! - \b MPU_INFO_SEG - PUC generation on user information memory
//! segment
//!
//! Modified bits of \b MPUSAM register and bits of \b MPUCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_disablePUCOnViolation(uint16_t baseAddress,
uint16_t segment);
//*****************************************************************************
//
//! \brief Returns the memory segment violation flag status requested by the
//! user.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param memAccFlag is the is the memory access violation flag.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 1 is detected
//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 2 is detected
//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 3 is detected
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
//! in User Information Memory Segment is detected
//!
//! \return Logical OR of any of the following:
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 1 is detected
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 2 is detected
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 3 is detected
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
//! User Information Memory Segment is detected
//! \n indicating the status of the masked flags.
//
//*****************************************************************************
extern uint16_t MPU_getInterruptStatus(uint16_t baseAddress,
uint16_t memAccFlag);
//*****************************************************************************
//
//! \brief Clears the masked interrupt flags
//!
//! Returns the memory segment violation flag status requested by the user or
//! if user is providing a bit mask value, the function will return a value
//! indicating if all flags were cleared.
//!
//! \param baseAddress is the base address of the MPU module.
//! \param memAccFlag is the is the memory access violation flag.
//! Mask value is the logical OR of any of the following:
//! - \b MPU_SEG_1_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 1 is detected
//! - \b MPU_SEG_2_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 2 is detected
//! - \b MPU_SEG_3_ACCESS_VIOLATION - is set if an access violation in
//! Main Memory Segment 3 is detected
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION - is set if an access violation
//! in User Information Memory Segment is detected
//!
//! \return Logical OR of any of the following:
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 1 is detected
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 2 is detected
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 3 is detected
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
//! User Information Memory Segment is detected
//! \n indicating the status of the masked flags.
//
//*****************************************************************************
extern uint16_t MPU_clearInterrupt(uint16_t baseAddress,
uint16_t memAccFlag);
//*****************************************************************************
//
//! \brief Clears all Memory Segment Access Violation Interrupt Flags.
//!
//! \param baseAddress is the base address of the MPU module.
//!
//! Modified bits of \b MPUCTL1 register.
//!
//! \return Logical OR of any of the following:
//! - \b MPU_SEG_1_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 1 is detected
//! - \b MPU_SEG_2_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 2 is detected
//! - \b MPU_SEG_3_ACCESS_VIOLATION is set if an access violation in
//! Main Memory Segment 3 is detected
//! - \b MPU_SEG_INFO_ACCESS_VIOLATION is set if an access violation in
//! User Information Memory Segment is detected
//! \n indicating the status of the interrupt flags.
//
//*****************************************************************************
extern uint16_t MPU_clearAllInterrupts(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Lock MPU to protect from write access.
//!
//! Sets MPULOCK to protect MPU from write access on all MPU registers except
//! MPUCTL1, MPUIPC0 and MPUIPSEGBx until a BOR occurs. MPULOCK bit cannot be
//! cleared manually. MPU_clearInterrupt() and MPU_clearAllInterrupts() still
//! can be used after this API is called.
//!
//! \param baseAddress is the base address of the MPU module.
//!
//! Modified bits are \b MPULOCK of \b MPUCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void MPU_lockMPU(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_MPU_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mpy32.c - Driver for the mpy32 Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup mpy32_api mpy32
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MPY32__
#include "mpy32.h"
#include <assert.h>
void MPY32_setWriteDelay (uint16_t writeDelaySelect)
{
HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~(MPYDLY32 + MPYDLYWRTEN);
HWREG16(MPY32_BASE + OFS_MPY32CTL0) |= writeDelaySelect;
}
void MPY32_enableSaturationMode (void)
{
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYSAT;
}
void MPY32_disableSaturationMode (void)
{
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYSAT);
}
uint8_t MPY32_getSaturationMode (void)
{
return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &(MPYSAT));
}
void MPY32_enableFractionalMode (void)
{
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) |= MPYFRAC;
}
void MPY32_disableFractionalMode (void)
{
HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &= ~(MPYFRAC);
}
uint8_t MPY32_getFractionalMode (void)
{
return (HWREG8(MPY32_BASE + OFS_MPY32CTL0_L) &(MPYFRAC));
}
void MPY32_setOperandOne8Bit (uint8_t multiplicationType,
uint8_t operand)
{
HWREG8(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
}
void MPY32_setOperandOne16Bit (uint8_t multiplicationType,
uint16_t operand)
{
HWREG16(MPY32_BASE + OFS_MPY + multiplicationType) = operand;
}
void MPY32_setOperandOne24Bit (uint8_t multiplicationType,
uint32_t operand)
{
multiplicationType <<= 1;
HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
HWREG8(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
}
void MPY32_setOperandOne32Bit (uint8_t multiplicationType,
uint32_t operand)
{
multiplicationType <<= 1;
HWREG16(MPY32_BASE + OFS_MPY32L + multiplicationType) = operand;
HWREG16(MPY32_BASE + OFS_MPY32H + multiplicationType) = (operand >> 16);
}
void MPY32_setOperandTwo8Bit (uint8_t operand)
{
HWREG8(MPY32_BASE + OFS_OP2) = operand;
}
void MPY32_setOperandTwo16Bit (uint16_t operand)
{
HWREG16(MPY32_BASE + OFS_OP2) = operand;
}
void MPY32_setOperandTwo24Bit (uint32_t operand)
{
HWREG16(MPY32_BASE + OFS_OP2L) = operand;
HWREG8(MPY32_BASE + OFS_OP2H) = (operand >> 16);
}
void MPY32_setOperandTwo32Bit (uint32_t operand)
{
HWREG16(MPY32_BASE + OFS_OP2L) = operand;
HWREG16(MPY32_BASE + OFS_OP2H) = (operand >> 16);
}
uint64_t MPY32_getResult (void)
{
uint64_t result;
result = HWREG16(MPY32_BASE + OFS_RES0);
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES1) << 16);
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES2) << 32);
result += ((uint64_t)HWREG16(MPY32_BASE + OFS_RES3) << 48);
return ( result );
}
uint16_t MPY32_getSumExtension (void)
{
return ( HWREG16(MPY32_BASE + OFS_SUMEXT) );
}
uint16_t MPY32_getCarryBitValue (void)
{
return ( HWREG16(MPY32_BASE + OFS_MPY32CTL0) | MPYC);
}
void MPY32_clearCarryBitValue (void)
{
HWREG16(MPY32_BASE + OFS_MPY32CTL0) &= ~MPYC;
}
void MPY32_preloadResult (uint64_t result)
{
HWREG16(MPY32_BASE + OFS_RES0) = (result & 0xFFFF);
HWREG16(MPY32_BASE + OFS_RES1) = ((result >> 16) & 0xFFFF);
HWREG16(MPY32_BASE + OFS_RES2) = ((result >> 32) & 0xFFFF);
HWREG16(MPY32_BASE + OFS_RES3) = ((result >> 48) & 0xFFFF);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for mpy32_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mpy32.h - Driver for the MPY32 Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_MPY32_H__
#define __MSP430WARE_MPY32_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MPY32__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
// The following are values that can be passed to the writeDelaySelect
// parameter for functions: MPY32_setWriteDelay().
//
//*****************************************************************************
#define MPY32_WRITEDELAY_OFF (!(MPYDLY32 + MPYDLYWRTEN))
#define MPY32_WRITEDELAY_32BIT (MPYDLYWRTEN)
#define MPY32_WRITEDELAY_64BIT (MPYDLY32 + MPYDLYWRTEN)
//*****************************************************************************
//
// The following are values that can be passed to the multiplicationType
// parameter for functions: MPY32_setOperandOne8Bit(),
// MPY32_setOperandOne16Bit(), MPY32_setOperandOne24Bit(), and
// MPY32_setOperandOne32Bit().
//
//*****************************************************************************
#define MPY32_MULTIPLY_UNSIGNED (0x00)
#define MPY32_MULTIPLY_SIGNED (0x02)
#define MPY32_MULTIPLYACCUMULATE_UNSIGNED (0x04)
#define MPY32_MULTIPLYACCUMULATE_SIGNED (0x06)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the MPY32_getSaturationMode() function.
//
//*****************************************************************************
#define MPY32_SATURATION_MODE_DISABLED 0x00
#define MPY32_SATURATION_MODE_ENABLED MPYSAT
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the MPY32_getFractionalMode() function.
//
//*****************************************************************************
#define MPY32_FRACTIONAL_MODE_DISABLED 0x00
#define MPY32_FRACTIONAL_MODE_ENABLED MPYFRAC
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the write delay setting for the MPY32 module.
//!
//! This function sets up a write delay to the MPY module's registers, which
//! holds any writes to the registers until all calculations are complete.
//! There are two different settings, one which waits for 32-bit results to be
//! ready, and one which waits for 64-bit results to be ready. This prevents
//! unpredicatble results if registers are changed before the results are
//! ready.
//!
//! \param writeDelaySelect delays the write to any MPY32 register until the
//! selected bit size of result has been written.
//! Valid values are:
//! - \b MPY32_WRITEDELAY_OFF [Default] - writes are not delayed
//! - \b MPY32_WRITEDELAY_32BIT - writes are delayed until a 32-bit
//! result is available in the result registers
//! - \b MPY32_WRITEDELAY_64BIT - writes are delayed until a 64-bit
//! result is available in the result registers
//! \n Modified bits are \b MPYDLY32 and \b MPYDLYWRTEN of \b MPY32CTL0
//! register.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setWriteDelay(uint16_t writeDelaySelect);
//*****************************************************************************
//
//! \brief Enables Saturation Mode.
//!
//! This function enables saturation mode. When this is enabled, the result
//! read out from the MPY result registers is converted to the most-positive
//! number in the case of an overflow, or the most-negative number in the case
//! of an underflow. Please note, that the raw value in the registers does not
//! reflect the result returned, and if the saturation mode is disabled, then
//! the raw value of the registers will be returned instead.
//!
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_enableSaturationMode(void);
//*****************************************************************************
//
//! \brief Disables Saturation Mode.
//!
//! This function disables saturation mode, which allows the raw result of the
//! MPY result registers to be returned.
//!
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_disableSaturationMode(void);
//*****************************************************************************
//
//! \brief Gets the Saturation Mode.
//!
//! This function gets the current saturation mode.
//!
//!
//! \return Gets the Saturation Mode
//! Return one of the following:
//! - \b MPY32_SATURATION_MODE_DISABLED
//! - \b MPY32_SATURATION_MODE_ENABLED
//! \n Gets the Saturation Mode
//
//*****************************************************************************
extern uint8_t MPY32_getSaturationMode(void);
//*****************************************************************************
//
//! \brief Enables Fraction Mode.
//!
//! This function enables fraction mode.
//!
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_enableFractionalMode(void);
//*****************************************************************************
//
//! \brief Disables Fraction Mode.
//!
//! This function disables fraction mode.
//!
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_disableFractionalMode(void);
//*****************************************************************************
//
//! \brief Gets the Fractional Mode.
//!
//! This function gets the current fractional mode.
//!
//!
//! \return Gets the fractional mode
//! Return one of the following:
//! - \b MPY32_FRACTIONAL_MODE_DISABLED
//! - \b MPY32_FRACTIONAL_MODE_ENABLED
//! \n Gets the Fractional Mode
//
//*****************************************************************************
extern uint8_t MPY32_getFractionalMode(void);
//*****************************************************************************
//
//! \brief Sets an 8-bit value into operand 1.
//!
//! This function sets the first operand for multiplication and determines what
//! type of operation should be performed. Once the second operand is set, then
//! the operation will begin.
//!
//! \param multiplicationType is the type of multiplication to perform once the
//! second operand is set.
//! Valid values are:
//! - \b MPY32_MULTIPLY_UNSIGNED
//! - \b MPY32_MULTIPLY_SIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
//! \param operand is the 8-bit value to load into the 1st operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandOne8Bit(uint8_t multiplicationType,
uint8_t operand);
//*****************************************************************************
//
//! \brief Sets an 16-bit value into operand 1.
//!
//! This function sets the first operand for multiplication and determines what
//! type of operation should be performed. Once the second operand is set, then
//! the operation will begin.
//!
//! \param multiplicationType is the type of multiplication to perform once the
//! second operand is set.
//! Valid values are:
//! - \b MPY32_MULTIPLY_UNSIGNED
//! - \b MPY32_MULTIPLY_SIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
//! \param operand is the 16-bit value to load into the 1st operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandOne16Bit(uint8_t multiplicationType,
uint16_t operand);
//*****************************************************************************
//
//! \brief Sets an 24-bit value into operand 1.
//!
//! This function sets the first operand for multiplication and determines what
//! type of operation should be performed. Once the second operand is set, then
//! the operation will begin.
//!
//! \param multiplicationType is the type of multiplication to perform once the
//! second operand is set.
//! Valid values are:
//! - \b MPY32_MULTIPLY_UNSIGNED
//! - \b MPY32_MULTIPLY_SIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
//! \param operand is the 24-bit value to load into the 1st operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandOne24Bit(uint8_t multiplicationType,
uint32_t operand);
//*****************************************************************************
//
//! \brief Sets an 32-bit value into operand 1.
//!
//! This function sets the first operand for multiplication and determines what
//! type of operation should be performed. Once the second operand is set, then
//! the operation will begin.
//!
//! \param multiplicationType is the type of multiplication to perform once the
//! second operand is set.
//! Valid values are:
//! - \b MPY32_MULTIPLY_UNSIGNED
//! - \b MPY32_MULTIPLY_SIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_UNSIGNED
//! - \b MPY32_MULTIPLYACCUMULATE_SIGNED
//! \param operand is the 32-bit value to load into the 1st operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandOne32Bit(uint8_t multiplicationType,
uint32_t operand);
//*****************************************************************************
//
//! \brief Sets an 8-bit value into operand 2, which starts the multiplication.
//!
//! This function sets the second operand of the multiplication operation and
//! starts the operation.
//!
//! \param operand is the 8-bit value to load into the 2nd operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandTwo8Bit(uint8_t operand);
//*****************************************************************************
//
//! \brief Sets an 16-bit value into operand 2, which starts the
//! multiplication.
//!
//! This function sets the second operand of the multiplication operation and
//! starts the operation.
//!
//! \param operand is the 16-bit value to load into the 2nd operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandTwo16Bit(uint16_t operand);
//*****************************************************************************
//
//! \brief Sets an 24-bit value into operand 2, which starts the
//! multiplication.
//!
//! This function sets the second operand of the multiplication operation and
//! starts the operation.
//!
//! \param operand is the 24-bit value to load into the 2nd operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandTwo24Bit(uint32_t operand);
//*****************************************************************************
//
//! \brief Sets an 32-bit value into operand 2, which starts the
//! multiplication.
//!
//! This function sets the second operand of the multiplication operation and
//! starts the operation.
//!
//! \param operand is the 32-bit value to load into the 2nd operand.
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_setOperandTwo32Bit(uint32_t operand);
//*****************************************************************************
//
//! \brief Returns an 64-bit result of the last multiplication operation.
//!
//! This function returns all 64 bits of the result registers
//!
//!
//! \return The 64-bit result is returned as a uint64_t type
//
//*****************************************************************************
extern uint64_t MPY32_getResult(void);
//*****************************************************************************
//
//! \brief Returns the Sum Extension of the last multiplication operation.
//!
//! This function returns the Sum Extension of the MPY module, which either
//! gives the sign after a signed operation or shows a carry after a multiply-
//! and-accumulate operation. The Sum Extension acts as a check for overflows
//! or underflows.
//!
//!
//! \return The value of the MPY32 module Sum Extension.
//
//*****************************************************************************
extern uint16_t MPY32_getSumExtension(void);
//*****************************************************************************
//
//! \brief Returns the Carry Bit of the last multiplication operation.
//!
//! This function returns the Carry Bit of the MPY module, which either gives
//! the sign after a signed operation or shows a carry after a multiply- and-
//! accumulate operation.
//!
//!
//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
//
//*****************************************************************************
extern uint16_t MPY32_getCarryBitValue(void);
//*****************************************************************************
//
//! \brief Clears the Carry Bit of the last multiplication operation.
//!
//! This function clears the Carry Bit of the MPY module
//!
//!
//! \return The value of the MPY32 module Carry Bit 0x0 or 0x1.
//
//*****************************************************************************
extern void MPY32_clearCarryBitValue(void);
//*****************************************************************************
//
//! \brief Preloads the result register
//!
//! This function Preloads the result register
//!
//! \param result value to preload the result register to
//!
//! \return None
//
//*****************************************************************************
extern void MPY32_preloadResult(uint64_t result);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_MPY32_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mtif.c - Driver for the MTIF Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup mtif_api mtif
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MTIF__
#include "mtif.h"
#include <assert.h>
void MTIF_enablePulseGen(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | PGEN);
}
void MTIF_disablePulseGen(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGCNF) = PGPW;
}
void MTIF_clearPulseGenCounter(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | PGCLR);
}
void MTIF_setPulseGenPulseGridFreq(uint16_t baseAddress, uint8_t freq)
{
uint8_t state = HWREG8(baseAddress + OFS_MTIFPGCNF_L);
state &= ~PGFS;
state |= freq;
HWREG16(baseAddress + OFS_MTIFPGCNF) = (PGPW | state);
}
void MTIF_setPulseGenCountNum(uint16_t baseAddress, uint8_t num)
{
HWREG16(baseAddress + OFS_MTIFPGKVAL) = (PGPW | num);
}
void MTIF_clearPulseKCountUpdateRequest(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGCTL) = (PGPW | PKUR);
}
void MTIF_clearPulseGridFreqUpdateRequest(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGCTL) = (PGPW | PGUR);
}
void MTIF_setPulseKCountUpdateAck(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGSR) |= PKUA;
}
uint16_t MTIF_isPulseKCountUpdated(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_MTIFPGSR) & PKUA);
}
void MTIF_setPulseGridFreqUpdateAck(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPGSR) |= PGUA;
}
uint16_t MTIF_isPulseGridFreqUpdated(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_MTIFPGSR) & PGUA);
}
void MTIF_enablePulseCounter(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCCNF) = (PCEN | PCPW);
}
void MTIF_disablePulseCounter(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCCNF) = PCPW;
}
void MTIF_clearPulseCounter(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCCNF) = (PCPW | PCCLR);
}
uint16_t MTIF_getPulseCount(uint16_t baseAddress)
{
return HWREG16(baseAddress + OFS_MTIFPCR);
}
void MTIF_setPulseCounterReadRequest(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCCTL) |= PCRR;
}
void MTIF_setPulseCounterReadAck(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCSR) |= PCRA;
}
uint16_t MTIF_isPulseCounterReadReady(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_MTIFPCSR) & PCRA);
}
uint16_t MTIF_getPulseCounterOverflow(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_MTIFPCSR) & PCOFL);
}
void MTIF_ackPulseCounterOverflow(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFPCSR) |= PCOFL;
}
void MTIF_enableTestPortOutput(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPOE);
}
void MTIF_disableTestPortOutput(uint16_t baseAddress)
{
uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPOE));
}
void MTIF_enableTestPortInput(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPIE);
}
void MTIF_disableTestPortInput(uint16_t baseAddress)
{
uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPIE));
}
void MTIF_setPulseGeneratorAsPulseCounterInput(uint16_t baseAddress)
{
uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~TPISEL));
}
void MTIF_setTestPortInputTerminalAsPulseCounterInput(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
HWREG8(baseAddress + OFS_MTIFTPCTL_L) | TPISEL);
}
void MTIF_enableTestPortTerminalActivationBySW(uint16_t baseAddress)
{
uint8_t state = HWREG8(baseAddress + OFS_MTIFTPCTL_L);
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW | (state & ~ACTIVATE));
}
void MTIF_enableTestPortTerminalActivationBySWAndHW(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_MTIFTPCTL) = (TPPW |
HWREG8(baseAddress + OFS_MTIFTPCTL_L) | ACTIVATE);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for mtif_api
//! @}
//
//*****************************************************************************

563
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// mtif.h - Driver for the MTIF Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_MTIF_H__
#define __MSP430WARE_MTIF_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_MTIF__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the freq parameter for
// functions: MTIF_setPulseGenPulseGridFreq
//
//*****************************************************************************
#define MTIF_PULSE_GRID_FREQUENCY_8HZ PGFS_0
#define MTIF_PULSE_GRID_FREQUENCY_16HZ PGFS_1
#define MTIF_PULSE_GRID_FREQUENCY_32HZ PGFS_2
#define MTIF_PULSE_GRID_FREQUENCY_64HZ PGFS_3
#define MTIF_PULSE_GRID_FREQUENCY_128HZ PGFS_4
#define MTIF_PULSE_GRID_FREQUENCY_256HZ PGFS_5
#define MTIF_PULSE_GRID_FREQUENCY_512HZ PGFS_6
#define MTIF_PULSE_GRID_FREQUENCY_1024HZ PGFS_7
//*****************************************************************************
//
// The following are values that can be passed to the num parameter for
// functions: MTIF_setPulseGenCountNum
//
//*****************************************************************************
#define MTIF_KVAL_BIT0 KVAL0
#define MTIF_KVAL_BIT1 KVAL1
#define MTIF_KVAL_BIT2 KVAL2
#define MTIF_KVAL_BIT3 KVAL3
#define MTIF_KVAL_BIT4 KVAL4
#define MTIF_KVAL_BIT5 KVAL5
#define MTIF_KVAL_BIT6 KVAL6
//*****************************************************************************
//
// The following are values that can be returned by the
// MTIF_isPulseKCountUpdated() function.
//
//*****************************************************************************
#define MTIF_K_COUNT_IS_UPDATED PKUA
#define MTIF_K_COUNT_IS_NOT_UPDATED 0x0
//*****************************************************************************
//
// The following are values that can be returned by the
// MTIF_isPulseGridFreqUpdated() function.
//
//*****************************************************************************
#define MTIF_PULSE_GRID_FREQUENCY_IS_UPDATED PGUA
#define MTIF_PULSE_GRID_FREQUENCY_IS_NOT_UPDATED 0x0
//*****************************************************************************
//
// The following are values that can be returned by the
// MTIF_getPulseCounterOverflow() function.
//
//*****************************************************************************
#define MTIF_PULSE_COUNTER_OVERFLOW PCOFL
#define MTIF_PULSE_COUNTER_NOT_OVERFLOW 0x0
//*****************************************************************************
//
// The following are values that can be returned by the
// MTIF_isPulseCounterReadReady() function.
//
//*****************************************************************************
#define MTIF_PULSE_COUNTER_READY_TO_READ PCRA
#define MTIF_PULSE_COUNTER_NOT_READY_TO_READ 0x0
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enables Pulse Generator.
//!
//! Enable the PG sub module
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enablePulseGen(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables Pulse Generator.
//!
//! Disable the PG sub module
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_disablePulseGen(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Generator pulse counter clear.
//!
//! Clears the pulse generator. (PGEN has to be set to one to perform a clear).
//! Note!: A clear request is being latched and released after the clear
//! is executed. MTIF_disablePulseGen (PCEN=0) and LFXTOFF=1 will prevent that.
//! The clear occurs then after the clock is reenabled. Clear reset by PUC.
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_clearPulseGenCounter(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Generator pulse grid frequency select.
//!
//! This value determines at which time grid pulses are generated.
//! The pulse generator frame frequency is an 1/256th of this
//! (PGEN has to be one to perform a change). Reset by PUC.
//!
//! \param baseAddress is the base address of the MTIF module.
//! \param freq is the specified pulse grid frequency select.
//! Valid values are:
//! - \b MTIF_PULSE_GRID_FREQUENCY_8HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_16HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_32HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_64HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_128HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_256HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_512HZ
//! - \b MTIF_PULSE_GRID_FREQUENCY_1024HZ [Default]
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseGenPulseGridFreq(uint16_t baseAddress, uint8_t freq);
//*****************************************************************************
//
//! \brief Set Pulse Count Number.
//!
//! This register value determines how many pulses are generated withing
//! 256 periods of the pulse grid frequency(with password protection as in PGCNF).
//! PGEN has to be one to perform a change. Reset by PUC.
//!
//! \param baseAddress is the base address of the MTIF module.
//! \param num is the logical OR of any of the following:
//! - \b MTIF_KVAL_BIT0
//! - \b MTIF_KVAL_BIT1
//! - \b MTIF_KVAL_BIT2
//! - \b MTIF_KVAL_BIT3
//! - \b MTIF_KVAL_BIT4
//! - \b MTIF_KVAL_BIT5
//! - \b MTIF_KVAL_BIT6
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseGenCountNum(uint16_t baseAddress, uint8_t num);
//*****************************************************************************
//
//! \brief Pulse K-Count Update Request.
//!
//! The update of KVAL occurs during the frequency grid slot
//! 0xff (e.g. in the last 4ms of a second with a pulse grid frequency of
//! 256Hz). Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_clearPulseKCountUpdateRequest(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Grid Frequency Update Request.
//!
//! The update of PGFS occurs during the frequency grid
//! slot 0xff (e.g. in the last 4ms of an second with an pulse grid
//! frequency of 256Hz). Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_clearPulseGridFreqUpdateRequest(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse K-Count Update Acknowledge.
//!
//! This acknowledges a PCUR directly after the K-values has been updated.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseKCountUpdateAck(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Is Pulse K-Count Updated?
//!
//! This checks whether Pulse K-Count has been updated.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return Valid values are:
//! - \b MTIF_K_COUNT_IS_UPDATED
//! - \b MTIF_K_COUNT_IS_NOT_UPDATED
//
//*****************************************************************************
extern uint16_t MTIF_isPulseKCountUpdated(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Grid Frequency Update Acknowledge.
//!
//! This acknowledges a PGUR directly after the PGFS has been updated.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseGridFreqUpdateAck(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Is Pulse Pulse Grid Frequency Updated?
//!
//! This checks whether Pulse Grid Frequency has been updated.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return Valid values are:
//! - \b MTIF_PULSE_GRID_FREQUENCY_IS_UPDATED
//! - \b MTIF_PULSE_GRID_FREQUENCY_IS_NOT_UPDATED
//
//*****************************************************************************
extern uint16_t MTIF_isPulseGridFreqUpdated(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief PC sub module enable.
//!
//! This bit enables the PC sub module when set to one. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enablePulseCounter(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief PC sub module disable.
//!
//! This bit disables the PC sub module when set to zero. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_disablePulseCounter(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse counter clear.
//!
//! Clears the pulse counter (PC has to be disabled to perform a clear).
//! Note!: A clear request is being latched and released after the clear is executed.
//! LFXTOFF=1 and PCEN=0 will prevent that. The clear occurs then after the clock
//! is reenabled. This bit is for triggering only; it's state cannot be read back
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_clearPulseCounter(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Counter value register.
//!
//! Get count value from the pulse counter.
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return 16-bit count value from pulse counter
//
//*****************************************************************************
extern uint16_t MTIF_getPulseCount(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse Counter Read Request.
//!
//! Requests an update of PCR read register from the actual counter.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseCounterReadRequest(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse counter read acknowledge.
//!
//! This acknowledges the update of the PCR register as response to
//! the PCRR read request. Note!: A read request is being latched.
//! LFXTOFF=1 and PCEN=0 will prevent that.The read will then be performed and
//! acknowledged after the clock is reenabled. Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseCounterReadAck(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Is Pulse Counter value ready to read?.
//!
//! This function will let you know if Pulse Counter value is updated and ready
//! to read as a response to the Pulse Counter Read Request. Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return Valid values are:
//! - \b MTIF_PULSE_COUNTER_READY_TO_READ
//! - \b MTIF_PULSE_COUNTER_NOT_READY_TO_READ
//
//*****************************************************************************
extern uint16_t MTIF_isPulseCounterReadReady(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Pulse counter overflow.
//!
//! This bit indicates an overflow of the pulse counter when its value changes since
//! the last read request procedure. It is basically the 17th bit of the counter
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return Valid values are:
//! - \b MTIF_PULSE_COUNTER_OVERFLOW
//! - \b MTIF_PULSE_COUNTER_NOT_OVERFLOW
//
//*****************************************************************************
extern uint16_t MTIF_getPulseCounterOverflow(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Acknowledge pulse counter overflow.
//!
//! This function acknowledges an overflow of the pulse counter since
//! the last read request procedure.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_ackPulseCounterOverflow(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables test port output.
//!
//! Enable the test pulse output. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enableTestPortOutput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables test port output.
//!
//! Disable the test pulse output. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_disableTestPortOutput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables test port input.
//!
//! Enable the test input port. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enableTestPortInput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables test port input.
//!
//! Disable the test input port. Reset type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_disableTestPortInput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Test port input select for pulse counter, sourced from pulse generator.
//!
//! Pulse generator is used as input for test port of pulse counter
//! Reset Type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setPulseGeneratorAsPulseCounterInput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Test port input select for pulse counter, sourced from test port
//! input terminal.
//!
//! Test port input terminal is used as input for test port of pulse counter
//! Reset Type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_setTestPortInputTerminalAsPulseCounterInput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Test port terminal enable activation by software.
//!
//! The test port output is enabled solely by TPOE (enabled if TPOE=1) test port
//! output enabled.
//! Reset Type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enableTestPortTerminalActivationBySW(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Test port terminal enable activation by software and hardware.
//!
//! The test port output requires both TPOE (enabled if TPOE=1) test port
//! output enabled, and MTPE pin to be high, to be enabled.
//! Reset Type: POR
//!
//! \param baseAddress is the base address of the MTIF module.
//!
//! \return None
//
//*****************************************************************************
extern void MTIF_enableTestPortTerminalActivationBySWAndHW(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_MTIF_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// pmm.c - Driver for the pmm Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup pmm_api pmm
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_PMM_FRAM__
#include "pmm.h"
#include <assert.h>
void PMM_enableSVSH (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0_L) |= SVSHE;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_disableSVSH (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0_L) &= ~SVSHE;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_turnOnRegulator (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0) &= ~PMMREGOFF;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_turnOffRegulator (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMREGOFF;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_trigPOR (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWPOR;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_trigBOR (void)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG8(PMM_BASE + OFS_PMMCTL0) |= PMMSWBOR;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
void PMM_clearInterrupt (uint16_t mask)
{
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = PMMPW_H;
HWREG16(PMM_BASE + OFS_PMMIFG) &= ~mask;
HWREG8(PMM_BASE + OFS_PMMCTL0_H) = 0x00;
}
uint16_t PMM_getInterruptStatus (uint16_t mask)
{
return ( (HWREG16(PMM_BASE + OFS_PMMIFG)) & mask );
}
void PMM_unlockLPM5 (void)
{
//Direct register access to avoid compiler warning - #10420-D
//For FRAM devices, at start up, the GPO power-on default
//high-impedance mode needs to be disabled to activate previously
//configured port settings. This can be done by clearing the LOCKLPM5
//bit in PM5CTL0 register
PM5CTL0 &= ~LOCKLPM5;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for pmm_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// pmm.h - Driver for the PMM Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_PMM_H__
#define __MSP430WARE_PMM_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_PMM_FRAM__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: PMM_clearInterrupt(), and PMM_getInterruptStatus() as well as
// returned by the PMM_getInterruptStatus() function.
//
//*****************************************************************************
#define PMM_BOR_INTERRUPT PMMBORIFG
#define PMM_RST_INTERRUPT PMMRSTIFG
#define PMM_POR_INTERRUPT PMMPORIFG
#define PMM_SVSH_INTERRUPT SVSHIFG
#define PMM_LPM5_INTERRUPT PMMLPM5IFG
#define PMM_ALL (0xA7)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enables the high-side SVS circuitry
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_enableSVSH(void);
//*****************************************************************************
//
//! \brief Disables the high-side SVS circuitry
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_disableSVSH(void);
//*****************************************************************************
//
//! \brief Makes the low-dropout voltage regulator (LDO) remain ON when going
//! into LPM 3/4.
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_turnOnRegulator(void);
//*****************************************************************************
//
//! \brief Turns OFF the low-dropout voltage regulator (LDO) when going into
//! LPM3/4, thus the system will enter LPM3.5 or LPM4.5 respectively
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_turnOffRegulator(void);
//*****************************************************************************
//
//! \brief Calling this function will trigger a software Power On Reset (POR).
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_trigPOR(void);
//*****************************************************************************
//
//! \brief Calling this function will trigger a software Brown Out Rest (BOR).
//!
//!
//! Modified bits of \b PMMCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_trigBOR(void);
//*****************************************************************************
//
//! \brief Clears interrupt flags for the PMM
//!
//! \param mask is the mask for specifying the required flag
//! Mask value is the logical OR of any of the following:
//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
//! - \b PMM_POR_INTERRUPT - Software POR interrupt
//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
//! - \b PMM_ALL - All interrupts
//!
//! Modified bits of \b PMMCTL0 register and bits of \b PMMIFG register.
//!
//! \return None
//
//*****************************************************************************
extern void PMM_clearInterrupt(uint16_t mask);
//*****************************************************************************
//
//! \brief Returns interrupt status
//!
//! \param mask is the mask for specifying the required flag
//! Mask value is the logical OR of any of the following:
//! - \b PMM_BOR_INTERRUPT - Software BOR interrupt
//! - \b PMM_RST_INTERRUPT - RESET pin interrupt
//! - \b PMM_POR_INTERRUPT - Software POR interrupt
//! - \b PMM_SVSH_INTERRUPT - SVS high side interrupt
//! - \b PMM_LPM5_INTERRUPT - LPM5 indication
//! - \b PMM_ALL - All interrupts
//!
//! \return Logical OR of any of the following:
//! - \b PMM_BOR_INTERRUPT Software BOR interrupt
//! - \b PMM_RST_INTERRUPT RESET pin interrupt
//! - \b PMM_POR_INTERRUPT Software POR interrupt
//! - \b PMM_SVSH_INTERRUPT SVS high side interrupt
//! - \b PMM_LPM5_INTERRUPT LPM5 indication
//! - \b PMM_ALL All interrupts
//! \n indicating the status of the selected interrupt flags
//
//*****************************************************************************
extern uint16_t PMM_getInterruptStatus(uint16_t mask);
//*****************************************************************************
//
//! \brief Unlock LPM5
//!
//! LPMx.5 configuration is not locked and defaults to its reset condition.
//! Disable the GPIO power-on default high-impedance mode to activate
//! previously configured port settings.
//!
//!
//! \return None
//
//*****************************************************************************
extern void PMM_unlockLPM5(void);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_PMM_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// ram.c - Driver for the ram Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup ram_api ram
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RC_FRAM__
#include "ram.h"
#include <assert.h>
void RAM_setSectorOff(uint8_t sector, uint8_t mode)
{
uint8_t sectorPos = sector<<1;
uint8_t val = HWREG8(RAM_BASE + OFS_RCCTL0_L) & ~(0x3 << sectorPos);
HWREG16(RAM_BASE + OFS_RCCTL0) = (RCKEY | val | (mode << sectorPos));
}
uint8_t RAM_getSectorState (uint8_t sector)
{
uint8_t sectorPos = sector<<1;
return (HWREG8(RAM_BASE + OFS_RCCTL0_L) & (0x3<<sectorPos)) >> sectorPos;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for ram_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// ram.h - Driver for the RAM Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_RAM_H__
#define __MSP430WARE_RAM_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RC_FRAM__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the sector parameter for
// functions: RAM_setSectorOff(), and RAM_getSectorState().
//
//*****************************************************************************
#define RAM_SECTOR0 (0x00)
#define RAM_SECTOR1 (0x01)
#define RAM_SECTOR2 (0x02)
#define RAM_SECTOR3 (0x03)
//*****************************************************************************
//
// The following are values that can be passed to the mode parameter for
// functions: RAM_setSectorOff() as well as returned by the
// RAM_getSectorState() function.
//
//*****************************************************************************
#define RAM_RETENTION_MODE (0x00)
#define RAM_OFF_WAKEUP_MODE (RCRS0OFF0)
#define RAM_OFF_NON_WAKEUP_MODE (RCRS0OFF1)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Set specified RAM sector off
//!
//! \param sector is specified sector to be set off.
//! Valid values are:
//! - \b RAM_SECTOR0
//! - \b RAM_SECTOR1
//! - \b RAM_SECTOR2
//! - \b RAM_SECTOR3
//! \param mode is sector off mode
//! Valid values are:
//! - \b RAM_RETENTION_MODE
//! - \b RAM_OFF_WAKEUP_MODE
//! - \b RAM_OFF_NON_WAKEUP_MODE
//!
//! Modified bits of \b RCCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void RAM_setSectorOff(uint8_t sector,
uint8_t mode);
//*****************************************************************************
//
//! \brief Get RAM sector ON/OFF status
//!
//! \param sector is specified sector
//! Valid values are:
//! - \b RAM_SECTOR0
//! - \b RAM_SECTOR1
//! - \b RAM_SECTOR2
//! - \b RAM_SECTOR3
//!
//! \return One of the following:
//! - \b RAM_RETENTION_MODE
//! - \b RAM_OFF_WAKEUP_MODE
//! - \b RAM_OFF_NON_WAKEUP_MODE
//! \n indicating the status of the masked sectors
//
//*****************************************************************************
extern uint8_t RAM_getSectorState(uint8_t sector);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_RAM_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// ref_a.c - Driver for the ref_a Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup ref_a_api ref_a
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_REF_A__
#include "ref_a.h"
#include <assert.h>
void Ref_A_setReferenceVoltage (uint16_t baseAddress,
uint8_t referenceVoltageSelect)
{
HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFVSEL_3);
HWREG8(baseAddress + OFS_REFCTL0_L) |= referenceVoltageSelect;
}
void Ref_A_disableTempSensor (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) |= REFTCOFF;
}
void Ref_A_enableTempSensor (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFTCOFF);
}
void Ref_A_enableReferenceVoltageOutput (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) |= REFOUT;
}
void Ref_A_disableReferenceVoltageOutput (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFOUT);
}
void Ref_A_enableReferenceVoltage (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) |= REFON;
}
void Ref_A_disableReferenceVoltage (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) &= ~(REFON);
}
uint16_t Ref_A_getBandgapMode (uint16_t baseAddress)
{
return (HWREG16((baseAddress) + OFS_REFCTL0) & BGMODE);
}
bool Ref_A_isBandgapActive (uint16_t baseAddress)
{
if (HWREG16((baseAddress) + OFS_REFCTL0) & REFBGACT){
return (REF_A_ACTIVE) ;
} else {
return (REF_A_INACTIVE) ;
}
}
uint16_t Ref_A_isRefGenBusy (uint16_t baseAddress)
{
return (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENBUSY);
}
bool Ref_A_isRefGenActive (uint16_t baseAddress)
{
if (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENACT){
return (REF_A_ACTIVE) ;
} else {
return (REF_A_INACTIVE) ;
}
}
bool Ref_A_isBufferedBandgapVoltageReady(uint16_t baseAddress)
{
if (HWREG16((baseAddress) + OFS_REFCTL0) & REFBGRDY){
return (REF_A_READY) ;
} else {
return (REF_A_NOTREADY) ;
}
}
bool Ref_A_isVariableReferenceVoltageOutputReady(uint16_t baseAddress)
{
if (HWREG16((baseAddress) + OFS_REFCTL0) & REFGENRDY){
return (REF_A_READY) ;
} else {
return (REF_A_NOTREADY) ;
}
}
void Ref_A_setReferenceVoltageOneTimeTrigger(uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) |= REFGENOT;
}
void Ref_A_setBufferedBandgapVoltageOneTimeTrigger(uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_REFCTL0_L) |= REFBGOT;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for ref_a_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// ref_a.h - Driver for the REF_A Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_REF_A_H__
#define __MSP430WARE_REF_A_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_REF_A__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the referenceVoltageSelect
// parameter for functions: Ref_A_setReferenceVoltage().
//
//*****************************************************************************
#define REF_A_VREF1_2V (REFVSEL_0)
#define REF_A_VREF2_0V (REFVSEL_1)
#define REF_A_VREF2_5V (REFVSEL_2)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the Ref_A_isBandgapActive() function and the
// Ref_A_isRefGenActive() function.
//
//*****************************************************************************
#define REF_A_ACTIVE true
#define REF_A_INACTIVE false
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the Ref_A_getBandgapMode() function.
//
//*****************************************************************************
#define REF_A_STATICMODE 0x00
#define REF_A_SAMPLEMODE BGMODE
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the Ref_A_isRefGenBusy() function.
//
//*****************************************************************************
#define REF_A_NOTBUSY 0x00
#define REF_A_BUSY REFGENBUSY
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the Ref_A_isVariableReferenceVoltageOutputReady()
// function and the Ref_A_isBufferedBandgapVoltageReady() function.
//
//*****************************************************************************
#define REF_A_NOTREADY false
#define REF_A_READY true
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the reference voltage for the voltage generator.
//!
//! This function sets the reference voltage generated by the voltage generator
//! to be used by other peripherals. This reference voltage will only be valid
//! while the Ref_A module is in control. Please note, if the
//! Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//! \param referenceVoltageSelect is the desired voltage to generate for a
//! reference voltage.
//! Valid values are:
//! - \b REF_A_VREF1_2V [Default]
//! - \b REF_A_VREF2_0V
//! - \b REF_A_VREF2_5V
//! \n Modified bits are \b REFVSEL of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_setReferenceVoltage(uint16_t baseAddress,
uint8_t referenceVoltageSelect);
//*****************************************************************************
//
//! \brief Disables the internal temperature sensor to save power consumption.
//!
//! This function is used to turn off the internal temperature sensor to save
//! on power consumption. The temperature sensor is enabled by default. Please
//! note, that giving ADC12 module control over the Ref_A module, the state of
//! the temperature sensor is dependent on the controls of the ADC12 module.
//! Please note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function
//! will have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFTCOFF of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_disableTempSensor(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables the internal temperature sensor.
//!
//! This function is used to turn on the internal temperature sensor to use by
//! other peripherals. The temperature sensor is enabled by default. Please
//! note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will
//! have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFTCOFF of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_enableTempSensor(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Outputs the reference voltage to an output pin.
//!
//! This function is used to output the reference voltage being generated to an
//! output pin. Please note, the output pin is device specific. Please note,
//! that giving ADC12 module control over the Ref_A module, the state of the
//! reference voltage as an output to a pin is dependent on the controls of the
//! ADC12 module. If ADC12_A reference burst is disabled or DAC12_A is enabled,
//! this output is available continuously. If ADC12_A reference burst is
//! enabled, this output is available only during an ADC12_A conversion. For
//! devices with CTSD16, Ref_enableReferenceVoltage() needs to be invoked to
//! get VREFBG available continuously. Otherwise, VREFBG is only available
//! externally when a module requests it. Please note, if the
//! Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFOUT of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_enableReferenceVoltageOutput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the reference voltage as an output to a pin.
//!
//! This function is used to disables the reference voltage being generated to
//! be given to an output pin. Please note, if the Ref_A_isRefGenBusy() returns
//! Ref_A_BUSY, this function will have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFOUT of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_disableReferenceVoltageOutput(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables the reference voltage to be used by peripherals.
//!
//! This function is used to enable the generated reference voltage to be used
//! other peripherals or by an output pin, if enabled. Please note, that giving
//! ADC12 module control over the Ref_A module, the state of the reference
//! voltage is dependent on the controls of the ADC12 module. Please note,
//! ADC10_A does not support the reference request. If the Ref_A_isRefGenBusy()
//! returns Ref_A_BUSY, this function will have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFON of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_enableReferenceVoltage(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the reference voltage.
//!
//! This function is used to disable the generated reference voltage. Please
//! note, if the Ref_A_isRefGenBusy() returns Ref_A_BUSY, this function will
//! have no effect.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFON of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_disableReferenceVoltage(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the bandgap mode of the Ref_A module.
//!
//! This function is used to return the bandgap mode of the Ref_A module,
//! requested by the peripherals using the bandgap. If a peripheral requests
//! static mode, then the bandgap mode will be static for all modules, whereas
//! if all of the peripherals using the bandgap request sample mode, then that
//! will be the mode returned. Sample mode allows the bandgap to be active only
//! when necessary to save on power consumption, static mode requires the
//! bandgap to be active until no peripherals are using it anymore.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_STATICMODE if the bandgap is operating in static mode
//! - \b REF_A_SAMPLEMODE if the bandgap is operating in sample mode
//! \n indicating the bandgap mode of the module
//
//*****************************************************************************
extern uint16_t Ref_A_getBandgapMode(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the active status of the bandgap in the Ref_A module.
//!
//! This function is used to return the active status of the bandgap in the
//! Ref_A module. If the bandgap is in use by a peripheral, then the status
//! will be seen as active.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_ACTIVE if active
//! - \b REF_A_INACTIVE if not active
//! \n indicating the bandgap active status of the module
//
//*****************************************************************************
extern bool Ref_A_isBandgapActive(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the busy status of the reference generator in the Ref_A
//! module.
//!
//! This function is used to return the busy status of the reference generator
//! in the Ref_A module. If the ref generator is in use by a peripheral, then
//! the status will be seen as busy.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_NOTBUSY if the reference generator is not being used
//! - \b REF_A_BUSY if the reference generator is being used,
//! disallowing changes to be made to the Ref_A module controls
//! \n indicating the reference generator busy status of the module
//
//*****************************************************************************
extern uint16_t Ref_A_isRefGenBusy(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the active status of the reference generator in the Ref_A
//! module.
//!
//! This function is used to return the active status of the reference
//! generator in the Ref_A module. If the ref generator is on and ready to use,
//! then the status will be seen as active.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_ACTIVE if active
//! - \b REF_A_INACTIVE if not active
//! \n indicating the reference generator active status of the module
//
//*****************************************************************************
extern bool Ref_A_isRefGenActive(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the busy status of the reference generator in the Ref_A
//! module.
//!
//! This function is used to return the buys status of the buffered bandgap
//! voltage in the Ref_A module. If the ref generator is on and ready to use,
//! then the status will be seen as active.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_NOTREADY if NOT ready to be used
//! - \b REF_A_READY if ready to be used
//! \n indicating the the busy status of the reference generator in the
//! module
//
//*****************************************************************************
extern bool Ref_A_isBufferedBandgapVoltageReady(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the busy status of the variable reference voltage in the
//! Ref_A module.
//!
//! This function is used to return the busy status of the variable reference
//! voltage in the Ref_A module. If the ref generator is on and ready to use,
//! then the status will be seen as active.
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! \return One of the following:
//! - \b REF_A_NOTREADY if NOT ready to be used
//! - \b REF_A_READY if ready to be used
//! \n indicating the the busy status of the variable reference voltage
//! in the module
//
//*****************************************************************************
extern bool Ref_A_isVariableReferenceVoltageOutputReady(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables the one-time trigger of the reference voltage.
//!
//! Triggers the one-time generation of the variable reference voltage. Once
//! the reference voltage request is set, this bit is cleared by hardware
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFGENOT of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_setReferenceVoltageOneTimeTrigger(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Enables the one-time trigger of the buffered bandgap voltage.
//!
//! Triggers the one-time generation of the buffered bandgap voltage. Once the
//! buffered bandgap voltage request is set, this bit is cleared by hardware
//!
//! \param baseAddress is the base address of the REF_A module.
//!
//! Modified bits are \b REFBGOT of \b REFCTL0 register.
//!
//! \return None
//
//*****************************************************************************
extern void Ref_A_setBufferedBandgapVoltageOneTimeTrigger(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_REF_A_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// rtc_b.c - Driver for the rtc_b Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup rtc_b_api rtc_b
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RTC_B__
#include "rtc_b.h"
#include <assert.h>
void RTC_B_startClock (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_RTCCTL01_H) &= ~(RTCHOLD_H);
}
void RTC_B_holdClock (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_RTCCTL01_H) |= RTCHOLD_H;
}
void RTC_B_setCalibrationFrequency (uint16_t baseAddress,
uint16_t frequencySelect)
{
HWREG16(baseAddress + OFS_RTCCTL23) &= ~(RTCCALF_3);
HWREG16(baseAddress + OFS_RTCCTL23) |= frequencySelect;
}
void RTC_B_setCalibrationData (uint16_t baseAddress,
uint8_t offsetDirection,
uint8_t offsetValue)
{
HWREG8(baseAddress + OFS_RTCCTL23_L) = offsetValue + offsetDirection;
}
void RTC_B_initCalendar (uint16_t baseAddress,
Calendar *CalendarTime,
uint16_t formatSelect)
{
HWREG8(baseAddress + OFS_RTCCTL01_H) |= RTCHOLD_H;
HWREG16(baseAddress + OFS_RTCCTL01) &= ~(RTCBCD);
HWREG16(baseAddress + OFS_RTCCTL01) |= formatSelect;
HWREG8(baseAddress + OFS_RTCTIM0_L) = CalendarTime->Seconds;
HWREG8(baseAddress + OFS_RTCTIM0_H) = CalendarTime->Minutes;
HWREG8(baseAddress + OFS_RTCTIM1_L) = CalendarTime->Hours;
HWREG8(baseAddress + OFS_RTCTIM1_H) = CalendarTime->DayOfWeek;
HWREG8(baseAddress + OFS_RTCDATE_L) = CalendarTime->DayOfMonth;
HWREG8(baseAddress + OFS_RTCDATE_H) = CalendarTime->Month;
HWREG16(baseAddress + OFS_RTCYEAR) = CalendarTime->Year;
}
Calendar RTC_B_getCalendarTime (uint16_t baseAddress)
{
Calendar tempCal;
while ( !(HWREG16(baseAddress + OFS_RTCCTL01) & RTCRDY) ) ;
tempCal.Seconds = HWREG8(baseAddress + OFS_RTCTIM0_L);
tempCal.Minutes = HWREG8(baseAddress + OFS_RTCTIM0_H);
tempCal.Hours = HWREG8(baseAddress + OFS_RTCTIM1_L);
tempCal.DayOfWeek = HWREG8(baseAddress + OFS_RTCTIM1_H);
tempCal.DayOfMonth = HWREG8(baseAddress + OFS_RTCDATE_L);
tempCal.Month = HWREG8(baseAddress + OFS_RTCDATE_H);
tempCal.Year = HWREG16(baseAddress + OFS_RTCYEAR);
return ( tempCal) ;
}
void RTC_B_configureCalendarAlarm(uint16_t baseAddress,
RTC_B_configureCalendarAlarmParam *param)
{
//Each of these is XORed with 0x80 to turn on if an integer is passed,
//or turn OFF if RTC_B_ALARM_OFF (0x80) is passed.
HWREG8(baseAddress + OFS_RTCAMINHR_L) = (param->minutesAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCAMINHR_H) = (param->hoursAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCADOWDAY_L) = (param->dayOfWeekAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCADOWDAY_H) = (param->dayOfMonthAlarm ^ 0x80);
}
void RTC_B_setCalendarEvent (uint16_t baseAddress,
uint16_t eventSelect)
{
HWREG16(baseAddress + OFS_RTCCTL01) &= ~(RTCTEV_3); //Reset bits
HWREG16(baseAddress + OFS_RTCCTL01) |= eventSelect;
}
void RTC_B_definePrescaleEvent (uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleEventDivider)
{
HWREG8(baseAddress + OFS_RTCPS0CTL_L + prescaleSelect) &= ~(RT0IP_7);
HWREG8(baseAddress + OFS_RTCPS0CTL_L +
prescaleSelect) |= prescaleEventDivider;
}
uint8_t RTC_B_getPrescaleValue (uint16_t baseAddress,
uint8_t prescaleSelect)
{
if (RTC_B_PRESCALE_0 == prescaleSelect){
return ( HWREG8(baseAddress + OFS_RTCPS_L) );
} else if (RTC_B_PRESCALE_1 == prescaleSelect){
return ( HWREG8(baseAddress + OFS_RTCPS_H) );
} else {
return ( 0) ;
}
}
void RTC_B_setPrescaleValue (uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleCounterValue)
{
if (RTC_B_PRESCALE_0 == prescaleSelect){
HWREG8(baseAddress + OFS_RTCPS_L) = prescaleCounterValue;
} else if (RTC_B_PRESCALE_1 == prescaleSelect){
HWREG8(baseAddress + OFS_RTCPS_H) = prescaleCounterValue;
}
}
void RTC_B_enableInterrupt (uint16_t baseAddress,
uint8_t interruptMask)
{
if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
HWREG8(baseAddress + OFS_RTCCTL01_L) |=
(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
}
if (interruptMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL) |= RT0PSIE;
}
if (interruptMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL) |= RT1PSIE;
}
}
void RTC_B_disableInterrupt (uint16_t baseAddress,
uint8_t interruptMask)
{
if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
HWREG8(baseAddress + OFS_RTCCTL01_L) &=
~(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
}
if (interruptMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL) &= ~(RT0PSIE);
}
if (interruptMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL) &= ~(RT1PSIE);
}
}
uint8_t RTC_B_getInterruptStatus (uint16_t baseAddress,
uint8_t interruptFlagMask)
{
uint8_t tempInterruptFlagMask = 0x0000;
tempInterruptFlagMask |= (HWREG8(baseAddress + OFS_RTCCTL01_L)
& ((interruptFlagMask >> 4)
& (RTCOFIFG +
RTCTEVIFG +
RTCAIFG +
RTCRDYIFG)));
tempInterruptFlagMask = tempInterruptFlagMask << 4;
if (interruptFlagMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
if ( HWREG8(baseAddress + OFS_RTCPS0CTL) & RT0PSIFG){
tempInterruptFlagMask |= RTC_B_PRESCALE_TIMER0_INTERRUPT;
}
}
if (interruptFlagMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
if ( HWREG8(baseAddress + OFS_RTCPS1CTL) & RT1PSIFG){
tempInterruptFlagMask |= RTC_B_PRESCALE_TIMER1_INTERRUPT;
}
}
return ( tempInterruptFlagMask) ;
}
void RTC_B_clearInterrupt (uint16_t baseAddress,
uint8_t interruptFlagMask)
{
if ( interruptFlagMask & (RTC_B_TIME_EVENT_INTERRUPT +
RTC_B_CLOCK_ALARM_INTERRUPT +
RTC_B_CLOCK_READ_READY_INTERRUPT +
RTC_B_OSCILLATOR_FAULT_INTERRUPT) ){
HWREG8(baseAddress + OFS_RTCCTL01_L) &=
~((interruptFlagMask>>4) & (RTCOFIFG +
RTCTEVIFG +
RTCAIFG +
RTCRDYIFG));
}
if (interruptFlagMask & RTC_B_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL) &= ~(RT0PSIFG);
}
if (interruptFlagMask & RTC_B_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL) &= ~(RT1PSIFG);
}
}
uint16_t RTC_B_convertBCDToBinary (uint16_t baseAddress,
uint16_t valueToConvert)
{
HWREG16(baseAddress + OFS_BCD2BIN) = valueToConvert;
return ( HWREG16(baseAddress + OFS_BCD2BIN) );
}
uint16_t RTC_B_convertBinaryToBCD (uint16_t baseAddress,
uint16_t valueToConvert)
{
HWREG16(baseAddress + OFS_BIN2BCD) = valueToConvert;
return ( HWREG16(baseAddress + OFS_BIN2BCD) );
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for rtc_b_api
//! @}
//
//*****************************************************************************

633
platform/vendor_bsp/TI/MSP430FR5xx_6xx/rtc_b.h Normal file
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@@ -0,0 +1,633 @@
/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// rtc_b.h - Driver for the RTC_B Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_RTC_B_H__
#define __MSP430WARE_RTC_B_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RTC_B__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the RTC_B_initCalendar() function as the CalendarTime
//! parameter.
//
//*****************************************************************************
typedef struct Calendar {
//! Seconds of minute between 0-59
uint8_t Seconds;
//! Minutes of hour between 0-59
uint8_t Minutes;
//! Hour of day between 0-23
uint8_t Hours;
//! Day of week between 0-6
uint8_t DayOfWeek;
//! Day of month between 1-31
uint8_t DayOfMonth;
//! Month between 1-12
uint8_t Month;
//! Year between 0-4095
uint16_t Year;
} Calendar;
//*****************************************************************************
//
//! \brief Used in the RTC_B_configureCalendarAlarm() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct RTC_B_configureCalendarAlarmParam {
//! Is the alarm condition for the minutes.
//! \n Valid values are:
//! - \b RTC_B_ALARMCONDITION_OFF [Default]
uint8_t minutesAlarm;
//! Is the alarm condition for the hours.
//! \n Valid values are:
//! - \b RTC_B_ALARMCONDITION_OFF [Default]
uint8_t hoursAlarm;
//! Is the alarm condition for the day of week.
//! \n Valid values are:
//! - \b RTC_B_ALARMCONDITION_OFF [Default]
uint8_t dayOfWeekAlarm;
//! Is the alarm condition for the day of the month.
//! \n Valid values are:
//! - \b RTC_B_ALARMCONDITION_OFF [Default]
uint8_t dayOfMonthAlarm;
} RTC_B_configureCalendarAlarmParam;
//*****************************************************************************
//
// The following are values that can be passed to the frequencySelect parameter
// for functions: RTC_B_setCalibrationFrequency().
//
//*****************************************************************************
#define RTC_B_CALIBRATIONFREQ_OFF (RTCCALF_0)
#define RTC_B_CALIBRATIONFREQ_512HZ (RTCCALF_1)
#define RTC_B_CALIBRATIONFREQ_256HZ (RTCCALF_2)
#define RTC_B_CALIBRATIONFREQ_1HZ (RTCCALF_3)
//*****************************************************************************
//
// The following are values that can be passed to the offsetDirection parameter
// for functions: RTC_B_setCalibrationData().
//
//*****************************************************************************
#define RTC_B_CALIBRATION_DOWN2PPM (!(RTCCALS))
#define RTC_B_CALIBRATION_UP4PPM (RTCCALS)
//*****************************************************************************
//
// The following are values that can be passed to the formatSelect parameter
// for functions: RTC_B_initCalendar().
//
//*****************************************************************************
#define RTC_B_FORMAT_BINARY (!(RTCBCD))
#define RTC_B_FORMAT_BCD (RTCBCD)
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: RTC_B_configureCalendarAlarm(), RTC_B_configureCalendarAlarm(),
// RTC_B_configureCalendarAlarm(), and RTC_B_configureCalendarAlarm().
//
//*****************************************************************************
#define RTC_B_ALARMCONDITION_OFF (0x80)
//*****************************************************************************
//
// The following are values that can be passed to the eventSelect parameter for
// functions: RTC_B_setCalendarEvent().
//
//*****************************************************************************
#define RTC_B_CALENDAREVENT_MINUTECHANGE (RTCTEV_0)
#define RTC_B_CALENDAREVENT_HOURCHANGE (RTCTEV_1)
#define RTC_B_CALENDAREVENT_NOON (RTCTEV_2)
#define RTC_B_CALENDAREVENT_MIDNIGHT (RTCTEV_3)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleEventDivider
// parameter for functions: RTC_B_definePrescaleEvent().
//
//*****************************************************************************
#define RTC_B_PSEVENTDIVIDER_2 (RT0IP_0)
#define RTC_B_PSEVENTDIVIDER_4 (RT0IP_1)
#define RTC_B_PSEVENTDIVIDER_8 (RT0IP_2)
#define RTC_B_PSEVENTDIVIDER_16 (RT0IP_3)
#define RTC_B_PSEVENTDIVIDER_32 (RT0IP_4)
#define RTC_B_PSEVENTDIVIDER_64 (RT0IP_5)
#define RTC_B_PSEVENTDIVIDER_128 (RT0IP_6)
#define RTC_B_PSEVENTDIVIDER_256 (RT0IP_7)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleSelect parameter
// for functions: RTC_B_definePrescaleEvent(), RTC_B_getPrescaleValue(), and
// RTC_B_setPrescaleValue().
//
//*****************************************************************************
#define RTC_B_PRESCALE_0 (0x0)
#define RTC_B_PRESCALE_1 (0x2)
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: RTC_B_enableInterrupt(), and RTC_B_disableInterrupt(); the
// interruptFlagMask parameter for functions: RTC_B_getInterruptStatus(), and
// RTC_B_clearInterrupt() as well as returned by the RTC_B_getInterruptStatus()
// function.
//
//*****************************************************************************
#define RTC_B_TIME_EVENT_INTERRUPT RTCTEVIE
#define RTC_B_CLOCK_ALARM_INTERRUPT RTCAIE
#define RTC_B_CLOCK_READ_READY_INTERRUPT RTCRDYIE
#define RTC_B_PRESCALE_TIMER0_INTERRUPT 0x02
#define RTC_B_PRESCALE_TIMER1_INTERRUPT 0x01
#define RTC_B_OSCILLATOR_FAULT_INTERRUPT RTCOFIE
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Starts the RTC.
//!
//! This function clears the RTC main hold bit to allow the RTC to function.
//!
//! \param baseAddress is the base address of the RTC_B module.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_startClock(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Holds the RTC.
//!
//! This function sets the RTC main hold bit to disable RTC functionality.
//!
//! \param baseAddress is the base address of the RTC_B module.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_holdClock(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Allows and Sets the frequency output to RTCCLK pin for calibration
//! measurement.
//!
//! This function sets a frequency to measure at the RTCCLK output pin. After
//! testing the set frequency, the calibration could be set accordingly.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param frequencySelect is the frequency output to RTCCLK.
//! Valid values are:
//! - \b RTC_B_CALIBRATIONFREQ_OFF [Default] - turn off calibration
//! output
//! - \b RTC_B_CALIBRATIONFREQ_512HZ - output signal at 512Hz for
//! calibration
//! - \b RTC_B_CALIBRATIONFREQ_256HZ - output signal at 256Hz for
//! calibration
//! - \b RTC_B_CALIBRATIONFREQ_1HZ - output signal at 1Hz for
//! calibration
//! \n Modified bits are \b RTCCALF of \b RTCCTL3 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_setCalibrationFrequency(uint16_t baseAddress,
uint16_t frequencySelect);
//*****************************************************************************
//
//! \brief Sets the specified calibration for the RTC.
//!
//! This function sets the calibration offset to make the RTC as accurate as
//! possible. The offsetDirection can be either +4-ppm or -2-ppm, and the
//! offsetValue should be from 1-63 and is multiplied by the direction setting
//! (i.e. +4-ppm * 8 (offsetValue) = +32-ppm). Please note, when measuring the
//! frequency after setting the calibration, you will only see a change on the
//! 1Hz frequency.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param offsetDirection is the direction that the calibration offset will
//! go.
//! Valid values are:
//! - \b RTC_B_CALIBRATION_DOWN2PPM - calibrate at steps of -2
//! - \b RTC_B_CALIBRATION_UP4PPM - calibrate at steps of +4
//! \n Modified bits are \b RTCCALS of \b RTCCTL2 register.
//! \param offsetValue is the value that the offset will be a factor of; a
//! valid value is any integer from 1-63.
//! \n Modified bits are \b RTCCAL of \b RTCCTL2 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_setCalibrationData(uint16_t baseAddress,
uint8_t offsetDirection,
uint8_t offsetValue);
//*****************************************************************************
//
//! \brief Initializes the settings to operate the RTC in calendar mode
//!
//! This function initializes the Calendar mode of the RTC module. To prevent
//! potential erroneous alarm conditions from occurring, the alarm should be
//! disabled by clearing the RTCAIE, RTCAIFG and AE bits with APIs:
//! RTC_B_disableInterrupt(), RTC_B_clearInterrupt() and
//! RTC_B_configureCalendarAlarm() before calendar initialization.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param CalendarTime is the pointer to the structure containing the values
//! for the Calendar to be initialized to. Valid values should be of
//! type pointer to Calendar and should contain the following members
//! and corresponding values: \n\b Seconds between 0-59 \n\b Minutes
//! between 0-59 \n\b Hours between 0-23 \n\b DayOfWeek between 0-6 \n\b
//! DayOfMonth between 1-31 \n\b Month between 1-12 \n\b Year between
//! 0-4095 \n\b NOTE: Values beyond the ones specified may result in
//! erratic behavior.
//! \param formatSelect is the format for the Calendar registers to use.
//! Valid values are:
//! - \b RTC_B_FORMAT_BINARY [Default]
//! - \b RTC_B_FORMAT_BCD
//! \n Modified bits are \b RTCBCD of \b RTCCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_initCalendar(uint16_t baseAddress,
Calendar *CalendarTime,
uint16_t formatSelect);
//*****************************************************************************
//
//! \brief Returns the Calendar Time stored in the Calendar registers of the
//! RTC.
//!
//! This function returns the current Calendar time in the form of a Calendar
//! structure. The RTCRDY polling is used in this function to prevent reading
//! invalid time.
//!
//! \param baseAddress is the base address of the RTC_B module.
//!
//! \return A Calendar structure containing the current time.
//
//*****************************************************************************
extern Calendar RTC_B_getCalendarTime(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets and Enables the desired Calendar Alarm settings.
//!
//! This function sets a Calendar interrupt condition to assert the RTCAIFG
//! interrupt flag. The condition is a logical and of all of the parameters.
//! For example if the minutes and hours alarm is set, then the interrupt will
//! only assert when the minutes AND the hours change to the specified setting.
//! Use the RTC_B_ALARM_OFF for any alarm settings that should not be apart of
//! the alarm condition.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param param is the pointer to struct for calendar alarm configuration.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_configureCalendarAlarm(uint16_t baseAddress,
RTC_B_configureCalendarAlarmParam *param);
//*****************************************************************************
//
//! \brief Sets a single specified Calendar interrupt condition
//!
//! This function sets a specified event to assert the RTCTEVIFG interrupt.
//! This interrupt is independent from the Calendar alarm interrupt.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param eventSelect is the condition selected.
//! Valid values are:
//! - \b RTC_B_CALENDAREVENT_MINUTECHANGE - assert interrupt on every
//! minute
//! - \b RTC_B_CALENDAREVENT_HOURCHANGE - assert interrupt on every hour
//! - \b RTC_B_CALENDAREVENT_NOON - assert interrupt when hour is 12
//! - \b RTC_B_CALENDAREVENT_MIDNIGHT - assert interrupt when hour is 0
//! \n Modified bits are \b RTCTEV of \b RTCCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_setCalendarEvent(uint16_t baseAddress,
uint16_t eventSelect);
//*****************************************************************************
//
//! \brief Sets up an interrupt condition for the selected Prescaler.
//!
//! This function sets the condition for an interrupt to assert based on the
//! individual prescalers.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param prescaleSelect is the prescaler to define an interrupt for.
//! Valid values are:
//! - \b RTC_B_PRESCALE_0
//! - \b RTC_B_PRESCALE_1
//! \param prescaleEventDivider is a divider to specify when an interrupt can
//! occur based on the clock source of the selected prescaler. (Does not
//! affect timer of the selected prescaler).
//! Valid values are:
//! - \b RTC_B_PSEVENTDIVIDER_2 [Default]
//! - \b RTC_B_PSEVENTDIVIDER_4
//! - \b RTC_B_PSEVENTDIVIDER_8
//! - \b RTC_B_PSEVENTDIVIDER_16
//! - \b RTC_B_PSEVENTDIVIDER_32
//! - \b RTC_B_PSEVENTDIVIDER_64
//! - \b RTC_B_PSEVENTDIVIDER_128
//! - \b RTC_B_PSEVENTDIVIDER_256
//! \n Modified bits are \b RTxIP of \b RTCPSxCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_definePrescaleEvent(uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleEventDivider);
//*****************************************************************************
//
//! \brief Returns the selected prescaler value.
//!
//! This function returns the value of the selected prescale counter register.
//! Note that the counter value should be held by calling RTC_B_holdClock()
//! before calling this API.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param prescaleSelect is the prescaler to obtain the value of.
//! Valid values are:
//! - \b RTC_B_PRESCALE_0
//! - \b RTC_B_PRESCALE_1
//!
//! \return The value of the specified prescaler count register
//
//*****************************************************************************
extern uint8_t RTC_B_getPrescaleValue(uint16_t baseAddress,
uint8_t prescaleSelect);
//*****************************************************************************
//
//! \brief Sets the selected prescaler value.
//!
//! This function sets the prescale counter value. Before setting the prescale
//! counter, it should be held by calling RTC_B_holdClock().
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param prescaleSelect is the prescaler to set the value for.
//! Valid values are:
//! - \b RTC_B_PRESCALE_0
//! - \b RTC_B_PRESCALE_1
//! \param prescaleCounterValue is the specified value to set the prescaler to.
//! Valid values are any integer between 0-255
//! \n Modified bits are \b RTxPS of \b RTxPS register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_setPrescaleValue(uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleCounterValue);
//*****************************************************************************
//
//! \brief Enables selected RTC interrupt sources.
//!
//! This function enables the selected RTC interrupt source. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor. Does not clear interrupt flags.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param interruptMask is a bit mask of the interrupts to enable.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_enableInterrupt(uint16_t baseAddress,
uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Disables selected RTC interrupt sources.
//!
//! This function disables the selected RTC interrupt source. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param interruptMask is a bit mask of the interrupts to disable.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_disableInterrupt(uint16_t baseAddress,
uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the status of the selected interrupts flags.
//!
//! This function returns the status of the interrupt flag for the selected
//! channel.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param interruptFlagMask is a bit mask of the interrupt flags to return the
//! status of.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return Logical OR of any of the following:
//! - \b RTC_B_TIME_EVENT_INTERRUPT asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_B_CLOCK_ALARM_INTERRUPT asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT asserts when Calendar
//! registers are settled.
//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT asserts when Prescaler 0 event
//! condition is met.
//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT asserts when Prescaler 1 event
//! condition is met.
//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT asserts if there is a problem
//! with the 32kHz oscillator, while the RTC is running.
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t RTC_B_getInterruptStatus(uint16_t baseAddress,
uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Clears selected RTC interrupt flags.
//!
//! This function clears the RTC interrupt flag is cleared, so that it no
//! longer asserts.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param interruptFlagMask is a bit mask of the interrupt flags to be
//! cleared.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_B_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_B_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_B_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_B_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_B_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_B_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_B_clearInterrupt(uint16_t baseAddress,
uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Convert the given BCD value to binary format
//!
//! This function converts BCD values to binary format. This API uses the
//! hardware registers to perform the conversion rather than a software method.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param valueToConvert is the raw value in BCD format to convert to Binary.
//! \n Modified bits are \b BCD2BIN of \b BCD2BIN register.
//!
//! \return The binary version of the input parameter
//
//*****************************************************************************
extern uint16_t RTC_B_convertBCDToBinary(uint16_t baseAddress,
uint16_t valueToConvert);
//*****************************************************************************
//
//! \brief Convert the given binary value to BCD format
//!
//! This function converts binary values to BCD format. This API uses the
//! hardware registers to perform the conversion rather than a software method.
//!
//! \param baseAddress is the base address of the RTC_B module.
//! \param valueToConvert is the raw value in Binary format to convert to BCD.
//! \n Modified bits are \b BIN2BCD of \b BIN2BCD register.
//!
//! \return The BCD version of the valueToConvert parameter
//
//*****************************************************************************
extern uint16_t RTC_B_convertBinaryToBCD(uint16_t baseAddress,
uint16_t valueToConvert);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_RTC_B_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// rtc_c.c - Driver for the rtc_c Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup rtc_c_api rtc_c
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RTC_C__
#include "rtc_c.h"
#include <assert.h>
void RTC_C_startClock (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL13_L) &= ~(RTCHOLD);
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_holdClock (uint16_t baseAddress)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL13_L) |= RTCHOLD;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_setCalibrationFrequency (uint16_t baseAddress,
uint16_t frequencySelect)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG16(baseAddress + OFS_RTCCTL13) &= ~(RTCCALF_3);
HWREG16(baseAddress + OFS_RTCCTL13) |= frequencySelect;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_setCalibrationData (uint16_t baseAddress,
uint8_t offsetDirection,
uint8_t offsetValue)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG16(baseAddress + OFS_RTCOCAL) = offsetValue + offsetDirection;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_initCounter (uint16_t baseAddress,
uint16_t clockSelect,
uint16_t counterSizeSelect)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL13) |= RTCHOLD;
HWREG8(baseAddress + OFS_RTCCTL13) &= ~(RTCMODE);
HWREG16(baseAddress + OFS_RTCCTL13) &= ~(RTCSSEL_3 | RTCTEV_3 );
HWREG16(baseAddress + OFS_RTCCTL13) |= clockSelect + counterSizeSelect;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
bool RTC_C_setTemperatureCompensation(uint16_t baseAddress,
uint16_t offsetDirection,
uint8_t offsetValue)
{
while(!(HWREG8(baseAddress + OFS_RTCTCMP_H) & RTCTCRDY_H));
HWREG16(baseAddress + OFS_RTCTCMP) = offsetValue + offsetDirection;
if(HWREG8(baseAddress + OFS_RTCTCMP_H) & RTCTCOK_H) {
return STATUS_SUCCESS;
} else {
return STATUS_FAIL;
}
}
void RTC_C_initCalendar (uint16_t baseAddress,
Calendar *CalendarTime,
uint16_t formatSelect)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL13_L) |= RTCHOLD;
HWREG16(baseAddress + OFS_RTCCTL13_L) &= ~(RTCBCD);
HWREG16(baseAddress + OFS_RTCCTL13_L) |= formatSelect;
HWREG8(baseAddress + OFS_RTCTIM0_L) = CalendarTime->Seconds;
HWREG8(baseAddress + OFS_RTCTIM0_H) = CalendarTime->Minutes;
HWREG8(baseAddress + OFS_RTCTIM1_L) = CalendarTime->Hours;
HWREG8(baseAddress + OFS_RTCTIM1_H) = CalendarTime->DayOfWeek;
HWREG8(baseAddress + OFS_RTCDATE_L) = CalendarTime->DayOfMonth;
HWREG8(baseAddress + OFS_RTCDATE_H) = CalendarTime->Month;
HWREG16(baseAddress + OFS_RTCYEAR) = CalendarTime->Year;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
Calendar RTC_C_getCalendarTime (uint16_t baseAddress)
{
Calendar tempCal;
while ( !(HWREG8(baseAddress + OFS_RTCCTL13_L) & RTCRDY) ) ;
tempCal.Seconds = HWREG8(baseAddress + OFS_RTCTIM0_L);
tempCal.Minutes = HWREG8(baseAddress + OFS_RTCTIM0_H);
tempCal.Hours = HWREG8(baseAddress + OFS_RTCTIM1_L);
tempCal.DayOfWeek = HWREG8(baseAddress + OFS_RTCTIM1_H);
tempCal.DayOfMonth = HWREG8(baseAddress + OFS_RTCDATE_L);
tempCal.Month = HWREG8(baseAddress + OFS_RTCDATE_H);
tempCal.Year = HWREG16(baseAddress + OFS_RTCYEAR);
return ( tempCal) ;
}
void RTC_C_configureCalendarAlarm(uint16_t baseAddress,
RTC_C_configureCalendarAlarmParam *param)
{
//Each of these is XORed with 0x80 to turn on if an integer is passed,
//or turn OFF if RTC_C_ALARM_OFF (0x80) is passed.
HWREG8(baseAddress + OFS_RTCAMINHR_L) = (param->minutesAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCAMINHR_H) = (param->hoursAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCADOWDAY_L) = (param->dayOfWeekAlarm ^ 0x80);
HWREG8(baseAddress + OFS_RTCADOWDAY_H) = (param->dayOfMonthAlarm ^ 0x80);
}
void RTC_C_setCalendarEvent (uint16_t baseAddress,
uint16_t eventSelect)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL13_L) &= ~(RTCTEV_3); //Reset bits
HWREG8(baseAddress + OFS_RTCCTL13_L) |= eventSelect;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
uint32_t RTC_C_getCounterValue (uint16_t baseAddress)
{
if ( (HWREG8(baseAddress + OFS_RTCCTL13) & RTCHOLD)
|| (HWREG8(baseAddress + OFS_RTCPS1CTL) & RT1PSHOLD) ){
return ( 0) ;
}
uint32_t counterValue_L = HWREG16(baseAddress + OFS_RTCTIM0);
uint32_t counterValue_H = HWREG16(baseAddress + OFS_RTCTIM1);
return ( (counterValue_H << 16) + counterValue_L );
}
void RTC_C_setCounterValue (uint16_t baseAddress,
uint32_t counterValue)
{
uint16_t mode = HWREG16(baseAddress + OFS_RTCCTL13) & RTCTEV_3;
if(mode == RTC_C_COUNTERSIZE_8BIT && counterValue > UINT8_MAX)
counterValue = UINT8_MAX;
else if(mode == RTC_C_COUNTERSIZE_16BIT && counterValue > UINT16_MAX)
counterValue = UINT16_MAX;
else if(mode == RTC_C_COUNTERSIZE_24BIT && counterValue > 0xFFFFFF)
counterValue = 0xFFFFFF;
HWREG16(baseAddress + OFS_RTCTIM0) = counterValue;
HWREG16(baseAddress + OFS_RTCTIM1) = ( counterValue >> 16 );
}
void RTC_C_initCounterPrescale (uint16_t baseAddress,
uint8_t prescaleSelect,
uint16_t prescaleClockSelect,
uint16_t prescaleDivider)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
//Reset bits and set clock select
HWREG16(baseAddress + OFS_RTCPS0CTL + prescaleSelect) =
prescaleClockSelect + prescaleDivider;
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_holdCounterPrescale (uint16_t baseAddress,
uint8_t prescaleSelect)
{
HWREG8(baseAddress + OFS_RTCPS0CTL_H + prescaleSelect) |= RT0PSHOLD_H;
}
void RTC_C_startCounterPrescale (uint16_t baseAddress,
uint8_t prescaleSelect)
{
HWREG8(baseAddress + OFS_RTCPS0CTL_H + prescaleSelect) &= ~(RT0PSHOLD_H);
}
void RTC_C_definePrescaleEvent (uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleEventDivider)
{
HWREG8(baseAddress + OFS_RTCPS0CTL_L + prescaleSelect) &= ~(RT0IP_7);
HWREG8(baseAddress + OFS_RTCPS0CTL_L +
prescaleSelect) |= prescaleEventDivider;
}
uint8_t RTC_C_getPrescaleValue (uint16_t baseAddress,
uint8_t prescaleSelect)
{
if (RTC_C_PRESCALE_0 == prescaleSelect){
return ( HWREG8(baseAddress + OFS_RTCPS_L) );
} else if (RTC_C_PRESCALE_1 == prescaleSelect){
return ( HWREG8(baseAddress + OFS_RTCPS_H) );
} else {
return ( 0) ;
}
}
void RTC_C_setPrescaleValue(uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleCounterValue)
{
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
if (RTC_C_PRESCALE_0 == prescaleSelect){
HWREG8(baseAddress + OFS_RTCPS_L) = prescaleCounterValue;
} else if (RTC_C_PRESCALE_1 == prescaleSelect){
HWREG8(baseAddress + OFS_RTCPS_H) = prescaleCounterValue;
}
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
void RTC_C_enableInterrupt (uint16_t baseAddress,
uint8_t interruptMask)
{
if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL0_L) |=
(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
if (interruptMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL_L) |= RT0PSIE;
}
if (interruptMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL_L) |= RT1PSIE;
}
}
void RTC_C_disableInterrupt (uint16_t baseAddress,
uint8_t interruptMask)
{
if ( interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE) ){
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL0_L) &=
~(interruptMask & (RTCOFIE + RTCTEVIE + RTCAIE + RTCRDYIE));
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
if (interruptMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL_L) &= ~(RT0PSIE);
}
if (interruptMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL_L) &= ~(RT1PSIE);
}
}
uint8_t RTC_C_getInterruptStatus (uint16_t baseAddress,
uint8_t interruptFlagMask)
{
uint8_t tempInterruptFlagMask = 0x0000;
tempInterruptFlagMask |= (HWREG8(baseAddress + OFS_RTCCTL0_L)
& ((interruptFlagMask >> 4)
& (RTCOFIFG +
RTCTEVIFG +
RTCAIFG +
RTCRDYIFG)));
tempInterruptFlagMask = tempInterruptFlagMask << 4;
if (interruptFlagMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
if ( HWREG8(baseAddress + OFS_RTCPS0CTL_L) & RT0PSIFG){
tempInterruptFlagMask |= RTC_C_PRESCALE_TIMER0_INTERRUPT;
}
}
if (interruptFlagMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
if ( HWREG8(baseAddress + OFS_RTCPS1CTL_L) & RT1PSIFG){
tempInterruptFlagMask |= RTC_C_PRESCALE_TIMER1_INTERRUPT;
}
}
return ( tempInterruptFlagMask) ;
}
void RTC_C_clearInterrupt (uint16_t baseAddress,
uint8_t interruptFlagMask)
{
if ( interruptFlagMask & (RTC_C_TIME_EVENT_INTERRUPT +
RTC_C_CLOCK_ALARM_INTERRUPT +
RTC_C_CLOCK_READ_READY_INTERRUPT +
RTC_C_OSCILLATOR_FAULT_INTERRUPT) ){
HWREG8(baseAddress + OFS_RTCCTL0_H) = RTCKEY_H;
HWREG8(baseAddress + OFS_RTCCTL0_L) &=
~((interruptFlagMask>>4) & (RTCOFIFG +
RTCTEVIFG +
RTCAIFG +
RTCRDYIFG));
HWREG8(baseAddress + OFS_RTCCTL0_H) = 0x00;
}
if (interruptFlagMask & RTC_C_PRESCALE_TIMER0_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS0CTL_L) &= ~(RT0PSIFG);
}
if (interruptFlagMask & RTC_C_PRESCALE_TIMER1_INTERRUPT){
HWREG8(baseAddress + OFS_RTCPS1CTL_L) &= ~(RT1PSIFG);
}
}
uint16_t RTC_C_convertBCDToBinary (uint16_t baseAddress,
uint16_t valueToConvert)
{
HWREG16(baseAddress + OFS_BCD2BIN) = valueToConvert;
return ( HWREG16(baseAddress + OFS_BCD2BIN) );
}
uint16_t RTC_C_convertBinaryToBCD (uint16_t baseAddress,
uint16_t valueToConvert)
{
HWREG16(baseAddress + OFS_BIN2BCD) = valueToConvert;
return ( HWREG16(baseAddress + OFS_BIN2BCD) );
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for rtc_c_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// rtc_c.h - Driver for the RTC_C Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_RTC_C_H__
#define __MSP430WARE_RTC_C_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_RTC_C__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
//! \brief Used in the RTC_C_initCalendar() function as the CalendarTime
//! parameter.
//
//*****************************************************************************
typedef struct Calendar {
//! Seconds of minute between 0-59
uint8_t Seconds;
//! Minutes of hour between 0-59
uint8_t Minutes;
//! Hour of day between 0-23
uint8_t Hours;
//! Day of week between 0-6
uint8_t DayOfWeek;
//! Day of month between 1-31
uint8_t DayOfMonth;
//! Month between 1-12
uint8_t Month;
//! Year between 0-4095
uint16_t Year;
} Calendar;
//*****************************************************************************
//
//! \brief Used in the RTC_C_configureCalendarAlarm() function as the param
//! parameter.
//
//*****************************************************************************
typedef struct RTC_C_configureCalendarAlarmParam {
//! Is the alarm condition for the minutes.
//! \n Valid values are:
//! - \b RTC_C_ALARMCONDITION_OFF [Default]
uint8_t minutesAlarm;
//! Is the alarm condition for the hours.
//! \n Valid values are:
//! - \b RTC_C_ALARMCONDITION_OFF [Default]
uint8_t hoursAlarm;
//! Is the alarm condition for the day of week.
//! \n Valid values are:
//! - \b RTC_C_ALARMCONDITION_OFF [Default]
uint8_t dayOfWeekAlarm;
//! Is the alarm condition for the day of the month.
//! \n Valid values are:
//! - \b RTC_C_ALARMCONDITION_OFF [Default]
uint8_t dayOfMonthAlarm;
} RTC_C_configureCalendarAlarmParam;
//*****************************************************************************
//
// The following are values that can be passed to the frequencySelect parameter
// for functions: RTC_C_setCalibrationFrequency().
//
//*****************************************************************************
#define RTC_C_CALIBRATIONFREQ_OFF (RTCCALF_0)
#define RTC_C_CALIBRATIONFREQ_512HZ (RTCCALF_1)
#define RTC_C_CALIBRATIONFREQ_256HZ (RTCCALF_2)
#define RTC_C_CALIBRATIONFREQ_1HZ (RTCCALF_3)
//*****************************************************************************
//
// The following are values that can be passed to the offsetDirection parameter
// for functions: RTC_C_setCalibrationData().
//
//*****************************************************************************
#define RTC_C_CALIBRATION_DOWN1PPM (!(RTCCALS))
#define RTC_C_CALIBRATION_UP1PPM (RTCCALS)
//*****************************************************************************
//
// The following are values that can be passed to the offsetDirection parameter
// for functions: RTC_C_setTemperatureCompensation().
//
//*****************************************************************************
#define RTC_C_COMPENSATION_DOWN1PPM (!(RTCTCMPS))
#define RTC_C_COMPENSATION_UP1PPM (RTCTCMPS)
//*****************************************************************************
//
// The following are values that can be passed to the clockSelect parameter for
// functions: RTC_C_initCounter().
//
//*****************************************************************************
#define RTC_C_CLOCKSELECT_32KHZ_OSC (RTCSSEL_0)
#define RTC_C_CLOCKSELECT_RT1PS (RTCSSEL_2)
//*****************************************************************************
//
// The following are values that can be passed to the counterSizeSelect
// parameter for functions: RTC_C_initCounter().
//
//*****************************************************************************
#define RTC_C_COUNTERSIZE_8BIT (RTCTEV_0)
#define RTC_C_COUNTERSIZE_16BIT (RTCTEV_1)
#define RTC_C_COUNTERSIZE_24BIT (RTCTEV_2)
#define RTC_C_COUNTERSIZE_32BIT (RTCTEV_3)
//*****************************************************************************
//
// The following are values that can be passed to the formatSelect parameter
// for functions: RTC_C_initCalendar().
//
//*****************************************************************************
#define RTC_C_FORMAT_BINARY (!(RTCBCD))
#define RTC_C_FORMAT_BCD (RTCBCD)
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: RTC_C_configureCalendarAlarm(), RTC_C_configureCalendarAlarm(),
// RTC_C_configureCalendarAlarm(), and RTC_C_configureCalendarAlarm().
//
//*****************************************************************************
#define RTC_C_ALARMCONDITION_OFF (0x80)
//*****************************************************************************
//
// The following are values that can be passed to the eventSelect parameter for
// functions: RTC_C_setCalendarEvent().
//
//*****************************************************************************
#define RTC_C_CALENDAREVENT_MINUTECHANGE (RTCTEV_0)
#define RTC_C_CALENDAREVENT_HOURCHANGE (RTCTEV_1)
#define RTC_C_CALENDAREVENT_NOON (RTCTEV_2)
#define RTC_C_CALENDAREVENT_MIDNIGHT (RTCTEV_3)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleDivider parameter
// for functions: RTC_C_initCounterPrescale().
//
//*****************************************************************************
#define RTC_C_PSDIVIDER_2 (RT0PSDIV_0)
#define RTC_C_PSDIVIDER_4 (RT0PSDIV_1)
#define RTC_C_PSDIVIDER_8 (RT0PSDIV_2)
#define RTC_C_PSDIVIDER_16 (RT0PSDIV_3)
#define RTC_C_PSDIVIDER_32 (RT0PSDIV_4)
#define RTC_C_PSDIVIDER_64 (RT0PSDIV_5)
#define RTC_C_PSDIVIDER_128 (RT0PSDIV_6)
#define RTC_C_PSDIVIDER_256 (RT0PSDIV_7)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleClockSelect
// parameter for functions: RTC_C_initCounterPrescale().
//
//*****************************************************************************
#define RTC_C_PSCLOCKSELECT_ACLK (RT1SSEL_0)
#define RTC_C_PSCLOCKSELECT_SMCLK (RT1SSEL_1)
#define RTC_C_PSCLOCKSELECT_RT0PS (RT1SSEL_2)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleEventDivider
// parameter for functions: RTC_C_definePrescaleEvent().
//
//*****************************************************************************
#define RTC_C_PSEVENTDIVIDER_2 (RT0IP_0)
#define RTC_C_PSEVENTDIVIDER_4 (RT0IP_1)
#define RTC_C_PSEVENTDIVIDER_8 (RT0IP_2)
#define RTC_C_PSEVENTDIVIDER_16 (RT0IP_3)
#define RTC_C_PSEVENTDIVIDER_32 (RT0IP_4)
#define RTC_C_PSEVENTDIVIDER_64 (RT0IP_5)
#define RTC_C_PSEVENTDIVIDER_128 (RT0IP_6)
#define RTC_C_PSEVENTDIVIDER_256 (RT0IP_7)
//*****************************************************************************
//
// The following are values that can be passed to the prescaleSelect parameter
// for functions: RTC_C_initCounterPrescale(), RTC_C_holdCounterPrescale(),
// RTC_C_startCounterPrescale(), RTC_C_definePrescaleEvent(),
// RTC_C_getPrescaleValue(), and RTC_C_setPrescaleValue().
//
//*****************************************************************************
#define RTC_C_PRESCALE_0 (0x0)
#define RTC_C_PRESCALE_1 (0x2)
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: RTC_C_enableInterrupt(), and RTC_C_disableInterrupt(); the
// interruptFlagMask parameter for functions: RTC_C_getInterruptStatus(), and
// RTC_C_clearInterrupt() as well as returned by the RTC_C_getInterruptStatus()
// function.
//
//*****************************************************************************
#define RTC_C_TIME_EVENT_INTERRUPT RTCTEVIE
#define RTC_C_CLOCK_ALARM_INTERRUPT RTCAIE
#define RTC_C_CLOCK_READ_READY_INTERRUPT RTCRDYIE
#define RTC_C_PRESCALE_TIMER0_INTERRUPT 0x02
#define RTC_C_PRESCALE_TIMER1_INTERRUPT 0x01
#define RTC_C_OSCILLATOR_FAULT_INTERRUPT RTCOFIE
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Starts the RTC.
//!
//! This function clears the RTC main hold bit to allow the RTC to function.
//!
//! \param baseAddress is the base address of the RTC_C module.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_startClock(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Holds the RTC.
//!
//! This function sets the RTC main hold bit to disable RTC functionality.
//!
//! \param baseAddress is the base address of the RTC_C module.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_holdClock(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Allows and Sets the frequency output to RTCCLK pin for calibration
//! measurement.
//!
//! This function sets a frequency to measure at the RTCCLK output pin. After
//! testing the set frequency, the calibration could be set accordingly.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param frequencySelect is the frequency output to RTCCLK.
//! Valid values are:
//! - \b RTC_C_CALIBRATIONFREQ_OFF [Default] - turn off calibration
//! output
//! - \b RTC_C_CALIBRATIONFREQ_512HZ - output signal at 512Hz for
//! calibration
//! - \b RTC_C_CALIBRATIONFREQ_256HZ - output signal at 256Hz for
//! calibration
//! - \b RTC_C_CALIBRATIONFREQ_1HZ - output signal at 1Hz for
//! calibration
//! \n Modified bits are \b RTCCALF of \b RTCCTL3 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_setCalibrationFrequency(uint16_t baseAddress,
uint16_t frequencySelect);
//*****************************************************************************
//
//! \brief Sets the specified calibration for the RTC.
//!
//! This function sets the calibration offset to make the RTC as accurate as
//! possible. The offsetDirection can be either +1-ppm or -1-ppm, and the
//! offsetValue should be from 1-240 and is multiplied by the direction setting
//! (i.e. +1-ppm * 8 (offsetValue) = +8-ppm).
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param offsetDirection is the direction that the calibration offset will
//! go.
//! Valid values are:
//! - \b RTC_C_CALIBRATION_DOWN1PPM - calibrate at steps of -1
//! - \b RTC_C_CALIBRATION_UP1PPM - calibrate at steps of +1
//! \n Modified bits are \b RTC0CALS of \b RTC0CAL register.
//! \param offsetValue is the value that the offset will be a factor of; a
//! valid value is any integer from 1-240.
//! \n Modified bits are \b RTC0CALx of \b RTC0CAL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_setCalibrationData(uint16_t baseAddress,
uint8_t offsetDirection,
uint8_t offsetValue);
//*****************************************************************************
//
//! \brief Initializes the settings to operate the RTC in Counter mode.
//!
//! This function initializes the Counter mode of the RTC_C. Setting the clock
//! source and counter size will allow an interrupt from the RTCTEVIFG once an
//! overflow to the counter register occurs.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param clockSelect is the selected clock for the counter mode to use.
//! Valid values are:
//! - \b RTC_C_CLOCKSELECT_32KHZ_OSC
//! - \b RTC_C_CLOCKSELECT_RT1PS
//! \n Modified bits are \b RTCSSEL of \b RTCCTL1 register.
//! \param counterSizeSelect is the size of the counter.
//! Valid values are:
//! - \b RTC_C_COUNTERSIZE_8BIT [Default]
//! - \b RTC_C_COUNTERSIZE_16BIT
//! - \b RTC_C_COUNTERSIZE_24BIT
//! - \b RTC_C_COUNTERSIZE_32BIT
//! \n Modified bits are \b RTCTEV of \b RTCCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_initCounter(uint16_t baseAddress,
uint16_t clockSelect,
uint16_t counterSizeSelect);
//*****************************************************************************
//
//! \brief Sets the specified temperature compensation for the RTC.
//!
//! This function sets the calibration offset to make the RTC as accurate as
//! possible. The offsetDirection can be either +1-ppm or -1-ppm, and the
//! offsetValue should be from 1-240 and is multiplied by the direction setting
//! (i.e. +1-ppm * 8 (offsetValue) = +8-ppm).
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param offsetDirection is the direction that the calibration offset wil go
//! Valid values are:
//! - \b RTC_C_COMPENSATION_DOWN1PPM
//! - \b RTC_C_COMPENSATION_UP1PPM
//! \n Modified bits are \b RTCTCMPS of \b RTCTCMP register.
//! \param offsetValue is the value that the offset will be a factor of; a
//! valid value is any integer from 1-240.
//! \n Modified bits are \b RTCTCMPx of \b RTCTCMP register.
//!
//! \return STATUS_SUCCESS or STATUS_FAILURE of setting the temperature
//! compensation
//
//*****************************************************************************
extern bool RTC_C_setTemperatureCompensation(uint16_t baseAddress,
uint16_t offsetDirection,
uint8_t offsetValue);
//*****************************************************************************
//
//! \brief Initializes the settings to operate the RTC in calendar mode
//!
//! This function initializes the Calendar mode of the RTC module. To prevent
//! potential erroneous alarm conditions from occurring, the alarm should be
//! disabled by clearing the RTCAIE, RTCAIFG and AE bits with APIs:
//! RTC_C_disableInterrupt(), RTC_C_clearInterrupt() and
//! RTC_C_configureCalendarAlarm() before calendar initialization.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param CalendarTime is the pointer to the structure containing the values
//! for the Calendar to be initialized to. Valid values should be of
//! type pointer to Calendar and should contain the following members
//! and corresponding values: \n\b Seconds between 0-59 \n\b Minutes
//! between 0-59 \n\b Hours between 0-23 \n\b DayOfWeek between 0-6 \n\b
//! DayOfMonth between 1-31 \n\b Month between 1-12 \n\b Year between
//! 0-4095 \n\b NOTE: Values beyond the ones specified may result in
//! erratic behavior.
//! \param formatSelect is the format for the Calendar registers to use.
//! Valid values are:
//! - \b RTC_C_FORMAT_BINARY [Default]
//! - \b RTC_C_FORMAT_BCD
//! \n Modified bits are \b RTCBCD of \b RTCCTL1 register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_initCalendar(uint16_t baseAddress,
Calendar *CalendarTime,
uint16_t formatSelect);
//*****************************************************************************
//
//! \brief Returns the Calendar Time stored in the Calendar registers of the
//! RTC.
//!
//! This function returns the current Calendar time in the form of a Calendar
//! structure. The RTCRDY polling is used in this function to prevent reading
//! invalid time.
//!
//! \param baseAddress is the base address of the RTC_C module.
//!
//! \return A Calendar structure containing the current time.
//
//*****************************************************************************
extern Calendar RTC_C_getCalendarTime(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets and Enables the desired Calendar Alarm settings.
//!
//! This function sets a Calendar interrupt condition to assert the RTCAIFG
//! interrupt flag. The condition is a logical and of all of the parameters.
//! For example if the minutes and hours alarm is set, then the interrupt will
//! only assert when the minutes AND the hours change to the specified setting.
//! Use the RTC_C_ALARM_OFF for any alarm settings that should not be apart of
//! the alarm condition.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param param is the pointer to struct for calendar alarm configuration.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_configureCalendarAlarm(uint16_t baseAddress,
RTC_C_configureCalendarAlarmParam *param);
//*****************************************************************************
//
//! \brief Sets a single specified Calendar interrupt condition
//!
//! This function sets a specified event to assert the RTCTEVIFG interrupt.
//! This interrupt is independent from the Calendar alarm interrupt.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param eventSelect is the condition selected.
//! Valid values are:
//! - \b RTC_C_CALENDAREVENT_MINUTECHANGE - assert interrupt on every
//! minute
//! - \b RTC_C_CALENDAREVENT_HOURCHANGE - assert interrupt on every hour
//! - \b RTC_C_CALENDAREVENT_NOON - assert interrupt when hour is 12
//! - \b RTC_C_CALENDAREVENT_MIDNIGHT - assert interrupt when hour is 0
//! \n Modified bits are \b RTCTEV of \b RTCCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_setCalendarEvent(uint16_t baseAddress,
uint16_t eventSelect);
//*****************************************************************************
//
//! \brief Returns the value of the Counter register.
//!
//! This function returns the value of the counter register for the RTC_C
//! module. It will return the 32-bit value no matter the size set during
//! initialization. The RTC should be held before trying to use this function.
//!
//! \param baseAddress is the base address of the RTC_C module.
//!
//! \return The raw value of the full 32-bit Counter Register.
//
//*****************************************************************************
extern uint32_t RTC_C_getCounterValue(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets the value of the Counter register
//!
//! This function sets the counter register of the RTC_C module.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param counterValue is the value to set the Counter register to; a valid
//! value may be any 32-bit integer.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_setCounterValue(uint16_t baseAddress,
uint32_t counterValue);
//*****************************************************************************
//
//! \brief Initializes the Prescaler for Counter mode.
//!
//! This function initializes the selected prescaler for the counter mode in
//! the RTC_C module. If the RTC is initialized in Calendar mode, then these
//! are automatically initialized. The Prescalers can be used to divide a clock
//! source additionally before it gets to the main RTC clock.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to initialize.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//! \param prescaleClockSelect is the clock to drive the selected prescaler.
//! Valid values are:
//! - \b RTC_C_PSCLOCKSELECT_ACLK
//! - \b RTC_C_PSCLOCKSELECT_SMCLK
//! - \b RTC_C_PSCLOCKSELECT_RT0PS - use Prescaler 0 as source to
//! Prescaler 1 (May only be used if prescaleSelect is
//! RTC_C_PRESCALE_1)
//! \n Modified bits are \b RTxSSEL of \b RTCPSxCTL register.
//! \param prescaleDivider is the divider for the selected clock source.
//! Valid values are:
//! - \b RTC_C_PSDIVIDER_2 [Default]
//! - \b RTC_C_PSDIVIDER_4
//! - \b RTC_C_PSDIVIDER_8
//! - \b RTC_C_PSDIVIDER_16
//! - \b RTC_C_PSDIVIDER_32
//! - \b RTC_C_PSDIVIDER_64
//! - \b RTC_C_PSDIVIDER_128
//! - \b RTC_C_PSDIVIDER_256
//! \n Modified bits are \b RTxPSDIV of \b RTCPSxCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_initCounterPrescale(uint16_t baseAddress,
uint8_t prescaleSelect,
uint16_t prescaleClockSelect,
uint16_t prescaleDivider);
//*****************************************************************************
//
//! \brief Holds the selected Prescaler.
//!
//! This function holds the prescale counter from continuing. This will only
//! work in counter mode, in Calendar mode, the RTC_C_holdClock() must be used.
//! In counter mode, if using both prescalers in conjunction with the main RTC
//! counter, then stopping RT0PS will stop RT1PS, but stopping RT1PS will not
//! stop RT0PS.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to hold.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_holdCounterPrescale(uint16_t baseAddress,
uint8_t prescaleSelect);
//*****************************************************************************
//
//! \brief Starts the selected Prescaler.
//!
//! This function starts the selected prescale counter. This function will only
//! work if the RTC is in counter mode.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to start.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_startCounterPrescale(uint16_t baseAddress,
uint8_t prescaleSelect);
//*****************************************************************************
//
//! \brief Sets up an interrupt condition for the selected Prescaler.
//!
//! This function sets the condition for an interrupt to assert based on the
//! individual prescalers.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to define an interrupt for.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//! \param prescaleEventDivider is a divider to specify when an interrupt can
//! occur based on the clock source of the selected prescaler. (Does not
//! affect timer of the selected prescaler).
//! Valid values are:
//! - \b RTC_C_PSEVENTDIVIDER_2 [Default]
//! - \b RTC_C_PSEVENTDIVIDER_4
//! - \b RTC_C_PSEVENTDIVIDER_8
//! - \b RTC_C_PSEVENTDIVIDER_16
//! - \b RTC_C_PSEVENTDIVIDER_32
//! - \b RTC_C_PSEVENTDIVIDER_64
//! - \b RTC_C_PSEVENTDIVIDER_128
//! - \b RTC_C_PSEVENTDIVIDER_256
//! \n Modified bits are \b RTxIP of \b RTCPSxCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_definePrescaleEvent(uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleEventDivider);
//*****************************************************************************
//
//! \brief Returns the selected prescaler value.
//!
//! This function returns the value of the selected prescale counter register.
//! Note that the counter value should be held by calling RTC_C_holdClock()
//! before calling this API.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to obtain the value of.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//!
//! \return The value of the specified prescaler count register
//
//*****************************************************************************
extern uint8_t RTC_C_getPrescaleValue(uint16_t baseAddress,
uint8_t prescaleSelect);
//*****************************************************************************
//
//! \brief Sets the selected Prescaler value.
//!
//! This function sets the prescale counter value. Before setting the prescale
//! counter, it should be held by calling RTC_C_holdClock().
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param prescaleSelect is the prescaler to set the value for.
//! Valid values are:
//! - \b RTC_C_PRESCALE_0
//! - \b RTC_C_PRESCALE_1
//! \param prescaleCounterValue is the specified value to set the prescaler to.
//! Valid values are any integer between 0-255
//! \n Modified bits are \b RTxPS of \b RTxPS register.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_setPrescaleValue(uint16_t baseAddress,
uint8_t prescaleSelect,
uint8_t prescaleCounterValue);
//*****************************************************************************
//
//! \brief Enables selected RTC interrupt sources.
//!
//! This function enables the selected RTC interrupt source. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor. Does not clear interrupt flags.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param interruptMask is a bit mask of the interrupts to enable.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_enableInterrupt(uint16_t baseAddress,
uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Disables selected RTC interrupt sources.
//!
//! This function disables the selected RTC interrupt source. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param interruptMask is a bit mask of the interrupts to disable.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_disableInterrupt(uint16_t baseAddress,
uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the status of the selected interrupts flags.
//!
//! This function returns the status of the interrupt flag for the selected
//! channel.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param interruptFlagMask is a bit mask of the interrupt flags to return the
//! status of.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return Logical OR of any of the following:
//! - \b RTC_C_TIME_EVENT_INTERRUPT asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_C_CLOCK_ALARM_INTERRUPT asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT asserts when Calendar
//! registers are settled.
//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT asserts when Prescaler 0 event
//! condition is met.
//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT asserts when Prescaler 1 event
//! condition is met.
//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT asserts if there is a problem
//! with the 32kHz oscillator, while the RTC is running.
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t RTC_C_getInterruptStatus(uint16_t baseAddress,
uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Clears selected RTC interrupt flags.
//!
//! This function clears the RTC interrupt flag is cleared, so that it no
//! longer asserts.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param interruptFlagMask is a bit mask of the interrupt flags to be
//! cleared.
//! Mask value is the logical OR of any of the following:
//! - \b RTC_C_TIME_EVENT_INTERRUPT - asserts when counter overflows in
//! counter mode or when Calendar event condition defined by
//! defineCalendarEvent() is met.
//! - \b RTC_C_CLOCK_ALARM_INTERRUPT - asserts when alarm condition in
//! Calendar mode is met.
//! - \b RTC_C_CLOCK_READ_READY_INTERRUPT - asserts when Calendar
//! registers are settled.
//! - \b RTC_C_PRESCALE_TIMER0_INTERRUPT - asserts when Prescaler 0
//! event condition is met.
//! - \b RTC_C_PRESCALE_TIMER1_INTERRUPT - asserts when Prescaler 1
//! event condition is met.
//! - \b RTC_C_OSCILLATOR_FAULT_INTERRUPT - asserts if there is a
//! problem with the 32kHz oscillator, while the RTC is running.
//!
//! \return None
//
//*****************************************************************************
extern void RTC_C_clearInterrupt(uint16_t baseAddress,
uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Convert the given BCD value to binary format
//!
//! This function converts BCD values to binary format. This API uses the
//! hardware registers to perform the conversion rather than a software method.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param valueToConvert is the raw value in BCD format to convert to Binary.
//! \n Modified bits are \b BCD2BIN of \b BCD2BIN register.
//!
//! \return The binary version of the input parameter
//
//*****************************************************************************
extern uint16_t RTC_C_convertBCDToBinary(uint16_t baseAddress,
uint16_t valueToConvert);
//*****************************************************************************
//
//! \brief Convert the given binary value to BCD format
//!
//! This function converts binary values to BCD format. This API uses the
//! hardware registers to perform the conversion rather than a software method.
//!
//! \param baseAddress is the base address of the RTC_C module.
//! \param valueToConvert is the raw value in Binary format to convert to BCD.
//! \n Modified bits are \b BIN2BCD of \b BIN2BCD register.
//!
//! \return The BCD version of the valueToConvert parameter
//
//*****************************************************************************
extern uint16_t RTC_C_convertBinaryToBCD(uint16_t baseAddress,
uint16_t valueToConvert);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_RTC_C_H__

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platform/vendor_bsp/TI/MSP430FR5xx_6xx/saph.c Normal file
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@@ -0,0 +1,276 @@
/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// saph.c - Driver for the SAPH Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup saph_api saph
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SAPH__
#include "saph.h"
#include <assert.h>
void SAPH_unlock(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHKEY) = KEY;
}
void SAPH_lock(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHKEY) = 0;
}
void SAPH_clearInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPHICR) |= mask;
}
void SAPH_enableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPHIMSC) |= mask;
}
void SAPH_disableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPHIMSC) &= ~mask;
}
uint8_t SAPH_getInterruptStatus(uint16_t baseAddress, uint8_t mask)
{
return HWREG16(baseAddress + OFS_SAPHRIS) & mask;
}
void SAPH_configurePHY(uint16_t baseAddress, SAPH_configPHYParam *config)
{
uint8_t offset = config->channel;
HWREG16(baseAddress + OFS_SAPHOCTL0) &= ~ ((SAPH_PHY_OUTPUT_ENABLE<<offset)
| (SAPH_PHY_OUTPUT_HIGH<<offset));
HWREG16(baseAddress + OFS_SAPHOCTL0) |= ((config->outputValue<<offset)
| (config->enableOutput<<offset));
HWREG16(baseAddress + OFS_SAPHOCTL1) &= ~ ((SAPH_PHY_FULLPULL_ENABLE<<offset)
| (SAPH_PHY_TERMINATION_ENABLE<<offset));
HWREG16(baseAddress + OFS_SAPHOCTL1) |= ((config->enableFullPull<<offset)
| (config->enableTermination<<offset));
HWREG16(baseAddress + OFS_SAPHTACTL) |= UNLOCK;
HWREG16(baseAddress + OFS_SAPHOSEL) &= ~(PCH0SEL_3<<(offset*2));
HWREG16(baseAddress + OFS_SAPHOSEL) |= config->outputFunction<<(offset*2);
HWREG16(baseAddress + OFS_SAPHCH0PUT + offset*6 ) &= ~CH0PUT;
HWREG16(baseAddress + OFS_SAPHCH0PUT + offset*6 ) |= config->pullUpTrim;
HWREG16(baseAddress + OFS_SAPHCH0PDT + offset*6 ) &= ~CH0PDT;
HWREG16(baseAddress + OFS_SAPHCH0PDT + offset*6 ) |= config->pullDownTrim;
HWREG16(baseAddress + OFS_SAPHCH0TT + offset*6 ) &= ~CH0TT;
HWREG16(baseAddress + OFS_SAPHCH0TT + offset*6 ) |= config->terminationTrim;
}
void SAPH_configurePHYMultiplexer(uint16_t baseAddress,
uint16_t dummyLoad, uint16_t source, uint16_t input)
{
HWREG16(baseAddress + OFS_SAPHICTL0) &= ~(DUMEN | MUXCTL | MUXSEL);
HWREG16(baseAddress + OFS_SAPHICTL0) |= dummyLoad | source | input;
}
void SAPH_configurePHYBias(uint16_t baseAddress, SAPH_configPHYBiasParam * config)
{
uint8_t i = 0;
for (i=0; i<SAPH_PHY_CHANNEL_COUNT; i++) {
HWREG16(baseAddress + OFS_SAPHBCTL) &= ~(CH0EBSW<<i);
HWREG16(baseAddress + OFS_SAPHBCTL) |= config->biasSwitch[i]<<i;
}
HWREG16(baseAddress + OFS_SAPHBCTL) &= ~(PGABIAS_3 | EXCBIAS_3 | CPDA | LILC
| PGABSW | ASQBSC);
HWREG16(baseAddress + OFS_SAPHBCTL) |= (config->biasPGA | config->biasExcitation
| config->enableChargePump | config->enableLeakageCompensation
| config->biasSwitchPGA | config->biasSwitchASQ);
}
void SAPH_configurePPGCount(uint16_t baseAddress, SAPH_configPPGCountParam *config)
{
HWREG16(baseAddress + OFS_SAPHPGC) &= ~(PHIZ | PLEV | PPOL | SPULS | EPULS);
HWREG16(baseAddress + OFS_SAPHPGC) |= (config->highImpedance
| config->pauseLevel | config->pausePolarity | config->stopPauseCount
| config->excitationPulseCount);
}
void SAPH_setPPGLowPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPHPGLPER) &= ~LPER;
HWREG16(baseAddress + OFS_SAPHPGLPER) |= period;
}
void SAPH_setPPGHighPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPHPGHPER) &= ~HPER;
HWREG16(baseAddress + OFS_SAPHPGHPER) |= period;
}
void SAPH_configurePPG(uint16_t baseAddress, SAPH_configPPGParam *config)
{
HWREG16(baseAddress + OFS_SAPHPGCTL) &= ~(PSCEN | PPGEN | TRSEL_3 | PPGCHSEL | PGSEL);
HWREG16(baseAddress + OFS_SAPHPGCTL) |= (config->enablePrescaler | PPGEN |
config->triggerSource | config->channelSelect | config->portSelect);
}
void SAPH_triggerPPG(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHPPGTRIG) |= PPGTRIG;
}
void SAPH_stopPPG(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHPGCTL) |= PPGSTOP;
}
void SAPH_configureASQ(uint16_t baseAddress, SAPH_configASQParam *config)
{
HWREG16(baseAddress + OFS_SAPHASCTL0) &= ~(ERABRT | TRIGSEL | ASQTEN | ASQCHSEL);
HWREG16(baseAddress + OFS_SAPHASCTL1) &= ~(CHOWN | STDBY | ESOFF | EARLYRB | CHTOG);
HWREG16(baseAddress + OFS_SAPHASCTL1) |= config->sideOfChannel | config->standByIndication
| config->endOfSequence | config->earlyReceiveBias | config->enableChannelToggle;
HWREG16(baseAddress + OFS_SAPHASCTL0) |= config->abortOnError | config->triggerSource
| config->channelSelect | ASQTEN;
}
void SAPH_triggerASQ(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHASQTRIG) |= ASQTRIG;
}
void SAPH_stopASQ(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHASCTL0) |= ASQSTOP;
}
uint8_t SAPH_getASQPingCounter(uint16_t baseAddress)
{
return HWREG8(baseAddress + OFS_SAPHASCTL0) & PNGCNT;
}
void SAPH_configureASQPing(uint16_t baseAddress, SAPH_configASQPingParam *config)
{
HWREG16(baseAddress + OFS_SAPHAPOL) &= ~PCPOL;
HWREG16(baseAddress + OFS_SAPHAPOL) |= config->polarity;
HWREG16(baseAddress + OFS_SAPHAPLEV) &= ~PCPLEV;
HWREG16(baseAddress + OFS_SAPHAPLEV) |= config->pauseLevel;
HWREG16(baseAddress + OFS_SAPHAPHIZ) &= ~PCPHIZ;
HWREG16(baseAddress + OFS_SAPHAPHIZ) |= config->pauseHighImpedance;
}
void SAPH_configureASQTimeBase(uint16_t baseAddress, uint16_t prescalerStartValue)
{
HWREG16(baseAddress + OFS_SAPHTBCTL) &= ~(PSSV);
HWREG16(baseAddress + OFS_SAPHTBCTL) |= prescalerStartValue;
}
void SAPH_startASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHTBCTL) |= TSTART;
}
void SAPH_stopASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHTBCTL) |= TSTOP;
}
void SAPH_clearASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHTBCTL) |= TCLR;
}
void SAPH_configureMode(uint16_t baseAddress, SAPH_configModeParam *config)
{
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~LPBE;
HWREG16(baseAddress + OFS_SAPHMCNF) |= config->lowPowerBiasMode;
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~CPEO;
HWREG16(baseAddress + OFS_SAPHMCNF) |= config->chargePump;
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~BIMP;
HWREG16(baseAddress + OFS_SAPHMCNF) |= config->biasImpedance;
}
void SAPH_enableLowPowerBiasMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHMCNF) |= LPBE;
}
void SAPH_disableLowPowerBiasMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~LPBE;
}
void SAPH_enableChargePumpAlways(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHMCNF) |= CPEO;
}
void SAPH_enableChargePumpOnAcquisitionOnly(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~CPEO;
}
void SAPH_setBiasGeneratorImpedance(uint16_t baseAddress, uint16_t biasImpedance)
{
HWREG16(baseAddress + OFS_SAPHMCNF) &= ~BIMP;
HWREG16(baseAddress + OFS_SAPHMCNF) |= biasImpedance;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for saph_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// saph_a.c - Driver for the SAPH_A Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup saph_a_api saph_a
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SAPH_A__
#include "saph_a.h"
#include <assert.h>
void SAPH_A_unlock(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AKEY) = KEY;
}
void SAPH_A_lock(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AKEY) = 0;
}
void SAPH_A_clearInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPH_AICR) |= mask;
}
void SAPH_A_enableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPH_AIMSC) |= mask;
}
void SAPH_A_disableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_SAPH_AIMSC) &= ~mask;
}
uint8_t SAPH_A_getInterruptStatus(uint16_t baseAddress, uint8_t mask)
{
return HWREG16(baseAddress + OFS_SAPH_ARIS) & mask;
}
void SAPH_A_configurePHY(uint16_t baseAddress, SAPH_A_configPHYParam *config)
{
uint8_t offset = config->channel;
HWREG16(baseAddress + OFS_SAPH_AOCTL0) &= ~ ((SAPH_A_PHY_OUTPUT_ENABLE<<offset)
| (SAPH_A_PHY_OUTPUT_HIGH<<offset));
HWREG16(baseAddress + OFS_SAPH_AOCTL0) |= ((config->outputValue<<offset)
| (config->enableOutput<<offset));
HWREG16(baseAddress + OFS_SAPH_AOCTL1) &= ~ ((SAPH_A_PHY_FULLPULL_ENABLE<<offset)
| (SAPH_A_PHY_TERMINATION_ENABLE<<offset));
HWREG16(baseAddress + OFS_SAPH_AOCTL1) |= ((config->enableFullPull<<offset)
| (config->enableTermination<<offset));
HWREG16(baseAddress + OFS_SAPH_ATACTL) |= UNLOCK;
HWREG16(baseAddress + OFS_SAPH_AOSEL) &= ~(PCH0SEL_3<<(offset*2));
HWREG16(baseAddress + OFS_SAPH_AOSEL) |= config->outputFunction<<(offset*2);
HWREG16(baseAddress + OFS_SAPH_ACH0PUT + offset*6 ) &= ~CH0PUT;
HWREG16(baseAddress + OFS_SAPH_ACH0PUT + offset*6 ) |= config->pullUpTrim;
HWREG16(baseAddress + OFS_SAPH_ACH0PDT + offset*6 ) &= ~CH0PDT;
HWREG16(baseAddress + OFS_SAPH_ACH0PDT + offset*6 ) |= config->pullDownTrim;
HWREG16(baseAddress + OFS_SAPH_ACH0TT + offset*6 ) &= ~CH0TT;
HWREG16(baseAddress + OFS_SAPH_ACH0TT + offset*6 ) |= config->terminationTrim;
}
void SAPH_A_configurePHYMultiplexer(uint16_t baseAddress,
uint16_t dummyLoad, uint16_t source, uint16_t input)
{
HWREG16(baseAddress + OFS_SAPH_AICTL0) &= ~(DUMEN | MUXCTL | MUXSEL);
HWREG16(baseAddress + OFS_SAPH_AICTL0) |= dummyLoad | source | input;
}
void SAPH_A_configurePHYBias(uint16_t baseAddress, SAPH_A_configPHYBiasParam * config)
{
uint8_t i = 0;
for (i=0; i<SAPH_A_PHY_CHANNEL_COUNT; i++) {
HWREG16(baseAddress + OFS_SAPH_ABCTL) &= ~(CH0EBSW<<i);
HWREG16(baseAddress + OFS_SAPH_ABCTL) |= config->biasSwitch[i]<<i;
}
HWREG16(baseAddress + OFS_SAPH_ABCTL) &= ~(PGABIAS_3 | EXCBIAS_3 | CPDA | LILC
| PGABSW | ASQBSC);
HWREG16(baseAddress + OFS_SAPH_ABCTL) |= (config->biasPGA | config->biasExcitation
| config->enableChargePump | config->enableLeakageCompensation
| config->biasSwitchPGA | config->biasSwitchASQ);
}
void SAPH_A_configurePPGCount(uint16_t baseAddress, SAPH_A_configPPGCountParam *config)
{
HWREG16(baseAddress + OFS_SAPH_APGC) &= ~(PHIZ | PLEV | PPOL | SPULS | EPULS);
HWREG16(baseAddress + OFS_SAPH_APGC) |= (config->highImpedance
| config->pauseLevel | config->pausePolarity | config->stopPauseCount
| config->excitationPulseCount);
}
void SAPH_A_setPPGLowPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPH_APGLPER) &= ~LPER;
HWREG16(baseAddress + OFS_SAPH_APGLPER) |= period;
}
void SAPH_A_setPPGHighPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPH_APGHPER) &= ~HPER;
HWREG16(baseAddress + OFS_SAPH_APGHPER) |= period;
}
void SAPH_A_configurePPG(uint16_t baseAddress, SAPH_A_configPPGParam *config)
{
HWREG16(baseAddress + OFS_SAPH_APGCTL) &= ~(PSCEN | PPGEN | TRSEL_3 | PPGCHSEL | PGSEL);
HWREG16(baseAddress + OFS_SAPH_APGCTL) |= (config->enablePrescaler | PPGEN |
config->triggerSource | config->channelSelect | config->portSelect);
}
void SAPH_A_triggerPPG(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_APPGTRIG) |= PPGTRIG;
}
void SAPH_A_stopPPG(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_APGCTL) |= PPGSTOP;
}
void SAPH_A_configureASQ(uint16_t baseAddress, SAPH_A_configASQParam *config)
{
HWREG16(baseAddress + OFS_SAPH_AASCTL0) &= ~(ERABRT | TRIGSEL | ASQTEN | ASQCHSEL);
HWREG16(baseAddress + OFS_SAPH_AASCTL1) &= ~(CHOWN | STDBY | ESOFF | EARLYRB | CHTOG);
HWREG16(baseAddress + OFS_SAPH_AASCTL1) |= config->sideOfChannel | config->standByIndication
| config->endOfSequence | config->earlyReceiveBias | config->enableChannelToggle;
HWREG16(baseAddress + OFS_SAPH_AASCTL0) |= config->abortOnError | config->triggerSource
| config->channelSelect | ASQTEN;
}
void SAPH_A_triggerASQ(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AASQTRIG) |= ASQTRIG;
}
void SAPH_A_stopASQ(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AASCTL0) |= ASQSTOP;
}
uint8_t SAPH_A_getASQPingCounter(uint16_t baseAddress)
{
return HWREG8(baseAddress + OFS_SAPH_AASCTL0) & PNGCNT;
}
void SAPH_A_configureASQPing(uint16_t baseAddress, SAPH_A_configASQPingParam *config)
{
HWREG16(baseAddress + OFS_SAPH_AAPOL) &= ~PCPOL;
HWREG16(baseAddress + OFS_SAPH_AAPOL) |= config->polarity;
HWREG16(baseAddress + OFS_SAPH_AAPLEV) &= ~PCPLEV;
HWREG16(baseAddress + OFS_SAPH_AAPLEV) |= config->pauseLevel;
HWREG16(baseAddress + OFS_SAPH_AAPHIZ) &= ~PCPHIZ;
HWREG16(baseAddress + OFS_SAPH_AAPHIZ) |= config->pauseHighImpedance;
}
void SAPH_A_configureASQTimeBase(uint16_t baseAddress, uint16_t prescalerStartValue)
{
HWREG16(baseAddress + OFS_SAPH_ATBCTL) &= ~(PSSV);
HWREG16(baseAddress + OFS_SAPH_ATBCTL) |= prescalerStartValue;
}
void SAPH_A_startASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_ATBCTL) |= TSTART;
}
void SAPH_A_stopASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_ATBCTL) |= TSTOP;
}
void SAPH_A_clearASQTimer(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_ATBCTL) |= TCLR;
}
void SAPH_A_configureMode(uint16_t baseAddress, SAPH_A_configModeParam *config)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~LPBE;
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= config->lowPowerBiasMode;
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~CPEO;
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= config->chargePump;
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~BIMP;
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= config->biasImpedance;
}
void SAPH_A_enableLowPowerBiasMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= LPBE;
}
void SAPH_A_disableLowPowerBiasMode(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~LPBE;
}
void SAPH_A_enableChargePumpAlways(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= CPEO;
}
void SAPH_A_enableChargePumpOnAcquisitionOnly(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~CPEO;
}
void SAPH_A_setBiasGeneratorImpedance(uint16_t baseAddress, uint16_t biasImpedance)
{
HWREG16(baseAddress + OFS_SAPH_AMCNF) &= ~BIMP;
HWREG16(baseAddress + OFS_SAPH_AMCNF) |= biasImpedance;
}
void SAPH_A_configureExtendedPPG(uint16_t baseAddress, SAPH_A_configXPGParam *config)
{
HWREG16(baseAddress + OFS_SAPH_AXPGCTL) &= ~(ETY | XMOD | XPULS);
HWREG16(baseAddress + OFS_SAPH_AXPGCTL) |= (config->eventType | config->extendedMode | (config->extraPulses & XPULS));
}
void SAPH_A_setXPGLowPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPH_AXPGLPER) = (period & XLPER);
}
void SAPH_A_setXPGHighPeriod(uint16_t baseAddress, uint16_t period)
{
HWREG16(baseAddress + OFS_SAPH_AXPGHPER) = (period & XHPER);
}
uint16_t SAPH_A_getPPGPhaseStatus(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_SAPH_AXPGCTL) & XSTAT);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for saph_a_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sdhs.c - Driver for the SDHS Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup sdhs_api sdhs
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SDHS__
#include "sdhs.h"
#include <assert.h>
void SDHS_init(uint16_t baseAddress, SDHS_initParam *param)
{
//Unlock Registers
HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
//Set SDHS Control 0
HWREG16(baseAddress + OFS_SDHSCTL0) =
param->triggerSourceSelect
| param->msbShift
| param->outputBitResolution
| param->dataFormat
| param->dataAlignment
| param->interruptDelayGeneration
| param->autoSampleStart;
//Set SDHS Control 1
HWREG16(baseAddress + OFS_SDHSCTL1) = param->oversamplingRate;
//Set SDHS Control 2
HWREG16(baseAddress + OFS_SDHSCTL2) =
param->dataTransferController
| param->windowComparator
| param->sampleSizeCounting;
}
void SDHS_setWindowComp(uint16_t baseAddress, uint16_t highThreshold,
uint16_t lowThreshold)
{
uint16_t saveCTL3 = HWREG16(baseAddress + OFS_SDHSCTL3);
uint16_t saveCTL5 = HWREG16(baseAddress + OFS_SDHSCTL5);
//Unlock Registers
HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
HWREG16(baseAddress + OFS_SDHSWINHITH) = highThreshold;
HWREG16(baseAddress + OFS_SDHSWINLOTH) = lowThreshold;
//Restore CTL3 and CTL5
HWREG16(baseAddress + OFS_SDHSCTL3) = saveCTL3;
HWREG16(baseAddress + OFS_SDHSCTL5) = saveCTL5;
}
void SDHS_setTotalSampleSize(uint16_t baseAddress, uint16_t sampleSize)
{
uint16_t saveCTL3 = HWREG16(baseAddress + OFS_SDHSCTL3);
uint16_t saveCTL5 = HWREG16(baseAddress + OFS_SDHSCTL5);
//Unlock Registers
HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SDHS_LOCK;
HWREG16(baseAddress + OFS_SDHSCTL2) = sampleSize - 1;
}
void SDHS_enableTrigger(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL3) |= TRIGEN;
}
void SDHS_disableTrigger(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL3) &= ~TRIGEN;
}
void SDHS_enable(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL4) |= SDHSON;
}
void SDHS_disable(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL4) &= ~SDHSON;
}
uint16_t SDHS_getInterruptStatus(uint16_t baseAddress, uint16_t interruptMask)
{
return (HWREG16(baseAddress + OFS_SDHSRIS) & interruptMask);
}
uint16_t SDHS_getInterruptMaskStatus(uint16_t baseAddress, uint16_t interruptMask)
{
return (HWREG16(baseAddress + OFS_SDHSIMSC) & interruptMask);
}
void SDHS_enableInterrupt(uint16_t baseAddress, uint16_t interruptMask)
{
HWREG16(baseAddress + OFS_SDHSIMSC) |= interruptMask;
}
void SDHS_disableInterrupt(uint16_t baseAddress, uint16_t interruptMask)
{
HWREG16(baseAddress + OFS_SDHSIMSC) &= ~interruptMask;
}
void SDHS_clearInterrupt(uint16_t baseAddress, uint16_t interruptMask)
{
HWREG16(baseAddress + OFS_SDHSICR) |= interruptMask;
}
void SDHS_setInterrupt(uint16_t baseAddress, uint16_t interruptMask)
{
HWREG16(baseAddress + OFS_SDHSISR) |= interruptMask;
}
void SDHS_setPGAGain(uint16_t baseAddress, uint16_t gain)
{
assert (gain < 0x40);
HWREG16(baseAddress + OFS_SDHSCTL6) = gain;
}
void SDHS_setModularOptimization(uint16_t baseAddress, uint16_t optimization)
{
assert (optimization < 0x20);
HWREG16(baseAddress + OFS_SDHSCTL7) = optimization;
}
uint16_t SDHS_getRegisterLockStatus(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_SDHSCTL5) & SDHS_LOCK);
}
void SDHS_startConversion(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL5) |= SSTART;
}
void SDHS_endConversion(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_SDHSCTL5) &= ~SSTART;
}
uint16_t SDHS_getResults(uint16_t baseAddress)
{
return (HWREG16(baseAddress + OFS_SDHSDT));
}
void SDHS_setDTCDestinationAddress(uint16_t baseAddress, uint16_t address)
{
HWREG16(baseAddress + OFS_SDHSDTCDA) = address;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for sdhs_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sdhs.h - Driver for the SDHS Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_SDHS_H__
#define __MSP430WARE_SDHS_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SDHS__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: SDHS_getInterruptStatus(), SDHS_enableInterrupt(),
// SDHS_disableInterrupt()
//
//*****************************************************************************
#define SDHS_INCOMPLETE_STOP_INTERRUPT ISTOP
#define SDHS_WINDOW_LOW_INTERRUPT WINLO
#define SDHS_WINDOW_HIGH_INTERRUPT WINHI
#define SDHS_DATA_READY_INTERRUPT DTRDY
#define SDHS_START_CONVERSION_TRIGGER_INTERRUPT SSTRG
#define SDHS_ACQUISITION_DONE_INTERRUPT ACQDONE
#define SDHS_DATA_OVERFLOW_INTERRUPT OVF
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the triggerSourceSelect parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_REGISTER_CONTROL_MODE TRGSRC_0
#define SDHS_ASQ_CONTROL_MODE TRGSRC_1
//*****************************************************************************
//
// The following are values that are returned by SDHS_getRegisterLockStatus()
//
//*****************************************************************************
#define SDHS_REGISTERS_LOCKED SDHS_LOCK_1
#define SDHS_REGISTERS_UNLOCKED SDHS_LOCK_0
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the msbShift parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_NO_SHIFT SHIFT_0
#define SDHS_SHIFT_LEFT_1 SHIFT_1
#define SDHS_SHIFT_LEFT_2 SHIFT_2
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the outputBitResolution parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_OUTPUT_RESOLUTION_12_BIT OBR_0
#define SDHS_OUTPUT_RESOLUTION_13_BIT OBR_1
#define SDHS_OUTPUT_RESOLUTION_14_BIT OBR_2
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the dataFormat parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_DATA_FORMAT_TWOS_COMPLEMENT DFMSEL_0
#define SDHS_DATA_FORMAT_OFFSET_BINARY DFMSEL_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the dataAlignment parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_DATA_ALIGNED_RIGHT DALGN_0
#define SDHS_DATA_ALIGNED_LEFT DALGN_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the interruptDelayGeneration parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_DELAY_SAMPLES_0 INTDLY_0
#define SDHS_DELAY_SAMPLES_1 INTDLY_1
#define SDHS_DELAY_SAMPLES_2 INTDLY_2
#define SDHS_DELAY_SAMPLES_3 INTDLY_3
#define SDHS_DELAY_SAMPLES_4 INTDLY_4
#define SDHS_DELAY_SAMPLES_5 INTDLY_5
#define SDHS_DELAY_SAMPLES_6 INTDLY_6
#define SDHS_DELAY_SAMPLES_7 INTDLY_7
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the autoSampleStart parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_AUTO_SAMPLE_START_ENABLED AUTOSSDIS_0
#define SDHS_AUTO_SAMPLE_START_DISABLED AUTOSSDIS_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the oversamplingRate parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_OVERSAMPLING_RATE_10 OSR_0
#define SDHS_OVERSAMPLING_RATE_20 OSR_1
#define SDHS_OVERSAMPLING_RATE_40 OSR_2
#define SDHS_OVERSAMPLING_RATE_80 OSR_3
#define SDHS_OVERSAMPLING_RATE_160 OSR_4
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the dataTransferController parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_DATA_TRANSFER_CONTROLLER_ON DTCOFF_0
#define SDHS_DATA_TRANSFER_CONTROLLER_OFF DTCOFF_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the windowComparator parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_WINDOW_COMPARATOR_DISABLE WINCMPEN_0
#define SDHS_WINDOW_COMPARATOR_ENABLE WINCMPEN_1
//*****************************************************************************
//
// The following are values that can be passed to the param parameter for
// functions: SDHS_init(); the sampleSizeCounting parameter for
// functions: SDHS_init().
//
//*****************************************************************************
#define SDHS_SMPSZ_USED SMPCTLOFF_0
#define SDHS_SMPSZ_IGNORED SMPCTLOFF_1
//*****************************************************************************
//
// The following are values that can be passed to the optimization parameter for
// functions: SDHS_setModularOptimization().
//
//*****************************************************************************
#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz 0xC
#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_74_77MHz 0xD
#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_71_74MHz 0xE
#define SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_68_71MHz 0xF
//*****************************************************************************
//
//! \brief Used in the SDHS_init() function as the param parameter.
//
//*****************************************************************************
typedef struct SDHS_initParam
{
//! Trigger source select
//! \n Valid values are:
//! - \b SDHS_REGISTER_CONTROL_MODE [Default]
//! - \b SDHS_ASQ_CONTROL_MODE
uint16_t triggerSourceSelect;
//! Selects MSB shift from filter out
//! - \b SDHS_NO_SHIFT [Default]
//! - \b SDHS_SHIFT_LEFT_1
//! - \b SDHS_SHIFT_LEFT_2
uint8_t msbShift;
//! Selects the output bit resolution
//! \n Valid values are:
//! - \b SDHS_OUTPUT_RESOLUTION_12_BIT [Default]
//! - \b SDHS_OUTPUT_RESOLUTION_13_BIT
//! - \b SDHS_OUTPUT_RESOLUTION_14_BIT
uint16_t outputBitResolution;
//! Selects the data format
//! \n Valid values are:
//! - \b SDHS_DATA_FORMAT_TWOS_COMPLEMENT [Default]
//! - \b SDHS_DATA_FORMAT_OFFSET_BINARY
uint16_t dataFormat;
//! Selects the data format
//! \n Valid values are:
//! - \b SDHS_DATA_ALIGNED_RIGHT [Default]
//! - \b SDHS_DATA_ALIGNED_LEFT
uint16_t dataAlignment;
//! Selects the data format
//! \n Valid values are:
//! - \b SDHS_DELAY_SAMPLES_0
//! - \b SDHS_DELAY_SAMPLES_1 [Default]
//! - \b SDHS_DELAY_SAMPLES_2
//! - \b SDHS_DELAY_SAMPLES_3
//! - \b SDHS_DELAY_SAMPLES_4
//! - \b SDHS_DELAY_SAMPLES_5
//! - \b SDHS_DELAY_SAMPLES_6
//! - \b SDHS_DELAY_SAMPLES_7
uint16_t interruptDelayGeneration;
//! Selects the Auto Sample Start
//! \n Valid values are:
//! - \b SDHS_AUTO_SAMPLE_START_DISABLED [Default]
//! - \b SDHS_AUTO_SAMPLE_START_ENABLED
uint16_t autoSampleStart;
//! Selects the Oversampling Rate
//! \n Valid values are:
//! - \b SDHS_OVERSAMPLING_RATE_10 [Default]
//! - \b SDHS_OVERSAMPLING_RATE_20
//! - \b SDHS_OVERSAMPLING_RATE_40
//! - \b SDHS_OVERSAMPLING_RATE_80
//! - \b SDHS_OVERSAMPLING_RATE_160
uint16_t oversamplingRate;
//! Selects the Data Transfer Controller State
//! \n Valid values are:
//! - \b SDHS_DATA_TRANSFER_CONTROLLER_ON [Default]
//! - \b SDHS_DATA_TRANSFER_CONTROLLER_OFF
uint16_t dataTransferController;
//! Selects the Window Comparator State
//! \n Valid values are:
//! - \b SDHS_WINDOW_COMPARATOR_DISABLE [Default]
//! - \b SDHS_WINDOW_COMPARATOR_ENABLE
uint16_t windowComparator;
//! Selects the Sample Size Counting
//! \n Valid values are:
//! - \b SDHS_SMPSZ_USED [Default]
//! - \b SDHS_SMPSZ_IGNORED
uint16_t sampleSizeCounting;
} SDHS_initParam;
//*****************************************************************************
//
//! \brief Initializes the SDHS module
//!
//! Initializes the SDHS moduleress
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \param params is the pointer to the initialization structure
//!
//! At the end of this call the TRIGEN and SDHS_LOCK bits are reset
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_init(uint16_t baseAddress, SDHS_initParam *param);
//*****************************************************************************
//
//! \brief Returns the status of the selected interrupt flags.
//!
//! Returns the status of the selected interrupt flags.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//! \return Logical OR of any of above valid values for interruptMask
//! \n indicating the status of the masked flags
//!
//
//*****************************************************************************
extern uint16_t SDHS_getInterruptStatus(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the mask status of the selected interrupt.
//!
//! Returns the mask status of the selected interrupt flags.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//! \return Logical OR of any of above valid values for interruptMask
//! \n indicating the status of the masked flags
//!
//
//*****************************************************************************
extern uint16_t SDHS_getInterruptMaskStatus(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Clears SDHS selected interrupt flags.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_INCOMPLETE_STOP_INTERRUPT
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//!
//! Modified registers are \b SDHSICR
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_clearInterrupt(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Enable SDHS selected interrupt masks.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//!
//! Modified registers are SDHSIMSC
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_enableInterrupt(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Disable SDHS selected interrupt masks.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//!
//! Modified registers are SDHSIMSC
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_disableInterrupt(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Set SDHS selected interrupts.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param interruptMask
//! Mask value is the logical OR of any of the following:
//! Valid values are:
//! - \b SDHS_WINDOW_LOW_INTERRUPT
//! - \b SDHS_WINDOW_HIGH_INTERRUPT
//! - \b SDHS_DATA_READY_INTERRUPT
//! - \b SDHS_START_CONVERSION_TRIGGER_INTERRUPT
//! - \b SDHS_ACQUISITION_DONE_INTERRUPT
//! - \b SDHS_DATA_OVERFLOW_INTERRUPT
//!
//! Modified registers are SDHSISR
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setInterrupt(uint16_t baseAddress, uint16_t interruptMask);
//*****************************************************************************
//
//! \brief Sets the high and low threshold for the window comparator feature.
//!
//! Sets the high and low threshold for the window comparator feature.
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param highThreshold is the upper bound that could trip an interrupt for
//! the window comparator.
//! \param lowThreshold is the lower bound that could trip on interrupt for the
//! window comparator.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setWindowComp(uint16_t baseAddress, uint16_t highThreshold,
uint16_t lowThreshold);
//*****************************************************************************
//
//! \brief Sets total sample size
//!
//! Note that SDHSCTL2.SMPSZ includes the samples skipped by SDHSCTL0.INTDLY:
//! - The total number of samples SDHS generates = sampleSize + 1.
//! - The number of samples SDHS generates via SDHSDT register = sampleSize - INTDLY + 1.
//! If sampleSize - INTDLY + 1 <= 0, then no data output to SDHSDT register
//!
//! \param baseAddress is the base address of the SDHS module.
//! \param sampleSize is the total number of samples SDHS generates + 1
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setTotalSampleSize(uint16_t baseAddress, uint16_t sampleSize);
//*****************************************************************************
//
//! \brief Enables the SDHS Trigger.
//!
//! Enables the SDHS Trigger.
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_enableTrigger(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Disables the SDHS Trigger.
//!
//! Disables the SDHS Trigger.
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_disableTrigger(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Turn On Module
//!
//! Turn On Module
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_enable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Start Conversion
//!
//! Start Conversion
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_startConversion(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief End Conversion
//!
//! End Conversion
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_endConversion(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Set PGA Gain
//!
//! Set PGA Gain
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \param gain is the PGA Gain control value
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setPGAGain(uint16_t baseAddress, uint16_t gain);
//*****************************************************************************
//
//! \brief Set Modular Optimization
//!
//! Set Modular Optimization. Upper bound of optimization parameter label is non-inclusive.
//! For example, if your PLL output frequency is 77 MHz, you should select
//! SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz for optimization parameter.
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \param optimization is the Modular Optimization value
//! Valid values are:
//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_77_80MHz
//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_74_77MHz
//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_71_74MHz
//! - \b SDHS_OPTIMIZE_PLL_OUTPUT_FREQUENCY_68_71MHz [Default]
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setModularOptimization(uint16_t baseAddress, uint16_t optimization);
//*****************************************************************************
//
//! \brief Turn Off Module
//!
//! Turn Off Module
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_disable(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the contents of the Data Conversion Register
//!
//! Returns the contents of the Data Conversion Register.
//! The sign bit is extended up to the bit 15.
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return The contents of the Data Conversion Register
//
//*****************************************************************************
extern uint16_t SDHS_getResults(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns the lock status of the registers
//!
//! Returns the lock status of the registers
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \return \b SDHS_REGISTERS_LOCKED or \b SDHS_REGISTERS_UNLOCKED
//
//*****************************************************************************
extern uint16_t SDHS_getRegisterLockStatus(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets the DTC destination address
//!
//! Sets the DTC Destination Address
//!
//! \param baseAddress is the base address of the SDHS module.
//!
//! \param address is the destination address to be set
//!
//! \return None
//
//*****************************************************************************
extern void SDHS_setDTCDestinationAddress(uint16_t baseAddress, uint16_t address);
//*****************************************************************************
//
// The following are deprecated APIs.
//
//*****************************************************************************
#define SDHS_turnOnModuleinStandaloneMode SDHS_enable
#define SDHS_turnOffModuleinStandaloneMode SDHS_disable
#define SDHS_startConversioninStandaloneMode SDHS_startConversion
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_SDHS_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sfr.c - Driver for the sfr Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup sfr_api sfr
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SFR__
#include "sfr.h"
#include <assert.h>
void SFR_enableInterrupt (uint8_t interruptMask)
{
HWREG8(SFR_BASE + OFS_SFRIE1_L) |= interruptMask;
}
void SFR_disableInterrupt (uint8_t interruptMask)
{
HWREG8(SFR_BASE + OFS_SFRIE1_L) &= ~(interruptMask);
}
uint8_t SFR_getInterruptStatus (uint8_t interruptFlagMask)
{
return ( HWREG8(SFR_BASE + OFS_SFRIFG1_L) & interruptFlagMask );
}
void SFR_clearInterrupt (uint8_t interruptFlagMask)
{
HWREG8(SFR_BASE + OFS_SFRIFG1_L) &= ~(interruptFlagMask);
}
void SFR_setResetPinPullResistor (uint16_t pullResistorSetup)
{
HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSRSTRE + SYSRSTUP);
HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= pullResistorSetup;
}
void SFR_setNMIEdge (uint16_t edgeDirection)
{
HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSNMIIES);
HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= edgeDirection;
}
void SFR_setResetNMIPinFunction (uint8_t resetPinFunction)
{
HWREG8(SFR_BASE + OFS_SFRRPCR_L) &= ~(SYSNMI);
HWREG8(SFR_BASE + OFS_SFRRPCR_L) |= resetPinFunction;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for sfr_api
//! @}
//
//*****************************************************************************

290
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sfr.h - Driver for the SFR Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_SFR_H__
#define __MSP430WARE_SFR_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SFR__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the interruptMask parameter
// for functions: SFR_enableInterrupt(), and SFR_disableInterrupt(); the
// interruptFlagMask parameter for functions: SFR_getInterruptStatus(), and
// SFR_clearInterrupt() as well as returned by the SFR_getInterruptStatus()
// function.
//
//*****************************************************************************
#define SFR_JTAG_OUTBOX_INTERRUPT JMBOUTIE
#define SFR_JTAG_INBOX_INTERRUPT JMBINIE
#define SFR_NMI_PIN_INTERRUPT NMIIE
#define SFR_VACANT_MEMORY_ACCESS_INTERRUPT VMAIE
#define SFR_OSCILLATOR_FAULT_INTERRUPT OFIE
#define SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT WDTIE
//*****************************************************************************
//
// The following are values that can be passed to the pullResistorSetup
// parameter for functions: SFR_setResetPinPullResistor().
//
//*****************************************************************************
#define SFR_RESISTORDISABLE (!(SYSRSTRE + SYSRSTUP))
#define SFR_RESISTORENABLE_PULLUP (SYSRSTRE + SYSRSTUP)
#define SFR_RESISTORENABLE_PULLDOWN (SYSRSTRE)
//*****************************************************************************
//
// The following are values that can be passed to the edgeDirection parameter
// for functions: SFR_setNMIEdge().
//
//*****************************************************************************
#define SFR_NMI_RISINGEDGE (!(SYSNMIIES))
#define SFR_NMI_FALLINGEDGE (SYSNMIIES)
//*****************************************************************************
//
// The following are values that can be passed to the resetPinFunction
// parameter for functions: SFR_setResetNMIPinFunction().
//
//*****************************************************************************
#define SFR_RESETPINFUNC_RESET (!(SYSNMI))
#define SFR_RESETPINFUNC_NMI (SYSNMI)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enables selected SFR interrupt sources.
//!
//! This function enables the selected SFR interrupt sources. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor. Does not clear interrupt flags.
//!
//! \param interruptMask is the bit mask of interrupts that will be enabled.
//! Mask value is the logical OR of any of the following:
//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
//! chosen
//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
//! interrupt
//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
//! interrupt
//!
//! \return None
//
//*****************************************************************************
extern void SFR_enableInterrupt(uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Disables selected SFR interrupt sources.
//!
//! This function disables the selected SFR interrupt sources. Only the sources
//! that are enabled can be reflected to the processor interrupt; disabled
//! sources have no effect on the processor.
//!
//! \param interruptMask is the bit mask of interrupts that will be disabled.
//! Mask value is the logical OR of any of the following:
//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
//! chosen
//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
//! interrupt
//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
//! interrupt
//!
//! \return None
//
//*****************************************************************************
extern void SFR_disableInterrupt(uint8_t interruptMask);
//*****************************************************************************
//
//! \brief Returns the status of the selected SFR interrupt flags.
//!
//! This function returns the status of the selected SFR interrupt flags in a
//! bit mask format matching that passed into the interruptFlagMask parameter.
//!
//! \param interruptFlagMask is the bit mask of interrupt flags that the status
//! of should be returned.
//! Mask value is the logical OR of any of the following:
//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
//! chosen
//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
//! interrupt
//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
//! interrupt
//!
//! \return A bit mask of the status of the selected interrupt flags.
//! Return Logical OR of any of the following:
//! - \b SFR_JTAG_OUTBOX_INTERRUPT JTAG outbox interrupt
//! - \b SFR_JTAG_INBOX_INTERRUPT JTAG inbox interrupt
//! - \b SFR_NMI_PIN_INTERRUPT NMI pin interrupt, if NMI function is
//! chosen
//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT Vacant memory access
//! interrupt
//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT Oscillator fault interrupt
//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT Watchdog interval timer
//! interrupt
//! \n indicating the status of the masked interrupts
//
//*****************************************************************************
extern uint8_t SFR_getInterruptStatus(uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Clears the selected SFR interrupt flags.
//!
//! This function clears the status of the selected SFR interrupt flags.
//!
//! \param interruptFlagMask is the bit mask of interrupt flags that will be
//! cleared.
//! Mask value is the logical OR of any of the following:
//! - \b SFR_JTAG_OUTBOX_INTERRUPT - JTAG outbox interrupt
//! - \b SFR_JTAG_INBOX_INTERRUPT - JTAG inbox interrupt
//! - \b SFR_NMI_PIN_INTERRUPT - NMI pin interrupt, if NMI function is
//! chosen
//! - \b SFR_VACANT_MEMORY_ACCESS_INTERRUPT - Vacant memory access
//! interrupt
//! - \b SFR_OSCILLATOR_FAULT_INTERRUPT - Oscillator fault interrupt
//! - \b SFR_WATCHDOG_INTERVAL_TIMER_INTERRUPT - Watchdog interval timer
//! interrupt
//!
//! \return None
//
//*****************************************************************************
extern void SFR_clearInterrupt(uint8_t interruptFlagMask);
//*****************************************************************************
//
//! \brief Sets the pull-up/down resistor on the ~RST/NMI pin.
//!
//! This function sets the pull-up/down resistors on the ~RST/NMI pin to the
//! settings from the pullResistorSetup parameter.
//!
//! \param pullResistorSetup is the selection of how the pull-up/down resistor
//! on the ~RST/NMI pin should be setup or disabled.
//! Valid values are:
//! - \b SFR_RESISTORDISABLE
//! - \b SFR_RESISTORENABLE_PULLUP [Default]
//! - \b SFR_RESISTORENABLE_PULLDOWN
//! \n Modified bits are \b SYSRSTUP and \b SYSRSTRE of \b SFRRPCR
//! register.
//!
//! \return None
//
//*****************************************************************************
extern void SFR_setResetPinPullResistor(uint16_t pullResistorSetup);
//*****************************************************************************
//
//! \brief Sets the edge direction that will assert an NMI from a signal on the
//! ~RST/NMI pin if NMI function is active.
//!
//! This function sets the edge direction that will assert an NMI from a signal
//! on the ~RST/NMI pin if the NMI function is active. To activate the NMI
//! function of the ~RST/NMI use the SFR_setResetNMIPinFunction() passing
//! SFR_RESETPINFUNC_NMI into the resetPinFunction parameter.
//!
//! \param edgeDirection is the direction that the signal on the ~RST/NMI pin
//! should go to signal an interrupt, if enabled.
//! Valid values are:
//! - \b SFR_NMI_RISINGEDGE [Default]
//! - \b SFR_NMI_FALLINGEDGE
//! \n Modified bits are \b SYSNMIIES of \b SFRRPCR register.
//!
//! \return None
//
//*****************************************************************************
extern void SFR_setNMIEdge(uint16_t edgeDirection);
//*****************************************************************************
//
//! \brief Sets the function of the ~RST/NMI pin.
//!
//! This function sets the functionality of the ~RST/NMI pin, whether in reset
//! mode which will assert a reset if a low signal is observed on that pin, or
//! an NMI which will assert an interrupt from an edge of the signal dependent
//! on the setting of the edgeDirection parameter in SFR_setNMIEdge().
//!
//! \param resetPinFunction is the function that the ~RST/NMI pin should take
//! on.
//! Valid values are:
//! - \b SFR_RESETPINFUNC_RESET [Default]
//! - \b SFR_RESETPINFUNC_NMI
//! \n Modified bits are \b SYSNMI of \b SFRRPCR register.
//!
//! \return None
//
//*****************************************************************************
extern void SFR_setResetNMIPinFunction(uint8_t resetPinFunction);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_SFR_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sysctl.c - Driver for the sysctl Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup sysctl_api sysctl
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SYS__
#include "sysctl.h"
#include <assert.h>
void SysCtl_enableDedicatedJTAGPins (void)
{
HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSJTAGPIN;
}
uint8_t SysCtl_getBSLEntryIndication (void)
{
if ( HWREG8(SYS_BASE + OFS_SYSCTL_L) & SYSBSLIND){
return (SYSCTL_BSLENTRY_INDICATED) ;
} else {
return (SYSCTL_BSLENTRY_NOTINDICATED) ;
}
}
void SysCtl_enablePMMAccessProtect (void)
{
HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSPMMPE;
}
void SysCtl_enableRAMBasedInterruptVectors (void)
{
HWREG8(SYS_BASE + OFS_SYSCTL_L) |= SYSRIVECT;
}
void SysCtl_disableRAMBasedInterruptVectors (void)
{
HWREG8(SYS_BASE + OFS_SYSCTL_L) &= ~(SYSRIVECT);
}
void SysCtl_initJTAGMailbox (uint8_t mailboxSizeSelect,
uint8_t autoClearInboxFlagSelect)
{
HWREG8(SYS_BASE + OFS_SYSJMBC_L) &= ~(JMBCLR1OFF + JMBCLR0OFF + JMBMODE);
HWREG8(SYS_BASE + OFS_SYSJMBC_L) |=
mailboxSizeSelect + autoClearInboxFlagSelect;
}
uint8_t SysCtl_getJTAGMailboxFlagStatus (uint8_t mailboxFlagMask)
{
return ( HWREG8(SYS_BASE + OFS_SYSJMBC_L) & mailboxFlagMask);
}
void SysCtl_clearJTAGMailboxFlagStatus (uint8_t mailboxFlagMask)
{
HWREG8(SYS_BASE + OFS_SYSJMBC_L) &= ~(mailboxFlagMask);
}
uint16_t SysCtl_getJTAGInboxMessage16Bit (uint8_t inboxSelect)
{
return ( HWREG16(SYS_BASE + OFS_SYSJMBI0 + inboxSelect) );
}
uint32_t SysCtl_getJTAGInboxMessage32Bit (void)
{
uint32_t JTAGInboxMessageLow = HWREG16(SYS_BASE + OFS_SYSJMBI0);
uint32_t JTAGInboxMessageHigh = HWREG16(SYS_BASE + OFS_SYSJMBI1);
return ( (JTAGInboxMessageHigh << 16) + JTAGInboxMessageLow );
}
void SysCtl_setJTAGOutgoingMessage16Bit (uint8_t outboxSelect,
uint16_t outgoingMessage)
{
HWREG16(SYS_BASE + OFS_SYSJMBO0 + outboxSelect) = outgoingMessage;
}
void SysCtl_setJTAGOutgoingMessage32Bit (uint32_t outgoingMessage)
{
HWREG16(SYS_BASE + OFS_SYSJMBO0) = (outgoingMessage);
HWREG16(SYS_BASE + OFS_SYSJMBO1) = (outgoingMessage >> 16);
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for sysctl_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// sysctl.h - Driver for the SYSCTL Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_SYSCTL_H__
#define __MSP430WARE_SYSCTL_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_SYS__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the mailboxSizeSelect
// parameter for functions: SysCtl_initJTAGMailbox().
//
//*****************************************************************************
#define SYSCTL_JTAGMBSIZE_16BIT (!(JMBMODE))
#define SYSCTL_JTAGMBSIZE_32BIT (JMBMODE)
//*****************************************************************************
//
// The following are values that can be passed to the autoClearInboxFlagSelect
// parameter for functions: SysCtl_initJTAGMailbox().
//
//*****************************************************************************
#define SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1AUTO (!(JMBCLR0OFF + JMBCLR1OFF))
#define SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1SW (JMBCLR1OFF)
#define SYSCTL_JTAGINBOX0SW_JTAGINBOX1AUTO (JMBCLR0OFF)
#define SYSCTL_JTAGINBOX0SW_JTAGINBOX1SW (JMBCLR0OFF + JMBCLR1OFF)
//*****************************************************************************
//
// The following are values that can be passed to the mailboxFlagMask parameter
// for functions: SysCtl_getJTAGMailboxFlagStatus(), and
// SysCtl_clearJTAGMailboxFlagStatus().
//
//*****************************************************************************
#define SYSCTL_JTAGOUTBOX_FLAG0 (JMBOUT0FG)
#define SYSCTL_JTAGOUTBOX_FLAG1 (JMBOUT1FG)
#define SYSCTL_JTAGINBOX_FLAG0 (JMBIN0FG)
#define SYSCTL_JTAGINBOX_FLAG1 (JMBIN1FG)
//*****************************************************************************
//
// The following are values that can be passed to the inboxSelect parameter for
// functions: SysCtl_getJTAGInboxMessage16Bit().
//
//*****************************************************************************
#define SYSCTL_JTAGINBOX_0 (0x0)
#define SYSCTL_JTAGINBOX_1 (0x2)
//*****************************************************************************
//
// The following are values that can be passed to the outboxSelect parameter
// for functions: SysCtl_setJTAGOutgoingMessage16Bit().
//
//*****************************************************************************
#define SYSCTL_JTAGOUTBOX_0 (0x0)
#define SYSCTL_JTAGOUTBOX_1 (0x2)
//*****************************************************************************
//
// The following are values that can be passed toThe following are values that
// can be returned by the SysCtl_getBSLEntryIndication() function.
//
//*****************************************************************************
#define SYSCTL_BSLENTRY_INDICATED (0x1)
#define SYSCTL_BSLENTRY_NOTINDICATED (0x0)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Sets the JTAG pins to be exclusively for JTAG until a BOR occurs.
//!
//! This function sets the JTAG pins to be exclusively used for the JTAG, and
//! not to be shared with the GPIO pins. This setting can only be cleared when
//! a BOR occurs.
//!
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_enableDedicatedJTAGPins(void);
//*****************************************************************************
//
//! \brief Returns the indication of a BSL entry sequence from the Spy-Bi-Wire.
//!
//! This function returns the indication of a BSL entry sequence from the Spy-
//! Bi-Wire.
//!
//!
//! \return One of the following:
//! - \b SYSCTL_BSLENTRY_INDICATED
//! - \b SYSCTL_BSLENTRY_NOTINDICATED
//! \n indicating if a BSL entry sequence was detected
//
//*****************************************************************************
extern uint8_t SysCtl_getBSLEntryIndication(void);
//*****************************************************************************
//
//! \brief Enables PMM Access Protection.
//!
//! This function enables the PMM Access Protection, which will lock any
//! changes on the PMM control registers until a BOR occurs.
//!
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_enablePMMAccessProtect(void);
//*****************************************************************************
//
//! \brief Enables RAM-based Interrupt Vectors.
//!
//! This function enables RAM-base Interrupt Vectors, which means that
//! interrupt vectors are generated with the end address at the top of RAM,
//! instead of the top of the lower 64kB of flash.
//!
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_enableRAMBasedInterruptVectors(void);
//*****************************************************************************
//
//! \brief Disables RAM-based Interrupt Vectors.
//!
//! This function disables the interrupt vectors from being generated at the
//! top of the RAM.
//!
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_disableRAMBasedInterruptVectors(void);
//*****************************************************************************
//
//! \brief Initializes JTAG Mailbox with selected properties.
//!
//! This function sets the specified settings for the JTAG Mailbox system. The
//! settings that can be set are the size of the JTAG messages, and the auto-
//! clearing of the inbox flags. If the inbox flags are set to auto-clear, then
//! the inbox flags will be cleared upon reading of the inbox message buffer,
//! otherwise they will have to be reset by software using the
//! SYS_clearJTAGMailboxFlagStatus() function.
//!
//! \param mailboxSizeSelect is the size of the JTAG Mailboxes, whether 16- or
//! 32-bits.
//! Valid values are:
//! - \b SYSCTL_JTAGMBSIZE_16BIT [Default] - the JTAG messages will take
//! up only one JTAG mailbox (i. e. an outgoing message will take up
//! only 1 outbox of the JTAG mailboxes)
//! - \b SYSCTL_JTAGMBSIZE_32BIT - the JTAG messages will be contained
//! within both JTAG mailboxes (i. e. an outgoing message will take
//! up both Outboxes of the JTAG mailboxes)
//! \n Modified bits are \b JMBMODE of \b SYSJMBC register.
//! \param autoClearInboxFlagSelect decides how the JTAG inbox flags should be
//! cleared, whether automatically after the corresponding outbox has
//! been written to, or manually by software.
//! Valid values are:
//! - \b SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1AUTO [Default] - both JTAG
//! inbox flags will be reset automatically when the corresponding
//! inbox is read from.
//! - \b SYSCTL_JTAGINBOX0AUTO_JTAGINBOX1SW - only JTAG inbox 0 flag is
//! reset automatically, while JTAG inbox 1 is reset with the
//! - \b SYSCTL_JTAGINBOX0SW_JTAGINBOX1AUTO - only JTAG inbox 1 flag is
//! reset automatically, while JTAG inbox 0 is reset with the
//! - \b SYSCTL_JTAGINBOX0SW_JTAGINBOX1SW - both JTAG inbox flags will
//! need to be reset manually by the
//! \n Modified bits are \b JMBCLR0OFF and \b JMBCLR1OFF of \b SYSJMBC
//! register.
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_initJTAGMailbox(uint8_t mailboxSizeSelect,
uint8_t autoClearInboxFlagSelect);
//*****************************************************************************
//
//! \brief Returns the status of the selected JTAG Mailbox flags.
//!
//! This function will return the status of the selected JTAG Mailbox flags in
//! bit mask format matching that passed into the mailboxFlagMask parameter.
//!
//! \param mailboxFlagMask is the bit mask of JTAG mailbox flags that the
//! status of should be returned.
//! Mask value is the logical OR of any of the following:
//! - \b SYSCTL_JTAGOUTBOX_FLAG0 - flag for JTAG outbox 0
//! - \b SYSCTL_JTAGOUTBOX_FLAG1 - flag for JTAG outbox 1
//! - \b SYSCTL_JTAGINBOX_FLAG0 - flag for JTAG inbox 0
//! - \b SYSCTL_JTAGINBOX_FLAG1 - flag for JTAG inbox 1
//!
//! \return A bit mask of the status of the selected mailbox flags.
//
//*****************************************************************************
extern uint8_t SysCtl_getJTAGMailboxFlagStatus(uint8_t mailboxFlagMask);
//*****************************************************************************
//
//! \brief Clears the status of the selected JTAG Mailbox flags.
//!
//! This function clears the selected JTAG Mailbox flags.
//!
//! \param mailboxFlagMask is the bit mask of JTAG mailbox flags that the
//! status of should be cleared.
//! Mask value is the logical OR of any of the following:
//! - \b SYSCTL_JTAGOUTBOX_FLAG0 - flag for JTAG outbox 0
//! - \b SYSCTL_JTAGOUTBOX_FLAG1 - flag for JTAG outbox 1
//! - \b SYSCTL_JTAGINBOX_FLAG0 - flag for JTAG inbox 0
//! - \b SYSCTL_JTAGINBOX_FLAG1 - flag for JTAG inbox 1
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_clearJTAGMailboxFlagStatus(uint8_t mailboxFlagMask);
//*****************************************************************************
//
//! \brief Returns the contents of the selected JTAG Inbox in a 16 bit format.
//!
//! This function returns the message contents of the selected JTAG inbox. If
//! the auto clear settings for the Inbox flags were set, then using this
//! function will automatically clear the corresponding JTAG inbox flag.
//!
//! \param inboxSelect is the chosen JTAG inbox that the contents of should be
//! returned
//! Valid values are:
//! - \b SYSCTL_JTAGINBOX_0 - return contents of JTAG inbox 0
//! - \b SYSCTL_JTAGINBOX_1 - return contents of JTAG inbox 1
//!
//! \return The contents of the selected JTAG inbox in a 16 bit format.
//
//*****************************************************************************
extern uint16_t SysCtl_getJTAGInboxMessage16Bit(uint8_t inboxSelect);
//*****************************************************************************
//
//! \brief Returns the contents of JTAG Inboxes in a 32 bit format.
//!
//! This function returns the message contents of both JTAG inboxes in a 32 bit
//! format. This function should be used if 32-bit messaging has been set in
//! the SYS_initJTAGMailbox() function. If the auto clear settings for the
//! Inbox flags were set, then using this function will automatically clear
//! both JTAG inbox flags.
//!
//!
//! \return The contents of both JTAG messages in a 32 bit format.
//
//*****************************************************************************
extern uint32_t SysCtl_getJTAGInboxMessage32Bit(void);
//*****************************************************************************
//
//! \brief Sets a 16 bit outgoing message in to the selected JTAG Outbox.
//!
//! This function sets the outgoing message in the selected JTAG outbox. The
//! corresponding JTAG outbox flag is cleared after this function, and set
//! after the JTAG has read the message.
//!
//! \param outboxSelect is the chosen JTAG outbox that the message should be
//! set it.
//! Valid values are:
//! - \b SYSCTL_JTAGOUTBOX_0 - set the contents of JTAG outbox 0
//! - \b SYSCTL_JTAGOUTBOX_1 - set the contents of JTAG outbox 1
//! \param outgoingMessage is the message to send to the JTAG.
//! \n Modified bits are \b MSGHI and \b MSGLO of \b SYSJMBOx register.
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_setJTAGOutgoingMessage16Bit(uint8_t outboxSelect,
uint16_t outgoingMessage);
//*****************************************************************************
//
//! \brief Sets a 32 bit message in to both JTAG Outboxes.
//!
//! This function sets the 32-bit outgoing message in both JTAG outboxes. The
//! JTAG outbox flags are cleared after this function, and set after the JTAG
//! has read the message.
//!
//! \param outgoingMessage is the message to send to the JTAG.
//! \n Modified bits are \b MSGHI and \b MSGLO of \b SYSJMBOx register.
//!
//! \return None
//
//*****************************************************************************
extern void SysCtl_setJTAGOutgoingMessage32Bit(uint32_t outgoingMessage);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_SYSCTL_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// timer_a.c - Driver for the timer_a Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup timer_a_api timer_a
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_TxA7__
#include "timer_a.h"
#include <assert.h>
void Timer_A_startCounter ( uint16_t baseAddress,
uint16_t timerMode
)
{
HWREG16(baseAddress + OFS_TAxCTL) &= ~MC_3;
HWREG16(baseAddress + OFS_TAxCTL) |= timerMode;
}
void Timer_A_initContinuousMode (uint16_t baseAddress,
Timer_A_initContinuousModeParam *param)
{
HWREG16(baseAddress +
OFS_TAxCTL) &= ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_A_UPDOWN_MODE +
TIMER_A_DO_CLEAR +
TIMER_A_TAIE_INTERRUPT_ENABLE +
ID__8
);
HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
param->timerClear +
param->timerInterruptEnable_TAIE +
((param->clockSourceDivider>>3)<<6));
if(param->startTimer) {
HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_CONTINUOUS_MODE;
}
}
void Timer_A_initUpMode (uint16_t baseAddress,
Timer_A_initUpModeParam *param)
{
HWREG16(baseAddress + OFS_TAxCTL) &=
~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_A_UPDOWN_MODE +
TIMER_A_DO_CLEAR +
TIMER_A_TAIE_INTERRUPT_ENABLE +
ID__8
);
HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
param->timerClear +
param->timerInterruptEnable_TAIE +
((param->clockSourceDivider>>3)<<6));
if (param->startTimer) {
HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_UP_MODE;
}
if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE ==
param->captureCompareInterruptEnable_CCR0_CCIE){
HWREG16(baseAddress + OFS_TAxCCTL0) |= TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
} else {
HWREG16(baseAddress + OFS_TAxCCTL0) &= ~TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
}
HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
}
void Timer_A_initUpDownMode(uint16_t baseAddress,
Timer_A_initUpDownModeParam *param)
{
HWREG16(baseAddress + OFS_TAxCTL) &=
~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_A_UPDOWN_MODE +
TIMER_A_DO_CLEAR +
TIMER_A_TAIE_INTERRUPT_ENABLE +
ID__8
);
HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
param->timerClear +
param->timerInterruptEnable_TAIE +
((param->clockSourceDivider>>3)<<6));
if (param->startTimer) {
HWREG16(baseAddress + OFS_TAxCTL) |= TIMER_A_UPDOWN_MODE;
}
if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE ==
param->captureCompareInterruptEnable_CCR0_CCIE){
HWREG16(baseAddress + OFS_TAxCCTL0) |= TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
} else {
HWREG16(baseAddress + OFS_TAxCCTL0) &= ~TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE;
}
HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
}
void Timer_A_initCaptureMode(uint16_t baseAddress,
Timer_A_initCaptureModeParam *param)
{
HWREG16(baseAddress + param->captureRegister ) |= CAP;
HWREG16(baseAddress + param->captureRegister) &=
~(TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE +
TIMER_A_CAPTURE_INPUTSELECT_Vcc +
TIMER_A_CAPTURE_SYNCHRONOUS +
TIMER_A_DO_CLEAR +
TIMER_A_TAIE_INTERRUPT_ENABLE +
CM_3
);
HWREG16(baseAddress + param->captureRegister) |= (param->captureMode +
param->captureInputSelect +
param->synchronizeCaptureSource +
param->captureInterruptEnable +
param->captureOutputMode
);
}
void Timer_A_initCompareMode(uint16_t baseAddress,
Timer_A_initCompareModeParam *param)
{
HWREG16(baseAddress + param->compareRegister ) &= ~CAP;
HWREG16(baseAddress + param->compareRegister) &=
~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE +
TIMER_A_OUTPUTMODE_RESET_SET
);
HWREG16(baseAddress + param->compareRegister) |= (param->compareInterruptEnable +
param->compareOutputMode
);
HWREG16(baseAddress + param->compareRegister + OFS_TAxR) = param->compareValue;
}
void Timer_A_enableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TAxCTL) |= TAIE;
}
void Timer_A_disableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TAxCTL) &= ~TAIE;
}
uint32_t Timer_A_getInterruptStatus (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_TAxCTL) & TAIFG );
}
void Timer_A_enableCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) |= CCIE;
}
void Timer_A_disableCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~CCIE;
}
uint32_t Timer_A_getCaptureCompareInterruptStatus (uint16_t baseAddress,
uint16_t captureCompareRegister,
uint16_t mask
)
{
return ( HWREG16(baseAddress + captureCompareRegister) & mask );
}
void Timer_A_clear (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TAxCTL) |= TACLR;
}
uint8_t Timer_A_getSynchronizedCaptureCompareInput
(uint16_t baseAddress,
uint16_t captureCompareRegister,
uint16_t synchronized
)
{
if (HWREG16(baseAddress + captureCompareRegister) & synchronized){
return ( TIMER_A_CAPTURECOMPARE_INPUT_HIGH) ;
} else {
return ( TIMER_A_CAPTURECOMPARE_INPUT_LOW) ;
}
}
uint8_t Timer_A_getOutputForOutputModeOutBitValue
(uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
if (HWREG16(baseAddress + captureCompareRegister) & OUT){
return ( TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH) ;
} else {
return ( TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW) ;
}
}
uint16_t Timer_A_getCaptureCompareCount
(uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
return (HWREG16(baseAddress + OFS_TAxR + captureCompareRegister));
}
void Timer_A_setOutputForOutputModeOutBitValue
(uint16_t baseAddress,
uint16_t captureCompareRegister,
uint8_t outputModeOutBitValue
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~OUT;
HWREG16(baseAddress + captureCompareRegister) |= outputModeOutBitValue;
}
void Timer_A_outputPWM(uint16_t baseAddress, Timer_A_outputPWMParam *param)
{
HWREG16(baseAddress + OFS_TAxCTL) &=
~( TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_A_UPDOWN_MODE + TIMER_A_DO_CLEAR +
TIMER_A_TAIE_INTERRUPT_ENABLE +
ID__8
);
HWREG16(baseAddress + OFS_TAxEX0) &= ~TAIDEX_7;
HWREG16(baseAddress + OFS_TAxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TAxCTL) |= (param->clockSource +
TIMER_A_UP_MODE +
TIMER_A_DO_CLEAR +
((param->clockSourceDivider>>3)<<6));
HWREG16(baseAddress + OFS_TAxCCR0) = param->timerPeriod;
HWREG16(baseAddress + OFS_TAxCCTL0) &=
~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE +
TIMER_A_OUTPUTMODE_RESET_SET);
HWREG16(baseAddress + param->compareRegister) |= param->compareOutputMode;
HWREG16(baseAddress + param->compareRegister + OFS_TAxR) = param->dutyCycle;
}
void Timer_A_stop ( uint16_t baseAddress )
{
HWREG16(baseAddress + OFS_TAxCTL) &= ~MC_3;
}
void Timer_A_setCompareValue ( uint16_t baseAddress,
uint16_t compareRegister,
uint16_t compareValue
)
{
HWREG16(baseAddress + compareRegister + OFS_TAxR) = compareValue;
}
void Timer_A_setOutputMode(uint16_t baseAddress,
uint16_t compareRegister,
uint16_t compareOutputMode)
{
uint16_t temp = HWREG16(baseAddress + compareRegister);
HWREG16(baseAddress + compareRegister) = temp & ~(OUTMOD_7) | compareOutputMode;
}
void Timer_A_clearTimerInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TAxCTL) &= ~TAIFG;
}
void Timer_A_clearCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~CCIFG;
}
uint16_t Timer_A_getCounterValue (uint16_t baseAddress)
{
uint16_t voteOne, voteTwo, res;
voteTwo = HWREG16(baseAddress + OFS_TAxR);
do
{
voteOne = voteTwo;
voteTwo = HWREG16(baseAddress + OFS_TAxR);
if(voteTwo > voteOne) {
res = voteTwo - voteOne;
} else if(voteOne > voteTwo) {
res = voteOne - voteTwo;
} else{
res = 0;
}
} while ( res > TIMER_A_THRESHOLD);
return voteTwo;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for timer_a_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// timer_b.c - Driver for the timer_b Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup timer_b_api timer_b
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_TxB7__
#include "timer_b.h"
#include <assert.h>
void Timer_B_startCounter ( uint16_t baseAddress,
uint16_t timerMode
)
{
HWREG16(baseAddress + OFS_TBxCTL) |= timerMode;
}
void Timer_B_initContinuousMode(uint16_t baseAddress,
Timer_B_initContinuousModeParam *param)
{
HWREG16(baseAddress +
OFS_TBxCTL) &= ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_B_UPDOWN_MODE +
TIMER_B_DO_CLEAR +
TIMER_B_TBIE_INTERRUPT_ENABLE +
CNTL_3 +
ID__8
);
HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
param->timerClear +
param->timerInterruptEnable_TBIE +
((param->clockSourceDivider>>3)<<6));
if(param->startTimer) {
HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_CONTINUOUS_MODE;
}
}
void Timer_B_initUpMode (uint16_t baseAddress,
Timer_B_initUpModeParam *param)
{
HWREG16(baseAddress + OFS_TBxCTL) &=
~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_B_UPDOWN_MODE +
TIMER_B_DO_CLEAR +
TIMER_B_TBIE_INTERRUPT_ENABLE +
CNTL_3
);
HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
param->timerClear +
param->timerInterruptEnable_TBIE +
((param->clockSourceDivider>>3)<<6));
if (param->startTimer) {
HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UP_MODE;
}
if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
param->captureCompareInterruptEnable_CCR0_CCIE){
HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
} else {
HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
}
HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
}
void Timer_B_initUpDownMode(uint16_t baseAddress,
Timer_B_initUpDownModeParam *param)
{
HWREG16(baseAddress + OFS_TBxCTL) &=
~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_B_UPDOWN_MODE +
TIMER_B_DO_CLEAR +
TIMER_B_TBIE_INTERRUPT_ENABLE +
CNTL_3
);
HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
TIMER_B_STOP_MODE +
param->timerClear +
param->timerInterruptEnable_TBIE +
((param->clockSourceDivider>>3)<<6));
if (param->startTimer) {
HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UPDOWN_MODE;
}
if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
param->captureCompareInterruptEnable_CCR0_CCIE){
HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
} else {
HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
}
HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
}
void Timer_B_initCaptureMode(uint16_t baseAddress,
Timer_B_initCaptureModeParam *param)
{
HWREG16(baseAddress + param->captureRegister ) |= CAP;
HWREG16(baseAddress + param->captureRegister) &=
~(TIMER_B_CAPTUREMODE_RISING_AND_FALLING_EDGE +
TIMER_B_CAPTURE_INPUTSELECT_Vcc +
TIMER_B_CAPTURE_SYNCHRONOUS +
TIMER_B_DO_CLEAR +
TIMER_B_TBIE_INTERRUPT_ENABLE +
CM_3
);
HWREG16(baseAddress + param->captureRegister) |= (param->captureMode +
param->captureInputSelect +
param->synchronizeCaptureSource +
param->captureInterruptEnable +
param->captureOutputMode
);
}
void Timer_B_initCompareMode(uint16_t baseAddress,
Timer_B_initCompareModeParam *param)
{
HWREG16(baseAddress + param->compareRegister ) &= ~CAP;
HWREG16(baseAddress + param->compareRegister) &=
~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
TIMER_B_OUTPUTMODE_RESET_SET
);
HWREG16(baseAddress + param->compareRegister) |= (param->compareInterruptEnable +
param->compareOutputMode
);
HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->compareValue;
}
void Timer_B_enableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TBxCTL) |= TBIE;
}
void Timer_B_disableInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIE;
}
uint32_t Timer_B_getInterruptStatus (uint16_t baseAddress)
{
return ( HWREG16(baseAddress + OFS_TBxCTL) & TBIFG );
}
void Timer_B_enableCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) |= CCIE;
}
void Timer_B_disableCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~CCIE;
}
uint32_t Timer_B_getCaptureCompareInterruptStatus (uint16_t baseAddress,
uint16_t captureCompareRegister,
uint16_t mask
)
{
return ( HWREG16(baseAddress + captureCompareRegister) & mask );
}
void Timer_B_clear (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TBxCTL) |= TBCLR;
}
uint8_t Timer_B_getSynchronizedCaptureCompareInput
(uint16_t baseAddress,
uint16_t captureCompareRegister,
uint16_t synchronized
)
{
if (HWREG16(baseAddress + captureCompareRegister) & synchronized){
return ( TIMER_B_CAPTURECOMPARE_INPUT_HIGH) ;
} else {
return ( TIMER_B_CAPTURECOMPARE_INPUT_LOW) ;
}
}
uint8_t Timer_B_getOutputForOutputModeOutBitValue
(uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
if (HWREG16(baseAddress + captureCompareRegister) & OUT){
return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH) ;
} else {
return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW) ;
}
}
uint16_t Timer_B_getCaptureCompareCount
(uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
return (HWREG16(baseAddress + OFS_TBxR + captureCompareRegister));
}
void Timer_B_setOutputForOutputModeOutBitValue
(uint16_t baseAddress,
uint16_t captureCompareRegister,
uint16_t outputModeOutBitValue
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~OUT;
HWREG16(baseAddress + captureCompareRegister) |= outputModeOutBitValue;
}
void Timer_B_outputPWM(uint16_t baseAddress, Timer_B_outputPWMParam *param)
{
HWREG16(baseAddress + OFS_TBxCTL) &=
~( TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
TIMER_B_UPDOWN_MODE + TIMER_B_DO_CLEAR +
TIMER_B_TBIE_INTERRUPT_ENABLE
);
HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
TIMER_B_UP_MODE +
TIMER_B_DO_CLEAR +
((param->clockSourceDivider>>3)<<6));
HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
HWREG16(baseAddress + OFS_TBxCCTL0) &=
~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
TIMER_B_OUTPUTMODE_RESET_SET
);
HWREG16(baseAddress + param->compareRegister) |= param->compareOutputMode;
HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->dutyCycle;
}
void Timer_B_stop ( uint16_t baseAddress )
{
HWREG16(baseAddress + OFS_TBxCTL) &= ~MC_3;
}
void Timer_B_setCompareValue ( uint16_t baseAddress,
uint16_t compareRegister,
uint16_t compareValue
)
{
HWREG16(baseAddress + compareRegister + OFS_TBxR) = compareValue;
}
void Timer_B_clearTimerInterrupt (uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIFG;
}
void Timer_B_clearCaptureCompareInterrupt (uint16_t baseAddress,
uint16_t captureCompareRegister
)
{
HWREG16(baseAddress + captureCompareRegister) &= ~CCIFG;
}
void Timer_B_selectCounterLength (uint16_t baseAddress,
uint16_t counterLength
)
{
HWREG16(baseAddress + OFS_TBxCTL) &= ~CNTL_3;
HWREG16(baseAddress + OFS_TBxCTL) |= counterLength;
}
void Timer_B_selectLatchingGroup(uint16_t baseAddress,
uint16_t groupLatch)
{
HWREG16(baseAddress + OFS_TBxCTL) &= ~TBCLGRP_3;
HWREG16(baseAddress + OFS_TBxCTL) |= groupLatch;
}
void Timer_B_initCompareLatchLoadEvent(uint16_t baseAddress,
uint16_t compareRegister,
uint16_t compareLatchLoadEvent
)
{
HWREG16(baseAddress + compareRegister) &= ~CLLD_3;
HWREG16(baseAddress + compareRegister) |= compareLatchLoadEvent;
}
uint16_t Timer_B_getCounterValue (uint16_t baseAddress)
{
uint16_t voteOne, voteTwo, res;
voteTwo = HWREG16(baseAddress + OFS_TBxR);
do
{
voteOne = voteTwo;
voteTwo = HWREG16(baseAddress + OFS_TBxR);
if(voteTwo > voteOne) {
res = voteTwo - voteOne;
} else if(voteOne > voteTwo) {
res = voteOne - voteTwo;
} else{
res = 0;
}
} while ( res > TIMER_B_THRESHOLD);
return voteTwo;
}
void Timer_B_setOutputMode(uint16_t baseAddress,
uint16_t compareRegister,
uint16_t compareOutputMode)
{
uint16_t temp = HWREG16(baseAddress + compareRegister);
HWREG16(baseAddress + compareRegister) = temp & ~(OUTMOD_7) | compareOutputMode;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for timer_b_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// tlv.c - Driver for the tlv Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup tlv_api tlv
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_TLV__
#include "tlv.h"
#include <assert.h>
void TLV_getInfo(uint8_t tag,
uint8_t instance,
uint8_t *length,
uint16_t **data_address
)
{
// TLV Structure Start Address
char *TLV_address = (char *)TLV_START;
while((TLV_address < (char *)TLV_END)
&& ((*TLV_address != tag) || instance) // check for tag and instance
&& (*TLV_address != TLV_TAGEND)) // do range check first
{
if (*TLV_address == tag)
{
// repeat till requested instance is reached
instance--;
}
// add (Current TAG address + LENGTH) + 2
TLV_address += *(TLV_address + 1) + 2;
}
// Check if Tag match happened..
if (*TLV_address == tag)
{
// Return length = Address + 1
*length = *(TLV_address + 1);
// Return address of first data/value info = Address + 2
*data_address = (uint16_t *)(TLV_address + 2);
}
// If there was no tag match and the end of TLV structure was reached..
else
{
// Return 0 for TAG not found
*length = 0;
// Return 0 for TAG not found
*data_address = 0;
}
}
uint16_t TLV_getDeviceType()
{
uint16_t *pDeviceType = (uint16_t *)TLV_DEVICE_ID_0;
// Return Value from TLV Table
return pDeviceType[0];
}
uint16_t TLV_getMemory(uint8_t instance)
{
uint8_t *pPDTAG;
uint8_t bPDTAG_bytes;
uint16_t count;
// set tag for word access comparison
instance *= 2;
// TLV access Function Call
// Get Peripheral data pointer
TLV_getInfo(TLV_PDTAG,
0,
&bPDTAG_bytes,
(uint16_t **)&pPDTAG
);
if (pPDTAG != 0)
{
for (count = 0; count <= instance; count += 2)
{
if (pPDTAG[count] == 0)
{
// Return 0 if end reached
return 0;
}
if (count == instance)
{
return (pPDTAG[count] | pPDTAG[count+1]<<8);
}
} // for count
} // pPDTAG != 0
// Return 0: not found
return 0;
}
uint16_t TLV_getPeripheral(uint8_t tag,
uint8_t instance
)
{
uint8_t *pPDTAG;
uint8_t bPDTAG_bytes;
uint16_t count = 0;
uint16_t pcount = 0;
// Get Peripheral data pointer
TLV_getInfo(TLV_PDTAG,
0,
&bPDTAG_bytes,
(uint16_t **)&pPDTAG
);
if (pPDTAG != 0)
{
// read memory configuration from TLV to get offset for Peripherals
while (TLV_getMemory(count))
{
count++;
}
// get number of Peripheral entries
pcount = pPDTAG[count * 2 + 1];
// inc count to first Periperal
count++;
// adjust point to first address of Peripheral
pPDTAG += count*2;
// set counter back to 0
count = 0;
// align pcount for work comparision
pcount *= 2;
// TLV access Function Call
for (count = 0; count <= pcount; count += 2)
{
if (pPDTAG[count+1] == tag)
{
// test if required Peripheral is found
if (instance > 0)
{
// test if required instance is found
instance--;
}
else
{
// Return found data
return (pPDTAG[count] | pPDTAG[count + 1] << 8);
}
} // pPDTAG[count+1] == tag
} // for count
} // pPDTAG != 0
// Return 0: not found
return 0;
}
uint8_t TLV_getInterrupt(uint8_t tag)
{
uint8_t *pPDTAG;
uint8_t bPDTAG_bytes;
uint16_t count = 0;
uint16_t pcount = 0;
// Get Peripheral data pointer
TLV_getInfo(TLV_PDTAG,
0,
&bPDTAG_bytes,
(uint16_t **)&pPDTAG
);
if (pPDTAG != 0)
{
// read memory configuration from TLV to get offset for Peripherals
while (TLV_getMemory(count))
{
count++;
}
pcount = pPDTAG[count * 2 + 1];
// inc count to first Periperal
count++;
// adjust point to first address of Peripheral
pPDTAG += (pcount + count) * 2;
// set counter back to 0
count = 0;
// TLV access Function Call
for (count = 0; count <= tag; count += 2)
{
if (pPDTAG[count] == 0)
{
// Return 0: not found/end of table
return 0;
}
if (count == tag)
{
// Return found data
return (pPDTAG[count]);
}
} // for count
} // pPDTAG != 0
// Return 0: not found
return 0;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for tlv_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// tlv.h - Driver for the TLV Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_TLV_H__
#define __MSP430WARE_TLV_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_TLV__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include "inc/hw_memmap.h"
//******************************************************************************
//
// TLV Data Types
//
//******************************************************************************
struct s_TLV_Die_Record {
uint32_t wafer_id;
uint16_t die_x_position;
uint16_t die_y_position;
uint16_t test_results;
};
struct s_TLV_ADC_Cal_Data {
uint16_t adc_gain_factor;
int16_t adc_offset;
uint16_t adc_ref15_30_temp;
uint16_t adc_ref15_85_temp;
uint16_t adc_ref20_30_temp;
uint16_t adc_ref20_85_temp;
uint16_t adc_ref25_30_temp;
uint16_t adc_ref25_85_temp;
};
struct s_TLV_Timer_D_Cal_Data {
uint16_t TDH0CTL1_64;
uint16_t TDH0CTL1_128;
uint16_t TDH0CTL1_200;
uint16_t TDH0CTL1_256;
};
struct s_TLV_REF_Cal_Data {
uint16_t ref_ref15;
uint16_t ref_ref20;
uint16_t ref_ref25;
};
struct s_Peripheral_Memory_Data {
uint16_t memory_1;
uint16_t memory_2;
uint16_t memory_3;
uint16_t memory_4;
};
//*****************************************************************************
//
// The following are values that can be passed to the tag parameter for
// functions: TLV_getInfo().
//
//*****************************************************************************
#define TLV_TAG_LDTAG TLV_LDTAG
#define TLV_TAG_PDTAG TLV_PDTAG
#define TLV_TAG_Reserved3 TLV_Reserved3
#define TLV_TAG_Reserved4 TLV_Reserved4
#define TLV_TAG_BLANK TLV_BLANK
#define TLV_TAG_Reserved6 TLV_Reserved6
#define TLV_TAG_Reserved7 TLV_Reserved7
#define TLV_TAG_TAGEND TLV_TAGEND
#define TLV_TAG_TAGEXT TLV_TAGEXT
#define TLV_TAG_TIMER_D_CAL TLV_TIMERDCAL
#define TLV_DEVICE_ID_0 0x1A04
#define TLV_DEVICE_ID_1 0x1A05
#define TLV_TAG_DIERECORD TLV_DIERECORD
#define TLV_TAG_ADCCAL TLV_ADCCAL
#define TLV_TAG_ADC12CAL TLV_ADC12CAL
#define TLV_TAG_ADC10CAL TLV_ADC10CAL
#define TLV_TAG_REFCAL TLV_REFCAL
#define TLV_TAG_CTSD16CAL 0x1D
//*****************************************************************************
//
// The following are values that can be passed to the tag parameter for
// functions: TLV_getPeripheral().
//
//*****************************************************************************
#define TLV_PID_NO_MODULE (0x00)
#define TLV_PID_PORTMAPPING (0x10)
#define TLV_PID_MSP430CPUXV2 (0x23)
#define TLV_PID_JTAG (0x09)
#define TLV_PID_SBW (0x0F)
#define TLV_PID_EEM_XS (0x02)
#define TLV_PID_EEM_S (0x03)
#define TLV_PID_EEM_M (0x04)
#define TLV_PID_EEM_L (0x05)
#define TLV_PID_PMM (0x30)
#define TLV_PID_PMM_FR (0x32)
#define TLV_PID_FCTL (0x39)
#define TLV_PID_CRC16 (0x3C)
#define TLV_PID_CRC16_RB (0x3D)
#define TLV_PID_WDT_A (0x40)
#define TLV_PID_SFR (0x41)
#define TLV_PID_SYS (0x42)
#define TLV_PID_RAMCTL (0x44)
#define TLV_PID_DMA_1 (0x46)
#define TLV_PID_DMA_3 (0x47)
#define TLV_PID_UCS (0x48)
#define TLV_PID_DMA_6 (0x4A)
#define TLV_PID_DMA_2 (0x4B)
#define TLV_PID_PORT1_2 (0x51)
#define TLV_PID_PORT3_4 (0x52)
#define TLV_PID_PORT5_6 (0x53)
#define TLV_PID_PORT7_8 (0x54)
#define TLV_PID_PORT9_10 (0x55)
#define TLV_PID_PORT11_12 (0x56)
#define TLV_PID_PORTU (0x5E)
#define TLV_PID_PORTJ (0x5F)
#define TLV_PID_TA2 (0x60)
#define TLV_PID_TA3 (0x61)
#define TLV_PID_TA5 (0x62)
#define TLV_PID_TA7 (0x63)
#define TLV_PID_TB3 (0x65)
#define TLV_PID_TB5 (0x66)
#define TLV_PID_TB7 (0x67)
#define TLV_PID_RTC (0x68)
#define TLV_PID_BT_RTC (0x69)
#define TLV_PID_BBS (0x6A)
#define TLV_PID_RTC_B (0x6B)
#define TLV_PID_TD2 (0x6C)
#define TLV_PID_TD3 (0x6D)
#define TLV_PID_TD5 (0x6E)
#define TLV_PID_TD7 (0x6F)
#define TLV_PID_TEC (0x70)
#define TLV_PID_RTC_C (0x71)
#define TLV_PID_AES (0x80)
#define TLV_PID_MPY16 (0x84)
#define TLV_PID_MPY32 (0x85)
#define TLV_PID_MPU (0x86)
#define TLV_PID_USCI_AB (0x90)
#define TLV_PID_USCI_A (0x91)
#define TLV_PID_USCI_B (0x92)
#define TLV_PID_EUSCI_A (0x94)
#define TLV_PID_EUSCI_B (0x95)
#define TLV_PID_REF (0xA0)
#define TLV_PID_COMP_B (0xA8)
#define TLV_PID_COMP_D (0xA9)
#define TLV_PID_USB (0x98)
#define TLV_PID_LCD_B (0xB1)
#define TLV_PID_LCD_C (0xB2)
#define TLV_PID_DAC12_A (0xC0)
#define TLV_PID_SD16_B_1 (0xC8)
#define TLV_PID_SD16_B_2 (0xC9)
#define TLV_PID_SD16_B_3 (0xCA)
#define TLV_PID_SD16_B_4 (0xCB)
#define TLV_PID_SD16_B_5 (0xCC)
#define TLV_PID_SD16_B_6 (0xCD)
#define TLV_PID_SD16_B_7 (0xCE)
#define TLV_PID_SD16_B_8 (0xCF)
#define TLV_PID_ADC12_A (0xD1)
#define TLV_PID_ADC10_A (0xD3)
#define TLV_PID_ADC10_B (0xD4)
#define TLV_PID_SD16_A (0xD8)
#define TLV_PID_TI_BSL (0xFC)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Gets TLV Info
//!
//! The TLV structure uses a tag or base address to identify segments of the
//! table where information is stored. Some examples of TLV tags are Peripheral
//! Descriptor, Interrupts, Info Block and Die Record. This function retrieves
//! the value of a tag and the length of the tag.
//!
//! \param tag represents the tag for which the information needs to be
//! retrieved.
//! Valid values are:
//! - \b TLV_TAG_LDTAG
//! - \b TLV_TAG_PDTAG
//! - \b TLV_TAG_Reserved3
//! - \b TLV_TAG_Reserved4
//! - \b TLV_TAG_BLANK
//! - \b TLV_TAG_Reserved6
//! - \b TLV_TAG_Reserved7
//! - \b TLV_TAG_TAGEND
//! - \b TLV_TAG_TAGEXT
//! - \b TLV_TAG_TIMER_D_CAL
//! - \b TLV_DEVICE_ID_0
//! - \b TLV_DEVICE_ID_1
//! - \b TLV_TAG_DIERECORD
//! - \b TLV_TAG_ADCCAL
//! - \b TLV_TAG_ADC12CAL
//! - \b TLV_TAG_ADC10CAL
//! - \b TLV_TAG_REFCAL
//! - \b TLV_TAG_CTSD16CAL
//! \param instance In some cases a specific tag may have more than one
//! instance. For example there may be multiple instances of timer
//! calibration data present under a single Timer Cal tag. This variable
//! specifies the instance for which information is to be retrieved (0,
//! 1, etc.). When only one instance exists; 0 is passed.
//! \param length Acts as a return through indirect reference. The function
//! retrieves the value of the TLV tag length. This value is pointed to
//! by *length and can be used by the application level once the
//! function is called. If the specified tag is not found then the
//! pointer is null 0.
//! \param data_address acts as a return through indirect reference. Once the
//! function is called data_address points to the pointer that holds the
//! value retrieved from the specified TLV tag. If the specified tag is
//! not found then the pointer is null 0.
//!
//! \return None
//
//*****************************************************************************
extern void TLV_getInfo(uint8_t tag,
uint8_t instance,
uint8_t *length,
uint16_t **data_address);
//*****************************************************************************
//
//! \brief Retrieves the unique device ID from the TLV structure.
//!
//!
//! \return The device ID is returned as type uint16_t.
//
//*****************************************************************************
extern uint16_t TLV_getDeviceType(void);
//*****************************************************************************
//
//! \brief Gets memory information
//!
//! The Peripheral Descriptor tag is split into two portions a list of the
//! available flash memory blocks followed by a list of available peripherals.
//! This function is used to parse through the first portion and calculate the
//! total flash memory available in a device. The typical usage is to call the
//! TLV_getMemory which returns a non-zero value until the entire memory list
//! has been parsed. When a zero is returned, it indicates that all the memory
//! blocks have been counted and the next address holds the beginning of the
//! device peripheral list.
//!
//! \param instance In some cases a specific tag may have more than one
//! instance. This variable specifies the instance for which information
//! is to be retrieved (0, 1 etc). When only one instance exists; 0 is
//! passed.
//!
//! \return The returned value is zero if the end of the memory list is
//! reached.
//
//*****************************************************************************
extern uint16_t TLV_getMemory(uint8_t instance);
//*****************************************************************************
//
//! \brief Gets peripheral information from the TLV
//!
//! he Peripheral Descriptor tag is split into two portions a list of the
//! available flash memory blocks followed by a list of available peripherals.
//! This function is used to parse through the second portion and can be used
//! to check if a specific peripheral is present in a device. The function
//! calls TLV_getPeripheral() recursively until the end of the memory list and
//! consequently the beginning of the peripheral list is reached. <
//!
//! \param tag represents represents the tag for a specific peripheral for
//! which the information needs to be retrieved. In the header file tlv.
//! h specific peripheral tags are pre-defined, for example USCIA_B and
//! TA0 are defined as TLV_PID_USCI_AB and TLV_PID_TA2 respectively.
//! Valid values are:
//! - \b TLV_PID_NO_MODULE - No Module
//! - \b TLV_PID_PORTMAPPING - Port Mapping
//! - \b TLV_PID_MSP430CPUXV2 - MSP430CPUXV2
//! - \b TLV_PID_JTAG - JTAG
//! - \b TLV_PID_SBW - SBW
//! - \b TLV_PID_EEM_XS - EEM X-Small
//! - \b TLV_PID_EEM_S - EEM Small
//! - \b TLV_PID_EEM_M - EEM Medium
//! - \b TLV_PID_EEM_L - EEM Large
//! - \b TLV_PID_PMM - PMM
//! - \b TLV_PID_PMM_FR - PMM FRAM
//! - \b TLV_PID_FCTL - Flash
//! - \b TLV_PID_CRC16 - CRC16
//! - \b TLV_PID_CRC16_RB - CRC16 Reverse
//! - \b TLV_PID_WDT_A - WDT_A
//! - \b TLV_PID_SFR - SFR
//! - \b TLV_PID_SYS - SYS
//! - \b TLV_PID_RAMCTL - RAMCTL
//! - \b TLV_PID_DMA_1 - DMA 1
//! - \b TLV_PID_DMA_3 - DMA 3
//! - \b TLV_PID_UCS - UCS
//! - \b TLV_PID_DMA_6 - DMA 6
//! - \b TLV_PID_DMA_2 - DMA 2
//! - \b TLV_PID_PORT1_2 - Port 1 + 2 / A
//! - \b TLV_PID_PORT3_4 - Port 3 + 4 / B
//! - \b TLV_PID_PORT5_6 - Port 5 + 6 / C
//! - \b TLV_PID_PORT7_8 - Port 7 + 8 / D
//! - \b TLV_PID_PORT9_10 - Port 9 + 10 / E
//! - \b TLV_PID_PORT11_12 - Port 11 + 12 / F
//! - \b TLV_PID_PORTU - Port U
//! - \b TLV_PID_PORTJ - Port J
//! - \b TLV_PID_TA2 - Timer A2
//! - \b TLV_PID_TA3 - Timer A1
//! - \b TLV_PID_TA5 - Timer A5
//! - \b TLV_PID_TA7 - Timer A7
//! - \b TLV_PID_TB3 - Timer B3
//! - \b TLV_PID_TB5 - Timer B5
//! - \b TLV_PID_TB7 - Timer B7
//! - \b TLV_PID_RTC - RTC
//! - \b TLV_PID_BT_RTC - BT + RTC
//! - \b TLV_PID_BBS - Battery Backup Switch
//! - \b TLV_PID_RTC_B - RTC_B
//! - \b TLV_PID_TD2 - Timer D2
//! - \b TLV_PID_TD3 - Timer D1
//! - \b TLV_PID_TD5 - Timer D5
//! - \b TLV_PID_TD7 - Timer D7
//! - \b TLV_PID_TEC - Timer Event Control
//! - \b TLV_PID_RTC_C - RTC_C
//! - \b TLV_PID_AES - AES
//! - \b TLV_PID_MPY16 - MPY16
//! - \b TLV_PID_MPY32 - MPY32
//! - \b TLV_PID_MPU - MPU
//! - \b TLV_PID_USCI_AB - USCI_AB
//! - \b TLV_PID_USCI_A - USCI_A
//! - \b TLV_PID_USCI_B - USCI_B
//! - \b TLV_PID_EUSCI_A - eUSCI_A
//! - \b TLV_PID_EUSCI_B - eUSCI_B
//! - \b TLV_PID_REF - Shared Reference
//! - \b TLV_PID_COMP_B - COMP_B
//! - \b TLV_PID_COMP_D - COMP_D
//! - \b TLV_PID_USB - USB
//! - \b TLV_PID_LCD_B - LCD_B
//! - \b TLV_PID_LCD_C - LCD_C
//! - \b TLV_PID_DAC12_A - DAC12_A
//! - \b TLV_PID_SD16_B_1 - SD16_B 1 Channel
//! - \b TLV_PID_SD16_B_2 - SD16_B 2 Channel
//! - \b TLV_PID_SD16_B_3 - SD16_B 3 Channel
//! - \b TLV_PID_SD16_B_4 - SD16_B 4 Channel
//! - \b TLV_PID_SD16_B_5 - SD16_B 5 Channel
//! - \b TLV_PID_SD16_B_6 - SD16_B 6 Channel
//! - \b TLV_PID_SD16_B_7 - SD16_B 7 Channel
//! - \b TLV_PID_SD16_B_8 - SD16_B 8 Channel
//! - \b TLV_PID_ADC12_A - ADC12_A
//! - \b TLV_PID_ADC10_A - ADC10_A
//! - \b TLV_PID_ADC10_B - ADC10_B
//! - \b TLV_PID_SD16_A - SD16_A
//! - \b TLV_PID_TI_BSL - BSL
//! \param instance In some cases a specific tag may have more than one
//! instance. For example a device may have more than a single USCI
//! module, each of which is defined by an instance number 0, 1, 2, etc.
//! When only one instance exists; 0 is passed.
//!
//! \return The returned value is zero if the specified tag value (peripheral)
//! is not available in the device.
//
//*****************************************************************************
extern uint16_t TLV_getPeripheral(uint8_t tag,
uint8_t instance);
//*****************************************************************************
//
//! \brief Get interrupt information from the TLV
//!
//! This function is used to retrieve information on available interrupt
//! vectors. It allows the user to check if a specific interrupt vector is
//! defined in a given device.
//!
//! \param tag represents the tag for the interrupt vector. Interrupt vector
//! tags number from 0 to N depending on the number of available
//! interrupts. Refer to the device datasheet for a list of available
//! interrupts.
//!
//! \return The returned value is zero is the specified interrupt vector is not
//! defined.
//
//*****************************************************************************
extern uint8_t TLV_getInterrupt(uint8_t tag);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_TLV_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// uups.c - Driver for the UUPS Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup uups_api uups
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_UUPS__
#include "uups.h"
#include <assert.h>
void UUPS_clearInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_UUPSICR) |= mask;
}
void UUPS_enableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_UUPSIMSC) |= mask;
}
void UUPS_disableInterrupt(uint16_t baseAddress, uint8_t mask)
{
HWREG16(baseAddress + OFS_UUPSIMSC) &= ~mask;
}
uint8_t UUPS_getInterruptStatus(uint16_t baseAddress, uint16_t mask)
{
return HWREG16(baseAddress + OFS_UUPSRIS) & mask;
}
void UUPS_stopMeasurement(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UUPSCTL) |= USSSTOP;
}
void UUPS_turnOffPower(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UUPSCTL) |= USSPWRDN;
}
void UUPS_turnOnPower(uint16_t baseAddress, uint16_t triggerSource)
{
HWREG16(baseAddress + OFS_UUPSCTL) |= (triggerSource | USSPWRUP);
}
void UUPS_enableASQ(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UUPSCTL) |= ASQEN;
}
uint8_t UUPS_getPowerModeStatus(uint16_t baseAddress)
{
return HWREG16(baseAddress + OFS_UUPSCTL) & UPSTATE;
}
uint8_t UUPS_isBusy(uint16_t baseAddress)
{
return HWREG16(baseAddress + OFS_UUPSCTL) & USS_BUSY;
}
uint8_t UUPS_isLDOReady(uint16_t baseAddress)
{
return HWREG16(baseAddress + OFS_UUPSCTL) & LDORDY;
}
void UUPS_setLowPowerBiasHoldOffDelay(uint16_t baseAddress, uint16_t holdOffDelay)
{
HWREG16(baseAddress + OFS_UUPSCTL) &= ~LBHDEL;
HWREG16(baseAddress + OFS_UUPSCTL) |= holdOffDelay;
}
void UUPS_holdUSSInResetState(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UUPSCTL) |= USSSWRST;
}
void UUPS_releaseUSSFromResetState(uint16_t baseAddress)
{
HWREG16(baseAddress + OFS_UUPSCTL) &= ~USSSWRST;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for uups_api
//! @}
//
//*****************************************************************************

381
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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// uups.h - Driver for the UUPS Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_UUPS_H__
#define __MSP430WARE_UUPS_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_UUPS__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the mask parameter for
// functions: UUPS_clearInterrupt(), UUPS_enableInterrupt() and
// UUPS_disableInterrupt() well as returned by the UUPS_getInterruptStatus()
// function.
//
//*****************************************************************************
#define UUPS_POWER_REQUEST_IGNORE_INTERRUPT PREQIG
#define UUPS_POWER_UP_TIMEOUT_INTERRUPT PTMOUT
//*****************************************************************************
//
// The following are values that can be passed to the powerMode parameter for
// functions: UUPS_gotoPowerMode() as well as returned by the
// UUPS_getPowerModeStatus() function.
//
//*****************************************************************************
#define UUPS_POWERMODE_OFF UPSTATE_0
#define UUPS_POWERMODE_STANDBY UPSTATE_1
#define UUPS_POWERMODE_TRANSITION UPSTATE_2
#define UUPS_POWERMODE_READY UPSTATE_3
//*****************************************************************************
//
// The following are values that can be passed to the triggerSource parameter for
// functions: UUPS_turnOnPower().
//
//*****************************************************************************
#define UUPS_POWERUP_TRIGGER_SOURCE_USSPWRUP USSPWRUPSEL_0
#define UUPS_POWERUP_TRIGGER_SOURCE_RTC USSPWRUPSEL_1
#define UUPS_POWERUP_TRIGGER_SOURCE_TIMER USSPWRUPSEL_2
#define UUPS_POWERUP_TRIGGER_SOURCE_EXTERNAL USSPWRUPSEL_3
//*****************************************************************************
//
// The following are values that can be returned by the UUPS_isBusy() function.
//
//*****************************************************************************
#define UUPS_BUSY USS_BUSY
#define UUPS_NOT_BUSY 0x0
//*****************************************************************************
//
// The following are values that can be returned by the UUPS_isLDOReady() function.
//
//*****************************************************************************
#define UUPS_LDO_READY LDORDY
#define UUPS_LDO_NOT_READY 0x0
//*****************************************************************************
//
// The following are values that can be passed to the holdOffDelay parameter for functions: UUPS_setLowPowerBiasHoldOffDelay().
//
//*****************************************************************************
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_NONE LBHDEL_0
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_512_REFCLKS LBHDEL_1
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_1024_REFCLKS LBHDEL_2
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_1536_REFCLKS LBHDEL_3
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_100_US LBHDEL_1
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_200_US LBHDEL_2
#define UUPS_HOLD_OFF_DELAY_ADDITIONAL_300_US LBHDEL_3
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Clears UUPS interrupts.
//!
//! The UUPS interrupt source is cleared, so that it no longer asserts. If the
//! interrupt is not enabled, the corresponding bit in the RIS register bit will
//! be cleared. If the interrupt is enabled, the corresponding bit both MIS and
//! RIS registers will be both cleared.
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param mask is the logical OR of any of the following:
//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_clearInterrupt(uint16_t baseAddress, uint8_t mask);
//*****************************************************************************
//
//! \brief Enables UUPS interrupts.
//!
//! Enables the indicated UUPS interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor. <b>Does not clear interrupt flags.</b>
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param mask is the logical OR of any of the following:
//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_enableInterrupt(uint16_t baseAddress, uint8_t mask);
//*****************************************************************************
//
//! \brief Disables selected UUPS interrupt sources.
//!
//! Disables the indicated UUPS interrupt sources. Only the sources that are
//! enabled can be reflected to the processor interrupt; disabled sources have
//! no effect on the processor.
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param mask is the logical OR of any of the following:
//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_disableInterrupt(uint16_t baseAddress, uint8_t mask);
//*****************************************************************************
//
//! \brief Gets the current UUPS interrupt status.
//!
//! This returns the interrupt status for the UUPS module based on which flag
//! is passed.
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param mask is the logical OR of any of the following:
//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
//!
//! \return Logical OR of any of the following:
//! - \b UUPS_POWER_REQUEST_IGNORE_INTERRUPT - UUPS power request ignored interrupt
//! - \b UUPS_POWER_UP_TIMEOUT_INTERRUPT - UUPS power up time out interrupt
//
//*****************************************************************************
extern uint8_t UUPS_getInterruptStatus(uint16_t baseAddress, uint16_t mask);
//*****************************************************************************
//
//! \brief Stops USS measurement.
//!
//! This stops the USS current measurement.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_stopMeasurement(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Turns down USS power.
//!
//! This stops the current measurement and turn off USS module.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_turnOffPower(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Turns on USS power and PLL.
//!
//! This turns on USS power and PLL with specified power-up trigger source. When
//! an external trigger source is selected, this function has no effect.
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param triggerSource is the specified power-up trigger source.
//! Valid values are:
//! - \b UUPS_POWERUP_TRIGGER_SOURCE_USSPWRUP
//! - \b UUPS_POWERUP_TRIGGER_SOURCE_RTC
//! - \b UUPS_POWERUP_TRIGGER_SOURCE_TIMER
//! - \b UUPS_POWERUP_TRIGGER_SOURCE_EXTERNAL
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_turnOnPower(uint16_t baseAddress, uint16_t triggerSource);
//*****************************************************************************
//
//! \brief Enables USS acquistion sequencer (ASQ).
//!
//! This enable the USS acquistion sequencer (ASQ). ASQ must be enabled before
//! applying a USS_PWRREQ signal.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_enableASQ(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Goes to the specified power mode.
//!
//! This function makes USS go to the specified power mode.
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param powerMode is the desired power mode to go to.
//!
//! \return None
//
//*****************************************************************************
//extern void UUPS_gotoPowerMode(uint8_t powerMode);
//*****************************************************************************
//
//! \brief Gets current USS power mode status.
//!
//! This gets current USS power mode status.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return Any of the following:
//! - \b UUPS_POWERMODE_OFF
//! - \b UUPS_POWERMODE_READY
//! - \b UUPS_POWERMODE_STANDBY
//! - \b UUPS_POWERMODE_TIMEOUT
//
//*****************************************************************************
extern uint8_t UUPS_getPowerModeStatus(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns current USS busy status.
//!
//! This returns current USS busy status depending on whether USS is performing
//! a measurement.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return UUPS_BUSY or UUPS_NOT_BUSY
//
//*****************************************************************************
extern uint8_t UUPS_isBusy(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Returns whether USS LDO is ready.
//!
//! This returns USS LDO ready status.
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return UUPS_LDO_READY or UUPS_LDO_NOT_READY
//
//*****************************************************************************
extern uint8_t UUPS_isLDOReady(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets the low power bias hold off delay.
//!
//! Defines the duration of the hold off delay for low power bias mode. Low power bias mode can be enabled from SAPH module.
//! The hold off delay is inserted from "OFF state" to "READY state" and from "STANDBY state" to "READY state".
//! Affects extra delay in Register Mode and Auto Mode.
//! Reset type: PUC
//!
//! \param baseAddress is the base address of the UUPS module.
//! \param holdOffDelay is the desired amount of additional hold off delay. 512 REFCLKS = ~100us, 1024 REFCLKS = ~200us, 1536 REFCLKS = ~300us. They map to the same values.
//! Valid values are:
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_NONE
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_512_REFCLKS
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_1024_REFCLKS
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_1536_REFCLKS
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_100_US
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_200_US
//! - \b UUPS_HOLD_OFF_DELAY_ADDITIONAL_300_US
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_setLowPowerBiasHoldOffDelay(uint16_t baseAddress, uint16_t holdOffDelay);
//*****************************************************************************
//
//! \brief Hold USS (and sub modules) logic in reset state.
//!
//! Useful if HSPLL gets stuck. Cycle USS into reset state with this function, and then release from reset state with UUPS_releaseUSSFromResetState.
//! USS is default released from reset, and ready for operation (still required to be powered up).
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_holdUSSInResetState(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Release USS (and sub modules) from reset state for operation.
//!
//! Useful if HSPLL gets stuck. Cycle USS into reset state with this UUPS_holdUSSInResetState, and then release from reset state with this function.
//! USS is default released from reset, and ready for operation (still required to be powered up).
//!
//! \param baseAddress is the base address of the UUPS module.
//!
//! \return None
//
//*****************************************************************************
extern void UUPS_releaseUSSFromResetState(uint16_t baseAddress);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_UUPS_H__

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// wdt_a.c - Driver for the wdt_a Module.
//
//*****************************************************************************
//*****************************************************************************
//
//! \addtogroup wdt_a_api wdt_a
//! @{
//
//*****************************************************************************
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_WDT_A__
#include "wdt_a.h"
#include <assert.h>
void WDT_A_hold (uint16_t baseAddress)
{
// Set Hold bit
uint8_t newWDTStatus =
((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) | WDTHOLD);
HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
}
void WDT_A_start (uint16_t baseAddress)
{
// Reset Hold bit
uint8_t newWDTStatus =
((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) & ~(WDTHOLD));
HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
}
void WDT_A_resetTimer (uint16_t baseAddress)
{
// Set Counter Clear bit
uint8_t newWDTStatus =
((HWREG16(baseAddress + OFS_WDTCTL) & 0x00FF) | WDTCNTCL);
HWREG16(baseAddress + OFS_WDTCTL) = WDTPW + newWDTStatus;
}
void WDT_A_initWatchdogTimer (uint16_t baseAddress,
uint8_t clockSelect,
uint8_t clockDivider)
{
HWREG16(baseAddress + OFS_WDTCTL) =
WDTPW + WDTCNTCL + WDTHOLD + clockSelect + clockDivider;
}
void WDT_A_initIntervalTimer (uint16_t baseAddress,
uint8_t clockSelect,
uint8_t clockDivider)
{
HWREG16(baseAddress + OFS_WDTCTL) =
WDTPW + WDTCNTCL + WDTHOLD + WDTTMSEL + clockSelect + clockDivider;
}
#endif
//*****************************************************************************
//
//! Close the doxygen group for wdt_a_api
//! @}
//
//*****************************************************************************

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/* --COPYRIGHT--,BSD
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* --/COPYRIGHT--*/
//*****************************************************************************
//
// wdt_a.h - Driver for the WDT_A Module.
//
//*****************************************************************************
#ifndef __MSP430WARE_WDT_A_H__
#define __MSP430WARE_WDT_A_H__
#include "inc/hw_memmap.h"
#ifdef __MSP430_HAS_WDT_A__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
//*****************************************************************************
//
// The following are values that can be passed to the clockSelect parameter for
// functions: WDT_A_initWatchdogTimer(), and WDT_A_initIntervalTimer().
//
//*****************************************************************************
#define WDT_A_CLOCKSOURCE_SMCLK (WDTSSEL_0)
#define WDT_A_CLOCKSOURCE_ACLK (WDTSSEL_1)
#define WDT_A_CLOCKSOURCE_VLOCLK (WDTSSEL_2)
#define WDT_A_CLOCKSOURCE_XCLK (WDTSSEL_3)
//*****************************************************************************
//
// The following are values that can be passed to the clockDivider parameter
// for functions: WDT_A_initWatchdogTimer(), and WDT_A_initIntervalTimer().
//
//*****************************************************************************
#define WDT_A_CLOCKDIVIDER_2G (WDTIS_0)
#define WDT_A_CLOCKDIVIDER_128M (WDTIS_1)
#define WDT_A_CLOCKDIVIDER_8192K (WDTIS_2)
#define WDT_A_CLOCKDIVIDER_512K (WDTIS_3)
#define WDT_A_CLOCKDIVIDER_32K (WDTIS_4)
#define WDT_A_CLOCKDIVIDER_8192 (WDTIS_5)
#define WDT_A_CLOCKDIVIDER_512 (WDTIS_6)
#define WDT_A_CLOCKDIVIDER_64 (WDTIS_7)
//*****************************************************************************
//
// Prototypes for the APIs.
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Holds the Watchdog Timer.
//!
//! This function stops the watchdog timer from running, that way no interrupt
//! or PUC is asserted.
//!
//! \param baseAddress is the base address of the WDT_A module.
//!
//! \return None
//
//*****************************************************************************
extern void WDT_A_hold(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Starts the Watchdog Timer.
//!
//! This function starts the watchdog timer functionality to start counting
//! again.
//!
//! \param baseAddress is the base address of the WDT_A module.
//!
//! \return None
//
//*****************************************************************************
extern void WDT_A_start(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Resets the timer counter of the Watchdog Timer.
//!
//! This function resets the watchdog timer to 0x0000h.
//!
//! \param baseAddress is the base address of the WDT_A module.
//!
//! \return None
//
//*****************************************************************************
extern void WDT_A_resetTimer(uint16_t baseAddress);
//*****************************************************************************
//
//! \brief Sets the clock source for the Watchdog Timer in watchdog mode.
//!
//! This function sets the watchdog timer in watchdog mode, which will cause a
//! PUC when the timer overflows. When in the mode, a PUC can be avoided with a
//! call to WDT_A_resetTimer() before the timer runs out.
//!
//! \param baseAddress is the base address of the WDT_A module.
//! \param clockSelect is the clock source that the watchdog timer will use.
//! Valid values are:
//! - \b WDT_A_CLOCKSOURCE_SMCLK [Default]
//! - \b WDT_A_CLOCKSOURCE_ACLK
//! - \b WDT_A_CLOCKSOURCE_VLOCLK
//! - \b WDT_A_CLOCKSOURCE_XCLK
//! \n Modified bits are \b WDTSSEL of \b WDTCTL register.
//! \param clockDivider is the divider of the clock source, in turn setting the
//! watchdog timer interval.
//! Valid values are:
//! - \b WDT_A_CLOCKDIVIDER_2G
//! - \b WDT_A_CLOCKDIVIDER_128M
//! - \b WDT_A_CLOCKDIVIDER_8192K
//! - \b WDT_A_CLOCKDIVIDER_512K
//! - \b WDT_A_CLOCKDIVIDER_32K [Default]
//! - \b WDT_A_CLOCKDIVIDER_8192
//! - \b WDT_A_CLOCKDIVIDER_512
//! - \b WDT_A_CLOCKDIVIDER_64
//! \n Modified bits are \b WDTIS and \b WDTHOLD of \b WDTCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void WDT_A_initWatchdogTimer(uint16_t baseAddress,
uint8_t clockSelect,
uint8_t clockDivider);
//*****************************************************************************
//
//! \brief Sets the clock source for the Watchdog Timer in timer interval mode.
//!
//! This function sets the watchdog timer as timer interval mode, which will
//! assert an interrupt without causing a PUC.
//!
//! \param baseAddress is the base address of the WDT_A module.
//! \param clockSelect is the clock source that the watchdog timer will use.
//! Valid values are:
//! - \b WDT_A_CLOCKSOURCE_SMCLK [Default]
//! - \b WDT_A_CLOCKSOURCE_ACLK
//! - \b WDT_A_CLOCKSOURCE_VLOCLK
//! - \b WDT_A_CLOCKSOURCE_XCLK
//! \n Modified bits are \b WDTSSEL of \b WDTCTL register.
//! \param clockDivider is the divider of the clock source, in turn setting the
//! watchdog timer interval.
//! Valid values are:
//! - \b WDT_A_CLOCKDIVIDER_2G
//! - \b WDT_A_CLOCKDIVIDER_128M
//! - \b WDT_A_CLOCKDIVIDER_8192K
//! - \b WDT_A_CLOCKDIVIDER_512K
//! - \b WDT_A_CLOCKDIVIDER_32K [Default]
//! - \b WDT_A_CLOCKDIVIDER_8192
//! - \b WDT_A_CLOCKDIVIDER_512
//! - \b WDT_A_CLOCKDIVIDER_64
//! \n Modified bits are \b WDTIS and \b WDTHOLD of \b WDTCTL register.
//!
//! \return None
//
//*****************************************************************************
extern void WDT_A_initIntervalTimer(uint16_t baseAddress,
uint8_t clockSelect,
uint8_t clockDivider);
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif
#endif // __MSP430WARE_WDT_A_H__

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