first commit for opensource

2019-09-16 13:19:50 +08:00
parent 08ab013b8e
commit edb2879617
6303 changed files with 5472815 additions and 23 deletions
--- a/board/Fire_STM32F429/BSP/Src/mcu_init.c
+++ b/board/Fire_STM32F429/BSP/Src/mcu_init.c
@@ -0,0 +1,106 @@
+#include "mcu_init.h"
+
+static void GPIO_CLK_Init(void);
+
+void board_init(void)
+{
+  HAL_Init();
+  GPIO_CLK_Init();
+  /* <20><><EFBFBD><EFBFBD>ϵͳʱ<CDB3><CAB1>Ϊ180 MHz */
+  SystemClock_Config();
+	/* <20><>ʼ<EFBFBD><CABC>RGB<47>ʵ<EFBFBD> */
+  LED_GPIO_Config();
+  /*<2A><>ʼ<EFBFBD><CABC>USART <20><><EFBFBD><EFBFBD>ģʽΪ 115200 8-N-1<><31><EFBFBD>жϽ<D0B6><CFBD><EFBFBD>*/
+  DEBUG_USART_Config();
+}
+
+/**
+  * @brief  ϵͳʱ<CDB3><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+  *            System Clock source            = PLL (HSE)
+  *            SYSCLK(Hz)                     = 180000000
+  *            HCLK(Hz)                       = 180000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 4
+  *            APB2 Prescaler                 = 2
+  *            HSE Frequency(Hz)              = 25000000
+  *            PLL_M                          = 25
+  *            PLL_N                          = 360
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 7
+  *            VDD(V)                         = 3.3
+  *            Main regulator output voltage  = Scale1 mode
+  *            Flash Latency(WS)              = 5
+  * @param  <20><>
+  * @retval <20><>
+  */
+void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* ʹ<><CAB9>HSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HSEΪPLL<4C><4C>ʱ<EFBFBD><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PLL<4C>ĸ<EFBFBD><C4B8>ַ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>M N P Q
+	 * PLLCLK = HSE/M*N/P = 25M / 25 *432 / 2 = 216M
+	 */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 25;
+  RCC_OscInitStruct.PLL.PLLN = 360;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+   while(1) {}
+  }
+
+  /* <20><><EFBFBD><EFBFBD> OverDrive ģʽ */
+  HAL_PWREx_EnableOverDrive();
+
+  /* ѡ<><D1A1>PLLCLK<4C><4B>ΪSYSCLK<4C><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> HCLK, PCLK1 and PCLK2 <20><>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
+	 * SYSCLK = PLLCLK     = 180M
+	 * HCLK   = SYSCLK / 1 = 180M
+	 * PCLK2  = SYSCLK / 2 = 90M
+	 * PCLK1  = SYSCLK / 4 = 45M
+	 */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+  if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+  {
+    while(1) {}
+  }
+
+  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+  /* SysTick_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void GPIO_CLK_Init(void)
+{
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOI_CLK_ENABLE();
+}
+
+
+