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add modbus slave support

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add modbus slave support
This commit is contained in:
Supowang1989
2020-02-24 21:40:06 +08:00
parent 79be128f5f
commit ef82dbfc6d
1129 changed files with 295648 additions and 1776 deletions
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FREEMODBUS 1.2 LPC214X PORT
===========================
REQUIREMENTS
============
This demo application provides a port for the LPC214X series of processors
from NXP Semiconductors. The port was done using the MCB2140 from Keil[1]
which features a LPC2148 MCU.
It requires a wired serial port to a host processor and a Modbus Master
Software on the PC side to be useful. Demo versions of Modbus Masters
can be found in [2] and [3].
TESTING
=======
Start the Modbus Sample Application and test if the input registers starting
at protocol address 1000 can be read. There are four registers value avai-
lable and the output should look like:
Polling slave (Ctrl-C to stop) ...
[1000]: 6474
[1001]: 0
[1002]: 0
[1003]: 0
Polling slave (Ctrl-C to stop) ...
[1000]: -8831
[1001]: 0
[1002]: 0
[1003]: 0
Polling slave (Ctrl-C to stop) ...
The simple testing utility used in the 'demo_rtu.bat' script can be found
at [4].
[1] Keil MCB2140 kit: http://www.keil.com/mcb2140/
[2] WinTech ModScan32: http://www.win-tech.com/html/modscan32.htm
[3] Modus Poll: http://www.modbustools.com/modbus_poll.asp
[4] FieldTalk Modpoll: http://www.focus-sw.com/fieldtalk/modpoll.html

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/***********************************************************************/
/* This file is part of the uVision/ARM development tools */
/* Copyright KEIL ELEKTRONIK GmbH 2002-2005 */
/***********************************************************************/
/* */
/* STARTUP.S: Startup file for Philips LPC2000 device series */
/* */
/***********************************************************************/
/*
//*** <<< Use Configuration Wizard in Context Menu >>> ***
*/
/*
* The STARTUP.S code is executed after CPU Reset. This file may be
* translated with the following SET symbols. In uVision these SET
* symbols are entered under Options - ASM - Set.
*
* REMAP: when set the startup code initializes the register MEMMAP
* which overwrites the settings of the CPU configuration pins. The
* startup and interrupt vectors are remapped from:
* 0x00000000 default setting (not remapped)
* 0x80000000 when EXTMEM_MODE is used
* 0x40000000 when RAM_MODE is used
*
* EXTMEM_MODE: when set the device is configured for code execution
* from external memory starting at address 0x80000000. The startup
* vectors are located to 0x80000000.
*
* RAM_MODE: when set the device is configured for code execution
* from on-chip RAM starting at address 0x40000000. The startup
* vectors are located to 0x40000000.
*/
// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
Mode_USR EQU 0x10
Mode_FIQ EQU 0x11
Mode_IRQ EQU 0x12
Mode_SVC EQU 0x13
Mode_ABT EQU 0x17
Mode_UND EQU 0x1B
Mode_SYS EQU 0x1F
I_Bit EQU 0x80 /* when I bit is set, IRQ is disabled */
F_Bit EQU 0x40 /* when F bit is set, FIQ is disabled */
/*
// <h> Stack Configuration (Stack Sizes in Bytes)
// <o0> Undefined Mode <0x0-0xFFFFFFFF:4>
// <o1> Supervisor Mode <0x0-0xFFFFFFFF:4>
// <o2> Abort Mode <0x0-0xFFFFFFFF:4>
// <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:4>
// <o4> Interrupt Mode <0x0-0xFFFFFFFF:4>
// <o5> User/System Mode <0x0-0xFFFFFFFF:4>
// </h>
*/
UND_Stack_Size EQU 0x00000004
SVC_Stack_Size EQU 0x00000004
ABT_Stack_Size EQU 0x00000004
FIQ_Stack_Size EQU 0x00000004
IRQ_Stack_Size EQU 0x00000080
USR_Stack_Size EQU 0x00000400
AREA STACK, DATA, READWRITE, ALIGN=2
DS (USR_Stack_Size+3)&~3 ; Stack for User/System Mode
DS (SVC_Stack_Size+3)&~3 ; Stack for Supervisor Mode
DS (IRQ_Stack_Size+3)&~3 ; Stack for Interrupt Mode
DS (FIQ_Stack_Size+3)&~3 ; Stack for Fast Interrupt Mode
DS (ABT_Stack_Size+3)&~3 ; Stack for Abort Mode
DS (UND_Stack_Size+3)&~3 ; Stack for Undefined Mode
Top_Stack:
// VPBDIV definitions
VPBDIV EQU 0xE01FC100 /* VPBDIV Address */
/*
// <e> VPBDIV Setup
// <i> Peripheral Bus Clock Rate
// <o1.0..1> VPBDIV: VPB Clock
// <0=> VPB Clock = CPU Clock / 4
// <1=> VPB Clock = CPU Clock
// <2=> VPB Clock = CPU Clock / 2
// <o1.4..5> XCLKDIV: XCLK Pin
// <0=> XCLK Pin = CPU Clock / 4
// <1=> XCLK Pin = CPU Clock
// <2=> XCLK Pin = CPU Clock / 2
// </e>
*/
VPBDIV_SETUP EQU 0
VPBDIV_Val EQU 0x00000000
// Phase Locked Loop (PLL) definitions
PLL_BASE EQU 0xE01FC080 /* PLL Base Address */
PLLCON_OFS EQU 0x00 /* PLL Control Offset*/
PLLCFG_OFS EQU 0x04 /* PLL Configuration Offset */
PLLSTAT_OFS EQU 0x08 /* PLL Status Offset */
PLLFEED_OFS EQU 0x0C /* PLL Feed Offset */
PLLCON_PLLE EQU (1<<0) /* PLL Enable */
PLLCON_PLLC EQU (1<<1) /* PLL Connect */
PLLCFG_MSEL EQU (0x1F<<0) /* PLL Multiplier */
PLLCFG_PSEL EQU (0x03<<5) /* PLL Divider */
PLLSTAT_PLOCK EQU (1<<10) /* PLL Lock Status */
/*
// <e> PLL Setup
// <i> Phase Locked Loop
// <i> CCLK - Processor Clock
// <i> Fcco - PLL Oscillator
// <o1.0..4> MSEL: PLL Multiplier Selection
// <1-32><#-1>
// <i> PLL Multiplier "M" Value
// <i> CCLK = M * Fosc
// <o1.5..6> PSEL: PLL Divider Selection
// <0=> 1 <1=> 2 <2=> 4 <3=> 8
// <i> PLL Divider "P" Value
// <i> Fcco = CCLK * 2 * P
// <i> 156MHz <= Fcco <= 320MHz
// </e>
*/
PLL_SETUP EQU 1
PLLCFG_Val EQU 0x00000024
// Memory Accelerator Module (MAM) definitions
MAM_BASE EQU 0xE01FC000 /* MAM Base Address */
MAMCR_OFS EQU 0x00 /* MAM Control Offset*/
MAMTIM_OFS EQU 0x04 /* MAM Timing Offset */
/*
// <e> MAM Setup
// <i> Memory Accelerator Module
// <o1.0..1> MAM Control
// <0=> Disabled
// <1=> Partially Enabled
// <2=> Fully Enabled
// <i> Mode
// <o2.0..2> MAM Timing
// <0=> Reserved <1=> 1 <2=> 2 <3=> 3
// <4=> 4 <5=> 5 <6=> 6 <7=> 7
// <i> Fetch Cycles
// </e>
*/
MAM_SETUP EQU 1
MAMCR_Val EQU 0x00000002
MAMTIM_Val EQU 0x00000004
// External Memory Controller (EMC) definitions
EMC_BASE EQU 0xFFE00000 /* EMC Base Address */
BCFG0_OFS EQU 0x00 /* BCFG0 Offset */
BCFG1_OFS EQU 0x04 /* BCFG1 Offset */
BCFG2_OFS EQU 0x08 /* BCFG2 Offset */
BCFG3_OFS EQU 0x0C /* BCFG3 Offset */
/*
// <e> External Memory Controller (EMC)
*/
EMC_SETUP EQU 0
/*
// <e> Bank Configuration 0 (BCFG0)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
// <2=> 32-bit <3=> Reserved
// </e>
*/
BCFG0_SETUP EQU 0
BCFG0_Val EQU 0x0000FBEF
/*
// <e> Bank Configuration 1 (BCFG1)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
// <2=> 32-bit <3=> Reserved
// </e>
*/
BCFG1_SETUP EQU 0
BCFG1_Val EQU 0x0000FBEF
/*
// <e> Bank Configuration 2 (BCFG2)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
// <2=> 32-bit <3=> Reserved
// </e>
*/
BCFG2_SETUP EQU 0
BCFG2_Val EQU 0x0000FBEF
/*
// <e> Bank Configuration 3 (BCFG3)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
// <2=> 32-bit <3=> Reserved
// </e>
*/
BCFG3_SETUP EQU 0
BCFG3_Val EQU 0x0000FBEF
/*
// </e> End of EMC
*/
// External Memory Pins definitions
PINSEL2 EQU 0xE002C014 /* PINSEL2 Address */
PINSEL2_Val EQU 0x0E6149E4 /* CS0..3, OE, WE, BLS0..3,
D0..31, A2..23, JTAG Pins */
// Starupt Code must be linked first at Address at which it expects to run.
$IF (EXTMEM_MODE)
CODE_BASE EQU 0x80000000
$ELSEIF (RAM_MODE)
CODE_BASE EQU 0x40000000
$ELSE
CODE_BASE EQU 0x00000000
$ENDIF
AREA STARTUPCODE, CODE, AT CODE_BASE // READONLY, ALIGN=4
PUBLIC __startup
EXTERN CODE32 (?C?INIT)
__startup PROC CODE32
// Pre-defined interrupt handlers that may be directly
// overwritten by C interrupt functions
EXTERN CODE32 (Undef_Handler?A)
EXTERN CODE32 (SWI_Handler?A)
EXTERN CODE32 (PAbt_Handler?A)
EXTERN CODE32 (DAbt_Handler?A)
EXTERN CODE32 (IRQ_Handler?A)
EXTERN CODE32 (FIQ_Handler?A)
// Exception Vectors
// Mapped to Address 0.
// Absolute addressing mode must be used.
Vectors: LDR PC,Reset_Addr
LDR PC,Undef_Addr
LDR PC,SWI_Addr
LDR PC,PAbt_Addr
LDR PC,DAbt_Addr
NOP /* Reserved Vector */
; LDR PC,IRQ_Addr
LDR PC,[PC, #-0x0FF0] /* Vector from VicVectAddr */
LDR PC,FIQ_Addr
Reset_Addr: DD Reset_Handler
Undef_Addr: DD Undef_Handler?A
SWI_Addr: DD SWI_Handler?A
PAbt_Addr: DD PAbt_Handler?A
DAbt_Addr: DD DAbt_Handler?A
DD 0 /* Reserved Address */
IRQ_Addr: DD IRQ_Handler?A
FIQ_Addr: DD FIQ_Handler?A
// Reset Handler
Reset_Handler:
$IF (EXTMEM_MODE)
LDR R0, =PINSEL2
LDR R1, =PINSEL2_Val
STR R1, [R0]
$ENDIF
IF (EMC_SETUP != 0)
LDR R0, =EMC_BASE
IF (BCFG0_SETUP != 0)
LDR R1, =BCFG0_Val
STR R1, [R0, #BCFG0_OFS]
ENDIF
IF (BCFG1_SETUP != 0)
LDR R1, =BCFG1_Val
STR R1, [R0, #BCFG1_OFS]
ENDIF
IF (BCFG2_SETUP != 0)
LDR R1, =BCFG2_Val
STR R1, [R0, #BCFG2_OFS]
ENDIF
IF (BCFG3_SETUP != 0)
LDR R1, =BCFG3_Val
STR R1, [R0, #BCFG3_OFS]
ENDIF
ENDIF
IF (VPBDIV_SETUP != 0)
LDR R0, =VPBDIV
LDR R1, =VPBDIV_Val
STR R1, [R0]
ENDIF
IF (PLL_SETUP != 0)
LDR R0, =PLL_BASE
MOV R1, #0xAA
MOV R2, #0x55
// Configure and Enable PLL
MOV R3, #PLLCFG_Val
STR R3, [R0, #PLLCFG_OFS]
MOV R3, #PLLCON_PLLE
STR R3, [R0, #PLLCON_OFS]
STR R1, [R0, #PLLFEED_OFS]
STR R2, [R0, #PLLFEED_OFS]
// Wait until PLL Locked
PLL_Loop: LDR R3, [R0, #PLLSTAT_OFS]
ANDS R3, R3, #PLLSTAT_PLOCK
BEQ PLL_Loop
// Switch to PLL Clock
MOV R3, #(PLLCON_PLLE | PLLCON_PLLC)
STR R3, [R0, #PLLCON_OFS]
STR R1, [R0, #PLLFEED_OFS]
STR R2, [R0, #PLLFEED_OFS]
ENDIF
IF (MAM_SETUP != 0)
LDR R0, =MAM_BASE
MOV R1, #MAMTIM_Val
STR R1, [R0, #MAMTIM_OFS]
MOV R1, #MAMCR_Val
STR R1, [R0, #MAMCR_OFS]
ENDIF
// Memory Mapping
MEMMAP EQU 0xE01FC040 /* Memory Mapping Control */
$IF (REMAP)
LDR R0, =MEMMAP
$IF (EXTMEM_MODE)
MOV R1, #3
$ELSEIF (RAM_MODE)
MOV R1, #2
$ELSE
MOV R1, #1
$ENDIF
STR R1, [R0]
$ENDIF
// Setup Stack for each mode
LDR R0, =Top_Stack
// Enter Undefined Instruction Mode and set its Stack Pointer
MSR CPSR_c, #Mode_UND|I_Bit|F_Bit
MOV SP, R0
SUB R0, R0, #UND_Stack_Size
// Enter Abort Mode and set its Stack Pointer
MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit
MOV SP, R0
SUB R0, R0, #ABT_Stack_Size
// Enter FIQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit
MOV SP, R0
SUB R0, R0, #FIQ_Stack_Size
// Enter IRQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit
MOV SP, R0
SUB R0, R0, #IRQ_Stack_Size
// Enter Supervisor Mode and set its Stack Pointer
MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit
MOV SP, R0
SUB R0, R0, #SVC_Stack_Size
// Enter User Mode and set its Stack Pointer
MSR CPSR_c, #Mode_USR
MOV SP, R0
// Enter the C code
LDR R0,=?C?INIT
TST R0,#1 ; Bit-0 set: INIT is Thumb
LDREQ LR,=exit?A ; ARM Mode
LDRNE LR,=exit?T ; Thumb Mode
BX R0
ENDP
PUBLIC exit?A
exit?A PROC CODE32
B exit?A
ENDP
PUBLIC exit?T
exit?T PROC CODE16
exit: B exit?T
ENDP
END

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### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm { 0,0,0,0,0,0,0,0 }
Target (Demo), 0x0005 // Tools: ''
GRPOPT 1,(Demo),1,0,0
GRPOPT 2,(FreeModbus),1,0,0
OPTFFF 1,1,1,0,0,0,0,0,<.\demo.c><demo.c>
OPTFFF 1,2,1,0,0,0,0,0,<.\port\porttimer.c><porttimer.c>
OPTFFF 1,3,1,0,0,0,0,0,<.\port\port.c><port.c>
OPTFFF 1,4,1,0,0,0,0,0,<.\port\portevent.c><portevent.c>
OPTFFF 1,5,1,0,0,0,0,0,<.\port\portserial.c><portserial.c>
OPTFFF 1,6,2,855638016,0,0,0,0,<.\Startup.s><Startup.s>
OPTFFF 2,7,1,0,0,0,0,0,<..\..\modbus\mb.c><mb.c>
OPTFFF 2,8,1,0,0,0,0,0,<..\..\modbus\functions\mbutils.c><mbutils.c>
OPTFFF 2,9,1,0,0,0,0,0,<..\..\modbus\functions\mbfunccoils.c><mbfunccoils.c>
OPTFFF 2,10,1,369098752,0,0,0,0,<..\..\modbus\functions\mbfuncdiag.c><mbfuncdiag.c>
OPTFFF 2,11,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncdisc.c><mbfuncdisc.c>
OPTFFF 2,12,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncholding.c><mbfuncholding.c>
OPTFFF 2,13,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncinput.c><mbfuncinput.c>
OPTFFF 2,14,1,0,0,0,0,0,<..\..\modbus\functions\mbfuncother.c><mbfuncother.c>
OPTFFF 2,15,1,0,0,0,0,0,<..\..\modbus\rtu\mbrtu.c><mbrtu.c>
OPTFFF 2,16,1,0,0,0,0,0,<..\..\modbus\rtu\mbcrc.c><mbcrc.c>
OPTFFF 2,17,1,0,0,0,0,0,<..\..\modbus\ascii\mbascii.c><mbascii.c>
TARGOPT 1, (Demo)
KACLK=12000000
OPTTT 1,1,1,0
OPTHX 0,65535,0,0,0
OPTLX 120,65,8,<.\build\lst\>
OPTOX 16
OPTLT 1,1,1,0,1,1,0,1,0,0,0,0
OPTXL 1,1,1,1,1,1,1,0,0
OPTFL 1,0,1
OPTBL 0,(Data Sheet)<DATASHTS\PHILIPS\LPC2141_42_44_46_48.PDF>
OPTBL 1,(User Manual)<DATASHTS\PHILIPS\user_manual_LPC214x.pdf>
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
OPTKEY 0,(UL2ARM)(-U268761108 -O7 -C0 -FO15 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000))
OPTKEY 0,(DLGDARM)((134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(153=-1,-1,-1,-1,0)(154=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(145=-1,-1,-1,-1,0)(147=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(149=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(137=-1,-1,-1,-1,0)(138=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(146=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(141=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(143=-1,-1,-1,-1,0)(144=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0))
OPTKEY 0,(ARMDBGFLAGS)(-T5F)
OPTDF 0x82
OPTLE <>
OPTLC <>
EndOpt

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### uVision2 Project, (C) Keil Software
### Do not modify !
Target (Demo), 0x0005 // Tools: ''
Group (Demo)
Group (FreeModbus)
File 1,1,<.\demo.c><demo.c> 0x0
File 1,1,<.\port\porttimer.c><porttimer.c> 0x0
File 1,1,<.\port\port.c><port.c> 0x0
File 1,1,<.\port\portevent.c><portevent.c> 0x0
File 1,1,<.\port\portserial.c><portserial.c> 0x0
File 1,2,<.\Startup.s><Startup.s> 0x0
File 2,1,<..\..\modbus\mb.c><mb.c> 0x0
File 2,1,<..\..\modbus\functions\mbutils.c><mbutils.c> 0x0
File 2,1,<..\..\modbus\functions\mbfunccoils.c><mbfunccoils.c> 0x0
File 2,1,<..\..\modbus\functions\mbfuncdiag.c><mbfuncdiag.c> 0x0
File 2,1,<..\..\modbus\functions\mbfuncdisc.c><mbfuncdisc.c> 0x0
File 2,1,<..\..\modbus\functions\mbfuncholding.c><mbfuncholding.c> 0x0
File 2,1,<..\..\modbus\functions\mbfuncinput.c><mbfuncinput.c> 0x0
File 2,1,<..\..\modbus\functions\mbfuncother.c><mbfuncother.c> 0x0
File 2,1,<..\..\modbus\rtu\mbrtu.c><mbrtu.c> 0x0
File 2,1,<..\..\modbus\rtu\mbcrc.c><mbcrc.c> 0x0
File 2,1,<..\..\modbus\ascii\mbascii.c><mbascii.c> 0x0
Options 1,0,0 // Target 'Demo'
Device (LPC2148)
Vendor (Philips)
Cpu (IRAM(0x40000000-0x40007FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE(ARM7TDMI))
FlashUt (LPC210x_ISP.EXE ("#H" ^X $D COM1: 38400 1))
StupF ("STARTUP\Philips\Startup.s" ("Philips LPC2100 Startup Code"))
FlashDR (UL2ARM(-U268761108 -O7 -C0 -FO15 -FD40000000 -FC800 -FN1 -FF0LPC_IAP2_512 -FS00 -FL07D000))
DevID ()
Rgf (LPC214X.H)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (<28>Philips\)
OrgReg (<28>Philips\)
TgStat=16
OutDir (.\build\obj\)
OutName (demo)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\build\lst\)
HexSel=0
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
SVCSID <>
KACPU (ARM7TDMI)
TKAFL { 0,27,183,0,0,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
KIROM { 1,0,0,0,0,0,0,8,0 }
KIRAM { 0,0,0,0,64,0,128,0,0 }
KXRAM { 0,0,0,0,0,0,0,0,0 }
KAOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
KCAFLG { 197,152,20,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
KCAMSC ()
KCADEF ()
KCAUDF ()
KCAINC (..\..\modbus\include;..\..\modbus\rtu;..\..\modbus\ascii;.\port)
KAAFLG { 20,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
KAAMSC ()
KAASET ()
KAARST ()
KAAINC ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
KLAFLG { 44,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
KLAMSC ()
KLADWN ()
KLACFI ()
KLAASN ()
KLARES ()
KLACCL ()
KLAUCL ()
KLACSC ()
KLAUCS ()
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC2148)(SARM.DLL)()(TARMP.DLL)(-pLPC2148)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
FLASH1 { 2,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (BIN\UL2ARM.DLL)
FLASH3 ("LPC210x_ISP.EXE" ("#H" ^X $D COM1: 38400 1))
FLASH4 ()
EndOpt

108
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/demo.c vendored Normal file
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/*
* FreeModbus Libary: LPC214X Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
/* ----------------------- Modbus includes ----------------------------------*/
#include "mb.h"
#include "mbport.h"
/* ----------------------- Defines ------------------------------------------*/
#define REG_INPUT_START 1000
#define REG_INPUT_NREGS 4
/* ----------------------- Static variables ---------------------------------*/
static USHORT usRegInputStart = REG_INPUT_START;
static USHORT usRegInputBuf[REG_INPUT_NREGS];
/* ----------------------- Start implementation -----------------------------*/
int
main( void )
{
eMBErrorCode eStatus;
eStatus = eMBInit( MB_RTU, 0x0A, 0, 38400, MB_PAR_EVEN );
/* Enable the Modbus Protocol Stack. */
eStatus = eMBEnable( );
for( ;; )
{
( void )eMBPoll( );
/* Here we simply count the number of poll cycles. */
usRegInputBuf[0]++;
}
}
eMBErrorCode
eMBRegInputCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs )
{
eMBErrorCode eStatus = MB_ENOERR;
int iRegIndex;
if( ( usAddress >= REG_INPUT_START )
&& ( usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS ) )
{
iRegIndex = ( int )( usAddress - usRegInputStart );
while( usNRegs > 0 )
{
*pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] >> 8 );
*pucRegBuffer++ = ( unsigned char )( usRegInputBuf[iRegIndex] & 0xFF );
iRegIndex++;
usNRegs--;
}
}
else
{
eStatus = MB_ENOREG;
}
return eStatus;
}
eMBErrorCode
eMBRegHoldingCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode )
{
( void )pucRegBuffer;
( void )usAddress;
( void )usNRegs;
( void )eMode;
return MB_ENOREG;
}
eMBErrorCode
eMBRegCoilsCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode )
{
( void )pucRegBuffer;
( void )usAddress;
( void )usNCoils;
( void )eMode;
return MB_ENOREG;
}
eMBErrorCode
eMBRegDiscreteCB( UCHAR * pucRegBuffer, USHORT usAddress, USHORT usNDiscrete )
{
( void )pucRegBuffer;
( void )usAddress;
( void )usNDiscrete;
return MB_ENOREG;
}

42
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.c vendored Normal file
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/*
* FreeModbus Libary: LPC214X Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
/* ----------------------- System includes --------------------------------*/
#include <LPC214x.h>
/* ----------------------- Modbus includes ----------------------------------*/
/* ----------------------- Variables ----------------------------------------*/
int VIC_Temp;
/* ----------------------- Start implementation -----------------------------*/
void
EnterCriticalSection( )
{
VIC_Temp = VICIntEnable; /* Save VICIntEnable */
VICIntEnClr = VIC_Temp; /* Disable Interruptions */
}
void
ExitCriticalSection( )
{
VICIntEnable = VIC_Temp; /* Restore VICIntEnable */
}

60
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/port.h vendored Normal file
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/*
* FreeModbus Libary: BARE Port
* Copyright (C) 2006 Christian Walter <wolti@sil.at>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
#ifndef _PORT_H
#define _PORT_H
#include <assert.h>
#include <inttypes.h>
#define INLINE
#define PR_BEGIN_EXTERN_C extern "C" {
#define PR_END_EXTERN_C }
#define ENTER_CRITICAL_SECTION( ) EnterCriticalSection( )
#define EXIT_CRITICAL_SECTION( ) ExitCriticalSection( )
#define CCLK 60000000L
#define PCLK CCLK/4
void EnterCriticalSection( void );
void ExitCriticalSection( void );
typedef uint8_t BOOL;
typedef unsigned char UCHAR;
typedef char CHAR;
typedef uint16_t USHORT;
typedef int16_t SHORT;
typedef uint32_t ULONG;
typedef int32_t LONG;
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
#endif

58
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portevent.c vendored Normal file
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/*
* FreeModbus Libary: LPC214X Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
/* ----------------------- Modbus includes ----------------------------------*/
#include "mb.h"
#include "mbport.h"
/* ----------------------- Variables ----------------------------------------*/
static eMBEventType eQueuedEvent;
static BOOL xEventInQueue;
/* ----------------------- Start implementation -----------------------------*/
BOOL
xMBPortEventInit( void )
{
xEventInQueue = FALSE;
return TRUE;
}
BOOL
xMBPortEventPost( eMBEventType eEvent )
{
xEventInQueue = TRUE;
eQueuedEvent = eEvent;
return TRUE;
}
BOOL
xMBPortEventGet( eMBEventType * eEvent )
{
BOOL xEventHappened = FALSE;
if( xEventInQueue )
{
*eEvent = eQueuedEvent;
xEventInQueue = FALSE;
xEventHappened = TRUE;
}
return xEventHappened;
}

218
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/portserial.c vendored Normal file
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/*
* FreeModbus Libary: LPC214X Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
#include <LPC214X.h>
#include "port.h"
/* ----------------------- Modbus includes ----------------------------------*/
#include "mb.h"
#include "mbport.h"
/* ----------------------- static functions ---------------------------------*/
static void
sio_irq( void )
__irq;
static void prvvUARTTxReadyISR( void );
static void prvvUARTRxISR( void );
/* ----------------------- Start implementation -----------------------------*/
void vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable )
{
if( xRxEnable )
{
U1IER |= 0x01;
}
else
{
U1IER &= ~0x01;
}
if( xTxEnable )
{
U1IER |= 0x02;
prvvUARTTxReadyISR( );
}
else
{
U1IER &= ~0x02;
}
}
void
vMBPortClose( void )
{
}
BOOL
xMBPortSerialInit( UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits, eMBParity eParity )
{
BOOL bInitialized = TRUE;
USHORT cfg = 0;
ULONG reload = ( ( PCLK / ulBaudRate ) / 16UL );
volatile char dummy;
( void )ucPORT;
/* Configure UART1 Pins */
PINSEL0 = 0x00050000; /* Enable RxD1 and TxD1 */
switch ( ucDataBits )
{
case 5:
break;
case 6:
cfg |= 0x00000001;
break;
case 7:
cfg |= 0x00000002;
break;
case 8:
cfg |= 0x00000003;
break;
default:
bInitialized = FALSE;
}
switch ( eParity )
{
case MB_PAR_NONE:
break;
case MB_PAR_ODD:
cfg |= 0x00000008;
break;
case MB_PAR_EVEN:
cfg |= 0x00000018;
break;
}
if( bInitialized )
{
U1LCR = cfg; /* Configure Data Bits and Parity */
U1IER = 0; /* Disable UART1 Interrupts */
U1LCR |= 0x80; /* Set DLAB */
U1DLL = reload; /* Set Baud */
U1DLM = reload >> 8; /* Set Baud */
U1LCR &= ~0x80; /* Clear DLAB */
/* Configure UART1 Interrupt */
VICVectAddr0 = ( unsigned long )sio_irq;
VICVectCntl0 = 0x20 | 7;
VICIntEnable = 1 << 7; /* Enable UART1 Interrupt */
dummy = U1IIR; /* Required to Get Interrupts Started */
}
return bInitialized;
}
BOOL
xMBPortSerialPutByte( CHAR ucByte )
{
U1THR = ucByte;
/* Wait till U0THR and U0TSR are both empty */
while( !( U1LSR & 0x20 ) )
{
}
return TRUE;
}
BOOL
xMBPortSerialGetByte( CHAR * pucByte )
{
while( !( U1LSR & 0x01 ) )
{
}
/* Receive Byte */
*pucByte = U1RBR;
return TRUE;
}
void
sio_irq( void )
__irq
{
volatile char dummy;
volatile char IIR;
while( ( ( IIR = U1IIR ) & 0x01 ) == 0 )
{
switch ( IIR & 0x0E )
{
case 0x06: /* Receive Line Status */
dummy = U1LSR; /* Just clear the interrupt source */
break;
case 0x04: /* Receive Data Available */
case 0x0C: /* Character Time-Out */
prvvUARTRxISR( );
break;
case 0x02: /* THRE Interrupt */
prvvUARTTxReadyISR( );
break;
case 0x00: /* Modem Interrupt */
dummy = U1MSR; /* Just clear the interrupt source */
break;
default:
break;
}
}
VICVectAddr = 0xFF; /* Acknowledge Interrupt */
}
/*
* Create an interrupt handler for the transmit buffer empty interrupt
* (or an equivalent) for your target processor. This function should then
* call pxMBFrameCBTransmitterEmpty( ) which tells the protocol stack that
* a new character can be sent. The protocol stack will then call
* xMBPortSerialPutByte( ) to send the character.
*/
static void
prvvUARTTxReadyISR( void )
{
pxMBFrameCBTransmitterEmpty( );
}
/*
* Create an interrupt handler for the receive interrupt for your target
* processor. This function should then call pxMBFrameCBByteReceived( ). The
* protocol stack will then call xMBPortSerialGetByte( ) to retrieve the
* character.
*/
static void
prvvUARTRxISR( void )
{
pxMBFrameCBByteReceived( );
}

81
components/connectivity/Modbus/3rdparty/freemodbus-v1.6/demo/LPC214X/port/porttimer.c vendored Normal file
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/*
* FreeModbus Libary: LPC214X Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* File: $Id$
*/
/* ----------------------- Platform includes --------------------------------*/
#include <LPC214X.h>
#include "port.h"
/* ----------------------- Modbus includes ----------------------------------*/
#include "mb.h"
#include "mbport.h"
/* ----------------------- static functions ---------------------------------*/
static void
prvvTIMERExpiredISR( void )
__irq;
/* ----------------------- Start implementation -----------------------------*/
BOOL
xMBPortTimersInit( USHORT usTim1Timerout50us )
{
// Timer0 Configuration
T0PR = 0; // Prscaler Register = 0
T0PC = 0; // Prscaler Counter = 0
T0TC = 0; // Timer Counter = 0
T0MR0 = ( PCLK / 20000 ) * usTim1Timerout50us; // Interval of (50us * usTim1Timerout50us)
T0MCR = 3; // Bit 0 = 1 - Interruption on MR0
// Bit 1 = 1 - Reset on MR0
T0TCR = 0; // Timer Counter and Prescale Counter Disabled
// Configure Timer0 Interruption
VICVectAddr1 = ( unsigned int )prvvTIMERExpiredISR; // Timer0 Interruption - Priority 1
VICVectCntl1 = 0x20 | 4;
VICIntEnable = ( 1 << 4 ); // Enable Timer0 Interruption
return TRUE;
}
void
vMBPortTimersEnable( )
{
T0TCR = 0x02; // Disable Timer and Reset Counter
T0TCR = 0x01; // Enable Timer
}
void
vMBPortTimersDisable( )
{
T0TCR = 0x02; // Disable Timer and Reset Counter
}
static void
prvvTIMERExpiredISR( void )
__irq
{
( void )pxMBPortCBTimerExpired( );
T0IR = 0xFF;
VICVectAddr = 0xFF; // Acknowledge Interrupt
}