142 lines
5.4 KiB
C
142 lines
5.4 KiB
C
/*!
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\file gd32f20x_nandflash_eval.h
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\brief the header file of nandflash(hynix HY27UF081G2A) driver
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\version 2015-07-15, V1.0.0, firmware for GD32F20x
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\version 2017-06-05, V2.0.0, firmware for GD32F20x
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\version 2018-10-31, V2.1.0, firmware for GD32F20x
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*/
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/*
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Copyright (c) 2018, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32F20X_NANDFLASH_EVAL_H
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#define GD32F20X_NANDFLASH_EVAL_H
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#include "gd32f20x.h"
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/* NAND area definition */
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/* A16 = CLE high command area */
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#define EXMC_CMD_AREA (uint32_t)(1<<16)
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/* A17 = ALE high address area */
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#define EXMC_ADDR_AREA (uint32_t)(1<<17)
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/* data area */
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#define EXMC_DATA_AREA ((uint32_t)0x00000000)
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/* NAND memory command (hynix HY27UF081G2A) */
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#define NAND_CMD_READ1_1ST ((uint8_t)0x00)
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#define NAND_CMD_READ1_2ND ((uint8_t)0x30)
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#define NAND_CMD_WRITE_1ST ((uint8_t)0x80)
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#define NAND_CMD_WRITE_2ND ((uint8_t)0x10)
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#define NAND_CMD_ERASE_1ST ((uint8_t)0x60)
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#define NAND_CMD_ERASE_2ND ((uint8_t)0xD0)
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#define NAND_CMD_READID ((uint8_t)0x90)
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#define NAND_CMD_STATUS ((uint8_t)0x70)
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#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
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#define NAND_CMD_RESET ((uint8_t)0xFF)
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/* NAND memory status */
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#define NAND_BUSY ((uint8_t)0x00)
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#define NAND_ERROR ((uint8_t)0x01)
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#define NAND_READY ((uint8_t)0x40)
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#define NAND_TIMEOUT_ERROR ((uint8_t)0x80)
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/* NAND memory parameters */
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/* NAND zone count */
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#define NAND_ZONE_COUNT ((uint16_t)0x0001U)
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/* 1024 block per zone */
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#define NAND_ZONE_SIZE ((uint16_t)0x0400U)
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/* 64 pages per block */
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#define NAND_BLOCK_SIZE ((uint16_t)0x0040U)
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/* 2 * 1024 bytes per page */
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#define NAND_PAGE_SIZE ((uint16_t)0x0800U)
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/* last 64 bytes as spare area */
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#define NAND_SPARE_AREA_SIZE ((uint16_t)0x0040U)
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/* total page size = page size + spare are size */
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#define NAND_PAGE_TOTAL_SIZE (NAND_PAGE_SIZE + NAND_SPARE_AREA_SIZE)
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/* max read and write address */
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#define NAND_MAX_ADDRESS (((NAND_ZONE_COUNT*NAND_ZONE_SIZE)*NAND_BLOCK_SIZE)*NAND_PAGE_SIZE)
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/* block count */
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#define NAND_BLOCK_COUNT 1024U
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/* NAND memory address computation */
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#define ADDR_1ST_CYCLE(ADDR) (uint8_t)((ADDR)& 0xFFU)
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#define ADDR_2ND_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF00U) >> 8)
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#define ADDR_3RD_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF0000U) >> 16)
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#define ADDR_4TH_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF000000U) >> 24)
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/* define return value of functions */
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#define NAND_OK 0U
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#define NAND_FAIL 1U
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/* NAND id structure */
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typedef struct
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{
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uint8_t maker_id;
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uint8_t device_id;
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uint8_t third_id;
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uint8_t fourth_id;
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}nand_id_struct;
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typedef struct
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{
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uint16_t zone;
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uint16_t block;
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uint16_t page;
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uint16_t page_in_offset;
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} nand_address_struct;
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/* read NAND flash ID */
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void nand_read_id(nand_id_struct* nand_id);
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/* nand flash peripheral initialize */
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void exmc_nandflash_init(uint32_t nand_bank);
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/* format nand flash */
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uint8_t nand_format(void);
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/* write the main area information for the specified logic addresses */
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uint8_t nand_write(uint32_t memaddr, uint8_t *pwritebuf, uint32_t bytecount);
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/* read the main area information for the specified logic addresses */
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uint8_t nand_read(uint32_t memaddr, uint8_t *preadbuf, uint32_t bytecount);
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/* reset nand flash */
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uint8_t nand_reset(void);
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/* fill the buffer with specified value */
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void fill_buffer_nand(uint8_t *pbuffer, uint16_t buffer_lenght, uint32_t value);
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/* read the spare area information for the specified pages addresses */
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uint8_t exmc_nand_readspare(uint8_t *pbuffer, nand_address_struct address, uint16_t bytecount);
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/* write the spare area information for the specified pages addresses */
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uint8_t exmc_nand_writespare(uint8_t *pbuffer, nand_address_struct address, uint16_t bytecount);
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#endif /* GD32F20X_NANDFLASH_EVAL_H */
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