82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
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#ifndef _PROJ_CONFIG_H_
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#define _PROJ_CONFIG_H_
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#define DISABLE 0
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#define ENABLE 1
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#define CHIP_SLAVE 0 //As a device for the master chip
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#define CHIP_MCU 1
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#define USE_PLL ENABLE
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#ifdef USE_PLL
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#define SOURCE_CLOCK (160000000)
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#else
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#define SOURCE_CLOCK (40000000)
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#endif
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#define SYSTEM_CLOCK (SOURCE_CLOCK)
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#define AHBUS_CLOCK (SYSTEM_CLOCK)
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#define APBUS0_CLOCK (AHBUS_CLOCK/2)
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#define APBUS1_CLOCK (AHBUS_CLOCK/4)
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#define APBUS2_CLOCK (AHBUS_CLOCK)
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#if (USE_PLL == ENABLE)
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#define QSPI_CLK (APBUS2_CLOCK/4)
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#else
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#define QSPI_CLK (APBUS2_CLOCK/2)
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#endif
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#if ((AHBUS_CLOCK % APBUS0_CLOCK) || (AHBUS_CLOCK % APBUS1_CLOCK))
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#error "AHBUS_CLOCK % APBUS0_CLOCK != 0 or AHBUS_CLOCK % APBUS1_CLOCK != 0"
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#endif
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/*
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* Module enable/disable control
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*/
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#define FLASH_XIP ENABLE
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#define CHIP_ROLE CHIP_MCU
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#define RTOS_FREERTOS 0
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#define RTOS_ALIOS 1
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#define RTOS_RT_THREAD 2
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#define RTOS_UCOS 3
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#define RTOS_TENCENT_OS 4
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#define __CONFIG_OS_KERNEL RTOS_TENCENT_OS
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#define DEBUG_MODE
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#define FULL_ASSERT ENABLE
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#define PRINT_TO_RTT 0 // 1: print to segger rtt 0: print to uart
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/*
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* in arm-none-eabi-gcc/7.3, BIG_ENDIAN is defined as 4321 default.
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*/
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#ifdef BIG_ENDIAN
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#undef BIG_ENDIAN
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#endif
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#define LITTLE_ENDIAN 1234
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#define BLE_SUPPORT DISABLE
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/*
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* Hardware config
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*/
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#define CFG_UART0_TX_BUF_SIZE 256
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#define CFG_UART0_RX_BUF_SIZE 256
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#define CFG_UART1_TX_BUF_SIZE 128
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#define CFG_UART1_RX_BUF_SIZE 256
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#define CFG_UART_BAUDRATE_LOG 2000000
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#define CFG_UART_BAUDRATE_CONSOLE 2000000
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#endif /* _PROJ_CONFIG_H_ */
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