
* add basic synopsys arc em processor support * add basic arc nsim em virtual board support * add basic arc mwdt toolchain support Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
314 lines
13 KiB
C
314 lines
13 KiB
C
/*----------------------------------------------------------------------------
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* Tencent is pleased to support the open source community by making TencentOS
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* available.
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*
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* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
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* If you have downloaded a copy of the TencentOS binary from Tencent, please
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* note that the TencentOS binary is licensed under the BSD 3-Clause License.
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*
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* If you have downloaded a copy of the TencentOS source code from Tencent,
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* please note that TencentOS source code is licensed under the BSD 3-Clause
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* License, except for the third-party components listed below which are
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* subject to different license terms. Your integration of TencentOS into your
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* own projects may require compliance with the BSD 3-Clause License, as well
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* as the other licenses applicable to the third-party components included
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* within TencentOS.
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*---------------------------------------------------------------------------*/
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016-2018 Armink (armink.ztl@gmail.com)
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* 'Software'), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _PORT_H_
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#define _PORT_H_
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#if TOS_CFG_FAULT_BACKTRACE_EN > 0u
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typedef struct port_fault_regs {
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union {
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/* System Handler Control and State Register (0xE000ED24) */
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uint32_t value;
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struct {
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/* Read as 1 if memory management fault is active */
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uint32_t MEMFAULTACT : 1;
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/* Read as 1 if bus fault exception is active */
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uint32_t BUSFAULTACT : 1;
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uint32_t UnusedBits1 : 1;
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/* Read as 1 if usage fault exception is active */
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uint32_t USGFAULTACT : 1;
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uint32_t UnusedBits2 : 3;
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/* Read as 1 if SVC exception is active */
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uint32_t SVCALLACT : 1;
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/* Read as 1 if debug monitor exception is active */
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uint32_t MONITORACT : 1;
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uint32_t UnusedBits3 : 1;
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/* Read as 1 if PendSV exception is active */
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uint32_t PENDSVACT : 1;
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/* Read as 1 if SYSTICK exception is active */
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uint32_t SYSTICKACT : 1;
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/* Usage fault pended; usage fault started but was replaced by a higher-priority exception */
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uint32_t USGFAULTPENDED : 1;
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/* Memory management fault pended; memory management fault started but was replaced by a
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higher-priority exception */
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uint32_t MEMFAULTPENDED : 1;
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/* Bus fault pended; bus fault handler was started but was replaced by a higher-priority
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exception */
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uint32_t BUSFAULTPENDED : 1;
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/* SVC pended; SVC was started but was replaced by a higher-priority exception */
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uint32_t SVCALLPENDED : 1;
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/* Memory management fault handler enable */
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uint32_t MEMFAULTENA : 1;
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/* Bus fault handler enable */
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uint32_t BUSFAULTENA : 1;
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/* Usage fault handler enable */
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uint32_t USGFAULTENA : 1;
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} bits;
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} syshndctrl;
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union {
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uint32_t value;
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struct {
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union {
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/* Memory Management Fault Status Register (0xE000ED28) */
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uint8_t value;
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struct {
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/* Instruction access violation */
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uint8_t IACCVIOL : 1;
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/* Data access violation */
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uint8_t DACCVIOL : 1;
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uint8_t UnusedBits : 1;
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/* Unstacking error */
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uint8_t MUNSTKERR : 1;
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/* Stacking error */
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uint8_t MSTKERR : 1;
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/* Floating-point lazy state preservation (M4/M7) */
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uint8_t MLSPERR : 1;
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uint8_t UnusedBits2 : 1;
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/* Indicates the MMAR is valid */
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uint8_t MMARVALID : 1;
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} bits;
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} mfsr;
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union {
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/* Bus Fault Status Register (0xE000ED29) */
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uint8_t value;
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struct {
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/* Instruction access violation */
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uint8_t IBUSERR : 1;
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/* Precise data access violation */
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uint8_t PRECISERR : 1;
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/* Imprecise data access violation */
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uint8_t IMPREISERR : 1;
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/* Unstacking error */
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uint8_t UNSTKERR : 1;
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/* Stacking error */
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uint8_t STKERR : 1;
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/* Floating-point lazy state preservation (M4/M7) */
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uint8_t LSPERR : 1;
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uint8_t UnusedBits : 1;
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/* Indicates BFAR is valid */
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uint8_t BFARVALID : 1;
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} bits;
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} bfsr;
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union {
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/* Usage Fault Status Register (0xE000ED2A) */
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uint16_t value;
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struct {
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/* Attempts to execute an undefined instruction */
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uint16_t UNDEFINSTR : 1;
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/* Attempts to switch to an invalid state (e.g., ARM) */
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uint16_t INVSTATE : 1;
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/* Attempts to do an exception with a bad value in the EXC_RETURN number */
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uint16_t INVPC : 1;
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/* Attempts to execute a coprocessor instruction */
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uint16_t NOCP : 1;
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uint16_t UnusedBits : 4;
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/* Indicates that an unaligned access fault has taken place */
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uint16_t UNALIGNED : 1;
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/* Indicates a divide by zero has taken place (can be set only if DIV_0_TRP is set) */
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uint16_t DIVBYZERO0 : 1;
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} bits;
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} ufsr;
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} part;
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} cfsr;
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/* Memory Management Fault Address Register (0xE000ED34) */
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uint32_t mmar;
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/* Bus Fault Manage Address Register (0xE000ED38) */
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uint32_t bfar;
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union {
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/* Hard Fault Status Register (0xE000ED2C) */
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uint32_t value;
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struct {
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uint32_t UnusedBits : 1;
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/* Indicates hard fault is caused by failed vector fetch */
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uint32_t VECTBL : 1;
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uint32_t UnusedBits2 : 28;
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/* Indicates hard fault is taken because of bus fault/memory management fault/usage fault */
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uint32_t FORCED : 1;
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/* Indicates hard fault is triggered by debug event */
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uint32_t DEBUGEVT : 1;
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} bits;
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} hfsr;
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union {
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/* Debug Fault Status Register (0xE000ED30) */
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uint32_t value;
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struct {
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/* Halt requested in NVIC */
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uint32_t HALTED : 1;
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/* BKPT instruction executed */
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uint32_t BKPT : 1;
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/* DWT match occurred */
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uint32_t DWTTRAP : 1;
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/* Vector fetch occurred */
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uint32_t VCATCH : 1;
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/* EDBGRQ signal asserted */
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uint32_t EXTERNAL : 1;
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} bits;
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} dfsr;
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/* Auxiliary Fault Status Register (0xE000ED3C), Vendor controlled (optional) */
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uint32_t afsr;
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} port_fault_regs_t;
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enum fault_info {
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FAULT_INFO_ASSERT_ON_THREAD,
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FAULT_INFO_HFSR_VECTBL,
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FAULT_INFO_MFSR_IACCVIOL,
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FAULT_INFO_MFSR_DACCVIOL,
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FAULT_INFO_MFSR_MUNSTKERR,
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FAULT_INFO_MFSR_MSTKERR,
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FAULT_INFO_MFSR_MLSPERR,
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FAULT_INFO_BFSR_IBUSERR,
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FAULT_INFO_BFSR_PRECISERR,
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FAULT_INFO_BFSR_IMPREISERR,
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FAULT_INFO_BFSR_UNSTKERR,
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FAULT_INFO_BFSR_STKERR,
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FAULT_INFO_BFSR_LSPERR,
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FAULT_INFO_UFSR_UNDEFINSTR,
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FAULT_INFO_UFSR_INVSTATE,
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FAULT_INFO_UFSR_INVPC,
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FAULT_INFO_UFSR_NOCP,
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FAULT_INFO_UFSR_UNALIGNED,
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FAULT_INFO_UFSR_DIVBYZERO0,
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FAULT_INFO_DFSR_HALTED,
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FAULT_INFO_DFSR_BKPT,
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FAULT_INFO_DFSR_DWTTRAP,
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FAULT_INFO_DFSR_VCATCH,
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FAULT_INFO_DFSR_EXTERNAL,
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FAULT_INFO_MMAR,
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FAULT_INFO_BFAR,
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};
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static const char *const fault_msg[] = {
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[FAULT_INFO_ASSERT_ON_THREAD] = "Assert on thread %s\n",
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[FAULT_INFO_HFSR_VECTBL] = "Hard fault is caused by failed vector fetch\n",
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[FAULT_INFO_MFSR_IACCVIOL] = "Memory management fault: instruction access violation\n",
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[FAULT_INFO_MFSR_DACCVIOL] = "Memory management fault: data access violation\n",
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[FAULT_INFO_MFSR_MUNSTKERR] = "Memory management fault: unstacking error\n",
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[FAULT_INFO_MFSR_MSTKERR] = "Memory management fault: stacking error\n",
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[FAULT_INFO_MFSR_MLSPERR] = "Memory management fault: floating-point lazy state preservation\n",
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[FAULT_INFO_BFSR_IBUSERR] = "Bus fault: instruction access violation\n",
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[FAULT_INFO_BFSR_PRECISERR] = "Bus fault: precise data access violation\n",
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[FAULT_INFO_BFSR_IMPREISERR] = "Bus fault: imprecise data access violation\n",
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[FAULT_INFO_BFSR_UNSTKERR] = "Bus fault: unstacking error\n",
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[FAULT_INFO_BFSR_STKERR] = "Bus fault: stacking error\n",
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[FAULT_INFO_BFSR_LSPERR] = "Bus fault: floating-point lazy state preservation\n",
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[FAULT_INFO_UFSR_UNDEFINSTR] = "Usage fault: undefined instruction\n",
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[FAULT_INFO_UFSR_INVSTATE] = "Usage fault: invalid state (e.g., ARM)\n",
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[FAULT_INFO_UFSR_INVPC] = "Usage fault: invalid EXC_RETURN\n",
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[FAULT_INFO_UFSR_NOCP] = "Usage fault: coprocessor instruction\n",
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[FAULT_INFO_UFSR_UNALIGNED] = "Usage fault: unaligned access\n",
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[FAULT_INFO_UFSR_DIVBYZERO0] = "Usage fault: divide by zero(can be set only if DIV_0_TRP is set)\n",
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[FAULT_INFO_DFSR_HALTED] = "Debug fault: halt requested in NVIC\n",
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[FAULT_INFO_DFSR_BKPT] = "Debug fault: BKPT instruction executed\n",
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[FAULT_INFO_DFSR_DWTTRAP] = "Debug fault: DWT match occurred\n",
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[FAULT_INFO_DFSR_VCATCH] = "Debug fault: Vector fetch occurred\n",
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[FAULT_INFO_DFSR_EXTERNAL] = "Debug fault: EDBGRQ signal asserted\n",
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[FAULT_INFO_MMAR] = "The memory management fault occurred address is %08x\n",
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[FAULT_INFO_BFAR] = "The bus fault occurred address is %08x\n",
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};
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__PORT__ void HardFault_Handler(void);
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__PORT__ void port_fault_diagnosis(void);
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#endif
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#if defined(TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT) && (TOS_CFG_CPU_LEAD_ZEROS_ASM_PRESENT == 1u)
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__PORT__ uint32_t port_clz(uint32_t val);
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#endif
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__PORT__ void port_int_disable(void);
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__PORT__ void port_int_enable(void);
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__PORT__ cpu_cpsr_t port_cpsr_save(void);
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__PORT__ void port_cpsr_restore(cpu_cpsr_t cpsr);
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__PORT__ void port_cpu_reset(void);
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__PORT__ uint32_t port_cpu_clz(uint32_t);
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__PORT__ void port_sched_start(void) __NO_RETURN__;
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__PORT__ void port_context_switch(void);
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__PORT__ void port_irq_context_switch(void);
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__PORT__ void port_systick_config(uint32_t cycle_per_tick);
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__PORT__ void port_systick_priority_set(uint32_t prio);
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#if TOS_CFG_TICKLESS_EN > 0u
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__PORT__ void port_systick_resume(void);
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__PORT__ void port_systick_suspend(void);
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__PORT__ void port_systick_reload(uint32_t cycle_per_tick);
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__PORT__ void port_systick_pending_reset(void);
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__PORT__ k_time_t port_systick_max_delay_millisecond(void);
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#endif
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#if TOS_CFG_PWR_MGR_EN > 0u
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__PORT__ void port_sleep_mode_enter(void);
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__PORT__ void port_stop_mode_enter(void);
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__PORT__ void port_standby_mode_enter(void);
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#endif
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#endif /* _PORT_H_ */
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