01b178164d
As nrf24l01 datasheet show, this should be 'set to 1', not 'clear to 0', so nrf_clear_reg_bit -> nrf_set_reg_bit
465 lines
8.1 KiB
C
465 lines
8.1 KiB
C
#include "nrf24l01.h"
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#include "tos_k.h"
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static nrf_init_t g_nrf;
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int nrf_init(nrf_init_t *ni) {
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memcpy(&g_nrf, ni, sizeof(nrf_init_t));
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return g_nrf.init(g_nrf.private);
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}
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void nrf_flush_rx() {
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nrf_write_cmd(CMD_FLUSH_RX);
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}
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void nrf_flush_tx() {
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nrf_write_cmd(CMD_FLUSH_TX);
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}
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void nrf_delay(uint32_t delay) {
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tos_task_delay(delay);
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}
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int nrf_powerup() {
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return nrf_set_reg_bit(REG_CONFIG, PWR_UP);
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}
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int nrf_powerdown() {
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return nrf_clear_reg_bit(REG_CONFIG, PWR_UP);
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}
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void nrf_enable_rx_irq() {
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nrf_clear_reg_bit(REG_CONFIG, MASK_RX_DR);
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}
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void nrf_disable_rx_irq() {
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nrf_set_reg_bit(REG_CONFIG, MASK_RX_DR);
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}
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void nrf_enable_tx_irq() {
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nrf_clear_reg_bit(REG_CONFIG, MASK_TX_DS);
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}
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void nrf_disable_tx_irq() {
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nrf_set_reg_bit(REG_CONFIG, MASK_TX_DS);
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}
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void nrf_enable_max_rt_irq() {
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nrf_clear_reg_bit(REG_CONFIG, MASK_MAX_RT);
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}
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void nrf_disable_max_rt_irq() {
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nrf_set_reg_bit(REG_CONFIG, MASK_MAX_RT);
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}
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void nrf_set_rf_channel(uint8_t channel) {
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channel &= 0x7F;
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nrf_write_reg_byte(REG_RF_CH, channel);
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}
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int nrf_set_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t addrlen) {
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if(addrlen >= 6 || pipe >= 6) {
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return -1;
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}
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if(pipe >= 2) {
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addrlen = 1;
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}
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uint8_t reg = REG_RX_ADDR_P0 + pipe;
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return nrf_write_reg(reg, addr, addrlen);
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}
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int nrf_get_addrlen() {
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uint8_t v = 0;
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uint8_t addrlen = 0;
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if(0 != nrf_read_reg_byte(REG_SETUP_AW, &v)) {
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return 0;
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}
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v &= 0x03;
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switch(v) {
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case AW_3BYTES:
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addrlen = 3;
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break;
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case AW_4BYTES:
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addrlen = 4;
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break;
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case AW_5BYTES:
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addrlen = 5;
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break;
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default:
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break;
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}
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return addrlen;
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}
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int nrf_get_rxaddr(uint8_t pipe, uint8_t *addr, uint8_t *addrlen) {
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*addrlen = nrf_get_addrlen();
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uint8_t reg = REG_RX_ADDR_P0 + pipe;
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return nrf_read_reg(reg, addr, *addrlen);
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}
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int nrf_get_txaddr(uint8_t *addr, uint8_t *addrlen) {
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*addrlen = nrf_get_addrlen();
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return nrf_read_reg(REG_TX_ADDR, addr, *addrlen);
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}
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int nrf_set_txaddr(uint8_t *addr, uint8_t addrlen) {
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if(addrlen >= 6) {
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return -1;
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}
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return nrf_write_reg(REG_TX_ADDR, addr, addrlen);
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}
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int nrf_enable_rxaddr(uint8_t pipe) {
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if(pipe >= 6) {
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return -1;
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}
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nrf_set_reg_bit(REG_EN_RXADDR, pipe);
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return 0;
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}
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void nrf_reset_registers() {
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nrf_write_reg_byte(REG_CONFIG, _BV(EN_CRC));
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nrf_write_reg_byte(REG_EN_AA, _BV(ENAA_P0) | _BV(ENAA_P1) | _BV(ENAA_P2) | _BV(ENAA_P3) | _BV(ENAA_P4) | _BV(ENAA_P5));
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nrf_write_reg_byte(REG_EN_RXADDR, _BV(ERX_P0) | _BV(ERX_P1));
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nrf_write_reg_byte(REG_SETUP_AW, _VV(AW_5BYTES, AW));
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nrf_write_reg_byte(REG_SETUP_RETR, _VV(ARD_250us, ARD) | _VV(ARC_3, ARC));
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nrf_write_reg_byte(REG_RF_CH, 0b00000010);
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nrf_write_reg_byte(REG_RF_SETUP, _BV(RF_DR) | _VV(RF_PWR_0dBm, RF_PWR));
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uint8_t status = 0;
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nrf_read_reg_byte(REG_STATUS, &status);
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if(status & _BV(RX_DR)) {
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nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
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}
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if(status & _BV(TX_DS)) {
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nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
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}
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if(status & _BV(MAX_RT)) {
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nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
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}
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nrf_write_reg_byte(REG_RX_PW_P0, 0);
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nrf_write_reg_byte(REG_RX_PW_P1, 0);
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nrf_write_reg_byte(REG_RX_PW_P2, 0);
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nrf_write_reg_byte(REG_RX_PW_P3, 0);
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nrf_write_reg_byte(REG_RX_PW_P4, 0);
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nrf_write_reg_byte(REG_RX_PW_P5, 0);
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nrf_write_reg_byte(REG_DYNPD, 0);
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nrf_write_reg_byte(REG_FEATURE, 0);
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uint8_t addrp0[] = {0xE7, 0xE7, 0xE7, 0xE7, 0xE7};
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uint8_t addrp1[] = {0xC2, 0xC2, 0xC2, 0xC2, 0xC2};
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nrf_write_reg(REG_TX_ADDR, addrp0, 5);
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nrf_write_reg(REG_RX_ADDR_P0, addrp0, 5);
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nrf_write_reg(REG_RX_ADDR_P1, addrp1, 5);
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nrf_write_reg_byte(REG_RX_ADDR_P2, 0xC3);
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nrf_write_reg_byte(REG_RX_ADDR_P3, 0xC4);
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nrf_write_reg_byte(REG_RX_ADDR_P4, 0xC5);
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nrf_write_reg_byte(REG_RX_ADDR_P5, 0xC6);
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nrf_flush_rx();
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nrf_flush_tx();
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}
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void nrf_set_standby_mode() {
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nrf_ce(0);
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nrf_powerdown();
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nrf_reset_registers();
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nrf_delay(10);
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nrf_powerup();
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nrf_delay(10); // 10m > 1.5~2ms
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}
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void nrf_set_receive_mode() {
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nrf_set_reg_bit(REG_CONFIG, PRIM_RX);
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nrf_ce(1);
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nrf_delay(1); // 1ms > 120~130us
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}
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void nrf_set_send_mode() {
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nrf_clear_reg_bit(REG_CONFIG, PRIM_RX);
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nrf_ce(1);
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nrf_delay(1); // 1ms > 120~130us
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}
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void nrf_enable_autoack(uint8_t pipe) {
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if(pipe >= 6) {
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return ;
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}
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nrf_set_reg_bit(REG_EN_AA, pipe);
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}
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void nrf_disable_autoack(uint8_t pipe) {
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if(pipe >= 6) {
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return ;
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}
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nrf_clear_reg_bit(REG_EN_AA, pipe);
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}
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void nrf_set_datarate(uint8_t dr) {
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if(NRF_1Mbps == dr) {
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dr = 0;
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} else if(NRF_2Mbps == dr) {
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nrf_write_reg_byte(REG_RF_SETUP, 0b00001110);
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nrf_write_reg_byte(REG_SETUP_RETR, 0b00010011);
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} else {
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}
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}
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int nrf_enable_dynamic_payload(uint8_t pipe) {
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if(pipe >= 6) {
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return -1;
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}
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uint8_t feature = 0;
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uint8_t dynpd = 0;
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nrf_read_reg_byte(REG_FEATURE, &feature);
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nrf_read_reg_byte(REG_DYNPD, &dynpd);
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feature |= _BV(EN_DPL);
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dynpd |= _BV(pipe);
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nrf_write_reg_byte(REG_DYNPD, dynpd);
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nrf_write_reg_byte(REG_FEATURE, feature);
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return 0;
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}
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int nrf_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
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// 读数据通道
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uint8_t status = 0;
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nrf_read_reg_byte(REG_STATUS, &status);
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*pipe = ((status>>1) & 0x07);
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// 读数据长度
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nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
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// 读数据
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nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
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// 清除数据标志位
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nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
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// 清空接收缓冲区
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nrf_flush_rx();
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if(*pipe >= 6) {
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*len = 0;
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}
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return 0;
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}
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int nrf_poll_read_payload(uint8_t *buf, uint8_t *len, uint8_t *pipe) {
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while(1) {
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// 读数据通道
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uint8_t status = 0;
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nrf_read_reg_byte(REG_STATUS, &status);
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if((status & _BV(RX_DR)) == 0) {
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nrf_delay(1);
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continue;
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}
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*pipe = ((status>>1) & 0x07);
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break;
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}
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// 读数据长度
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nrf_cmd_read_byte(CMD_R_RX_PL_WID, len);
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// 读数据
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nrf_cmd_read(CMD_R_RX_PAYLOAD, buf, *len);
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// 清除数据标志位
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nrf_set_reg_bit(REG_STATUS, _BV(RX_DR));
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// 清空接收缓冲区
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nrf_flush_rx();
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if(*pipe >= 6) {
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*len = 0;
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}
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return 0;
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}
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int nrf_write_payload(uint8_t *buf, uint8_t len) {
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nrf_write_cmd_and_data(CMD_W_TX_PAYLOAD_NOACK, buf, len);
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while(1) {
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uint8_t status = 0;
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nrf_read_reg_byte(REG_STATUS, &status);
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if(status & _BV(TX_DS)) {
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nrf_delay(1);
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}
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nrf_set_reg_bit(REG_STATUS, _BV(MAX_RT));
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nrf_set_reg_bit(REG_STATUS, _BV(TX_DS));
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break;
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}
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return 0;
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}
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void nrf_ce(uint8_t mode) {
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g_nrf.ce(mode);
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}
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void nrf_csn(uint8_t mode) {
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g_nrf.csn(mode);
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}
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int nrf_read_reg(uint8_t reg, uint8_t *buf, uint8_t len) {
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uint8_t cmd = CMD_R_REGISTER | reg;
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nrf_csn(0);
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g_nrf.spi_send(&cmd, 1);
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g_nrf.spi_recv(buf, len);
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nrf_csn(1);
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return 0;
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}
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int nrf_write_reg(uint8_t reg, uint8_t *buf, uint8_t len)
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{
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uint8_t cmd = CMD_W_REGISTER | reg;
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nrf_csn(0);
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g_nrf.spi_send(&cmd, 1);
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g_nrf.spi_send(buf, len);
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nrf_csn(1);
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return 0;
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}
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int nrf_cmd_read(uint8_t cmd, uint8_t *data, uint8_t len) {
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nrf_csn(0);
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g_nrf.spi_send(&cmd, 1);
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g_nrf.spi_recv(data, len);
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nrf_csn(1);
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return 0;
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}
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int nrf_write_cmd_and_data(uint8_t cmd, uint8_t *data, uint8_t len) {
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nrf_csn(0);
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g_nrf.spi_send(&cmd, 1);
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g_nrf.spi_send(data, len);
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nrf_csn(1);
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return 0;
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}
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int nrf_cmd_read_byte(uint8_t cmd, uint8_t *data) {
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return nrf_cmd_read(cmd, data, 1);
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}
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int nrf_write_cmd(uint8_t cmd) {
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nrf_csn(0);
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g_nrf.spi_send(&cmd, 1);
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nrf_csn(1);
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return 0;
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}
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int nrf_read_reg_byte(uint8_t reg, uint8_t *v) {
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return nrf_read_reg(reg, v, 1);
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}
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int nrf_write_reg_byte(uint8_t reg, uint8_t byte) {
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return nrf_write_reg(reg, &byte, 1);
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}
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int nrf_clear_reg_bit(uint8_t reg, uint8_t bit) {
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uint8_t v = 0;
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if(0 != nrf_read_reg_byte(reg, &v)) {
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return -1;
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}
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v &= ~_BV(bit);
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if(0 != nrf_write_reg_byte(reg, v)) {
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return -1;
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}
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return 0;
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}
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int nrf_set_reg_bit(uint8_t reg, uint8_t bit) {
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uint8_t v = 0;
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if(0 != nrf_read_reg_byte(reg, &v)) {
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return -1;
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}
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v |= _BV(bit);
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if(0 != nrf_write_reg_byte(reg, v)) {
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return -1;
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}
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return 0;
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}
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