237 lines
6.7 KiB
C
237 lines
6.7 KiB
C
/**
|
|
******************************************************************************
|
|
* @file main.c
|
|
* @author fire
|
|
* @version V1.0
|
|
* @date 2019-xx-xx
|
|
* @brief eth
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* 实验平台:野火 STM32 F429 开发板
|
|
* 论坛 :http://www.firebbs.cn
|
|
* 淘宝 :http://firestm32.taobao.com
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
#include "bsp_eth.h"
|
|
#include "bsp_led.h"
|
|
#include "main.h"
|
|
#include "tos_k.h"
|
|
|
|
/* Global Ethernet handle */
|
|
ETH_HandleTypeDef heth;
|
|
|
|
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
|
#pragma data_alignment=4
|
|
#endif
|
|
__ALIGN_BEGIN ETH_DMADescTypeDef DMARxDscrTab[ETH_RXBUFNB] __ALIGN_END;/* Ethernet Rx MA Descriptor */
|
|
|
|
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
|
#pragma data_alignment=4
|
|
#endif
|
|
__ALIGN_BEGIN ETH_DMADescTypeDef DMATxDscrTab[ETH_TXBUFNB] __ALIGN_END;/* Ethernet Tx DMA Descriptor */
|
|
|
|
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
|
#pragma data_alignment=4
|
|
#endif
|
|
__ALIGN_BEGIN uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE] __ALIGN_END; /* Ethernet Receive Buffer */
|
|
|
|
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
|
#pragma data_alignment=4
|
|
#endif
|
|
__ALIGN_BEGIN uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE] __ALIGN_END; /* Ethernet Transmit Buffer */
|
|
|
|
|
|
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
|
|
{
|
|
GPIO_InitTypeDef GPIO_InitStruct;
|
|
if(ethHandle->Instance==ETH)
|
|
{
|
|
/* USER CODE BEGIN ETH_MspInit 0 */
|
|
|
|
/* USER CODE END ETH_MspInit 0 */
|
|
// /* Enable Peripheral clock */
|
|
// __HAL_RCC_ETH_CLK_ENABLE();
|
|
|
|
/**ETH GPIO Configuration
|
|
PC1 ------> ETH_MDC
|
|
PA1 ------> ETH_REF_CLK
|
|
PA2 ------> ETH_MDIO
|
|
PA7 ------> ETH_CRS_DV
|
|
PC4 ------> ETH_RXD0
|
|
PC5 ------> ETH_RXD1
|
|
PB11 ------> ETH_TX_EN
|
|
PG13 ------> ETH_TXD0
|
|
PG14 ------> ETH_TXD1
|
|
*/
|
|
GPIO_InitStruct.Pin = ETH_MDC_Pin|ETH_RXD0_Pin|ETH_RXD1_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = ETH_REF_CLK_Pin|ETH_MDIO_Pin|ETH_CRS_DV_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = ETH_TX_EN_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
|
HAL_GPIO_Init(ETH_TX_EN_GPIO_Port, &GPIO_InitStruct);
|
|
|
|
GPIO_InitStruct.Pin = ETH_TXD0_Pin|ETH_TXD1_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
|
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
|
|
|
/* USER CODE BEGIN ETH_MspInit 1 */
|
|
/* Enable the Ethernet global Interrupt */
|
|
HAL_NVIC_SetPriority(ETH_IRQn, 6, 0);
|
|
HAL_NVIC_EnableIRQ(ETH_IRQn);
|
|
|
|
/* Enable ETHERNET clock */
|
|
__HAL_RCC_ETH_CLK_ENABLE();
|
|
/* USER CODE END ETH_MspInit 1 */
|
|
}
|
|
}
|
|
|
|
static void Eth_Reset(void)
|
|
{
|
|
/* PHY RESET: PI1 */
|
|
GPIO_InitTypeDef GPIO_InitStructure;
|
|
__HAL_RCC_GPIOI_CLK_ENABLE();
|
|
|
|
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
|
|
GPIO_InitStructure.Pull = GPIO_PULLUP;
|
|
GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
|
|
GPIO_InitStructure.Pin = GPIO_PIN_1;
|
|
HAL_GPIO_Init(GPIOI, &GPIO_InitStructure);
|
|
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_1, GPIO_PIN_RESET);
|
|
HAL_Delay(5);
|
|
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_1, GPIO_PIN_SET);
|
|
HAL_Delay(5);
|
|
}
|
|
|
|
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* ethHandle)
|
|
{
|
|
if(ethHandle->Instance==ETH)
|
|
{
|
|
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
|
|
|
/* USER CODE END ETH_MspDeInit 0 */
|
|
/* Peripheral clock disable */
|
|
__HAL_RCC_ETH_CLK_DISABLE();
|
|
|
|
/**ETH GPIO Configuration
|
|
PC1 ------> ETH_MDC
|
|
PA1 ------> ETH_REF_CLK
|
|
PA2 ------> ETH_MDIO
|
|
PA7 ------> ETH_CRS_DV
|
|
PC4 ------> ETH_RXD0
|
|
PC5 ------> ETH_RXD1
|
|
PB11 ------> ETH_TX_EN
|
|
PG13 ------> ETH_TXD0
|
|
PG14 ------> ETH_TXD1
|
|
*/
|
|
HAL_GPIO_DeInit(GPIOC, ETH_MDC_Pin|ETH_RXD0_Pin|ETH_RXD1_Pin);
|
|
|
|
HAL_GPIO_DeInit(GPIOA, ETH_REF_CLK_Pin|ETH_MDIO_Pin|ETH_CRS_DV_Pin);
|
|
|
|
HAL_GPIO_DeInit(ETH_TX_EN_GPIO_Port, ETH_TX_EN_Pin);
|
|
|
|
HAL_GPIO_DeInit(GPIOG, ETH_TXD0_Pin|ETH_TXD1_Pin);
|
|
|
|
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
|
|
|
/* USER CODE END ETH_MspDeInit 1 */
|
|
}
|
|
}
|
|
|
|
HAL_StatusTypeDef Bsp_Eth_Init(void)
|
|
{
|
|
HAL_StatusTypeDef ret;
|
|
|
|
uint8_t MACAddr[6] ;
|
|
|
|
HAL_ETH_DeInit(&heth);
|
|
|
|
Eth_Reset();
|
|
|
|
ETH->DMABMR |= ETH_DMABMR_SR;
|
|
|
|
/* Init ETH */
|
|
MACAddr[0] = 0x02;
|
|
MACAddr[1] = 0x00;
|
|
MACAddr[2] = 0x00;
|
|
MACAddr[3] = 0x00;
|
|
MACAddr[4] = 0x00;
|
|
MACAddr[5] = 0x00;
|
|
heth.Instance = ETH;
|
|
heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
|
|
heth.Init.PhyAddress = LAN8720_PHY_ADDRESS;
|
|
heth.Init.MACAddr = &MACAddr[0];
|
|
heth.Init.RxMode = ETH_RXINTERRUPT_MODE; // rx mode
|
|
heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
|
|
heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
|
|
heth.Init.Speed = ETH_SPEED_100M; //speed
|
|
heth.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
|
|
|
|
/* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
|
|
ret = HAL_ETH_Init(&heth);
|
|
if (ret == HAL_OK)
|
|
printf("eth hardware init sucess...\n");
|
|
else
|
|
printf("eth hardware init faild...\n");
|
|
|
|
/* Initialize Tx Descriptors list: Chain Mode */
|
|
HAL_ETH_DMATxDescListInit(&heth, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
|
|
|
|
/* Initialize Rx Descriptors list: Chain Mode */
|
|
HAL_ETH_DMARxDescListInit(&heth, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
|
|
/* Enable MAC and DMA transmission and reception */
|
|
return ret;
|
|
}
|
|
|
|
|
|
void ETH_IRQHandler(void)
|
|
{
|
|
tos_knl_irq_enter();
|
|
|
|
HAL_ETH_IRQHandler(&heth);
|
|
|
|
tos_knl_irq_leave();
|
|
}
|
|
|
|
/**
|
|
* @brief Ethernet Rx Transfer completed callback
|
|
* @param heth: ETH handle
|
|
* @retval None
|
|
*/
|
|
extern k_sem_t s_xSemaphore;
|
|
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
|
|
{
|
|
LED2_TOGGLE;
|
|
|
|
tos_sem_post(&s_xSemaphore);
|
|
|
|
}
|
|
|
|
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth)
|
|
{
|
|
;
|
|
}
|
|
|
|
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
|
|
{
|
|
printf("eth err\n");
|
|
}
|