354 lines
7.8 KiB
ArmAsm
354 lines
7.8 KiB
ArmAsm
#include "riscv_port.h"
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.global port_int_disable
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.global port_int_enable
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.global port_cpsr_save
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.global port_cpsr_restore
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.global port_systick_resume
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.global port_systick_suspend
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.global port_systick_pending_reset
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.global port_sched_start
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.global port_context_switch
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.extern k_curr_task
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.extern k_next_task
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.extern k_task_irq_switch_flag
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.equ MSTATUS_MIE, 0x00000008
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.equ MSTATUS_MPP, 0x00001800
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.equ MIE_MTIE, (1 << 7) // machine mode interrupt enable
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.equ MIP_MTIP, (1 << 7) // machine mode timer interrupt pending
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.equ REGBYTES, 4
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.text
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.align 2
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.type port_int_disable, %function
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port_int_disable:
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csrci mstatus, MSTATUS_MIE
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ret
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.type port_int_enable, %function
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port_int_enable:
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csrsi mstatus, MSTATUS_MIE
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ret
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.type port_cpsr_save, %function
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port_cpsr_save:
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csrrci a0, mstatus, MSTATUS_MIE
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ret
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.type port_cpsr_restore, %function
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port_cpsr_restore:
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csrw mstatus, a0
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ret
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.type port_systick_resume, %function
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port_systick_resume:
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li t0, MIE_MTIE
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csrs mie, t0
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ret
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.type port_systick_suspend, %function
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port_systick_suspend:
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li t0, MIE_MTIE
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csrc mie, t0
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ret
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.type port_systick_pending_reset, %function
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port_systick_pending_reset:
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li t0, MIP_MTIP
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csrc mip, t0
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ret
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.align 2
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.type port_sched_start, %function
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port_sched_start:
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// enable timer interrupt
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li t0, MIE_MTIE
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csrs mie, t0
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// load sp from k_curr_task->sp
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la t0, k_curr_task // t0 = &k_curr_task
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lw t0, (t0) // t0 = &(k_curr_task->sp)
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lw sp, (t0) // sp = k_curr_task->sp
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// save sp to stack
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addi t1, sp, 32*REGBYTES
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sw t1, (t0)
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// restore context
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lw t0, 30*REGBYTES(sp)
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csrw mepc, t0
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lw t0, 31*REGBYTES(sp)
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csrw mstatus, t0
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lw s0, 0*REGBYTES(sp)
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lw s1, 1*REGBYTES(sp)
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lw s2, 2*REGBYTES(sp)
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lw s3, 3*REGBYTES(sp)
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lw s4, 4*REGBYTES(sp)
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lw s5, 5*REGBYTES(sp)
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lw s6, 6*REGBYTES(sp)
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lw s7, 7*REGBYTES(sp)
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lw s8, 8*REGBYTES(sp)
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lw s9, 9*REGBYTES(sp)
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lw s10, 10*REGBYTES(sp)
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lw s11, 11*REGBYTES(sp)
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// caller save
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lw ra, 12*REGBYTES(sp)
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lw gp, 13*REGBYTES(sp)
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lw tp, 14*REGBYTES(sp)
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lw t0, 15*REGBYTES(sp)
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lw t1, 16*REGBYTES(sp)
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lw t2, 17*REGBYTES(sp)
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lw t3, 18*REGBYTES(sp)
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lw t4, 19*REGBYTES(sp)
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lw t5, 20*REGBYTES(sp)
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lw t6, 21*REGBYTES(sp)
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lw a0, 22*REGBYTES(sp)
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lw a1, 23*REGBYTES(sp)
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lw a2, 24*REGBYTES(sp)
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lw a3, 25*REGBYTES(sp)
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lw a4, 26*REGBYTES(sp)
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lw a5, 27*REGBYTES(sp)
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lw a6, 28*REGBYTES(sp)
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lw a7, 29*REGBYTES(sp)
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addi sp, sp, 32*REGBYTES
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mret
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.align 2
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.type port_context_switch, %function
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port_context_switch:
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addi sp, sp, -32*REGBYTES
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sw s0, 0*REGBYTES(sp)
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sw s1, 1*REGBYTES(sp)
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sw s2, 2*REGBYTES(sp)
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sw s3, 3*REGBYTES(sp)
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sw s4, 4*REGBYTES(sp)
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sw s5, 5*REGBYTES(sp)
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sw s6, 6*REGBYTES(sp)
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sw s7, 7*REGBYTES(sp)
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sw s8, 8*REGBYTES(sp)
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sw s9, 9*REGBYTES(sp)
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sw s10, 10*REGBYTES(sp)
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sw s11, 11*REGBYTES(sp)
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// caller save
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sw ra, 12*REGBYTES(sp)
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sw gp, 13*REGBYTES(sp)
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sw tp, 14*REGBYTES(sp)
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sw t0, 15*REGBYTES(sp)
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sw t1, 16*REGBYTES(sp)
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sw t2, 17*REGBYTES(sp)
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sw t3, 18*REGBYTES(sp)
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sw t4, 19*REGBYTES(sp)
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sw t5, 20*REGBYTES(sp)
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sw t6, 21*REGBYTES(sp)
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sw a0, 22*REGBYTES(sp)
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sw a1, 23*REGBYTES(sp)
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sw a2, 24*REGBYTES(sp)
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sw a3, 25*REGBYTES(sp)
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sw a4, 26*REGBYTES(sp)
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sw a5, 27*REGBYTES(sp)
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sw a6, 28*REGBYTES(sp)
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sw a7, 29*REGBYTES(sp)
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sw ra, 30*REGBYTES(sp)
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csrr t0, mstatus
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li t1, MSTATUS_MPP
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or t0, t0, t1
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sw t0, 31*REGBYTES(sp)
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// save sp to k_curr_task.sp
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la t0, k_curr_task // t0 = &k_curr_task
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lw t1, (t0)
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sw sp, (t1)
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// switch task
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// k_curr_task = k_next_task
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la t1, k_next_task // t1 = &k_next_task
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lw t1, (t1) // t1 = k_next_task
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sw t1, (t0)
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// load new task sp
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lw sp, (t1)
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// restore context
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lw t0, 30*REGBYTES(sp)
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csrw mepc, t0
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lw t0, 31*REGBYTES(sp)
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csrw mstatus, t0
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lw s0, 0*REGBYTES(sp)
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lw s1, 1*REGBYTES(sp)
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lw s2, 2*REGBYTES(sp)
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lw s3, 3*REGBYTES(sp)
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lw s4, 4*REGBYTES(sp)
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lw s5, 5*REGBYTES(sp)
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lw s6, 6*REGBYTES(sp)
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lw s7, 7*REGBYTES(sp)
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lw s8, 8*REGBYTES(sp)
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lw s9, 9*REGBYTES(sp)
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lw s10, 10*REGBYTES(sp)
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lw s11, 11*REGBYTES(sp)
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// caller save
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lw ra, 12*REGBYTES(sp)
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lw gp, 13*REGBYTES(sp)
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lw tp, 14*REGBYTES(sp)
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lw t0, 15*REGBYTES(sp)
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lw t1, 16*REGBYTES(sp)
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lw t2, 17*REGBYTES(sp)
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lw t3, 18*REGBYTES(sp)
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lw t4, 19*REGBYTES(sp)
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lw t5, 20*REGBYTES(sp)
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lw t6, 21*REGBYTES(sp)
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lw a0, 22*REGBYTES(sp)
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lw a1, 23*REGBYTES(sp)
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lw a2, 24*REGBYTES(sp)
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lw a3, 25*REGBYTES(sp)
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lw a4, 26*REGBYTES(sp)
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lw a5, 27*REGBYTES(sp)
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lw a6, 28*REGBYTES(sp)
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lw a7, 29*REGBYTES(sp)
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addi sp, sp, 32*REGBYTES
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mret
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.align 2
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.global rv32_exception_entry
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rv32_exception_entry:
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addi sp, sp, -32*REGBYTES
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sw s0, 0*REGBYTES(sp)
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sw s1, 1*REGBYTES(sp)
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sw s2, 2*REGBYTES(sp)
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sw s3, 3*REGBYTES(sp)
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sw s4, 4*REGBYTES(sp)
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sw s5, 5*REGBYTES(sp)
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sw s6, 6*REGBYTES(sp)
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sw s7, 7*REGBYTES(sp)
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sw s8, 8*REGBYTES(sp)
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sw s9, 9*REGBYTES(sp)
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sw s10, 10*REGBYTES(sp)
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sw s11, 11*REGBYTES(sp)
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// caller save
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sw ra, 12*REGBYTES(sp)
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sw gp, 13*REGBYTES(sp)
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sw tp, 14*REGBYTES(sp)
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sw t0, 15*REGBYTES(sp)
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sw t1, 16*REGBYTES(sp)
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sw t2, 17*REGBYTES(sp)
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sw t3, 18*REGBYTES(sp)
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sw t4, 19*REGBYTES(sp)
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sw t5, 20*REGBYTES(sp)
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sw t6, 21*REGBYTES(sp)
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sw a0, 22*REGBYTES(sp)
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sw a1, 23*REGBYTES(sp)
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sw a2, 24*REGBYTES(sp)
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sw a3, 25*REGBYTES(sp)
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sw a4, 26*REGBYTES(sp)
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sw a5, 27*REGBYTES(sp)
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sw a6, 28*REGBYTES(sp)
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sw a7, 29*REGBYTES(sp)
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csrr t0, mepc
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sw t0, 30*REGBYTES(sp)
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csrr t0, mstatus
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sw t0, 31*REGBYTES(sp)
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// save sp to k_curr_task.sp
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la t0, k_curr_task // t0 = &k_curr_task
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lw t1, (t0)
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sw sp, (t1)
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csrr a0, mcause
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mv a1, sp
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li t0, SOC_MCAUSE_EXP_MASK
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and a0, a0, t0
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call cpu_irq_entry
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la t0, k_curr_task
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la t1, k_next_task
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beq t0, t1, irq_restore
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// save sp to k_curr_task.sp
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la t0, k_curr_task // t0 = &k_curr_task
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lw t2, (t0) // t2 = k_curr_task->sp
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sw sp, (t2) // k_curr_task->sp = sp
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// switch task
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lw t1, (t1) // t1 = k_next_task
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sw t1, (t0) // k_curr_task = k_next_task
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// load new task sp
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lw sp, (t1)
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irq_restore:
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// restore context
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lw t0, 30*REGBYTES(sp)
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csrw mepc, t0
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lw t0, 31*REGBYTES(sp)
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csrw mstatus, t0
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lw s0, 0*REGBYTES(sp)
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lw s1, 1*REGBYTES(sp)
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lw s2, 2*REGBYTES(sp)
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lw s3, 3*REGBYTES(sp)
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lw s4, 4*REGBYTES(sp)
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lw s5, 5*REGBYTES(sp)
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lw s6, 6*REGBYTES(sp)
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lw s7, 7*REGBYTES(sp)
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lw s8, 8*REGBYTES(sp)
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lw s9, 9*REGBYTES(sp)
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lw s10, 10*REGBYTES(sp)
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lw s11, 11*REGBYTES(sp)
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// caller save
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lw ra, 12*REGBYTES(sp)
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lw gp, 13*REGBYTES(sp)
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lw tp, 14*REGBYTES(sp)
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lw t0, 15*REGBYTES(sp)
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lw t1, 16*REGBYTES(sp)
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lw t2, 17*REGBYTES(sp)
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lw t3, 18*REGBYTES(sp)
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lw t4, 19*REGBYTES(sp)
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lw t5, 20*REGBYTES(sp)
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lw t6, 21*REGBYTES(sp)
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lw a0, 22*REGBYTES(sp)
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lw a1, 23*REGBYTES(sp)
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lw a2, 24*REGBYTES(sp)
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lw a3, 25*REGBYTES(sp)
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lw a4, 26*REGBYTES(sp)
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lw a5, 27*REGBYTES(sp)
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lw a6, 28*REGBYTES(sp)
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lw a7, 29*REGBYTES(sp)
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addi sp, sp, 32*REGBYTES
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mret
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