823 lines
32 KiB
C
823 lines
32 KiB
C
/*
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* -------------------------------------------
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* MSP432 DriverLib - v3_40_00_10
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* -------------------------------------------
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*
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* --COPYRIGHT--,BSD,BSD
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* Copyright (c) 2016, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* --/COPYRIGHT--*/
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#ifndef SPI_H_
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#define SPI_H_
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//*****************************************************************************
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//
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//! \addtogroup spi_api
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdbool.h>
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#include <stdint.h>
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#include <msp.h>
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#include "eusci.h"
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/* Configuration Defines */
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#define EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK
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#define EUSCI_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK
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#define EUSCI_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB
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#define EUSCI_SPI_LSB_FIRST 0x00
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#define EUSCI_SPI_BUSY EUSCI_A_STATW_BUSY
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#define EUSCI_SPI_NOT_BUSY 0x00
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#define EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
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#define EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH
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#define EUSCI_SPI_3PIN EUSCI_B_CTLW0_MODE_0
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#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1
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#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2
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#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL
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#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
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#define EUSCI_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE_OFS
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#define EUSCI_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE_OFS
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#define EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM
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#define EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
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//*****************************************************************************
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//
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//! ypedef eUSCI_SPI_MasterConfig
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//! \brief Type definition for \link _eUSCI_SPI_MasterConfig \endlink structure
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//!
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//! \struct _eUSCI_SPI_MasterConfig
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//! \brief Configuration structure for master mode in the \b SPI module. See
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//! \link SPI_initMaster \endlink for parameter documentation.
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//
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//*****************************************************************************
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typedef struct _eUSCI_SPI_MasterConfig
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{
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uint_fast8_t selectClockSource;
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uint32_t clockSourceFrequency;
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uint32_t desiredSpiClock;
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uint_fast16_t msbFirst;
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uint_fast16_t clockPhase;
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uint_fast16_t clockPolarity;
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uint_fast16_t spiMode;
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} eUSCI_SPI_MasterConfig;
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//*****************************************************************************
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//
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//! ypedef eUSCI_SPI_SlaveConfig
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//! \brief Type definition for \link _eUSCI_SPI_SlaveConfig \endlink structure
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//!
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//! \struct _eUSCI_SPI_SlaveConfig
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//! \brief Configuration structure for slave mode in the \b SPI module. See
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//! \link SPI_initSlave \endlink for parameter documentation.
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//
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//*****************************************************************************
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typedef struct _eUSCI_SPI_SlaveConfig
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{
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uint_fast16_t msbFirst;
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uint_fast16_t clockPhase;
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uint_fast16_t clockPolarity;
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uint_fast16_t spiMode;
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} eUSCI_SPI_SlaveConfig;
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//*****************************************************************************
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//
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//! Initializes the SPI Master block.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//! \param config Configuration structure for SPI master mode
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//!
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//! <hr>
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//! <b>Configuration options for \link eUSCI_SPI_MasterConfig \endlink structure.</b>
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//! <hr>
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//!
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//! \param selectClockSource selects clock source. Valid values are
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//! - \b EUSCI_SPI_CLOCKSOURCE_ACLK
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//! - \b EUSCI_SPI_CLOCKSOURCE_SMCLK
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//! \param clockSourceFrequency is the frequency of the selected clock source
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//! \param desiredSpiClock is the desired clock rate for SPI communication
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//! \param msbFirst controls the direction of the receive and transmit shift
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//! register. Valid values are
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//! - \b EUSCI_SPI_MSB_FIRST
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//! - \b EUSCI_SPI_LSB_FIRST [Default Value]
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//! \param clockPhase is clock phase select.
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//! Valid values are
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//! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
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//! [Default Value]
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//! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
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//! \param clockPolarity is clock polarity select.
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//! Valid values are
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
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//! \param spiMode is SPI mode select.
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//! Valid values are
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//! - \b EUSCI_SPI_3PIN [Default Value]
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//! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH
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//! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW
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//! Upon successful initialization of the SPI master block, this function
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//! will have set the bus speed for the master, but the SPI Master block
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//! still remains disabled and must be enabled with SPI_enableModule()
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//!
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//! Modified bits are \b UCCKPH, \b UCCKPL, \b UC7BIT, \b UCMSB,\b UCSSELx,
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//! \b UCSWRST bits of \b UCAxCTLW0 register
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//!
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//! \return true
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//
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//*****************************************************************************
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extern bool SPI_initMaster(uint32_t moduleInstance,
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const eUSCI_SPI_MasterConfig *config);
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//*****************************************************************************
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//
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//! Selects 4Pin Functionality
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//! \param select4PinFunctionality selects Clock source. Valid values are
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//! - \b EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS
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//! - \b EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE
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//! This function should be invoked only in 4-wire mode. Invoking this function
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//! has no effect in 3-wire mode.
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//!
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//! Modified bits are \b UCSTEM bit of \b UCAxCTLW0 register
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//!
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//! \return true
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//
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//*****************************************************************************
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extern void SPI_selectFourPinFunctionality(uint32_t moduleInstance,
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uint_fast8_t select4PinFunctionality);
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//*****************************************************************************
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//
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//! Initializes the SPI Master clock.At the end of this function call, SPI
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//! module is left enabled.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//! \param clockSourceFrequency is the frequency of the selected clock source
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//! \param desiredSpiClock is the desired clock rate for SPI communication.
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//!
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//! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register and
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//! \b UCAxBRW register
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//!
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//! \return None
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//
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//*****************************************************************************
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extern void SPI_changeMasterClock(uint32_t moduleInstance,
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uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
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//*****************************************************************************
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//
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//! Initializes the SPI Slave block.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//! \param config Configuration structure for SPI slave mode
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//!
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//! <hr>
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//! <b>Configuration options for \link eUSCI_SPI_SlaveConfig \endlink structure.</b>
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//! <hr>
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//!
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//! \param msbFirst controls the direction of the receive and transmit shift
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//! register. Valid values are
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//! - \b EUSCI_SPI_MSB_FIRST
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//! - \b EUSCI_SPI_LSB_FIRST [Default Value]
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//! \param clockPhase is clock phase select.
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//! Valid values are
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//! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
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//! [Default Value]
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//! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
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//! \param clockPolarity is clock polarity select.
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//! Valid values are
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
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//! \param spiMode is SPI mode select.
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//! Valid values are
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//! - \b EUSCI_SPI_3PIN [Default Value]
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//! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH
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//! - \b EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW
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//! Upon successful initialization of the SPI slave block, this function
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//! will have initialized the slave block, but the SPI Slave block
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//! still remains disabled and must be enabled with SPI_enableModule()
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//!
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//! Modified bits are \b UCMSB, \b UC7BIT, \b UCMST, \b UCCKPL, \b UCCKPH,
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//! \b UCMODE, \b UCSWRST bits of \b UCAxCTLW0
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//!
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//! \return true
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//*****************************************************************************
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extern bool SPI_initSlave(uint32_t moduleInstance,
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const eUSCI_SPI_SlaveConfig *config);
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//*****************************************************************************
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//
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//! Changes the SPI clock phase and polarity.At the end of this function call,
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//! SPI module is left enabled.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//! \param clockPhase is clock phase select.
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//! Valid values are:
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//! - \b EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT
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//! [Default Value]
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//! - \b EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
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//! \param clockPolarity is clock polarity select.
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//! Valid values are:
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH
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//! - \b EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
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//!
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//! Modified bits are \b UCSWRST, \b UCCKPH, \b UCCKPL, \b UCSWRST bits of
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//! \b UCAxCTLW0
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//!
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//! \return None
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//
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//*****************************************************************************
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extern void SPI_changeClockPhasePolarity(uint32_t moduleInstance,
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uint_fast16_t clockPhase, uint_fast16_t clockPolarity);
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//*****************************************************************************
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//
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//! Transmits a byte from the SPI Module.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//! \param transmitData data to be transmitted from the SPI module
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//!
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//! This function will place the supplied data into SPI transmit data register
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//! to start transmission
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//!
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//! Modified register is \b UCAxTXBUF
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//!
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//! \return None.
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//
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//*****************************************************************************
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extern void SPI_transmitData(uint32_t moduleInstance,
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uint_fast8_t transmitData);
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//*****************************************************************************
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//
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//! Receives a byte that has been sent to the SPI Module.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//!
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//! This function reads a byte of data from the SPI receive data Register.
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//!
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//! \return Returns the byte received from by the SPI module, cast as an
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//! uint8_t.
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//
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//*****************************************************************************
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extern uint8_t SPI_receiveData(uint32_t moduleInstance);
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//*****************************************************************************
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//
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//! Enables the SPI block.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//!
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//! This will enable operation of the SPI block.
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//! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register.
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//!
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//! \return None.
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//
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//*****************************************************************************
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extern void SPI_enableModule(uint32_t moduleInstance);
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//*****************************************************************************
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//
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//! Disables the SPI block.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//!
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//! This will disable operation of the SPI block.
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//!
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//! Modified bits are \b UCSWRST bit of \b UCAxCTLW0 register.
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//!
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//! \return None.
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//
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//*****************************************************************************
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extern void SPI_disableModule(uint32_t moduleInstance);
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//*****************************************************************************
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//
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//! Returns the address of the RX Buffer of the SPI for the DMA module.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
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//! - \b EUSCI_A2_BASE
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//! - \b EUSCI_A3_BASE
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//! - \b EUSCI_B0_BASE
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//! - \b EUSCI_B1_BASE
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//! - \b EUSCI_B2_BASE
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//! - \b EUSCI_B3_BASE
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//!
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//!
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//! Returns the address of the SPI RX Buffer. This can be used in conjunction
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//! with the DMA to store the received data directly to memory.
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//!
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//! \return NONE
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//
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//*****************************************************************************
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extern uint32_t SPI_getReceiveBufferAddressForDMA(uint32_t moduleInstance);
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//*****************************************************************************
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//
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//! Returns the address of the TX Buffer of the SPI for the DMA module.
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//!
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//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
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//! parameters vary from part to part, but can include:
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//! - \b EUSCI_A0_BASE
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//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//!
|
|
//! Returns the address of the SPI TX Buffer. This can be used in conjunction
|
|
//! with the DMA to obtain transmitted data directly from memory.
|
|
//!
|
|
//! \return NONE
|
|
//
|
|
//*****************************************************************************
|
|
extern uint32_t SPI_getTransmitBufferAddressForDMA(uint32_t moduleInstance);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Indicates whether or not the SPI bus is busy.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//!
|
|
//! This function returns an indication of whether or not the SPI bus is
|
|
//! busy.This function checks the status of the bus via UCBBUSY bit
|
|
//!
|
|
//! \return EUSCI_SPI_BUSY if the SPI module transmitting or receiving
|
|
//! is busy; otherwise, returns EUSCI_SPI_NOT_BUSY.
|
|
//
|
|
//*****************************************************************************
|
|
extern uint_fast8_t SPI_isBusy(uint32_t moduleInstance);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables individual SPI interrupt sources.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//! \param mask is the bit mask of the interrupt sources to be enabled.
|
|
//!
|
|
//! Enables the indicated SPI interrupt sources. Only the sources that
|
|
//! are enabled can be reflected to the processor interrupt; disabled sources
|
|
//! have no effect on the processor.
|
|
//!
|
|
//! The mask parameter is the logical OR of any of the following:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt
|
|
//!
|
|
//! Modified registers are \b UCAxIFG and \b UCAxIE
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void SPI_enableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables individual SPI interrupt sources.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//! \param mask is the bit mask of the interrupt sources to be
|
|
//! disabled.
|
|
//!
|
|
//! Disables the indicated SPI interrupt sources. Only the sources that
|
|
//! are enabled can be reflected to the processor interrupt; disabled sources
|
|
//! have no effect on the processor.
|
|
//!
|
|
//! The mask parameter is the logical OR of any of the following:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt
|
|
//!
|
|
//! Modified register is \b UCAxIE
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void SPI_disableInterrupt(uint32_t moduleInstance, uint_fast8_t mask);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current SPI interrupt status.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//! \param mask Mask of interrupt to filter. This can include:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
|
|
//!
|
|
//! Modified registers are \b UCAxIFG.
|
|
//!
|
|
//! \return The current interrupt status as the mask of the set flags
|
|
//! Mask parameter can be either any of the following selection:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
|
|
//
|
|
//*****************************************************************************
|
|
extern uint_fast8_t SPI_getInterruptStatus(uint32_t moduleInstance,
|
|
uint16_t mask);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current SPI interrupt status masked with the enabled interrupts.
|
|
//! This function is useful to call in ISRs to get a list of pending
|
|
//! interrupts that are actually enabled and could have caused
|
|
//! the ISR.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//! Modified registers are \b UCAxIFG.
|
|
//!
|
|
//! \return The current interrupt status as the mask of the set flags
|
|
//! Mask parameter can be either any of the following selection:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
|
|
//
|
|
//*****************************************************************************
|
|
extern uint_fast8_t SPI_getEnabledInterruptStatus(uint32_t moduleInstance);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Clears the selected SPI interrupt status flag.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//! \param mask is the masked interrupt flag to be cleared.
|
|
//!
|
|
//! The mask parameter is the logical OR of any of the following:
|
|
//! - \b EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
|
|
//! - \b EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt
|
|
//! Modified registers are \b UCAxIFG.
|
|
//!
|
|
//! \return None
|
|
//
|
|
//*****************************************************************************
|
|
extern void SPI_clearInterruptFlag(uint32_t moduleInstance, uint_fast8_t mask);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Registers an interrupt handler for the timer capture compare interrupt.
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI (SPI) module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//! It is important to note that for eUSCI modules, only "B" modules such as
|
|
//! EUSCI_B0 can be used. "A" modules such as EUSCI_A0 do not support the
|
|
//! I2C mode.
|
|
//!
|
|
//! \param intHandler is a pointer to the function to be called when the
|
|
//! timer capture compare interrupt occurs.
|
|
//!
|
|
//! This function registers the handler to be called when a timer
|
|
//! interrupt occurs. This function enables the global interrupt in the
|
|
//! interrupt controller; specific SPI interrupts must be enabled
|
|
//! via SPI_enableInterrupt(). It is the interrupt handler's responsibility to
|
|
//! clear the interrupt source via SPI_clearInterruptFlag().
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void SPI_registerInterrupt(uint32_t moduleInstance,
|
|
void (*intHandler)(void));
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Unregisters the interrupt handler for the timer
|
|
//!
|
|
//! \param moduleInstance is the instance of the eUSCI A/B module. Valid
|
|
//! parameters vary from part to part, but can include:
|
|
//! - \b EUSCI_A0_BASE
|
|
//! - \b EUSCI_A1_BASE
|
|
//! - \b EUSCI_A2_BASE
|
|
//! - \b EUSCI_A3_BASE
|
|
//! - \b EUSCI_B0_BASE
|
|
//! - \b EUSCI_B1_BASE
|
|
//! - \b EUSCI_B2_BASE
|
|
//! - \b EUSCI_B3_BASE
|
|
//!
|
|
//! This function unregisters the handler to be called when timer
|
|
//! interrupt occurs. This function also masks off the interrupt in the
|
|
//! interrupt controller so that the interrupt handler no longer is called.
|
|
//!
|
|
//! \sa Interrupt_registerInterrupt() for important information about
|
|
//! registering interrupt handlers.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
extern void SPI_unregisterInterrupt(uint32_t moduleInstance);
|
|
|
|
/* Backwards Compatibility Layer */
|
|
#define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
|
|
#define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
|
|
|
|
#define EUSCI_B_SPI_MSB_FIRST UCMSB
|
|
#define EUSCI_B_SPI_LSB_FIRST 0x00
|
|
|
|
#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
|
|
#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
|
|
|
|
#define EUSCI_B_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
|
|
#define EUSCI_B_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
|
|
|
|
#define EUSCI_B_SPI_3PIN UCMODE_0
|
|
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
|
|
#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
|
|
|
|
#define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
|
|
#define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
|
|
|
|
#define EUSCI_B_SPI_TRANSMIT_INTERRUPT UCTXIE
|
|
#define EUSCI_B_SPI_RECEIVE_INTERRUPT UCRXIE
|
|
|
|
#define EUSCI_B_SPI_BUSY UCBUSY
|
|
#define EUSCI_B_SPI_NOT_BUSY 0x00
|
|
|
|
#define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00
|
|
#define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT UCCKPH
|
|
|
|
#define EUSCI_A_SPI_MSB_FIRST UCMSB
|
|
#define EUSCI_A_SPI_LSB_FIRST 0x00
|
|
|
|
#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH UCCKPL
|
|
#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00
|
|
|
|
#define EUSCI_A_SPI_CLOCKSOURCE_ACLK UCSSEL__ACLK
|
|
#define EUSCI_A_SPI_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
|
|
|
|
#define EUSCI_A_SPI_3PIN UCMODE_0
|
|
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH UCMODE_1
|
|
#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW UCMODE_2
|
|
|
|
#define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00
|
|
#define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE UCSTEM
|
|
|
|
#define EUSCI_A_SPI_TRANSMIT_INTERRUPT UCTXIE
|
|
#define EUSCI_A_SPI_RECEIVE_INTERRUPT UCRXIE
|
|
|
|
#define EUSCI_A_SPI_BUSY UCBUSY
|
|
#define EUSCI_A_SPI_NOT_BUSY 0x00
|
|
|
|
extern void EUSCI_A_SPI_select4PinFunctionality(uint32_t baseAddress,
|
|
uint8_t select4PinFunctionality);
|
|
extern void EUSCI_A_SPI_masterChangeClock(uint32_t baseAddress,
|
|
uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
|
|
extern bool EUSCI_A_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
|
|
uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
|
|
extern void EUSCI_A_SPI_changeClockPhasePolarity(uint32_t baseAddress,
|
|
uint16_t clockPhase, uint16_t clockPolarity);
|
|
extern void EUSCI_A_SPI_transmitData(uint32_t baseAddress,
|
|
uint8_t transmitData);
|
|
extern uint8_t EUSCI_A_SPI_receiveData(uint32_t baseAddress);
|
|
extern void EUSCI_A_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
|
|
extern void EUSCI_A_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
|
|
extern uint8_t EUSCI_A_SPI_getInterruptStatus(uint32_t baseAddress,
|
|
uint8_t mask);
|
|
extern void EUSCI_A_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
|
|
extern void EUSCI_A_SPI_enable(uint32_t baseAddress);
|
|
extern void EUSCI_A_SPI_disable(uint32_t baseAddress);
|
|
extern uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
|
|
extern uint32_t EUSCI_A_SPI_getTransmitBufferAddressForDMA(
|
|
uint32_t baseAddress);
|
|
extern bool EUSCI_A_SPI_isBusy(uint32_t baseAddress);
|
|
extern void EUSCI_B_SPI_select4PinFunctionality(uint32_t baseAddress,
|
|
uint8_t select4PinFunctionality);
|
|
extern void EUSCI_B_SPI_masterChangeClock(uint32_t baseAddress,
|
|
uint32_t clockSourceFrequency, uint32_t desiredSpiClock);
|
|
extern bool EUSCI_B_SPI_slaveInit(uint32_t baseAddress, uint16_t msbFirst,
|
|
uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode);
|
|
extern void EUSCI_B_SPI_changeClockPhasePolarity(uint32_t baseAddress,
|
|
uint16_t clockPhase, uint16_t clockPolarity);
|
|
extern void EUSCI_B_SPI_transmitData(uint32_t baseAddress,
|
|
uint8_t transmitData);
|
|
extern uint8_t EUSCI_B_SPI_receiveData(uint32_t baseAddress);
|
|
extern void EUSCI_B_SPI_enableInterrupt(uint32_t baseAddress, uint8_t mask);
|
|
extern void EUSCI_B_SPI_disableInterrupt(uint32_t baseAddress, uint8_t mask);
|
|
extern uint8_t EUSCI_B_SPI_getInterruptStatus(uint32_t baseAddress,
|
|
uint8_t mask);
|
|
extern void EUSCI_B_SPI_clearInterruptFlag(uint32_t baseAddress, uint8_t mask);
|
|
extern void EUSCI_B_SPI_enable(uint32_t baseAddress);
|
|
extern void EUSCI_B_SPI_disable(uint32_t baseAddress);
|
|
extern uint32_t EUSCI_B_SPI_getReceiveBufferAddressForDMA(uint32_t baseAddress);
|
|
extern uint32_t EUSCI_B_SPI_getTransmitBufferAddressForDMA(
|
|
uint32_t baseAddress);
|
|
extern bool EUSCI_B_SPI_isBusy(uint32_t baseAddress);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Mark the end of the C bindings section for C++ compilers.
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Close the Doxygen group.
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|
|
|
|
#endif /* SPI_H_ */
|
|
|