560 lines
22 KiB
C
560 lines
22 KiB
C
/*
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* -------------------------------------------
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* MSP432 DriverLib - v3_40_00_10
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* -------------------------------------------
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*
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* --COPYRIGHT--,BSD,BSD
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* Copyright (c) 2016, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* --/COPYRIGHT--*/
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#ifndef __SYSCTL_A_H__
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#define __SYSCTL_A_H__
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//*****************************************************************************
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//
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//! \addtogroup sysctl_a_api
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// If building with a C++ compiler, make all of the definitions in this header
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// have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include <msp.h>
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//*****************************************************************************
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//
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// Control specific variables
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//
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//*****************************************************************************
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#define SYSCTL_A_HARD_RESET 1
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#define SYSCTL_A_SOFT_RESET 0
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#define SYSCTL_A_PERIPH_LCD SYSCTL_A_PERIHALT_CTL_HALT_LCD
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#define SYSCTL_A_PERIPH_DMA SYSCTL_A_PERIHALT_CTL_HALT_DMA
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#define SYSCTL_A_PERIPH_WDT SYSCTL_A_PERIHALT_CTL_HALT_WDT
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#define SYSCTL_A_PERIPH_ADC SYSCTL_A_PERIHALT_CTL_HALT_ADC
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#define SYSCTL_A_PERIPH_EUSCIB3 SYSCTL_A_PERIHALT_CTL_HALT_EUB3
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#define SYSCTL_A_PERIPH_EUSCIB2 SYSCTL_A_PERIHALT_CTL_HALT_EUB2
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#define SYSCTL_A_PERIPH_EUSCIB1 SYSCTL_A_PERIHALT_CTL_HALT_EUB1
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#define SYSCTL_A_PERIPH_EUSCIB0 SYSCTL_A_PERIHALT_CTL_HALT_EUB0
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#define SYSCTL_A_PERIPH_EUSCIA3 SYSCTL_A_PERIHALT_CTL_HALT_EUA3
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#define SYSCTL_A_PERIPH_EUSCIA2 SYSCTL_A_PERIHALT_CTL_HALT_EUA2
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#define SYSCTL_A_PERIPH_EUSCIA1 SYSCTL_A_PERIHALT_CTL_HALT_EUA1
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#define SYSCTL_A_PERIPH_EUSCIA0 SYSCTL_A_PERIHALT_CTL_HALT_EUA0
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#define SYSCTL_A_PERIPH_TIMER32_0_MODULE SYSCTL_A_PERIHALT_CTL_HALT_T32_0
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#define SYSCTL_A_PERIPH_TIMER16_3 SYSCTL_A_PERIHALT_CTL_HALT_T16_3
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#define SYSCTL_A_PERIPH_TIMER16_2 SYSCTL_A_PERIHALT_CTL_HALT_T16_2
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#define SYSCTL_A_PERIPH_TIMER16_1 SYSCTL_A_PERIHALT_CTL_HALT_T16_1
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#define SYSCTL_A_PERIPH_TIMER16_0 SYSCTL_A_PERIHALT_CTL_HALT_T16_0
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#define SYSCTL_A_NMIPIN_SRC SYSCTL_A_NMI_CTLSTAT_PIN_SRC
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#define SYSCTL_A_PCM_SRC SYSCTL_A_NMI_CTLSTAT_PCM_SRC
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#define SYSCTL_A_PSS_SRC SYSCTL_A_NMI_CTLSTAT_PSS_SRC
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#define SYSCTL_A_CS_SRC SYSCTL_A_NMI_CTLSTAT_CS_SRC
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#define SYSCTL_A_REBOOT_KEY 0x6900
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#define SYSCTL_A_1_2V_REF (uint32_t)&TLV->ADC14_REF1P2V_TS30C - (uint32_t)TLV_BASE
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#define SYSCTL_A_1_45V_REF (uint32_t)&TLV->ADC14_REF1P45V_TS30C - (uint32_t)TLV_BASE
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#define SYSCTL_A_2_5V_REF (uint32_t)&TLV->ADC14_REF2P5V_TS30C - (uint32_t)TLV_BASE
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#define SYSCTL_A_85_DEGREES_C 4
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#define SYSCTL_A_30_DEGREES_C 0
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#define SYSCTL_A_BANKMASK 0x80000000
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#define SRAMCTL_CTL0_BANK 0x10000000
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#define SRAMCTL_CTL1_BANK 0x20000000
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#define SRAMCTL_CTL2_BANK 0x30000000
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#define SRAMCTL_CTL3_BANK 0x40000000
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#define TLV_START 0x00201004
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#define TLV_TAG_RESERVED1 1
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#define TLV_TAG_RESERVED2 2
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#define TLV_TAG_CS 3
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#define TLV_TAG_FLASHCTL 4
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#define TLV_TAG_ADC14 5
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#define TLV_TAG_RESERVED6 6
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#define TLV_TAG_RESERVED7 7
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#define TLV_TAG_REF 8
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#define TLV_TAG_RESERVED9 9
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#define TLV_TAG_RESERVED10 10
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#define TLV_TAG_DEVINFO 11
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#define TLV_TAG_DIEREC 12
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#define TLV_TAG_RANDNUM 13
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#define TLV_TAG_RESERVED14 14
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#define TLV_TAG_BSL 15
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#define TLV_TAGEND 0x0BD0E11D
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//*****************************************************************************
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//
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// Structures for TLV definitions
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//
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//*****************************************************************************
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typedef struct
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{
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uint32_t maxProgramPulses;
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uint32_t maxErasePulses;
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} SysCtl_A_FlashTLV_Info;
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typedef struct
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{
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uint32_t rDCOIR_FCAL_RSEL04;
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uint32_t rDCOIR_FCAL_RSEL5;
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uint32_t rDCOIR_MAXPOSTUNE_RSEL04;
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uint32_t rDCOIR_MAXNEGTUNE_RSEL04;
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uint32_t rDCOIR_MAXPOSTUNE_RSEL5;
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uint32_t rDCOIR_MAXNEGTUNE_RSEL5;
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uint32_t rDCOIR_CONSTK_RSEL04;
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uint32_t rDCOIR_CONSTK_RSEL5;
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uint32_t rDCOER_FCAL_RSEL04;
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uint32_t rDCOER_FCAL_RSEL5;
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uint32_t rDCOER_MAXPOSTUNE_RSEL04;
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uint32_t rDCOER_MAXNEGTUNE_RSEL04;
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uint32_t rDCOER_MAXPOSTUNE_RSEL5;
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uint32_t rDCOER_MAXNEGTUNE_RSEL5;
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uint32_t rDCOER_CONSTK_RSEL04;
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uint32_t rDCOER_CONSTK_RSEL5;
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} SysCtl_A_CSCalTLV_Info;
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//*****************************************************************************
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//
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// Prototypes for the APIs.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! Gets the size of the SRAM.
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//!
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//! \return The total number of bytes of SRAM.
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//
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//*****************************************************************************
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extern uint_least32_t SysCtl_A_getSRAMSize(void);
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//*****************************************************************************
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//
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//! Gets the size of the flash.
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//!
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//! \return The total number of bytes of main flash memory.
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//!
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//! \note This returns the total amount of main memory flash. To find how much
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//! INFO memory is available, use the \link SysCtl_A_getInfoFlashSize
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//! \endlink function.
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//
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//*****************************************************************************
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extern uint_least32_t SysCtl_A_getFlashSize(void);
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//*****************************************************************************
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//
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//! Gets the size of the flash.
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//!
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//! \return The total number of bytes of flash of INFO flash memory.
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//!
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//! \note This returns the total amount of INFO memory flash. To find how much
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//! main memory is available, use the \link SysCtl_A_getFlashSize
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//! \endlink function.
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//
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//*****************************************************************************
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extern uint_least32_t SysCtl_A_getInfoFlashSize(void);
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//*****************************************************************************
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//
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//! Reboots the device and causes the device to re-initialize itself.
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//!
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//! \return This function does not return.
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//
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//*****************************************************************************
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extern void SysCtl_A_rebootDevice(void);
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//*****************************************************************************
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//
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//! The TLV structure uses a tag or base address to identify segments of the
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//! table where information is stored. Some examples of TLV tags are Peripheral
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//! Descriptor, Interrupts, Info Block and Die Record. This function retrieves
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//! the value of a tag and the length of the tag.
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//!
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//! \param tag represents the tag for which the information needs to be
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//! retrieved.
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//! Valid values are:
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//! - \b TLV_TAG_RESERVED1
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//! - \b TLV_TAG_RESERVED2
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//! - \b TLV_TAG_CS
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//! - \b TLV_TAG_FLASHCTL
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//! - \b TLV_TAG_ADC14
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//! - \b TLV_TAG_RESERVED6
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//! - \b TLV_TAG_RESERVED7
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//! - \b TLV_TAG_REF
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//! - \b TLV_TAG_RESERVED9
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//! - \b TLV_TAG_RESERVED10
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//! - \b TLV_TAG_DEVINFO
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//! - \b TLV_TAG_DIEREC
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//! - \b TLV_TAG_RANDNUM
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//! - \b TLV_TAG_RESERVED14
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//! \param instance In some cases a specific tag may have more than one
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//! instance. For example there may be multiple instances of timer
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//! calibration data present under a single Timer Cal tag. This variable
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//! specifies the instance for which information is to be retrieved (0,
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//! 1, etc.). When only one instance exists; 0 is passed.
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//! \param length Acts as a return through indirect reference. The function
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//! retrieves the value of the TLV tag length. This value is pointed to
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//! by *length and can be used by the application level once the
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//! function is called. If the specified tag is not found then the
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//! pointer is null 0.
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//! \param data_address acts as a return through indirect reference. Once the
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//! function is called data_address points to the pointer that holds the
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//! value retrieved from the specified TLV tag. If the specified tag is
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//! not found then the pointer is null 0.
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//!
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//! \return None
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//
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//*****************************************************************************
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extern void SysCtl_A_getTLVInfo(uint_fast8_t tag, uint_fast8_t instance,
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uint_fast8_t *length, uint32_t **data_address);
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//*****************************************************************************
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//
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//! Enables areas of SRAM memory. This can be used to optimize power
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//! consumption when every SRAM bank isn't needed.
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//! This function takes in a 32-bit address to the area in SRAM to to enable.
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//! It will convert this address into the corresponding register settings and
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//! set them in the register accordingly. Note that passing an address to an
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//! area other than SRAM will result in unreliable behavior. Addresses should
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//! be given with reference to the SRAM_DATA area of SRAM (usually starting at
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//! 0x20000000).
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//!
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//! \param addr Break address of SRAM to enable. All SRAM below this address
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//! will also be enabled. If an unaligned address is given the appropriate
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//! aligned address will be calculated.
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//!
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//! \note The first bank of SRAM is reserved and always enabled.
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//!
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//! \return true if banks were set, false otherwise. If the BNKEN_RDY bit is
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//! not set in the STAT register, this function will return false.
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//
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//*****************************************************************************
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extern bool SysCtl_A_enableSRAM(uint32_t addr);
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//*****************************************************************************
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//
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//! Disables areas of SRAM memory. This can be used to optimize power
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//! consumption when every SRAM bank isn't needed. It is important to note
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//! that when a higher bank is disabled, all of the SRAM banks above that bank
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//! are also disabled. For example, if the address of 0x2001FA0 is given, all
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//! SRAM banks from 0x2001FA0 to the top of SRAM will be disabled.
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//! This function takes in a 32-bit address to the area in SRAM to to disable.
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//! It will convert this address into the corresponding register settings and
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//! set them in the register accordingly. Note that passing an address to an
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//! area other than SRAM will result in unreliable behavior. Addresses should
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//! be given with reference to the SRAM_DATA area of SRAM (usually starting at
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//! 0x20000000).
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//!
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//! \param addr Break address of SRAM to disable. All SRAM above this address
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//! will also be disabled. If an unaligned address is given the appropriate
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//! aligned address will be calculated.
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//!
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//! \note The first bank of SRAM is reserved and always enabled.
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//!
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//! \return true if banks were set, false otherwise. If the BNKEN_RDY bit is
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//! not set in the STAT register, this function will return false.
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//
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//*****************************************************************************
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extern bool SysCtl_A_disableSRAM(uint32_t addr);
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//*****************************************************************************
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//
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//! Enables retention of the specified SRAM block address range when the device
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//! goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM
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//! banks specified with this function will be placed into retention mode.
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//! Retention of individual blocks can be set without the restrictions of the
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//! enable/disable functions. Note that any memory range given outside of SRAM
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//! will result in unreliable behavior. Also note that any unaligned addresses
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//! will be truncated to the closest aligned address before the address given.
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//! Addresses should be given with reference to the SRAM_DATA area of SRAM
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//! (usually starting at 0x20000000).
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//!
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//! \param startAddr Start address to enable retention
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//!
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//! \param endtAddr End address to enable retention
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//!
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//! \note Block 0 is reserved and retention is always enabled.
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//!
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//! \return true if banks were set, false otherwise. If the BLKEN_RDY bit is
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//! not set in the STAT register, this function will return false.
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//
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//*****************************************************************************
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extern bool SysCtl_A_enableSRAMRetention(uint32_t startAddr,
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uint32_t endAddr);
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//*****************************************************************************
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//
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//! Disables retention of the specified SRAM block address range when the device
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//! goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM
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//! banks specified with this function will be placed into retention mode.
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//! Retention of individual blocks can be set without the restrictions of the
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//! enable/disable functions. Note that any memory range given outside of SRAM
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//! will result in unreliable behavior. Also note that any unaligned addresses
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//! will be truncated to the closest aligned address before the address given.
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//! Addresses should be given with reference to the SRAM_DATA area of SRAM
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//! (usually starting at 0x20000000).
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//!
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//! \param startAddr Start address to disable retention
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//!
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//! \param endtAddr End address to disable retention
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//!
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//! \note Block 0 is reserved and retention is always enabled.
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//!
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//! \return true if banks were set, false otherwise. If the BLKEN_RDY bit is
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//! not set in the STAT register, this function will return false.
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//
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//*****************************************************************************
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extern bool SysCtl_A_disableSRAMRetention(uint32_t startAddr,
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uint32_t endAddr);
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//*****************************************************************************
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//
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//! Makes it so that the provided peripherals will either halt execution after
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//! a CPU HALT. Parameters in this function can be combined to account for
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//! multiple peripherals. By default, all peripherals keep running after a
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//! CPU HALT.
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//!
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//! \param devices The peripherals to continue running after a CPU HALT
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//! This can be a bitwise OR of the following values:
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//! - \b SYSCTL_A_PERIPH_LCD,
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//! - \b SYSCTL_A_PERIPH_DMA,
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//! - \b SYSCTL_A_PERIPH_WDT,
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//! - \b SYSCTL_A_PERIPH_ADC,
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//! - \b SYSCTL_A_PERIPH_EUSCIB3,
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//! - \b SYSCTL_A_PERIPH_EUSCIB2,
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//! - \b SYSCTL_A_PERIPH_EUSCIB1
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//! - \b SYSCTL_A_PERIPH_EUSCIB0,
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//! - \b SYSCTL_A_PERIPH_EUSCIA3,
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//! - \b SYSCTL_A_PERIPH_EUSCIA2
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//! - \b SYSCTL_A_PERIPH_EUSCIA1,
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//! - \b SYSCTL_A_PERIPH_EUSCIA0,
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//! - \b SYSCTL_A_PERIPH_TIMER32_0_MODULE,
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//! - \b SYSCTL_A_PERIPH_TIMER16_3,
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//! - \b SYSCTL_A_PERIPH_TIMER16_2,
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//! - \b SYSCTL_A_PERIPH_TIMER16_1,
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//! - \b SYSCTL_A_PERIPH_TIMER16_0
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//!
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//! \return None.
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//
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//
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//*****************************************************************************
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extern void SysCtl_A_enablePeripheralAtCPUHalt(uint_fast16_t devices);
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//*****************************************************************************
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//
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//! Makes it so that the provided peripherals will either halt execution after
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//! a CPU HALT. Parameters in this function can be combined to account for
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//! multiple peripherals. By default, all peripherals keep running after a
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//! CPU HALT.
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//!
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//! \param devices The peripherals to disable after a CPU HALT
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//!
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//! The \e devices parameter can be a bitwise OR of the following values:
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//! This can be a bitwise OR of the following values:
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//! - \b SYSCTL_A_PERIPH_LCD,
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//! - \b SYSCTL_A_PERIPH_DMA,
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//! - \b SYSCTL_A_PERIPH_WDT,
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//! - \b SYSCTL_A_PERIPH_ADC,
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//! - \b SYSCTL_A_PERIPH_EUSCIB3,
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//! - \b SYSCTL_A_PERIPH_EUSCIB2,
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//! - \b SYSCTL_A_PERIPH_EUSCIB1
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//! - \b SYSCTL_A_PERIPH_EUSCIB0,
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//! - \b SYSCTL_A_PERIPH_EUSCIA3,
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//! - \b SYSCTL_A_PERIPH_EUSCIA2
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//! - \b SYSCTL_A_PERIPH_EUSCIA1,
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//! - \b SYSCTL_A_PERIPH_EUSCIA0,
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//! - \b SYSCTL_A_PERIPH_TIMER32_0_MODULE,
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//! - \b SYSCTL_A_PERIPH_TIMER16_3,
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//! - \b SYSCTL_A_PERIPH_TIMER16_2,
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//! - \b SYSCTL_A_PERIPH_TIMER16_1,
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//! - \b SYSCTL_A_PERIPH_TIMER16_0
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//!
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//! \return None.
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//
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//
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//*****************************************************************************
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extern void SysCtl_A_disablePeripheralAtCPUHalt(uint_fast16_t devices);
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//*****************************************************************************
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//
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//! Sets the type of RESET that happens when a watchdog timeout occurs.
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//!
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//! \param resetType The type of reset to set
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//!
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//! The \e resetType parameter must be only one of the following values:
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//! - \b SYSCTL_A_HARD_RESET,
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//! - \b SYSCTL_A_SOFT_RESET
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|
//!
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|
//! \return None.
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|
//
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_setWDTTimeoutResetType(uint_fast8_t resetType);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the type of RESET that happens when a watchdog password violation
|
|
//! occurs.
|
|
//!
|
|
//! \param resetType The type of reset to set
|
|
//!
|
|
//! The \e resetType parameter must be only one of the following values:
|
|
//! - \b SYSCTL_A_HARD_RESET,
|
|
//! - \b SYSCTL_A_SOFT_RESET
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_setWDTPasswordViolationResetType(uint_fast8_t resetType);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables NMIs for the provided modules. When disabled, a NMI flag will not
|
|
//! occur when a fault condition comes from the corresponding modules.
|
|
//!
|
|
//! \param flags The NMI sources to disable
|
|
//! Can be a bitwise OR of the following parameters:
|
|
//! - \b SYSCTL_A_NMIPIN_SRC,
|
|
//! - \b SYSCTL_A_PCM_SRC,
|
|
//! - \b SYSCTL_A_PSS_SRC,
|
|
//! - \b SYSCTL_A_CS_SRC
|
|
//!
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_disableNMISource(uint_fast8_t flags);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables NMIs for the provided modules. When enabled, a NMI flag will
|
|
//! occur when a fault condition comes from the corresponding modules.
|
|
//!
|
|
//! \param flags The NMI sources to enable
|
|
//! Can be a bitwise OR of the following parameters:
|
|
//! - \b SYSCTL_A_NMIPIN_SRC,
|
|
//! - \b SYSCTL_A_PCM_SRC,
|
|
//! - \b SYSCTL_A_PSS_SRC,
|
|
//! - \b SYSCTL_A_CS_SRC
|
|
//!
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_enableNMISource(uint_fast8_t flags);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Returns the current sources of NMIs that are enabled
|
|
//!
|
|
//! \return NMI source status
|
|
//
|
|
//*****************************************************************************
|
|
extern uint_fast8_t SysCtl_A_getNMISourceStatus(void);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables glitch suppression on the reset pin of the device. Refer to the
|
|
//! device data sheet for specific information about glitch suppression
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_enableGlitchFilter(void);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables glitch suppression on the reset pin of the device. Refer to the
|
|
//! device data sheet for specific information about glitch suppression
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//
|
|
//*****************************************************************************
|
|
extern void SysCtl_A_disableGlitchFilter(void);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Retrieves the calibration constant of the temperature sensor to be used
|
|
//! in temperature calculation.
|
|
//!
|
|
//! \param refVoltage Reference voltage being used.
|
|
//!
|
|
//! The \e refVoltage parameter must be only one of the following values:
|
|
//! - \b SYSCTL_A_1_2V_REF
|
|
//! - \b SYSCTL_A_1_45V_REF
|
|
//! - \b SYSCTL_A_2_5V_REF
|
|
//!
|
|
//! \param temperature is the calibration temperature that the user wants to be
|
|
//! returned.
|
|
//!
|
|
//! The \e temperature parameter must be only one of the following values:
|
|
//! - \b SYSCTL_A_30_DEGREES_C
|
|
//! - \b SYSCTL_A_85_DEGREES_C
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//
|
|
//*****************************************************************************
|
|
extern uint_fast16_t SysCtl_A_getTempCalibrationConstant(uint32_t refVoltage,
|
|
uint32_t temperature);
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Mark the end of the C bindings section for C++ compilers.
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Close the Doxygen group.
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|
|
|
|
#endif // __SYSCTL_A_H__
|