arch: arc: update the ARC port
* add basic synopsys arc em processor support * add basic arc nsim em virtual board support * add basic arc mwdt toolchain support Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
This commit is contained in:
Watson Zeng
@@ -1,253 +0,0 @@
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#ifndef H_CORE_CONFIG
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#define H_CORE_CONFIG
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#define core_config_cir_identity 0x00000043
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#define core_config_cir_identity_chipid 0
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#define core_config_cir_identity_arcnum 0
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#define core_config_cir_identity_arcver 67
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#define core_config_cir_identity_family 4
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#define core_config_cir_identity_corever 3
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#define core_config_cir_aux_dccm 0x80000000
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#define core_config_bcr_bcr_ver 0x00000002
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#define core_config_bcr_bcr_ver_version 2
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#define core_config_bcr_vecbase_ac_build 0x00000010
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#define core_config_bcr_mpu_build 0x00010002
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#define core_config_bcr_mpu_build_i 0
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#define core_config_bcr_mpu_build_s 0
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#define core_config_bcr_mpu_build_regions 16
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#define core_config_bcr_mpu_build_version 2
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#define core_config_bcr_rf_build 0x0000c902
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#define core_config_bcr_rf_build_version 2
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#define core_config_bcr_rf_build_p 1
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#define core_config_bcr_rf_build_e 0
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#define core_config_bcr_rf_build_r 0
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#define core_config_bcr_rf_build_b 1
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#define core_config_bcr_rf_build_d 3
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#define core_config_bcr_d_cache_build 0x00215104
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#define core_config_bcr_d_cache_build_version 4
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#define core_config_bcr_d_cache_build_assoc 1
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#define core_config_bcr_d_cache_build_capacity 5
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#define core_config_bcr_d_cache_build_bsize 1
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#define core_config_bcr_d_cache_build_fl 2
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#define core_config_bcr_d_cache_build_ioc 0
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#define core_config_bcr_d_cache_build_cp 0
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#define core_config_bcr_d_cache_build_u 0
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#define core_config_bcr_d_cache_build_cycles 0
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#define core_config_bcr_dccm_build 0x00010904
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#define core_config_bcr_dccm_build_cycles 0
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#define core_config_bcr_dccm_build_interleave 1
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#define core_config_bcr_dccm_build_size1 0
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#define core_config_bcr_dccm_build_size0 9
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#define core_config_bcr_dccm_build_version 4
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#define core_config_bcr_timer_build 0x00010304
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#define core_config_bcr_timer_build_sp1 0
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#define core_config_bcr_timer_build_sp0 0
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#define core_config_bcr_timer_build_p1 0
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#define core_config_bcr_timer_build_p0 1
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#define core_config_bcr_timer_build_st1 0
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#define core_config_bcr_timer_build_st0 0
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#define core_config_bcr_timer_build_rtc 0
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#define core_config_bcr_timer_build_rtsc_ver 1
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#define core_config_bcr_timer_build_rtsc 0
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#define core_config_bcr_timer_build_t0 1
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#define core_config_bcr_timer_build_t1 1
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#define core_config_bcr_timer_build_version 4
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#define core_config_bcr_ap_build 0x00000405
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#define core_config_bcr_ap_build_version 5
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#define core_config_bcr_ap_build_type 4
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#define core_config_bcr_i_cache_build 0x00225104
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#define core_config_bcr_i_cache_build_assoc 1
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#define core_config_bcr_i_cache_build_version 4
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#define core_config_bcr_i_cache_build_capacity 5
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#define core_config_bcr_i_cache_build_bsize 2
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#define core_config_bcr_i_cache_build_fl 2
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#define core_config_bcr_i_cache_build_d 0
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#define core_config_bcr_iccm_build 0x00000a04
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#define core_config_bcr_iccm_build_iccm1_size1 0
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#define core_config_bcr_iccm_build_iccm0_size1 0
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#define core_config_bcr_iccm_build_iccm1_size0 0
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#define core_config_bcr_iccm_build_iccm0_size0 10
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#define core_config_bcr_iccm_build_version 4
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#define core_config_bcr_xy_build 0x00001520
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#define core_config_bcr_xy_build_memsize 1
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#define core_config_bcr_xy_build_interleaved 1
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#define core_config_bcr_xy_build_config 1
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#define core_config_bcr_xy_build_version 32
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#define core_config_bcr_dsp_build 0x00003521
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#define core_config_bcr_dsp_build_wide 0
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#define core_config_bcr_dsp_build_itu_pa 0
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#define core_config_bcr_dsp_build_acc_shift 2
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#define core_config_bcr_dsp_build_comp 1
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#define core_config_bcr_dsp_build_divsqrt 1
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#define core_config_bcr_dsp_build_version 33
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#define core_config_bcr_multiply_build 0x00022a06
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#define core_config_bcr_multiply_build_version16x16 2
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#define core_config_bcr_multiply_build_dsp 2
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#define core_config_bcr_multiply_build_cyc 2
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#define core_config_bcr_multiply_build_type 2
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#define core_config_bcr_multiply_build_version32x32 6
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#define core_config_bcr_swap_build 0x00000003
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#define core_config_bcr_swap_build_version 3
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#define core_config_bcr_norm_build 0x00000003
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#define core_config_bcr_norm_build_version 3
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#define core_config_bcr_minmax_build 0x00000002
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#define core_config_bcr_minmax_build_version 2
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#define core_config_bcr_barrel_build 0x00000303
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#define core_config_bcr_barrel_build_version 3
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#define core_config_bcr_barrel_build_shift_option 3
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#define core_config_bcr_isa_config 0x12047402
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#define core_config_bcr_isa_config_d 1
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#define core_config_bcr_isa_config_c 2
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#define core_config_bcr_isa_config_l 0
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#define core_config_bcr_isa_config_n 0
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#define core_config_bcr_isa_config_a 0
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#define core_config_bcr_isa_config_b 0
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#define core_config_bcr_isa_config_addr_size 4
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#define core_config_bcr_isa_config_lpc_size 7
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#define core_config_bcr_isa_config_pc_size 4
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#define core_config_bcr_isa_config_version 2
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#define core_config_bcr_fpu_build 0x01000f02
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#define core_config_bcr_fpu_build_da 1
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#define core_config_bcr_fpu_build_dd 0
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#define core_config_bcr_fpu_build_dc 0
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#define core_config_bcr_fpu_build_df 0
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#define core_config_bcr_fpu_build_dp 0
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#define core_config_bcr_fpu_build_fd 0
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#define core_config_bcr_fpu_build_fm 0
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#define core_config_bcr_fpu_build_sd 1
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#define core_config_bcr_fpu_build_sc 1
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#define core_config_bcr_fpu_build_sf 1
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#define core_config_bcr_fpu_build_sp 1
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#define core_config_bcr_fpu_build_version 2
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#define core_config_bcr_bs_build 0x00000002
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#define core_config_bcr_bs_build_version 2
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#define core_config_bcr_agu_build 0x01988c02
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#define core_config_bcr_agu_build_accordian 1
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#define core_config_bcr_agu_build_wb_size 4
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#define core_config_bcr_agu_build_num_modifier 24
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#define core_config_bcr_agu_build_num_offset 8
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#define core_config_bcr_agu_build_num_addr 12
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#define core_config_bcr_agu_build_version 2
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#define core_config_bcr_stack_region_build 0x00000002
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#define core_config_bcr_dmac_build 0x000a0101
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#define core_config_bcr_dmac_build_int_cfg 1
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#define core_config_bcr_dmac_build_fifo 1
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#define core_config_bcr_dmac_build_chan_mem 0
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#define core_config_bcr_dmac_build_channels 1
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#define core_config_bcr_dmac_build_version 1
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#define core_config_bcr_core_config 0x00000101
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#define core_config_bcr_core_config_turbo_boost 1
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#define core_config_bcr_core_config_version 1
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#define core_config_bcr_irq_build 0x13101401
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#define core_config_bcr_irq_build_raz 0
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#define core_config_bcr_irq_build_f 1
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#define core_config_bcr_irq_build_p 3
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#define core_config_bcr_irq_build_exts 16
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#define core_config_bcr_irq_build_irqs 20
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#define core_config_bcr_irq_build_version 1
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#define core_config_bcr_pct_build 0x08080102
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#define core_config_bcr_pct_build_version 2
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#define core_config_bcr_pct_build_s 1
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#define core_config_bcr_pct_build_i 0
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#define core_config_bcr_pct_build_c 8
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#define core_config_bcr_cc_build 0x006f0004
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#define core_config_bcr_cc_build_version 4
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#define core_config_bcr_cc_build_cc 111
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#define core_config_bcr_smart_build 0x00002003
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#define core_config_bcr_smart_build_version 3
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#define core_config_bcr_smart_build_stack_size 8
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#define core_config_cir_aux_iccm 0x00000000
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#define core_config_cir_dmp_peripheral 0xf0000000
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#define core_config_mpu_present 1
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#define core_config_mpu 1
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#define core_config_mpu_regions 16
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#define core_config_family 4
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#define core_config_core_version 2
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#define core_config_family_name "arcv2em"
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#define core_config_rgf_num_banks 2
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#define core_config_rgf_banked_regs 32
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#define core_config_rgf_num_wr_ports 2
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#define core_config_endian "little"
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#define core_config_endian_little 1
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#define core_config_endian_big 0
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#define core_config_lpc_size 32
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#define core_config_pc_size 32
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#define core_config_addr_size 32
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#define core_config_code_density 1
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#define core_config_div_rem "radix2"
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#define core_config_div_rem_radix2 1
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#define core_config_dsp_itu 1
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#define core_config_turbo_boost 1
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#define core_config_swap 1
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#define core_config_bitscan 1
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#define core_config_mpy_option "mpyd"
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#define core_config_mpy_option_num 8
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#define core_config_shift_assist 1
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#define core_config_barrel_shifter 1
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#define core_config_dsp 1
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#define core_config_dsp2 1
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#define core_config_dsp_complex 1
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#define core_config_dsp_divsqrt "radix2"
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#define core_config_dsp_divsqrt_radix2 1
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#define core_config_dsp_accshift "full"
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#define core_config_dsp_accshift_full 1
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#define core_config_agu_large 1
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#define core_config_agu_wb_depth 4
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#define core_config_agu_accord 1
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#define core_config_xy 1
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#define core_config_xy_config "dccm_y"
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#define core_config_xy_config_dccm_y 1
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#define core_config_xy_size 8192
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#define core_config_xy_size_KM "8K"
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#define core_config_xy_interleave 1
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#define core_config_xy_y_base 0xe0000000
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#define core_config_fpus_div 1
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#define core_config_fpu_mac 1
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#define core_config_fpus_mpy_fast 1
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#define core_config_fpus_div_slow 1
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#define core_config_bitstream 1
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#define core_config_timer0 1
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#define core_config_timer0_level 1
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#define core_config_timer0_vector 16
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#define core_config_timer1 1
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#define core_config_timer1_level 0
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#define core_config_timer1_vector 17
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#define core_config_action_points 2
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#define core_config_stack_check 1
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#define core_config_smart_stack_entries 8
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#define core_config_interrupts_present 1
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#define core_config_interrupts_number 20
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#define core_config_interrupts_priorities 4
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#define core_config_interrupts_externals 16
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#define core_config_interrupts 20
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#define core_config_interrupt_priorities 4
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#define core_config_ext_interrupts 16
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#define core_config_interrupts_firq 1
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#define core_config_interrupts_base 0x0
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#define core_config_dcache_present 1
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#define core_config_dcache_size 16384
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#define core_config_dcache_line_size 32
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#define core_config_dcache_ways 2
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#define core_config_dcache_feature 2
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#define core_config_icache_present 1
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#define core_config_icache_size 16384
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#define core_config_icache_line_size 32
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#define core_config_icache_ways 2
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#define core_config_icache_feature 2
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#define core_config_dccm_present 1
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#define core_config_dccm_size 0x80000
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#define core_config_dccm_base 0x80000000
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#define core_config_dccm_interleave 1
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#define core_config_iccm_present 1
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#define core_config_iccm0_present 1
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#define core_config_iccm_size 0x80000
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#define core_config_iccm0_size 0x40000
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#define core_config_iccm_base 0x00000000
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#define core_config_iccm0_base 0x00000000
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#define core_config_pct_counters 8
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#define core_config_dmac 1
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#define core_config_dmac_channels 2
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#define core_config_dmac_registers 0
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#define core_config_dmac_fifo_depth 2
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#define core_config_dmac_int_config "single_internal"
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#endif /* H_CORE_CONFIG */
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@@ -1,73 +0,0 @@
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/* ------------------------------------------
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* Copyright (c) 2017, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
|
||||
|
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* 1) Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
|
||||
* 2) Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
|
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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*
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--------------------------------------------- */
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#ifndef H_NSIM
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#define H_NSIM
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#include "arc/arc_feature_config.h"
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#include "arc/arc_em.h"
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#include "arc/arc_timer.h"
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#include "nsim_uart_obj.h"
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/** CPU Clock Frequency definition */
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#if defined(BOARD_CPU_FREQ)
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/*!< Get cpu clock frequency definition from build system */
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#define CLK_CPU (BOARD_CPU_FREQ)
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#elif defined(ARC_FEATURE_CPU_CLOCK_FREQ)
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/*!< Get cpu clock frequency definition from tcf file */
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#define CLK_CPU (ARC_FEATURE_CPU_CLOCK_FREQ)
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#else
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/*!< Default cpu clock frequency */
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#define CLK_CPU (1000000)
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#endif
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/* common macros must be defined by all boards */
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#define BOARD_CONSOLE_UART_ID NSIM_UART_0_ID
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#define BOARD_CONSOLE_UART_BAUD 115200
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#define BOARD_SYS_TIMER_ID TIMER_0
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#define BOARD_SYS_TIMER_INTNO INTNO_TIMER0
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#define BOARD_SYS_TIMER_HZ (1000)
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/** board timer 1ms means what HZ count */
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#define BOARD_SYS_TIMER_MS_HZ (1000)
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/** board ms counter convention based on the global timer counter */
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#define BOARD_SYS_TIMER_MS_CONV (BOARD_SYS_TIMER_MS_HZ / BOARD_SYS_TIMER_HZ)
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#define BOARD_OS_TIMER_ID TIMER_0
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#define BOARD_OS_TIMER_INTNO INTNO_TIMER0
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#define BOARD_CPU_CLOCK CLK_CPU
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#define button_read(x) 1
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#define led_write(x, y) EMBARC_PRINTF("led out: %x, %x\r\n", x, y)
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#define BOARD_LED_MASK 0xff
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#endif /* H_NSIM */
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@@ -1,58 +0,0 @@
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/* ------------------------------------------
|
||||
* Copyright (c) 2017, Synopsys, Inc. All rights reserved.
|
||||
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
||||
* 1) Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
|
||||
* 2) Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
|
||||
* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
--------------------------------------------- */
|
||||
#ifndef H_NSIM_UART_OBJ
|
||||
#define H_NSIM_UART_OBJ
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||||
|
||||
#include "device/ip_hal/dev_uart.h"
|
||||
|
||||
/**
|
||||
* NSIM UART Object Number
|
||||
*/
|
||||
#define DW_UART_NUM (1) /*!< NSIM UART valid number */
|
||||
|
||||
/**
|
||||
* NSIM UART Object ID Macros
|
||||
*/
|
||||
#define NSIM_UART_0_ID (0) /*!< uart 0 id macro */
|
||||
|
||||
/**
|
||||
* NSIM UART Object Control Macros
|
||||
*/
|
||||
#define USE_NSIM_UART_0 (1) /*!< enable use nsim uart 0 (stdio) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* H_NSIM_UART_OBJ */
|
||||
47
board/ARC_NSIM_EM/BSP/Inc/tos_config.h
Normal file
47
board/ARC_NSIM_EM/BSP/Inc/tos_config.h
Normal file
@@ -0,0 +1,47 @@
|
||||
#ifndef _TOS_CONFIG_H_
|
||||
#define _TOS_CONFIG_H_
|
||||
|
||||
#include "stddef.h"
|
||||
#include "embARC.h"
|
||||
|
||||
#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量
|
||||
|
||||
#define TOS_CFG_ROUND_ROBIN_EN 1u // 配置TencentOS tiny的内核是否开启时间片轮转
|
||||
|
||||
#define TOS_CFG_OBJECT_VERIFY 0u // 配置TencentOS tiny是否校验指针合法
|
||||
|
||||
#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏
|
||||
|
||||
#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块
|
||||
|
||||
#define TOS_CFG_MMHEAP_POOL_SIZE (1024*20) // 配置TencentOS tiny动态内存池大小
|
||||
|
||||
#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE (1024*20) // 配置TencentOS tiny动态内存池大小
|
||||
|
||||
#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块
|
||||
|
||||
#define TOS_CFG_QUEUE_EN 1u // 配置TencentOS tiny是否开启队列模块
|
||||
|
||||
#define TOS_CFG_TIMER_EN 1u // 配置TencentOS tiny是否开启软件定时器模块
|
||||
|
||||
#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
|
||||
|
||||
#define TOS_CFG_MMBLK_EN 1u
|
||||
|
||||
#if (TOS_CFG_QUEUE_EN > 0u)
|
||||
#define TOS_CFG_MSG_EN 1u
|
||||
#else
|
||||
#define TOS_CFG_MSG_EN 0u
|
||||
#endif
|
||||
|
||||
#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小
|
||||
|
||||
#define TOS_CFG_IDLE_TASK_STK_SIZE 256u // 配置TencentOS tiny空闲任务栈大小
|
||||
|
||||
#define TOS_CFG_CPU_TICK_PER_SECOND 100u // 配置TencentOS tiny的tick频率
|
||||
|
||||
#define TOS_CFG_CPU_CLOCK BOARD_CPU_CLOCK // 配置TencentOS tiny CPU频率
|
||||
|
||||
#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式
|
||||
|
||||
#endif
|
||||
@@ -1,252 +0,0 @@
|
||||
.ifndef __core_config_s
|
||||
.define __core_config_s, 1
|
||||
.define core_config_cir_identity,0x00000043
|
||||
.define core_config_cir_identity_chipid,0
|
||||
.define core_config_cir_identity_arcnum,0
|
||||
.define core_config_cir_identity_arcver,67
|
||||
.define core_config_cir_identity_family,4
|
||||
.define core_config_cir_identity_corever,3
|
||||
.define core_config_cir_aux_dccm,0x80000000
|
||||
.define core_config_bcr_bcr_ver,0x00000002
|
||||
.define core_config_bcr_bcr_ver_version,2
|
||||
.define core_config_bcr_vecbase_ac_build,0x00000010
|
||||
.define core_config_bcr_mpu_build,0x00010002
|
||||
.define core_config_bcr_mpu_build_i,0
|
||||
.define core_config_bcr_mpu_build_s,0
|
||||
.define core_config_bcr_mpu_build_regions,16
|
||||
.define core_config_bcr_mpu_build_version,2
|
||||
.define core_config_bcr_rf_build,0x0000c902
|
||||
.define core_config_bcr_rf_build_version,2
|
||||
.define core_config_bcr_rf_build_p,1
|
||||
.define core_config_bcr_rf_build_e,0
|
||||
.define core_config_bcr_rf_build_r,0
|
||||
.define core_config_bcr_rf_build_b,1
|
||||
.define core_config_bcr_rf_build_d,3
|
||||
.define core_config_bcr_d_cache_build,0x00215104
|
||||
.define core_config_bcr_d_cache_build_version,4
|
||||
.define core_config_bcr_d_cache_build_assoc,1
|
||||
.define core_config_bcr_d_cache_build_capacity,5
|
||||
.define core_config_bcr_d_cache_build_bsize,1
|
||||
.define core_config_bcr_d_cache_build_fl,2
|
||||
.define core_config_bcr_d_cache_build_ioc,0
|
||||
.define core_config_bcr_d_cache_build_cp,0
|
||||
.define core_config_bcr_d_cache_build_u,0
|
||||
.define core_config_bcr_d_cache_build_cycles,0
|
||||
.define core_config_bcr_dccm_build,0x00010904
|
||||
.define core_config_bcr_dccm_build_cycles,0
|
||||
.define core_config_bcr_dccm_build_interleave,1
|
||||
.define core_config_bcr_dccm_build_size1,0
|
||||
.define core_config_bcr_dccm_build_size0,11
|
||||
.define core_config_bcr_dccm_build_version,4
|
||||
.define core_config_bcr_timer_build,0x00010304
|
||||
.define core_config_bcr_timer_build_sp1,0
|
||||
.define core_config_bcr_timer_build_sp0,0
|
||||
.define core_config_bcr_timer_build_p1,0
|
||||
.define core_config_bcr_timer_build_p0,1
|
||||
.define core_config_bcr_timer_build_st1,0
|
||||
.define core_config_bcr_timer_build_st0,0
|
||||
.define core_config_bcr_timer_build_rtc,0
|
||||
.define core_config_bcr_timer_build_rtsc_ver,1
|
||||
.define core_config_bcr_timer_build_rtsc,0
|
||||
.define core_config_bcr_timer_build_t0,1
|
||||
.define core_config_bcr_timer_build_t1,1
|
||||
.define core_config_bcr_timer_build_version,4
|
||||
.define core_config_bcr_ap_build,0x00000405
|
||||
.define core_config_bcr_ap_build_version,5
|
||||
.define core_config_bcr_ap_build_type,4
|
||||
.define core_config_bcr_i_cache_build,0x00225104
|
||||
.define core_config_bcr_i_cache_build_assoc,1
|
||||
.define core_config_bcr_i_cache_build_version,4
|
||||
.define core_config_bcr_i_cache_build_capacity,5
|
||||
.define core_config_bcr_i_cache_build_bsize,2
|
||||
.define core_config_bcr_i_cache_build_fl,2
|
||||
.define core_config_bcr_i_cache_build_d,0
|
||||
.define core_config_bcr_iccm_build,0x00000a04
|
||||
.define core_config_bcr_iccm_build_iccm1_size1,0
|
||||
.define core_config_bcr_iccm_build_iccm0_size1,0
|
||||
.define core_config_bcr_iccm_build_iccm1_size0,0
|
||||
.define core_config_bcr_iccm_build_iccm0_size0,11
|
||||
.define core_config_bcr_iccm_build_version,4
|
||||
.define core_config_bcr_xy_build,0x00001520
|
||||
.define core_config_bcr_xy_build_memsize,1
|
||||
.define core_config_bcr_xy_build_interleaved,1
|
||||
.define core_config_bcr_xy_build_config,1
|
||||
.define core_config_bcr_xy_build_version,32
|
||||
.define core_config_bcr_dsp_build,0x00003521
|
||||
.define core_config_bcr_dsp_build_wide,0
|
||||
.define core_config_bcr_dsp_build_itu_pa,0
|
||||
.define core_config_bcr_dsp_build_acc_shift,2
|
||||
.define core_config_bcr_dsp_build_comp,1
|
||||
.define core_config_bcr_dsp_build_divsqrt,1
|
||||
.define core_config_bcr_dsp_build_version,33
|
||||
.define core_config_bcr_multiply_build,0x00022a06
|
||||
.define core_config_bcr_multiply_build_version16x16,2
|
||||
.define core_config_bcr_multiply_build_dsp,2
|
||||
.define core_config_bcr_multiply_build_cyc,2
|
||||
.define core_config_bcr_multiply_build_type,2
|
||||
.define core_config_bcr_multiply_build_version32x32,6
|
||||
.define core_config_bcr_swap_build,0x00000003
|
||||
.define core_config_bcr_swap_build_version,3
|
||||
.define core_config_bcr_norm_build,0x00000003
|
||||
.define core_config_bcr_norm_build_version,3
|
||||
.define core_config_bcr_minmax_build,0x00000002
|
||||
.define core_config_bcr_minmax_build_version,2
|
||||
.define core_config_bcr_barrel_build,0x00000303
|
||||
.define core_config_bcr_barrel_build_version,3
|
||||
.define core_config_bcr_barrel_build_shift_option,3
|
||||
.define core_config_bcr_isa_config,0x12047402
|
||||
.define core_config_bcr_isa_config_d,1
|
||||
.define core_config_bcr_isa_config_c,2
|
||||
.define core_config_bcr_isa_config_l,0
|
||||
.define core_config_bcr_isa_config_n,0
|
||||
.define core_config_bcr_isa_config_a,0
|
||||
.define core_config_bcr_isa_config_b,0
|
||||
.define core_config_bcr_isa_config_addr_size,4
|
||||
.define core_config_bcr_isa_config_lpc_size,7
|
||||
.define core_config_bcr_isa_config_pc_size,4
|
||||
.define core_config_bcr_isa_config_version,2
|
||||
.define core_config_bcr_fpu_build,0x01000f02
|
||||
.define core_config_bcr_fpu_build_da,1
|
||||
.define core_config_bcr_fpu_build_dd,0
|
||||
.define core_config_bcr_fpu_build_dc,0
|
||||
.define core_config_bcr_fpu_build_df,0
|
||||
.define core_config_bcr_fpu_build_dp,0
|
||||
.define core_config_bcr_fpu_build_fd,0
|
||||
.define core_config_bcr_fpu_build_fm,0
|
||||
.define core_config_bcr_fpu_build_sd,1
|
||||
.define core_config_bcr_fpu_build_sc,1
|
||||
.define core_config_bcr_fpu_build_sf,1
|
||||
.define core_config_bcr_fpu_build_sp,1
|
||||
.define core_config_bcr_fpu_build_version,2
|
||||
.define core_config_bcr_agu_build,0x01988c02
|
||||
.define core_config_bcr_agu_build_accordian,1
|
||||
.define core_config_bcr_agu_build_wb_size,4
|
||||
.define core_config_bcr_agu_build_num_modifier,24
|
||||
.define core_config_bcr_agu_build_num_offset,8
|
||||
.define core_config_bcr_agu_build_num_addr,12
|
||||
.define core_config_bcr_agu_build_version,2
|
||||
.define core_config_bcr_stack_region_build,0x00000002
|
||||
.define core_config_bcr_dmac_build,0x000a0101
|
||||
.define core_config_bcr_dmac_build_int_cfg,1
|
||||
.define core_config_bcr_dmac_build_fifo,1
|
||||
.define core_config_bcr_dmac_build_chan_mem,0
|
||||
.define core_config_bcr_dmac_build_channels,1
|
||||
.define core_config_bcr_dmac_build_version,1
|
||||
.define core_config_bcr_core_config,0x00000101
|
||||
.define core_config_bcr_core_config_turbo_boost,1
|
||||
.define core_config_bcr_core_config_version,1
|
||||
.define core_config_bcr_irq_build,0x13101401
|
||||
.define core_config_bcr_irq_build_raz,0
|
||||
.define core_config_bcr_irq_build_f,1
|
||||
.define core_config_bcr_irq_build_p,3
|
||||
.define core_config_bcr_irq_build_exts,16
|
||||
.define core_config_bcr_irq_build_irqs,20
|
||||
.define core_config_bcr_irq_build_version,1
|
||||
.define core_config_bcr_pct_build,0x08080102
|
||||
.define core_config_bcr_pct_build_version,2
|
||||
.define core_config_bcr_pct_build_s,1
|
||||
.define core_config_bcr_pct_build_i,0
|
||||
.define core_config_bcr_pct_build_c,8
|
||||
.define core_config_bcr_cc_build,0x006f0004
|
||||
.define core_config_bcr_cc_build_version,4
|
||||
.define core_config_bcr_cc_build_cc,111
|
||||
.define core_config_bcr_smart_build,0x00002003
|
||||
.define core_config_bcr_smart_build_version,3
|
||||
.define core_config_bcr_smart_build_stack_size,8
|
||||
.define core_config_cir_aux_iccm,0x00000000
|
||||
.define core_config_cir_dmp_peripheral,0xf0000000
|
||||
.define core_config_family,4
|
||||
.define core_config_core_version,2
|
||||
.define core_config_family_name,"arcv2em"
|
||||
.define core_config_rgf_num_banks,2
|
||||
.define core_config_rgf_banked_regs,32
|
||||
.define core_config_rgf_num_wr_ports,2
|
||||
.define core_config_endian,"little"
|
||||
.define core_config_endian_little,1
|
||||
.define core_config_endian_big,0
|
||||
.define core_config_lpc_size,32
|
||||
.define core_config_pc_size,32
|
||||
.define core_config_addr_size,32
|
||||
.define core_config_code_density,1
|
||||
.define core_config_div_rem,"radix2"
|
||||
.define core_config_div_rem_radix2,1
|
||||
.define core_config_dsp_itu,1
|
||||
.define core_config_turbo_boost,1
|
||||
.define core_config_swap,1
|
||||
.define core_config_bitscan,1
|
||||
.define core_config_mpy_option,"mpyd"
|
||||
.define core_config_mpy_option_num,8
|
||||
.define core_config_shift_assist,1
|
||||
.define core_config_barrel_shifter,1
|
||||
.define core_config_mpu_present,1
|
||||
.define core_config_mpu,1
|
||||
.define core_config_mpu_regions,16
|
||||
.define core_config_dsp,1
|
||||
.define core_config_dsp2,1
|
||||
.define core_config_dsp_complex,1
|
||||
.define core_config_dsp_divsqrt,"radix2"
|
||||
.define core_config_dsp_divsqrt_radix2,1
|
||||
.define core_config_dsp_accshift,"full"
|
||||
.define core_config_dsp_accshift_full,1
|
||||
.define core_config_agu_large,1
|
||||
.define core_config_agu_wb_depth,4
|
||||
.define core_config_agu_accord,1
|
||||
.define core_config_xy,1
|
||||
.define core_config_xy_config,"dccm_y"
|
||||
.define core_config_xy_config_dccm_y,1
|
||||
.define core_config_xy_size,8192
|
||||
.define core_config_xy_size_KM,"8K"
|
||||
.define core_config_xy_interleave,1
|
||||
.define core_config_xy_y_base,0xe0000000
|
||||
.define core_config_fpus_div,1
|
||||
.define core_config_fpu_mac,1
|
||||
.define core_config_fpuda,1
|
||||
.define core_config_fpus_mpy_slow,1
|
||||
.define core_config_fpus_div_slow,1
|
||||
.define core_config_bitstream,1
|
||||
.define core_config_timer0,1
|
||||
.define core_config_timer0_level,1
|
||||
.define core_config_timer0_vector,16
|
||||
.define core_config_timer1,1
|
||||
.define core_config_timer1_level,0
|
||||
.define core_config_timer1_vector,17
|
||||
.define core_config_action_points,2
|
||||
.define core_config_stack_check,1
|
||||
.define core_config_smart_stack_entries,8
|
||||
.define core_config_interrupts_present,1
|
||||
.define core_config_interrupts_number,20
|
||||
.define core_config_interrupts_priorities,4
|
||||
.define core_config_interrupts_externals,16
|
||||
.define core_config_interrupts,20
|
||||
.define core_config_interrupt_priorities,4
|
||||
.define core_config_ext_interrupts,16
|
||||
.define core_config_interrupts_firq,1
|
||||
.define core_config_interrupts_base,0x0
|
||||
.define core_config_dcache_present,1
|
||||
.define core_config_dcache_size,16384
|
||||
.define core_config_dcache_line_size,32
|
||||
.define core_config_dcache_ways,2
|
||||
.define core_config_dcache_feature,2
|
||||
.define core_config_icache_present,1
|
||||
.define core_config_icache_size,16384
|
||||
.define core_config_icache_line_size,32
|
||||
.define core_config_icache_ways,2
|
||||
.define core_config_icache_feature,2
|
||||
.define core_config_dccm_present,1
|
||||
.define core_config_dccm_size,0x80000
|
||||
.define core_config_dccm_base,0x80000000
|
||||
.define core_config_dccm_interleave,1
|
||||
.define core_config_iccm_present,1
|
||||
.define core_config_iccm0_present,1
|
||||
.define core_config_iccm_size,0x80000
|
||||
.define core_config_iccm0_size,0x80000
|
||||
.define core_config_iccm_base,0x00000000
|
||||
.define core_config_iccm0_base,0x00000000
|
||||
.define core_config_pct_counters,8
|
||||
.define core_config_dmac,1
|
||||
.define core_config_dmac_channels,2
|
||||
.define core_config_dmac_registers,0
|
||||
.define core_config_dmac_fifo_depth,2
|
||||
.define core_config_dmac_int_config,"single_internal"
|
||||
.endif ; __core_config_s
|
||||
|
||||
@@ -1,22 +1,17 @@
|
||||
#include "cmsis_os.h"
|
||||
|
||||
#define APPLICATION_TASK_STK_SIZE 1024*64
|
||||
#include <stdio.h>
|
||||
|
||||
extern void application_entry(void *arg);
|
||||
osThreadDef(application_entry, osPriorityNormal, 1, APPLICATION_TASK_STK_SIZE);
|
||||
|
||||
EMBARC_WEAK void application_entry(void *arg)
|
||||
{
|
||||
while (1) {
|
||||
printf("This is a demo task,please use your task entry!\r\n");
|
||||
tos_task_delay(1000);
|
||||
}
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
printf("Welcome to TencentOS tiny\r\n");
|
||||
osKernelInitialize(); // TOS Tiny kernel initialize
|
||||
osThreadCreate(osThread(application_entry), NULL); // Create TOS Tiny task
|
||||
osKernelStart(); // Start TOS Tiny
|
||||
printf("hello world\r\n");
|
||||
printf("***I am task\r\n");
|
||||
osKernelInitialize(); //TOS Tiny kernel initialize
|
||||
application_entry(NULL);
|
||||
osKernelStart(); //Start TOS Tiny
|
||||
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,41 +0,0 @@
|
||||
/* ------------------------------------------
|
||||
* Copyright (c) 2017, Synopsys, Inc. All rights reserved.
|
||||
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
||||
* 1) Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
|
||||
* 2) Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
|
||||
* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
--------------------------------------------- */
|
||||
#include "arc/arc_timer.h"
|
||||
#include "board.h"
|
||||
|
||||
/**
|
||||
* @brief necessary board hardware initialization
|
||||
* @note It is better to disable interrupts when calling this function
|
||||
* remember to enable interrupt when you want to use them
|
||||
*/
|
||||
void board_init(void)
|
||||
{
|
||||
arc_timer_init();
|
||||
}
|
||||
@@ -1,129 +0,0 @@
|
||||
/* ------------------------------------------
|
||||
* Copyright (c) 2017, Synopsys, Inc. All rights reserved.
|
||||
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
||||
* 1) Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
|
||||
* 2) Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
|
||||
* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
--------------------------------------------- */
|
||||
#include <stdio.h>
|
||||
#include "nsim.h"
|
||||
|
||||
/**
|
||||
* NSIM UART 0 Object Instantiation
|
||||
*/
|
||||
#if (USE_NSIM_UART_0)
|
||||
|
||||
static DEV_UART nsim_uart_0; /*!< nsim uart object */
|
||||
|
||||
/** nsim uart 0 open */
|
||||
static int32_t nsim_uart_0_open(uint32_t baud)
|
||||
{
|
||||
/* no need to open, stdio is used */
|
||||
return 0;
|
||||
}
|
||||
/** nsim uart 0 close */
|
||||
static int32_t nsim_uart_0_close(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
/** nsim uart 0 control */
|
||||
static int32_t nsim_uart_0_control(uint32_t ctrl_cmd, void *param)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
/** nsim uart 0 write */
|
||||
static int32_t nsim_uart_0_write(const void *data, uint32_t len)
|
||||
{
|
||||
return fwrite(data, len, sizeof(uint8_t), stdout);
|
||||
}
|
||||
/** nsim uart 0 close */
|
||||
static int32_t nsim_uart_0_read(void *data, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
int32_t c;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
c = getchar();
|
||||
if (c < 0) {
|
||||
break;
|
||||
}
|
||||
if (c == 10) {
|
||||
c = 13;
|
||||
}
|
||||
*((uint8_t *)data) = (uint8_t)c;
|
||||
data++;
|
||||
}
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/** install nsim uart 0 to system */
|
||||
static void nsim_uart_0_install(void)
|
||||
{
|
||||
DEV_UART *nsim_uart_ptr = &nsim_uart_0;
|
||||
|
||||
/** uart dev init */
|
||||
nsim_uart_ptr->uart_open = nsim_uart_0_open;
|
||||
nsim_uart_ptr->uart_close = nsim_uart_0_close;
|
||||
nsim_uart_ptr->uart_control = nsim_uart_0_control;
|
||||
nsim_uart_ptr->uart_write = nsim_uart_0_write;
|
||||
nsim_uart_ptr->uart_read = nsim_uart_0_read;
|
||||
|
||||
}
|
||||
#endif /* USE_DW_UART_0 */
|
||||
|
||||
/**
|
||||
* \brief install all uart objects
|
||||
* \note \b MUST be called during system init
|
||||
*/
|
||||
static void nsim_uart_all_install(void)
|
||||
{
|
||||
#if (USE_NSIM_UART_0)
|
||||
nsim_uart_0_install();
|
||||
#endif
|
||||
}
|
||||
|
||||
/** get one uart device structure */
|
||||
DEV_UART_PTR uart_get_dev(int32_t uart_id)
|
||||
{
|
||||
static uint32_t install_flag = 0;
|
||||
|
||||
/* intall device objects */
|
||||
if (install_flag == 0) {
|
||||
install_flag = 1;
|
||||
nsim_uart_all_install();
|
||||
}
|
||||
|
||||
switch (uart_id) {
|
||||
#if (USE_NSIM_UART_0)
|
||||
case NSIM_UART_0_ID:
|
||||
return &nsim_uart_0;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
@@ -1,259 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
|
||||
<cconfiguration id="org.eclipse.cdt.cross.arc.gnu.linux.elf.debug.1536038980">
|
||||
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="org.eclipse.cdt.cross.arc.gnu.linux.elf.debug.1536038980" moduleId="org.eclipse.cdt.core.settings" name="arcem">
|
||||
|
||||
<externalSettings/>
|
||||
|
||||
<extensions>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
|
||||
</extensions>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
||||
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.cross.arc.gnu.buildArtefactType.application" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.cross.arc.gnu.buildArtefactType.application,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="ARC ARCEM" id="org.eclipse.cdt.cross.arc.gnu.linux.elf.debug.1536038980" name="arcem" optionalBuildProperties="" parent="org.eclipse.cdt.cross.arc.gnu.linux.elf.debug">
|
||||
|
||||
<folderInfo id="org.eclipse.cdt.cross.arc.gnu.linux.elf.debug.1536038980." name="/" resourcePath="">
|
||||
|
||||
<toolChain id="org.eclipse.cdt.cross.arc.gnu.linux.elf.toolchain.debug.1518186599" name="GNU Toolchain for ARC EM" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.toolchain.debug">
|
||||
|
||||
<option id="org.eclipse.cdt.cross.arc.gnu.linux.option.debugging.level.2042344771" name="Debug level" superClass="org.eclipse.cdt.cross.arc.gnu.linux.option.debugging.level" value="org.eclipse.cdt.cross.arc.gnu.base.option.debugging.level.max" valueType="enumerated"/>
|
||||
|
||||
<targetPlatform id="org.eclipse.cdt.cross.arc.gnu.linux.elf.platform.debug.589546950" isAbstract="false" name="All Platform" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.platform.debug"/>
|
||||
|
||||
<builder autoBuildTarget="all" buildPath="${workspace_loc:/blinky}" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.cross.arc.gnu.linux.elf.builder.debug.1840405665" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="GNU Make Builder for ARC" parallelBuildOn="false" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.builder.debug"/>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.assembler.debug.420501660" name="ARC ELF32 GCC Assembler" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.assembler.debug">
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="org.eclipse.cdt.cross.arc.gnu.assembler.option.include.paths.1349156369" name="Include paths (-I)" superClass="org.eclipse.cdt.cross.arc.gnu.assembler.option.include.paths" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/core/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/pm/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/hal/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/arch/arc/nsim/common/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/arch/arc/nsim/em/gcc}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/board/ARC_NSIM_EM/TOS-CONFIG}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/osal/cmsis_os}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/board/ARC_NSIM_EM/BSP/Inc}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/platform/vendor_bsp/embarc_bsp/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/platform/vendor_bsp/embarc_bsp/library}""/>
|
||||
|
||||
</option>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="org.eclipse.cdt.cross.arc.gnu.assembler.option.preprocessor.def.311605714" name="Defined symbols (-D)" superClass="org.eclipse.cdt.cross.arc.gnu.assembler.option.preprocessor.def" valueType="definedSymbols">
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_CPU_FREQ=25000000"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_DEV_FREQ=50000000"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_NSIM"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="CPU_ARC"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="CURRENT_CORE=arcem"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="EMBARC_TCF_GENERATED"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="EMBARC_USE_BOARD_MAIN"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="HW_VERSION=10"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="LIB_CLIB"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="PLATFORM_EMBARC"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="TOOLCHAIN=ARC_GNU"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HAVE_LIBGLOSS_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HEAPSIZE=8192"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HOSTLINK_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_NSIM_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_STACKSIZE=2048"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="__GNU__"/>
|
||||
|
||||
</option>
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.linux.assembler.base.input.1466071146"/>
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.em.linux.assembler.base.input.1280163649" superClass="org.eclipse.cdt.cross.arc.gnu.em.linux.assembler.base.input"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.c.compiler.debug.448240261" name="ARC ELF32 GCC C Compiler" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.c.compiler.debug">
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.include.paths.79614265" name="Include paths (-I)" superClass="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.include.paths" valueType="includePath">
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/core/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/pm/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/kernel/hal/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/arch/arc/nsim/common/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/arch/arc/nsim/em/gcc}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/board/ARC_NSIM_EM/TOS-CONFIG}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/osal/cmsis_os}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/board/ARC_NSIM_EM/BSP/Inc}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/platform/vendor_bsp/embarc_bsp/include}""/>
|
||||
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/blinky/tencentos/platform/vendor_bsp/embarc_bsp/library}""/>
|
||||
|
||||
</option>
|
||||
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.preprocessor.def.1347816001" name="Defined symbols (-D)" superClass="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.preprocessor.def" valueType="definedSymbols">
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_CPU_FREQ=25000000"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_DEV_FREQ=50000000"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="BOARD_NSIM"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="CPU_ARC"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="CURRENT_CORE=arcem"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="EMBARC_TCF_GENERATED"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="EMBARC_USE_BOARD_MAIN"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="HW_VERSION=10"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="LIB_CLIB"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="PLATFORM_EMBARC"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="TOOLCHAIN=ARC_GNU"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HAVE_LIBGLOSS_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HEAPSIZE=8192"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_HOSTLINK_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_NSIM_"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="_STACKSIZE=2048"/>
|
||||
|
||||
<listOptionValue builtIn="false" value="__GNU__"/>
|
||||
|
||||
</option>
|
||||
|
||||
<option id="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.optimization.level.1856088319" name="Optimization level" superClass="org.eclipse.cdt.cross.arc.gnu.c.compiler.option.optimization.level" value="org.eclipse.cdt.cross.arc.gnu.base.option.optimization.level.none" valueType="enumerated"/>
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.linux.c.compiler.base.input.1213319901"/>
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.em.linux.c.compiler.base.input.119616919" superClass="org.eclipse.cdt.cross.arc.gnu.em.linux.c.compiler.base.input"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.cpp.compiler.debug.1443248443" name="ARC ELF32 GCC C++ Compiler" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.cpp.compiler.debug">
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.em.linux.cpp.compiler.base.input.664957218" superClass="org.eclipse.cdt.cross.arc.gnu.em.linux.cpp.compiler.base.input"/>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.c.linker.debug.1864971900" name="ARC ELF32 GCC C Linker" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.c.linker.debug">
|
||||
|
||||
<inputType id="org.eclipse.cdt.cross.arc.gnu.c.linker.input.976252164" superClass="org.eclipse.cdt.cross.arc.gnu.c.linker.input">
|
||||
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
|
||||
</inputType>
|
||||
|
||||
</tool>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.cpp.linker.debug.116146273" name="ARC ELF32 GCC C++ Linker" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.cpp.linker.debug"/>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.createflash.debug.2095919826" name="ARC ELF32 GNU Create Flash Image" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.createflash.debug"/>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.elf.createlisting.debug.207593566" name="ARC ELF32 GNU Create Listing" superClass="org.eclipse.cdt.cross.arc.gnu.linux.elf.createlisting.debug"/>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.linux.printsize.base.615400078" name="ARC ELF32 GNU Print Size" superClass="org.eclipse.cdt.cross.arc.gnu.linux.printsize.base"/>
|
||||
|
||||
<tool id="org.eclipse.cdt.cross.arc.gnu.em.linux.archiver.base.1467791402" name="ARC ELF32 GCC Archiver" superClass="org.eclipse.cdt.cross.arc.gnu.em.linux.archiver.base"/>
|
||||
|
||||
</toolChain>
|
||||
|
||||
</folderInfo>
|
||||
|
||||
</configuration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
|
||||
</cconfiguration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
|
||||
<project id="baremetal_arc_feature_cache.org.eclipse.cdt.cross.arc.gnu.linux.elf.1234567890" name="ARC Cross ELF32 Target Application" projectType="org.eclipse.cdt.cross.arc.gnu.linux.elf"/>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
|
||||
<configuration configurationName="arcem">
|
||||
|
||||
<resource resourceType="PROJECT" workspacePath="/blinky"/>
|
||||
|
||||
</configuration>
|
||||
|
||||
</storageModule>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
|
||||
</cproject>
|
||||
@@ -1,14 +0,0 @@
|
||||
### 运行IDE步骤
|
||||
|
||||
1. 修改文件`.project`中tencentos-tiny的路径
|
||||
|
||||
```
|
||||
<variableList>
|
||||
<variable>
|
||||
<name>TencentOS_ROOT</name>
|
||||
<value>file:/C:/Users/jingru/Documents/git/tencentos/TencentOS-tiny</value>
|
||||
</variable>
|
||||
</variableList>
|
||||
```
|
||||
2. 打开ide，点击**File->Open Projects From File system**, 添加`hello_world`根路径。
|
||||
3. 点击**Denug**启动调试
|
||||
@@ -1,237 +0,0 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by tool: [projectgenerator] version: [3.3.0] date: [Mon Aug 05 10:29:11 CST 2019]
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
# Generic Makefile (based on gcc)
|
||||
#
|
||||
# ChangeLog :
|
||||
# 2017-02-10 - Several enhancements + project update mode
|
||||
# 2015-07-22 - first version
|
||||
# ------------------------------------------------
|
||||
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = TencentOS_tiny
|
||||
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -O0
|
||||
|
||||
TOP_DIR = ../../../../
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
KERNEL_SRC = \
|
||||
${wildcard $(TOP_DIR)/kernel/core/*.c}
|
||||
C_SOURCES += $(KERNEL_SRC)
|
||||
|
||||
ARCH_SRC = \
|
||||
${wildcard $(TOP_DIR)/arch/arc/nsim/em/gcc/*.c} \
|
||||
${wildcard $(TOP_DIR)/arch/arc/nsim/common/*.c}
|
||||
C_SOURCES += $(ARCH_SRC)
|
||||
|
||||
CMSIS_SRC = \
|
||||
${wildcard $(TOP_DIR)/osal/cmsis_os/*.c}
|
||||
C_SOURCES += $(CMSIS_SRC)
|
||||
|
||||
HAL_DRIVER_SRC = \
|
||||
$(TOP_DIR)/board/ARC_NSIM_EM/BSP/Src/main.c \
|
||||
$(TOP_DIR)/board/ARC_NSIM_EM/BSP/Src/nsim_init.c \
|
||||
$(TOP_DIR)/board/ARC_NSIM_EM/BSP/Src/nsim_uart_obj.c \
|
||||
$(TOP_DIR)/examples/hello_world/hello_world.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/board/board.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/startup/arc_cxx_support.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_cache.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_connect.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_exception.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_mp.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_mpu.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_timer.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_udma.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_util.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/library/clib/embARC_sbrk.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/library/clib/embARC_syscalls.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/library/console/xprintf/xprintf.c \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/library/console/console_io.c
|
||||
C_SOURCES += $(HAL_DRIVER_SRC)
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/startup/arc_startup.s \
|
||||
$(TOP_DIR)/platform/vendor_bsp/embarc_bsp/arc/arc_exc_asm.s
|
||||
|
||||
|
||||
ASM_SOURCES_S = \
|
||||
$(TOP_DIR)/arch/arc/nsim/em/gcc/port_s.S
|
||||
|
||||
|
||||
#######################################
|
||||
# binaries
|
||||
#######################################
|
||||
PREFIX = arc-elf32-
|
||||
# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)
|
||||
# either it can be added to the PATH environment variable.
|
||||
ifdef GCC_PATH
|
||||
CC = $(GCC_PATH)/$(PREFIX)gcc
|
||||
AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(GCC_PATH)/$(PREFIX)objcopy
|
||||
SZ = $(GCC_PATH)/$(PREFIX)size
|
||||
else
|
||||
CC = $(PREFIX)gcc
|
||||
AS = $(PREFIX)gcc -x assembler-with-cpp
|
||||
CP = $(PREFIX)objcopy
|
||||
SZ = $(PREFIX)size
|
||||
endif
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary -S
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
# cpu
|
||||
# CPU = -mcpu=cortex-m4
|
||||
|
||||
# # fpu
|
||||
# FPU = -mfpu=fpv4-sp-d16
|
||||
|
||||
# # float-abi
|
||||
# FLOAT-ABI = -mfloat-abi=hard
|
||||
|
||||
# # mcu
|
||||
# MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
|
||||
|
||||
# macros for gcc
|
||||
# AS defines
|
||||
AS_DEFS =
|
||||
|
||||
# C defines -DLIB_CONSOLE
|
||||
C_DEFS = \
|
||||
-DLIB_CONSOLE \
|
||||
-DBOARD_NSIM \
|
||||
-DCURRENT_CORE=arcem \
|
||||
-DEMBARC_TCF_GENERATED \
|
||||
-DHW_VERSION=10 \
|
||||
-DLIB_CLIB \
|
||||
-D_HAVE_LIBGLOSS_ \
|
||||
-D_HEAPSIZE=8192 \
|
||||
-D_HOSTLINK_ \
|
||||
-D_NSIM_ \
|
||||
-D_STACKSIZE=2048 \
|
||||
-D__GNU__
|
||||
|
||||
|
||||
|
||||
# AS includes
|
||||
AS_INCLUDES =
|
||||
|
||||
# C includes
|
||||
KERNEL_INC = \
|
||||
-I $(TOP_DIR)/kernel/core/include \
|
||||
-I $(TOP_DIR)/kernel/pm/include \
|
||||
-I $(TOP_DIR)/kernel/hal/include \
|
||||
-I $(TOP_DIR)/arch/arc/nsim/common/include \
|
||||
-I $(TOP_DIR)/arch/arc/nsim/em/gcc \
|
||||
-I $(TOP_DIR)/board/ARC_NSIM_EM/TOS-CONFIG
|
||||
C_INCLUDES += $(KERNEL_INC)
|
||||
CMSIS_INC = \
|
||||
-I $(TOP_DIR)/osal/cmsis_os
|
||||
C_INCLUDES += $(CMSIS_INC)
|
||||
|
||||
HAL_DRIVER_INC = \
|
||||
-I $(TOP_DIR)/board/ARC_NSIM_EM/BSP/Inc \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/embarc_bsp/include \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/embarc_bsp/board \
|
||||
-I $(TOP_DIR)/platform/vendor_bsp/embarc_bsp/library
|
||||
C_INCLUDES += $(HAL_DRIVER_INC)
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = -mcpu=em4_dmips -mlittle-endian -mcode-density -mdiv-rem -mswap -mnorm -mmpy-option=6 -mbarrel-shifter --param l1-cache-size=16384 --param l1-cache-line-size=32 $(C_DEFS) $(C_INCLUDES) $(OPT) -fdata-sections -ffunction-sections -mno-sdata -g
|
||||
|
||||
CFLAGS = -mcpu=em4_dmips -mlittle-endian -mcode-density -mdiv-rem -mswap -mnorm -mmpy-option=6 -mbarrel-shifter --param l1-cache-size=16384 --param l1-cache-line-size=32 $(C_DEFS) $(C_INCLUDES) $(OPT) -fdata-sections -ffunction-sections -mno-sdata -g -std=gnu99
|
||||
|
||||
# ifeq ($(DEBUG), 1)
|
||||
# CFLAGS += -g -gdwarf-2
|
||||
# endif
|
||||
|
||||
|
||||
# Generate dependency information
|
||||
CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"
|
||||
|
||||
|
||||
#######################################
|
||||
# LDFLAGS
|
||||
#######################################
|
||||
# link script
|
||||
LDSCRIPT = linker_template_gnu.ldf
|
||||
|
||||
# libraries -lc -lm -lnosys
|
||||
LIBS = -lc -lgcc
|
||||
LIBDIR =
|
||||
LDFLAGS = --specs=nsim.specs -mcpu=em4_dmips -mlittle-endian -mcode-density -mdiv-rem -mswap -mnorm -mmpy-option=6 -mbarrel-shifter --param l1-cache-size=16384 --param l1-cache-line-size=32 $(LIBDIR) $(LIBS) -mno-sdata -nostartfiles -Wl,-M,-Map=$(BUILD_DIR)/$(TARGET).map -lm -Wl,--script=$(LDSCRIPT)
|
||||
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
|
||||
vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile
|
||||
$(CC) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(HEX) $< $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(BIN) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
run : build/TencentOS_tiny.elf
|
||||
nsimdrv -p nsim_emt=1 -propsfile nsim.props build/TencentOS_tiny.elf
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
|
||||
# *** EOF ***
|
||||
@@ -1,92 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.arc.embeddedcdt.idleNative">
|
||||
<stringAttribute key="com.arc.embeddedcdt.ashling_tdesc_path" value="C:\AshlingOpellaXDforARC\opella-arcem-tdesc.xml"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.ashling_xml_path" value="C:\AshlingOpellaXDforARC\arc-em-cpu.xml"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_app_console" value="false"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_com_ashling_port" value="COM1"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_com_oepnocd_port" value="COM1"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_com_port" value="COM3"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_custom_gdbsever_bin_path" value=""/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_custom_gdbsever_command" value=""/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_ashling_default" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_nsim_default" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_nsimprops_default" value="false"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_nsimtcf_default" value="false"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_openocd_default" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_tools" value="nSIM"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_tools_ashling_path" value="C:\AshlingOpellaXDforARC"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_tools_nsim_path" value="C:/ARC/nSIM/nSIM/bin/nsimdrv.exe"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_external_tools_oepnocd_path" value="C:/arc_gnu/share/openocd/scripts/board/snps_em_sk.cfg"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_gdb_address" value="localhost"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_init_commands" value=""/>
|
||||
<intAttribute key="com.arc.embeddedcdt.debugger_launch_file_format_version" value="2"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_openocd_bin_path" value="C:/arc_gnu/bin/openocd.exe"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_putty_default" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_run_commands" value=""/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimenableexpt" value="true"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimhostlink" value="true"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsiminvaintruexpt" value="true"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimjit" value="false"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.debugger_use_nsimjitthread" value="1"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimmemoexpt" value="true"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimprops" value="false"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.debugger_use_nsimtcf" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.ftdi_core" value="DEFAULT_CORE"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.ftdi_device" value="CUSTOM"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.load_elf" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.nsim_prop_file" value=""/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.nsim_tcf_file" value="C:/Users/jingru/Documents/git/gitlab/embarc/embarc_osp/board/nsim/configs/10/tcf/arcem.tcf"/>
|
||||
<booleanAttribute key="com.arc.embeddedcdt.nsim_use_default_working_dir" value="true"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.nsim_working_directory" value="${workspace_loc:blinky}"/>
|
||||
<stringAttribute key="com.arc.embeddedcdt.timestamp" value="1584601942256"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.AUTO_SOLIB" value="true"/>
|
||||
<listAttribute key="org.eclipse.cdt.debug.mi.core.AUTO_SOLIB_LIST"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arc-elf32-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=".gdbinit"/>
|
||||
<listAttribute key="org.eclipse.cdt.debug.mi.core.SOLIB_PATH"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.STOP_ON_SOLIB_EVENTS" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.breakpointsFullPath" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="org.eclipse.cdt.debug.mi.core.standardCommandFactory"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB" value="true"/>
|
||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB_LIST"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arc-elf32-gdb"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.EXTERNAL_CONSOLE" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
|
||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.arc.embeddedcdt.RemoteGDBDebugger"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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||||
@@ -1,104 +0,0 @@
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||||
MEMORY
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SECTIONS
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|
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|
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||||
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|
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|
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|
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|
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|
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||||
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|
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*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
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PROVIDE (___sbss_start = .);
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|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
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|
||||
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|
||||
PROVIDE (__sbss_end = .);
|
||||
PROVIDE (___sbss_end = .);
|
||||
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|
||||
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|
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = . + 2048;
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@@ -1,68 +0,0 @@
|
||||
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|
||||
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|
||||
arcver=0x3
|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
nsim_isa_addr_size=32
|
||||
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|
||||
nsim_isa_div_rem_option=1
|
||||
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|
||||
nsim_isa_swap_option=1
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
mpu_version=2
|
||||
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|
||||
nsim_isa_dsp_complex_option=1
|
||||
nsim_isa_dsp_divsqrt_option=1
|
||||
nsim_isa_dsp_itu_option=1
|
||||
nsim_isa_dsp_itu_option=1
|
||||
nsim_isa_dsp_accshift_option=2
|
||||
nsim_isa_agu_size=large
|
||||
nsim_isa_agu_wb_depth=4
|
||||
nsim_isa_agu_accord=1
|
||||
nsim_isa_xy=1
|
||||
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|
||||
nsim_isa_xy_size=8K
|
||||
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|
||||
nsim_isa_xy_y_base=0xe0000000
|
||||
nsim_isa_fpus_div_option=1
|
||||
nsim_isa_fpu_mac_option=1
|
||||
nsim_isa_fpuda_option=1
|
||||
nsim_isa_fpu_fast_mpy_option=0
|
||||
nsim_isa_fpu_fast_div_option=0
|
||||
nsim_isa_bitstream_option=1
|
||||
nsim_isa_enable_timer_0=1
|
||||
nsim_isa_timer_0_int_level=1
|
||||
nsim_isa_enable_timer_1=1
|
||||
nsim_isa_timer_1_int_level=0
|
||||
nsim_isa_num_actionpoints=2
|
||||
nsim_isa_stack_checking=1
|
||||
nsim_isa_has_dmp_peripheral=1
|
||||
nsim_isa_smart_stack_entries=8
|
||||
nsim_isa_number_of_interrupts=20
|
||||
nsim_isa_number_of_levels=4
|
||||
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|
||||
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|
||||
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|
||||
dcache=16384,32,2,a
|
||||
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|
||||
icache=16384,32,2,a
|
||||
nsim_isa_ic_feature_level=2
|
||||
dccm_size=0x80000
|
||||
dccm_base=0x80000000
|
||||
nsim_isa_dccm_interleave=1
|
||||
iccm0_size=0x80000
|
||||
iccm0_base=0x00000000
|
||||
nsim_isa_pct_counters=8
|
||||
nsim_isa_dmac_option=1
|
||||
nsim_isa_dmac_channels=2
|
||||
nsim_isa_dmac_registers=0
|
||||
nsim_isa_dmac_fifo_depth=2
|
||||
nsim_isa_dmac_int_config=single_internal
|
||||
@@ -1,55 +0,0 @@
|
||||
#ifndef _TOS_CONFIG_H_
|
||||
#define _TOS_CONFIG_H_
|
||||
|
||||
#include "nsim.h"
|
||||
|
||||
#define TOS_CFG_TASK_PRIO_MAX 10u
|
||||
|
||||
#define TOS_CFG_ROUND_ROBIN_EN 0u
|
||||
|
||||
#define TOS_CFG_OBJECT_VERIFY_EN 1u
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||||
|
||||
#define TOS_CFG_TASK_DYNAMIC_CREATE_EN 1u
|
||||
|
||||
#define TOS_CFG_EVENT_EN 1u
|
||||
|
||||
#define TOS_CFG_MMBLK_EN 1u
|
||||
|
||||
#define TOS_CFG_MMHEAP_EN 1u
|
||||
|
||||
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|
||||
|
||||
#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x8000
|
||||
|
||||
#define TOS_CFG_MUTEX_EN 1u
|
||||
|
||||
#define TOS_CFG_MESSAGE_QUEUE_EN 1u
|
||||
|
||||
#define TOS_CFG_MAIL_QUEUE_EN 1u
|
||||
|
||||
#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN 1u
|
||||
|
||||
#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN 1u
|
||||
|
||||
#define TOS_CFG_TIMER_EN 1u
|
||||
|
||||
#define TOS_CFG_PWR_MGR_EN 0u
|
||||
|
||||
#define TOS_CFG_TICKLESS_EN 0u
|
||||
|
||||
#define TOS_CFG_SEM_EN 1u
|
||||
|
||||
#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 1u
|
||||
|
||||
#define TOS_CFG_FAULT_BACKTRACE_EN 0u
|
||||
|
||||
#define TOS_CFG_IDLE_TASK_STK_SIZE 128u
|
||||
|
||||
#define TOS_CFG_CPU_TICK_PER_SECOND 1000u
|
||||
|
||||
#define TOS_CFG_CPU_CLOCK (CLK_CPU)
|
||||
|
||||
#define TOS_CFG_TIMER_AS_PROC 1u
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,53 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
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|
||||
<windowLayout version="3" model="sash">
|
||||
<mdiFrame model="sash" x="297" y="114" width="1200" height="800">
|
||||
<splitPane orientation="horizontal" divider="510">
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<splitPane orientation="vertical" divider="409">
|
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|
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<tabbedPanel name="locals" selected="1">
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|
||||
<toolBar id="2" visible="0"/>
|
||||
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|
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|
||||
<pane>
|
||||
<tabbedPanel name="stack">
|
||||
<toolBar id="0" visible="0"/>
|
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<toolBar id="1" visible="1"/>
|
||||
<toolBar id="2" visible="0"/>
|
||||
</tabbedPanel>
|
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<tabbedPanel name="globals" selected="1">
|
||||
<toolBar id="0" visible="0"/>
|
||||
<toolBar id="1" visible="1"/>
|
||||
<toolBar id="2" visible="0"/>
|
||||
<valueUpdate name="regex_name" value="k_next_task"/>
|
||||
</tabbedPanel>
|
||||
</pane>
|
||||
</splitPane>
|
||||
<splitPane orientation="vertical" divider="478">
|
||||
<pane>
|
||||
<tabbedPanel name="source" selected="1">
|
||||
<toolBar id="0" visible="0"/>
|
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<toolBar id="1" visible="1"/>
|
||||
<toolBar id="2" visible="0"/>
|
||||
<toolBar id="3" visible="0"/>
|
||||
</tabbedPanel>
|
||||
</pane>
|
||||
<pane>
|
||||
<tabbedPanel name="break">
|
||||
<toolBar id="0" visible="0"/>
|
||||
<toolBar id="1" visible="1"/>
|
||||
<toolBar id="2" visible="0"/>
|
||||
</tabbedPanel>
|
||||
<tabbedPanel name="watchdisp">
|
||||
<toolBar id="0" visible="0"/>
|
||||
<toolBar id="1" visible="1"/>
|
||||
<toolBar id="2" visible="0"/>
|
||||
</tabbedPanel>
|
||||
<tabbedPanel name="command" selected="1"/>
|
||||
</pane>
|
||||
</splitPane>
|
||||
</splitPane>
|
||||
</mdiFrame>
|
||||
</windowLayout>
|
||||
@@ -0,0 +1,5 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
|
||||
<Config>
|
||||
<CurrentWindowLayoutFile>C:\Users\zhiwei\Desktop\embARC_Workspace\TencentOS\TencentOS-tiny\board\ARC_NSIM_EM\hello_world\.sc.project\.sc.project.windows</CurrentWindowLayoutFile>
|
||||
</Config>
|
||||
90
board/ARC_NSIM_EM/hello_world/.sc.project/.sc2.properties
Normal file
90
board/ARC_NSIM_EM/hello_world/.sc.project/.sc2.properties
Normal file
@@ -0,0 +1,90 @@
|
||||
A6_mpu=1
|
||||
AC600_dcache=1
|
||||
AC600_icache=1
|
||||
AC_dcache=1
|
||||
AC_dcache_line_size=32
|
||||
AC_dcache_repalg=Random
|
||||
AC_dcache_size=16384
|
||||
AC_dcache_ways=2
|
||||
AC_icache=1
|
||||
AC_icache_line_size=32
|
||||
AC_icache_repalg=Random
|
||||
AC_icache_size=16384
|
||||
AC_icache_ways=2
|
||||
ACa7_dcache=1
|
||||
ACa7_icache=1
|
||||
ARC5_Core_Version=3
|
||||
ARC6_Core_Version=3
|
||||
ARC7_Core_Version=3
|
||||
ARC_DSP_memory=ARC_xy
|
||||
ARC_agu=large
|
||||
ARC_agu_accord=1
|
||||
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|
||||
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|
||||
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|
||||
ARC_code_density=1
|
||||
ARC_dcache_feature=2
|
||||
ARC_dccm_interleave=1
|
||||
ARC_default_ext_interrupts=0
|
||||
ARC_default_interrupts=0
|
||||
ARC_div_rem=radix2
|
||||
ARC_dma=1
|
||||
ARC_dmac_channels=2
|
||||
ARC_dmac_fifo_depth=2
|
||||
ARC_dmac_int_config=single_internal
|
||||
ARC_dmac_registers=0
|
||||
ARC_dsp2=1
|
||||
ARC_dsp_accshift=full
|
||||
ARC_dsp_complex=1
|
||||
ARC_dsp_divsqrt=radix2
|
||||
ARC_dsp_itu=1
|
||||
ARC_ext_interrupt_num=16
|
||||
ARC_fast_interrupt=1
|
||||
ARC_fsfpus_div=Slow
|
||||
ARC_fsfpus_mpy=Slow
|
||||
ARC_icache_feature=2
|
||||
ARC_interrupt_baseaddr=0x0
|
||||
ARC_interrupt_num=20
|
||||
ARC_interrupt_priorities=4
|
||||
ARC_interrupt_vector_count=20
|
||||
ARC_mpu_region=16
|
||||
ARC_mpu_version=-mpu
|
||||
ARC_mpy_emoption=mpyd
|
||||
ARC_mpy_hsoption=mpyd
|
||||
ARC_parallel_port_address=0x378
|
||||
ARC_pct_counters=8
|
||||
ARC_reset_on_restart=1
|
||||
ARC_rgf_num_wr_ports=2
|
||||
ARC_shift_assist=1
|
||||
ARC_smart_stack_entries=8
|
||||
ARC_swap=1
|
||||
ARC_target=ARCSIM
|
||||
ARC_timer0=1
|
||||
ARC_timer0_level=1
|
||||
ARC_timer1=1
|
||||
ARC_timer1_level=0
|
||||
ARC_turbo_boost=1
|
||||
ARC_xy_config=dccm_y
|
||||
ARC_xy_interleave=1
|
||||
ARC_xy_size=8K
|
||||
ARC_xy_ybase=0xe0000000
|
||||
Execute_to_main=0
|
||||
Local_symbols=1
|
||||
Program_toggles_off=binary_stdin,binary_stdout,flush_pipe,cr_for_more
|
||||
Program_toggles_on=load_at_paddr
|
||||
cmd_line_option=-OKN -action_points\=2 -dmp_peripheral -OKN -action_points\=2 -dmp_peripheral -OKN -action_points\=2 -dmp_peripheral
|
||||
dccm_base=0x80000000
|
||||
dccm_size=0x80000
|
||||
fpu_mac=1
|
||||
fpuda=1
|
||||
fpus_div=1
|
||||
hw_stack_checking=1
|
||||
iccm0_base=0x00000000
|
||||
iccm0_size=0x80000
|
||||
iss_av2_override=0
|
||||
program=build/TencentOS_tiny.elf
|
||||
v2em_core_register_per_bank=32
|
||||
v2em_core_version=3
|
||||
v2em_regis_bank=2
|
||||
v2hs_core_version=3
|
||||
which_arc=ARCV2EM
|
||||
269
board/ARC_NSIM_EM/hello_world/Makefile
Normal file
269
board/ARC_NSIM_EM/hello_world/Makefile
Normal file
@@ -0,0 +1,269 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by tool: [projectgenerator] version: [3.3.0] date: [Mon Aug 05 10:29:11 CST 2019]
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
# Generic Makefile (based on gcc)
|
||||
#
|
||||
# ChangeLog :
|
||||
# 2017-02-10 - Several enhancements + project update mode
|
||||
# 2015-07-22 - first version
|
||||
# ------------------------------------------------
|
||||
|
||||
######################################
|
||||
# target
|
||||
######################################
|
||||
TARGET = TencentOS_tiny
|
||||
|
||||
APPLICATION = hello_world
|
||||
|
||||
|
||||
######################################
|
||||
# building variables
|
||||
######################################
|
||||
# debug build?
|
||||
DEBUG = 1
|
||||
# optimization
|
||||
OPT = -O0
|
||||
|
||||
TOP_DIR = ../../..
|
||||
|
||||
#######################################
|
||||
# paths
|
||||
#######################################
|
||||
# Build path
|
||||
BUILD_DIR = build
|
||||
|
||||
#######################################
|
||||
# embarc_bsp relative conifg
|
||||
#######################################
|
||||
|
||||
BOARD ?= nsim
|
||||
BD_VER ?= 10
|
||||
CUR_CORE ?= arcem
|
||||
TOOLCHAIN ?= mw
|
||||
OLEVEL ?= O0
|
||||
OUT_DIR_ROOT ?= $(BUILD_DIR)
|
||||
|
||||
export BOARD
|
||||
export BD_VER
|
||||
export CUR_CORE
|
||||
export TOOLCHAIN
|
||||
export OUT_DIR_ROOT
|
||||
export OLEVEL
|
||||
|
||||
EMBARC_BSP_ROOT = $(TOP_DIR)/platform/vendor_bsp/Synopsys/ARC/embarc_bsp
|
||||
|
||||
EMBARC_BSP_TEST_FILE = $(EMBARC_BSP_ROOT)/arc/startup/arc_startup.s
|
||||
|
||||
ifeq ($(wildcard $(EMBARC_BSP_TEST_FILE)),)
|
||||
$(info )
|
||||
$(info )
|
||||
$(info )
|
||||
$(info ######################################################################################################)
|
||||
$(info # #)
|
||||
$(info # embarc_bsp not exist!!! #)
|
||||
$(info # please git embarc_bsp from github #)
|
||||
$(info # run cmd blew in folder <TOP_DIR>/platform/vendor_bsp/Synopsys/ARC>: #)
|
||||
$(info # git clone https://github.com/foss-for-synopsys-dwc-arc-processors/embarc_bsp.git -b upstream #)
|
||||
$(info # #)
|
||||
$(info ######################################################################################################)
|
||||
$(info )
|
||||
$(info )
|
||||
$(info )
|
||||
$(error [Makefile.error]: embarc_bsp not exist!!!)
|
||||
endif
|
||||
|
||||
EMBARC_ROOT = $(EMBARC_BSP_ROOT)
|
||||
export EMBARC_ROOT
|
||||
|
||||
EMBARC_OUT_DIR = $(OUT_DIR_ROOT)/obj_$(BOARD)_$(BD_VER)/$(TOOLCHAIN)_$(CUR_CORE)
|
||||
|
||||
ifeq ($(TOOLCHAIN),mw)
|
||||
COMPILER_ARG_FILE := $(EMBARC_OUT_DIR)/embARC_generated/ccac.arg
|
||||
LDF_FILE := $(EMBARC_OUT_DIR)/linker_mw.ldf
|
||||
MDB_ARG_FILE := $(EMBARC_OUT_DIR)/embARC_generated/mdb.arg
|
||||
else
|
||||
COMPILER_ARG_FILE := $(EMBARC_OUT_DIR)/embARC_generated/gcc.arg
|
||||
LDF_FILE := $(EMBARC_OUT_DIR)/linker_gnu.ldf
|
||||
endif
|
||||
|
||||
######################################
|
||||
# source
|
||||
######################################
|
||||
# C sources
|
||||
KERNEL_SRC = \
|
||||
${wildcard $(TOP_DIR)/kernel/core/*.c}
|
||||
C_SOURCES += $(KERNEL_SRC)
|
||||
|
||||
ARCH_SRC = \
|
||||
${wildcard $(TOP_DIR)/arch/arc/arcem/*.c} \
|
||||
${wildcard $(TOP_DIR)/arch/arc/common/*.c}
|
||||
C_SOURCES += $(ARCH_SRC)
|
||||
|
||||
CMSIS_SRC = \
|
||||
${wildcard $(TOP_DIR)/osal/cmsis_os/*.c}
|
||||
C_SOURCES += $(CMSIS_SRC)
|
||||
|
||||
APPLICATION_SRC = \
|
||||
${wildcard $(TOP_DIR)/board/ARC_NSIM_EM/BSP/Src/*.c} \
|
||||
${wildcard $(TOP_DIR)/examples/$(APPLICATION)/*.c}
|
||||
|
||||
C_SOURCES += $(APPLICATION_SRC)
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
$(TOP_DIR)/arch/arc/arcem/port_s.s
|
||||
|
||||
ifeq ($(TOOLCHAIN),mw)
|
||||
PREFIX =
|
||||
CC = $(PREFIX)ccac
|
||||
AS = $(PREFIX)ccac
|
||||
|
||||
SZ = $(PREFIX)size
|
||||
|
||||
OBJCOPY = $(PREFIX)elf2bin
|
||||
ELF2HEX = $(PREFIX)elf2hex
|
||||
|
||||
ELF2HEX_INOPT = -Q -I
|
||||
ELF2HEX_OUTOPT = -o
|
||||
ELF2BIN_OPT =
|
||||
else
|
||||
|
||||
endif
|
||||
|
||||
#######################################
|
||||
# CFLAGS
|
||||
#######################################
|
||||
|
||||
# C defines
|
||||
|
||||
NSIM_STACK_CHECK := -DARC_FEATURE_STACK_CHECK=0
|
||||
# 1: enable hardware stack check, 0 disable hardware stack check
|
||||
|
||||
ifeq ($(TOOLCHAIN),mw)
|
||||
TOOLCHAIN_DEF := -D__MW__
|
||||
else
|
||||
TOOLCHAIN_DEF := -D__GNU__ -D_HAVE_LIBGLOSS_
|
||||
endif
|
||||
|
||||
C_DEFS = \
|
||||
$(TOOLCHAIN_DEF) \
|
||||
$(NSIM_STACK_CHECK) \
|
||||
-DBOARD_NSIM \
|
||||
-DCURRENT_CORE=$(CUR_CORE) \
|
||||
-DEMBARC_TCF_GENERATED \
|
||||
-DHW_VERSION=$(BD_VER) \
|
||||
-DLIB_CONSOLE \
|
||||
-DLIB_CLIB \
|
||||
-D_HEAPSIZE=8192 \
|
||||
-D_HOSTLINK_ \
|
||||
-D_NSIM_ \
|
||||
-D_STACKSIZE=2048 \
|
||||
-DARC_FEATURE_STACK_CHECK=0
|
||||
|
||||
# include dirs
|
||||
ARCH_INC = \
|
||||
-I $(TOP_DIR)/arch/arc/arcem \
|
||||
-I $(TOP_DIR)/arch/arc/common/include
|
||||
C_INCLUDES += $(ARCH_INC)
|
||||
|
||||
BOARD_INC = \
|
||||
-I $(TOP_DIR)/board/ARC_NSIM_EM/BSP/Inc
|
||||
C_INCLUDES += $(BOARD_INC)
|
||||
|
||||
KERNEL_INC = \
|
||||
-I $(TOP_DIR)/kernel/core/include \
|
||||
-I $(TOP_DIR)/kernel/pm/include \
|
||||
-I $(TOP_DIR)/kernel/hal/include
|
||||
C_INCLUDES += $(KERNEL_INC)
|
||||
|
||||
CMSIS_INC = \
|
||||
-I $(TOP_DIR)/osal/cmsis_os
|
||||
C_INCLUDES += $(CMSIS_INC)
|
||||
|
||||
EMBARC_BSP_INC = \
|
||||
-I $(EMBARC_BSP_ROOT)/board \
|
||||
-I $(EMBARC_BSP_ROOT)/board/nsim/configs/10 \
|
||||
-I $(EMBARC_BSP_ROOT)/include \
|
||||
-I $(EMBARC_BSP_ROOT)/include/arc \
|
||||
-I $(EMBARC_BSP_ROOT)/include/device/designware \
|
||||
-I $(EMBARC_BSP_ROOT)/include/device/subsystem \
|
||||
-I $(EMBARC_BSP_ROOT)/library \
|
||||
-I $(EMBARC_OUT_DIR)/embARC_generated
|
||||
C_INCLUDES += $(EMBARC_BSP_INC)
|
||||
|
||||
ifeq ($(TOOLCHAIN),mw)
|
||||
ASFLAGS = @$(COMPILER_ARG_FILE) -Hnoccm -Hnosdata -Wincompatible-pointer-types -Hnocopyr -Hasmcpp -$(OLEVEL) -g $(C_DEFS) $(C_INCLUDES) -MMD -MT $@ -MF $@.d
|
||||
|
||||
CFLAGS = @$(COMPILER_ARG_FILE) -Hnoccm -Hnosdata -Wincompatible-pointer-types -Hnocopyr -Hnocplus -$(OLEVEL) -g $(C_DEFS) $(C_INCLUDES) -MMD -MT $@ -MF $@.d
|
||||
|
||||
LDFLAGS = -Hhostlink @$(COMPILER_ARG_FILE) -Hnocopyr -Hnosdata -Hnocrt -Hldopt=-Coutput=$(BUILD_DIR)/mw_arcem.map -Hldopt=-Csections -Hldopt=-Ccrossfunc -Hldopt=-Csize -zstdout $(LDF_FILE)
|
||||
else
|
||||
|
||||
endif
|
||||
# default action: build all
|
||||
all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin
|
||||
|
||||
|
||||
#######################################
|
||||
# build the application
|
||||
#######################################
|
||||
# list of objects
|
||||
OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))
|
||||
vpath %.c $(sort $(dir $(C_SOURCES)))
|
||||
# list of ASM program objects
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))
|
||||
vpath %.s $(sort $(dir $(ASM_SOURCES)))
|
||||
OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES_S:.S=.o)))
|
||||
vpath %.S $(sort $(dir $(ASM_SOURCES_S)))
|
||||
|
||||
# EMBARC_PREBUILT_LIBRARY = -Hldopt=-Bgrouplib
|
||||
EMBARC_PREBUILT_LIBRARY = $(EMBARC_OUT_DIR)/libembarc.a
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/board/board.o
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/arc/startup/arc_startup.o
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/arc/startup/arc_cxx_support.o
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/libboard_nsim.a
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/libcpuarc.a
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/libembarc_libc.a
|
||||
# EMBARC_PREBUILT_LIBRARY += $(EMBARC_OUT_DIR)/libembarc_console.a
|
||||
|
||||
build_embarc_lib: | $(BUILD_DIR)
|
||||
make -f $(EMBARC_BSP_ROOT)/options/options.mk V=1 embarc_lib
|
||||
|
||||
$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)
|
||||
$(CC) -c $(CFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(ASFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR)
|
||||
$(AS) -c $(ASFLAGS) $< -o $@
|
||||
|
||||
$(BUILD_DIR)/$(TARGET).elf: build_embarc_lib $(OBJECTS) Makefile
|
||||
$(CC) $(LDFLAGS) $(OBJECTS) $(EMBARC_PREBUILT_LIBRARY) -o $@
|
||||
$(SZ) $@
|
||||
|
||||
$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(ELF2HEX) $(ELF2HEX_INOPT) $< $(ELF2HEX_OUTOPT) $@
|
||||
|
||||
$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)
|
||||
$(OBJCOPY) $(ELF2BIN_OPT) $< $@
|
||||
|
||||
$(BUILD_DIR):
|
||||
mkdir $@
|
||||
|
||||
#######################################
|
||||
# clean up
|
||||
#######################################
|
||||
clean:
|
||||
-rm -fR $(BUILD_DIR)
|
||||
|
||||
nsim_debug : $(BUILD_DIR)/$(TARGET).elf
|
||||
mdb -nooptions -nogoifmain -toggle=include_local_symbols=1 -nsim -off=binary_stdin -off=binary_stdout -on=load_at_paddr -on=reset_upon_restart -off=flush_pipe -off=cr_for_more -OKN @$(MDB_ARG_FILE) $<
|
||||
#######################################
|
||||
# dependencies
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
|
||||
# *** EOF ***
|
||||
BIN
board/ARC_NSIM_EM/hello_world/mw.log
Normal file
BIN
board/ARC_NSIM_EM/hello_world/mw.log
Normal file
Binary file not shown.
Reference in New Issue
Block a user