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fix bumblebee trap_entry memory address alignment problem

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acevest
2019-10-05 15:50:03 +08:00
parent 2d419440f3
commit 2fdc9f600c
1 changed files with 1 additions and 1 deletions
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2
arch/risc-v/bumblebee/gcc/riscv_port_s.S
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@@ -122,7 +122,7 @@ irq_restore:
mret mret
.align 2 .align 6
trap_entry: trap_entry:
addi sp, sp, -32*REGBYTES addi sp, sp, -32*REGBYTES
sw x1, 2*REGBYTES(sp) sw x1, 2*REGBYTES(sp)