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fix the bug of sd fatfs formated not recognized by windows

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1. the address in tos_hal_sd_*(tos_hal_sd.c) is by byte, but address in HAL_SD_WriteBlocks/HAL_SD_ReadBlocks is by sector
2. convert address in tos_hal_sd_* from byte to sector( / 512)
This commit is contained in:
daishengdong
2020-03-15 12:04:47 +08:00
parent cb2477f66e
commit 9d6dd6398e
12 changed files with 19 additions and 245 deletions
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16
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs/ALIENTEK_Aploo_STM32F767/TencentOS_tiny.sct
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@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00080000 { ; RW data
.ANY (+RW +ZI)
}
}

77
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs/DebugConfig/TencentOS_tiny_STM32F767IGTx_2.0.0.dbgconf
View File

@@ -1,77 +0,0 @@
// File: STM32F76x_77x.dbgconf
// Version: 1.0.0
// Note: refer to STM32F76xxx STM32F77xxx reference manual (RM0410)
// refer to STM32F76xxx STM32F77xxx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> Debug CAN1 stopped when core is halted
// <o.24> DBG_I2C4_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.13> DBG_CAN3_STOP <i> Debug CAN3 stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.9> DBG_LPTIM1_STOP <i> LPTMI1 counter stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <h> TPIU Pin Routing (TRACECLK fixed on Pin PE2)
// <i> TRACECLK: Pin PE2
// <o1> TRACED0
// <i> ETM Trace Data 0
// <0x00040003=> Pin PE3
// <0x00020001=> Pin PC1
// <0x0006000D=> Pin PG13
// <o2> TRACED1
// <i> ETM Trace Data 1
// <0x00040004=> Pin PE4
// <0x00020008=> Pin PC8
// <0x0006000E=> Pin PG14
// <o3> TRACED2
// <i> ETM Trace Data 2
// <0x00040005=> Pin PE5
// <0x00030002=> Pin PD2
// <o4> TRACED3
// <i> ETM Trace Data 3
// <0x00040006=> Pin PE6
// <0x0002000C=> Pin PC12
// </h>
TraceClk_Pin = 0x00040002;
TraceD0_Pin = 0x00040003;
TraceD1_Pin = 0x00040004;
TraceD2_Pin = 0x00040005;
TraceD3_Pin = 0x00040006;
// <<< end of configuration section >>>

20
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs/RTE/_TencentOS_tiny/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f7xx.h"
#endif /* RTE_COMPONENTS_H */

12
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs/TencentOS_tiny.uvoptx
View File

@@ -154,7 +154,7 @@
<Type>0</Type>
<LineNumber>14</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134233172</Address>
<Address>134233412</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
@@ -168,18 +168,18 @@
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>3229</LineNumber>
<LineNumber>15</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134242152</Address>
<Address>134233424</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>..\..\..\..\components\fs\fatfs\3rdparty\ff.c</Filename>
<Filename>..\..\..\..\examples\fatfs\fatfs_sample.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\TencentOS_tiny\../../../../components/fs/fatfs/3rdparty/ff.c\3229</Expression>
<Expression>\\TencentOS_tiny\../../../../examples/fatfs/fatfs_sample.c\15</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
@@ -1063,7 +1063,7 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\platform\hal\st\stm32f7xx\tos_hal_sd.c</PathWithFileName>
<PathWithFileName>..\..\..\..\platform\hal\st\stm32f7xx\src\tos_hal_sd.c</PathWithFileName>
<FilenameWithoutPath>tos_hal_sd.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>

2
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs/TencentOS_tiny.uvprojx
View File

@@ -735,7 +735,7 @@
<File>
<FileName>tos_hal_sd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\hal\st\stm32f7xx\tos_hal_sd.c</FilePath>
<FilePath>..\..\..\..\platform\hal\st\stm32f7xx\src\tos_hal_sd.c</FilePath>
</File>
</Files>
</Group>

16
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs_through_vfs/ALIENTEK_Aploo_STM32F767/TencentOS_tiny.sct
View File

@@ -1,16 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00080000 { ; RW data
.ANY (+RW +ZI)
}
}

77
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs_through_vfs/DebugConfig/TencentOS_tiny_STM32F767IGTx_2.0.0.dbgconf
View File

@@ -1,77 +0,0 @@
// File: STM32F76x_77x.dbgconf
// Version: 1.0.0
// Note: refer to STM32F76xxx STM32F77xxx reference manual (RM0410)
// refer to STM32F76xxx STM32F77xxx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.26> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.25> DBG_CAN1_STOP <i> Debug CAN1 stopped when core is halted
// <o.24> DBG_I2C4_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.13> DBG_CAN3_STOP <i> Debug CAN3 stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
// <o.9> DBG_LPTIM1_STOP <i> LPTMI1 counter stopped when core is halted
// <o.8> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.7> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.6> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.3> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.2> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.18> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.17> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.16> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.1> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.0> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <h> TPIU Pin Routing (TRACECLK fixed on Pin PE2)
// <i> TRACECLK: Pin PE2
// <o1> TRACED0
// <i> ETM Trace Data 0
// <0x00040003=> Pin PE3
// <0x00020001=> Pin PC1
// <0x0006000D=> Pin PG13
// <o2> TRACED1
// <i> ETM Trace Data 1
// <0x00040004=> Pin PE4
// <0x00020008=> Pin PC8
// <0x0006000E=> Pin PG14
// <o3> TRACED2
// <i> ETM Trace Data 2
// <0x00040005=> Pin PE5
// <0x00030002=> Pin PD2
// <o4> TRACED3
// <i> ETM Trace Data 3
// <0x00040006=> Pin PE6
// <0x0002000C=> Pin PC12
// </h>
TraceClk_Pin = 0x00040002;
TraceD0_Pin = 0x00040003;
TraceD1_Pin = 0x00040004;
TraceD2_Pin = 0x00040005;
TraceD3_Pin = 0x00040006;
// <<< end of configuration section >>>

20
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs_through_vfs/RTE/_TencentOS_tiny/RTE_Components.h
View File

@@ -1,20 +0,0 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f7xx.h"
#endif /* RTE_COMPONENTS_H */

2
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs_through_vfs/TencentOS_tiny.uvoptx
View File

@@ -1063,7 +1063,7 @@
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\platform\hal\st\stm32f7xx\tos_hal_sd.c</PathWithFileName>
<PathWithFileName>..\..\..\..\platform\hal\st\stm32f7xx\src\tos_hal_sd.c</PathWithFileName>
<FilenameWithoutPath>tos_hal_sd.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>

2
board/ALIENTEK_Apollo_STM32F767/KEIL/fatfs_through_vfs/TencentOS_tiny.uvprojx
View File

@@ -735,7 +735,7 @@
<File>
<FileName>tos_hal_sd.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\hal\st\stm32f7xx\tos_hal_sd.c</FilePath>
<FilePath>..\..\..\..\platform\hal\st\stm32f7xx\src\tos_hal_sd.c</FilePath>
</File>
</Files>
</Group>

10
platform/hal/st/stm32f4xx/src/tos_hal_sd.c
View File

@@ -28,7 +28,7 @@ __API__ int tos_hal_sd_read(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, uint3
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_ReadBlocks(sd_handle, buf, blk_addr, blk_num, timeout);
hal_status = HAL_SD_ReadBlocks(sd_handle, buf, blk_addr / 0x200, blk_num, timeout);
if (hal_status != HAL_OK) {
return -1;
}
@@ -53,7 +53,7 @@ __API__ int tos_hal_sd_write(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_addr
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_WriteBlocks(sd_handle, (uint8_t *)buf, blk_addr, blk_num, timeout);
hal_status = HAL_SD_WriteBlocks(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num, timeout);
if (hal_status != HAL_OK) {
return -1;
}
@@ -78,7 +78,7 @@ __API__ int tos_hal_sd_read_dma(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, u
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_ReadBlocks_DMA(sd_handle, buf, blk_addr, blk_num);
hal_status = HAL_SD_ReadBlocks_DMA(sd_handle, buf, blk_addr / 0x200, blk_num);
if (hal_status != HAL_OK) {
return -1;
}
@@ -99,7 +99,7 @@ __API__ int tos_hal_sd_write_dma(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_WriteBlocks_DMA(sd_handle, (uint8_t *)buf, blk_addr, blk_num);
hal_status = HAL_SD_WriteBlocks_DMA(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num);
if (hal_status != HAL_OK) {
return -1;
}
@@ -116,7 +116,7 @@ __API__ int tos_hal_sd_erase(hal_sd_t *sd, uint32_t blk_add_start, uint32_t blk_
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_Erase(sd_handle, blk_add_start, blk_addr_end);
hal_status = HAL_SD_Erase(sd_handle, blk_add_start / 0x200, blk_addr_end / 0x200);
if (hal_status != HAL_OK) {
return -1;
}

10
platform/hal/st/stm32f7xx/tos_hal_sd.c → platform/hal/st/stm32f7xx/src/tos_hal_sd.c
View File

@@ -28,7 +28,7 @@ __API__ int tos_hal_sd_read(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, uint3
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_ReadBlocks(sd_handle, buf, blk_addr, blk_num, timeout);
hal_status = HAL_SD_ReadBlocks(sd_handle, buf, blk_addr / 0x200, blk_num, timeout);
if (hal_status != HAL_OK) {
return -1;
}
@@ -53,7 +53,7 @@ __API__ int tos_hal_sd_write(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_addr
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_WriteBlocks(sd_handle, (uint8_t *)buf, blk_addr, blk_num, timeout);
hal_status = HAL_SD_WriteBlocks(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num, timeout);
if (hal_status != HAL_OK) {
return -1;
}
@@ -78,7 +78,7 @@ __API__ int tos_hal_sd_read_dma(hal_sd_t *sd, uint8_t *buf, uint32_t blk_addr, u
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_ReadBlocks_DMA(sd_handle, buf, blk_addr, blk_num);
hal_status = HAL_SD_ReadBlocks_DMA(sd_handle, buf, blk_addr / 0x200, blk_num);
if (hal_status != HAL_OK) {
return -1;
}
@@ -99,7 +99,7 @@ __API__ int tos_hal_sd_write_dma(hal_sd_t *sd, const uint8_t *buf, uint32_t blk_
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_WriteBlocks_DMA(sd_handle, (uint8_t *)buf, blk_addr, blk_num);
hal_status = HAL_SD_WriteBlocks_DMA(sd_handle, (uint8_t *)buf, blk_addr / 0x200, blk_num);
if (hal_status != HAL_OK) {
return -1;
}
@@ -116,7 +116,7 @@ __API__ int tos_hal_sd_erase(hal_sd_t *sd, uint32_t blk_add_start, uint32_t blk_
}
sd_handle = sd->private_sd;
hal_status = HAL_SD_Erase(sd_handle, blk_add_start, blk_addr_end);
hal_status = HAL_SD_Erase(sd_handle, blk_add_start / 0x200, blk_addr_end / 0x200);
if (hal_status != HAL_OK) {
return -1;
}