Commit Graph

31 Commits

Author SHA1 Message Date
acevest
3dc706ee3e fix the bug of checking whether the task needs to be switched when the riscv irq returns 2020-04-24 10:09:25 +08:00
daishengdong
032af66467 add socket wrapper for at framework
you can use at framework to send/recv data in socket API
example: see examples\tcp_through_module_based_at_socket
project: see board\TencentOS_tiny_EVB_MX_Plus\KEIL\tcp_through_module_based_at_socket
2020-04-07 16:39:13 +08:00
daishengdong
3d9d6198c8 add cortex-v7a support
How To Run:
    see TencentOS-tiny\board\ALPHA_I.MX_emmc_256ddr\README.md

TODO Next:
1. VFP support
2. fault diagnosis support
3. qemu vexpress ca9 support
4. raspberry pi support
5. SMP support
2020-01-19 19:06:24 +08:00
acevest
bce32faac2 fix bumblebee irq entry aligment, fix eclic 2020-01-09 20:18:18 +08:00
daishengdong
c9556307df add tos_slist.h, rename tos.h to tos_k.h 2020-01-03 17:25:38 +08:00
acevest
f41e287c2a risc-v support all irq handler 2019-10-16 18:10:03 +08:00
acevest
c17df06ff7 reduce two instructions in risc-v irq handler 2019-10-09 19:05:20 +08:00
supowang
7f001b4230 add license for arch
add license for arch
2019-10-09 15:52:17 +08:00
acevest
19e65a4bb7 remove extra instructions in port_sched_start 2019-10-09 11:43:56 +08:00
acevest
21f48361de make irq_restore be executed likely 2019-10-08 21:36:51 +08:00
acevest
1fc66ae527 fix did not save & restore register x1 2019-10-08 21:24:02 +08:00
acevest
ae3ada8dfe reduce one instruction when switch to irq stack 2019-10-08 20:44:58 +08:00
acevest
93ae1c96ca risc-v add irq stack 2019-10-08 20:42:40 +08:00
acevest
41ad2d711e adjust the order of registers on the stack 2019-10-08 14:42:58 +08:00
acevest
b147d060fb save 48bytes when no need to switch task in interrupt handler 2019-10-08 14:41:30 +08:00
acevest
e5e905e9bb adjust the order of registers on the stack 2019-10-08 14:41:30 +08:00
acevest
44f0ac6579 irq context switch do not use flag variable anymore 2019-10-08 14:41:30 +08:00
acevest
2d419440f3 divide bumblebee and spike irq trap entry code 2019-10-08 14:41:30 +08:00
acevest
1e04f5b344 risc-v reduce use 128 bytes irq stack 2019-10-08 13:48:52 +08:00
acevest
3ef8f4eae5 detach risc-v kernel code from gd32v lib 2019-10-02 16:41:23 +08:00
Supowang1989
73e81714ca Merge pull request #20 from acevest/context_switch
improve risc-v context switch
2019-09-29 11:30:08 +08:00
acevest
e4038592b9 improve risc-v context switch 2019-09-27 17:27:59 +08:00
acevest
384a4f6ef3 enable set systick priority for bumblebee 2019-09-26 22:11:24 +08:00
acevest
f03535a484 detach risc-v cpu bumblebee level code from gd32v lib 2019-09-26 22:11:07 +08:00
acevest
b1b2d1eabc organize risc-v code for spike and bumblebee 2019-09-25 21:53:27 +08:00
acevest
1747cedc61 support GD32VF103C START board 2019-09-24 10:29:31 +08:00
acevest
2d9580cf78 gd32vf103 jump to task success 2019-09-24 10:28:14 +08:00
acevest
1d56297a85 fix code style 2019-09-20 16:38:34 +08:00
acezhao
72b4656c2a remove some comments 2019-09-20 10:46:04 +08:00
acezhao
f3212cc924 add gcc demo 2019-09-18 12:54:03 +08:00
acezhao
262dbe0b56 move rv32i port code under gcc 2019-09-18 12:54:03 +08:00