Merge pull request #384 from guoguozi123456/fix_readme_gcc

[doc]update Porting_Manual_for_GCC

.gitignore

@@ -24,12 +24,13 @@
 .DS_Store
 board/**/build
 board/**/.settings
-board/*/MDK-ARM/DebugConfig/
+board/*/KEIL/*/DebugConfig/
 board/*/obj/
-board/*/MDK-ARM/Obj/
-board/*/MDK-ARM/RTE/
-board/*/MDK-ARM/*.uvguix.*
-board/*/MDK-ARM/EventRecorderStub.scvd
-board/*/MDK-ARM/*/*.htm
-board/*/MDK-ARM/*/*.build_log.htm
+board/*/KEIL/*/Obj/
+board/*/KEIL/*/RTE/
+board/*/KEIL/*/*.uvguix.*
+board/*/KEIL/*/EventRecorderStub.scvd
+board/*/KEIL/*/*/*.htm
+board/*/KEIL/*/*/*.build_log.htm
 board/**/settings/*
+.vscode

ChangeLog.md

@@ -0,0 +1,12 @@
+## [2.5.2] - 2022-06-28
+### Changed
+- modify the global lock to protect the at agent.
+
+## [2.5.1] - 2022-06-02
+### Added
+- add dynamic create and destroy api for task, sem, mutex, event, timer and corresponding unit test case.
+- add tos_task_find api.
+
+### Changed
+- `TOS_CFG_TASK_DYNAMIC_CREATE_EN` change to `TOS_CFG_OBJ_DYNAMIC_CREATE_EN`.
+

README.md

@@ -4,7 +4,6 @@
 
 [![license](http://img.shields.io/badge/license-BSD-blue.svg)](https://github.com/Tencent/TencentOS-tiny/blob/master/LICENSE)
 [![PRs Welcome](https://img.shields.io/badge/PRs-welcome-blue.svg)](https://github.com/Tencent/TencentOS-tiny/pulls)
-[![Build status](https://travis-ci.org/Tencent/TencentOS-tiny.svg?branch=master)](https://travis-ci.org/Tencent/TencentOS-tiny)
 
 [(English Documents Available)](README_en.md)
 

README_en.md

@@ -3,7 +3,6 @@
 
 [![license](http://img.shields.io/badge/license-BSD-blue.svg)](https://github.com/Tencent/TencentOS-tiny/blob/master/LICENSE)
 [![PRs Welcome](https://img.shields.io/badge/PRs-welcome-blue.svg)](https://github.com/Tencent/TencentOS-tiny/pulls)
-[![Build status](https://travis-ci.org/Tencent/TencentOS-tiny.svg?branch=master)](https://travis-ci.org/Tencent/TencentOS-tiny)
 
 [(中文)](README.md)
 
@@ -79,7 +78,7 @@ The fault scene information is automatically uploaded to the cloud platform, whi
 
 ![](./doc/image/introduction/Partners_en.png)
 
-TencentOS tiny currently supports mainstream MCUs such as STM32, NXP, Huada Semiconductor, National Technology, GD32, Nordic, and TI. Two sets of official custom development board designs have been completed, supporting the full range of STM32 NUCLEO official evaluation board kernel migration. TencentOS tiny will work together with partners to provide better IoT terminal software solutions for IoT terminal manufacturers, facilitating the rapid access of various IoT devices to Tencent Cloud, and jointly expanding the IoT ecosystem to better support smart cities, smart water meters, and smart homes. , smart wear, car networking and other industrial applications.
+TencentOS tiny currently supports mainstream MCUs such as STM32, NXP, Huada Semiconductor, National Technology, GD32, Nordic, and TI. Two sets of official custom development board designs have been completed, supporting the full range of STM32 NUCLEO official evaluation board kernel migration. In addition to MCU and modules, TencentOS tiny is also actively promoting the implementation of terminal products and projects. Currently, solutions such as AI smart agriculture, smart containers, and smart conference rooms have been formed, and internal cooperation has been established with WeChat Pay, Tencent Cloud Smart Industry, AI Platform Department, Tencent Weiling, and QQ family within Tencent to jointly expand the industry ecosystem; At the same time, we have also begun to actively develop external customers, and currently have reached business cooperation with Shenzhen Guanghe Display Technology's ink screen retail labels, Xinyuegou charging piles, and others.TencentOS tiny will work together with partners to provide better IoT terminal software solutions for IoT terminal manufacturers, facilitating the rapid access of various IoT devices to Tencent Cloud, and jointly expanding the IoT ecosystem to better support smart cities, smart water meters, and smart homes. , smart wear, car networking and other industrial applications.
 
 # TencentOS tiny code directory
 - [TencentOS tiny code directory description](./doc/09.Code_Directories.md)

arch/risc-v/risc-v3a/rv32i/gcc/port_s.S

@@ -143,8 +143,8 @@ restore_context:
 
 /* just switch at Software interrupt */
 .align 2
-.global SW_handler
-SW_handler:
+.global SW_Handler
+SW_Handler:
 #if ARCH_RISCV_FPU
 	addi sp, sp, -128
 	fsw  f0,  __reg_f0_OFFSET(sp)

board/BearPi_STM32L431RC/BSP/BearPi_STM32L31RC.ioc

@@ -14,17 +14,19 @@ LPUART1.WordLength=UART_WORDLENGTH_8B
 Mcu.Family=STM32L4
 Mcu.IP0=ADC1
 Mcu.IP1=I2C1
-Mcu.IP10=USART2
-Mcu.IP11=USART3
+Mcu.IP10=SYS
+Mcu.IP11=USART1
+Mcu.IP12=USART2
+Mcu.IP13=USART3
 Mcu.IP2=LPUART1
 Mcu.IP3=NVIC
-Mcu.IP4=RCC
-Mcu.IP5=SPI1
-Mcu.IP6=SPI2
-Mcu.IP7=SPI3
-Mcu.IP8=SYS
-Mcu.IP9=USART1
-Mcu.IPNb=12
+Mcu.IP4=QUADSPI
+Mcu.IP5=RCC
+Mcu.IP6=SDMMC1
+Mcu.IP7=SPI1
+Mcu.IP8=SPI2
+Mcu.IP9=SPI3
+Mcu.IPNb=14
 Mcu.Name=STM32L431R(B-C)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PC13
@@ -35,31 +37,38 @@ Mcu.Pin12=PA4
 Mcu.Pin13=PA6
 Mcu.Pin14=PC4
 Mcu.Pin15=PC5
-Mcu.Pin16=PB2
-Mcu.Pin17=PB13
-Mcu.Pin18=PB15
-Mcu.Pin19=PC6
+Mcu.Pin16=PB0
+Mcu.Pin17=PB1
+Mcu.Pin18=PB2
+Mcu.Pin19=PB10
 Mcu.Pin2=PC15-OSC32_OUT (PC15)
-Mcu.Pin20=PC7
-Mcu.Pin21=PA9
-Mcu.Pin22=PA10
-Mcu.Pin23=PA12
-Mcu.Pin24=PA15 (JTDI)
-Mcu.Pin25=PC10
-Mcu.Pin26=PC11
-Mcu.Pin27=PB3 (JTDO-TRACESWO)
-Mcu.Pin28=PB5
-Mcu.Pin29=PB6
+Mcu.Pin20=PB11
+Mcu.Pin21=PB13
+Mcu.Pin22=PB15
+Mcu.Pin23=PC6
+Mcu.Pin24=PC7
+Mcu.Pin25=PC8
+Mcu.Pin26=PA9
+Mcu.Pin27=PA10
+Mcu.Pin28=PA12
+Mcu.Pin29=PA15 (JTDI)
 Mcu.Pin3=PH0-OSC_IN (PH0)
-Mcu.Pin30=PB7
-Mcu.Pin31=VP_SYS_VS_Systick
+Mcu.Pin30=PC10
+Mcu.Pin31=PC11
+Mcu.Pin32=PC12
+Mcu.Pin33=PD2
+Mcu.Pin34=PB3 (JTDO-TRACESWO)
+Mcu.Pin35=PB5
+Mcu.Pin36=PB6
+Mcu.Pin37=PB7
+Mcu.Pin38=VP_SYS_VS_Systick
 Mcu.Pin4=PH1-OSC_OUT (PH1)
 Mcu.Pin5=PC0
 Mcu.Pin6=PC1
 Mcu.Pin7=PC2
 Mcu.Pin8=PC3
 Mcu.Pin9=PA1
-Mcu.PinsNb=32
+Mcu.PinsNb=39
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32L431RCTx
@@ -68,6 +77,7 @@ MxDb.Version=DB.5.0.30
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.EXTI2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
 NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@@ -101,6 +111,14 @@ PA6.Mode=Full_Duplex_Master
 PA6.Signal=SPI1_MISO
 PA9.Mode=Asynchronous
 PA9.Signal=USART1_TX
+PB0.Mode=Single Bank 1 2IOs
+PB0.Signal=QUADSPI_BK1_IO1
+PB1.Mode=Single Bank 1 2IOs
+PB1.Signal=QUADSPI_BK1_IO0
+PB10.Mode=Single Bank 1 2IOs
+PB10.Signal=QUADSPI_CLK
+PB11.Mode=Single Bank 1 2IOs
+PB11.Signal=QUADSPI_BK1_NCS
 PB13.Locked=true
 PB13.Mode=TX_Only_Simplex_Unidirect_Master
 PB13.Signal=SPI2_SCK
@@ -133,6 +151,8 @@ PC10.Mode=Full_Duplex_Master
 PC10.Signal=SPI3_SCK
 PC11.Mode=Full_Duplex_Master
 PC11.Signal=SPI3_MISO
+PC12.Mode=SD_1_bit
+PC12.Signal=SDMMC1_CK
 PC13.GPIOParameters=GPIO_Label
 PC13.GPIO_Label=LED
 PC13.Locked=true
@@ -158,14 +178,10 @@ PC7.GPIOParameters=GPIO_Label
 PC7.GPIO_Label=LCD_RST
 PC7.Locked=true
 PC7.Signal=GPIO_Output
-PCC.Checker=true
-PCC.Line=STM32L4x1
-PCC.MCU=STM32L431R(B-C)Tx
-PCC.PartNumber=STM32L431RCTx
-PCC.Seq0=0
-PCC.Series=STM32L4
-PCC.Temperature=25
-PCC.Vdd=3.0
+PC8.Mode=SD_1_bit
+PC8.Signal=SDMMC1_D0
+PD2.Mode=SD_1_bit
+PD2.Signal=SDMMC1_CMD
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
 PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
@@ -193,11 +209,18 @@ ProjectManager.PreviousToolchain=
 ProjectManager.ProjectBuild=false
 ProjectManager.ProjectFileName=BearPi_STM32L31RC.ioc
 ProjectManager.ProjectName=BearPi_STM32L31RC
+ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=MDK-ARM V5
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_SPI3_Init-SPI3-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,6-MX_USART2_UART_Init-USART2-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_SPI3_Init-SPI3-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_USART1_UART_Init-USART1-false-HAL-true,12-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,13-MX_QUADSPI_Init-QUADSPI-false-HAL-true
+QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_4_CYCLE
+QUADSPI.ClockPrescaler=0
+QUADSPI.FifoThreshold=4
+QUADSPI.FlashSize=22
+QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,FlashSize,ChipSelectHighTime
+QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
 RCC.ADCFreq_Value=32000000
 RCC.AHBFreq_Value=80000000
 RCC.APB1Freq_Value=80000000

board/BearPi_STM32L431RC/BSP/Hardware/W25QXX-QSPI/w25qxx.c

@@ -0,0 +1,343 @@
+#include "w25qxx.h"
+#include "quadspi.h"
+
+int w25qxx_init(void)
+{
+    MX_QUADSPI_Init();
+    return 0;
+}
+
+int w25qxx_memory_mapped(void)
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = FAST_READ_DUAL_IO_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_2_LINES,
+        .Address = 0, // NOT USED for memory-mapped mode
+        .AddressSize = QSPI_ADDRESS_24_BITS,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_2_LINES,
+        .AlternateBytes = 0xF0, // M7-M0 should be set to Fxh
+        .AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS, 
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_2_LINES,
+        .NbData = 0, // NOT USED for memory-mapped mode
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    QSPI_MemoryMappedTypeDef cfg = {
+        .TimeOutPeriod = 0,
+        .TimeOutActivation = QSPI_TIMEOUT_COUNTER_DISABLE,
+    };
+    if (HAL_QSPI_GetState(&hqspi) != HAL_QSPI_STATE_BUSY_MEM_MAPPED) {
+        if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+            return -1;
+        }
+        if (HAL_QSPI_MemoryMapped(&hqspi, &cmd, &cfg) != HAL_OK) {
+            return -1;
+        }
+    }
+    return 0;
+}
+
+uint16_t w25qxx_read_deviceid(void)
+{
+    uint8_t recv_buf[2] = {0};
+    uint16_t device_id = 0;
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = ManufactDeviceID_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_1_LINE,
+        .Address = 0,
+        .AddressSize = QSPI_ADDRESS_24_BITS,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_1_LINE,
+        .NbData = 2,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return 0;
+    }
+    if (HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return 0;
+    }
+    if (HAL_QSPI_Receive(&hqspi, recv_buf, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return 0;
+    }
+    device_id = (recv_buf[0] << 8) | recv_buf[1];
+    return device_id;
+}
+
+static void w25qxx_wait_busy(void) 
+{
+    uint8_t status;
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE, 
+        .Instruction = READ_STATU_REGISTER_1,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_1_LINE,
+        .NbData = 1,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
+    do {
+        HAL_QSPI_Receive(&hqspi, &status, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
+    } while ((status & 0x01) == 0x01);
+}
+
+int w25qxx_read(uint8_t *buffer, uint32_t start_addr, uint16_t nbytes)
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = FAST_READ_DUAL_IO_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_2_LINES,
+        .Address = start_addr,
+        .AddressSize = QSPI_ADDRESS_24_BITS,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_2_LINES,
+        .AlternateBytes = 0xF0, // M7-M0 should be set to Fxh
+        .AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS, 
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_2_LINES,
+        .NbData = nbytes, 
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return -1;
+    }
+    if (HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    if (HAL_QSPI_Receive(&hqspi, buffer, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    return 0;
+}
+
+static void w25qxx_write_enable(void)
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = WRITE_ENABLE_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
+    // w25qxx_wait_busy();
+}
+
+static void w25qxx_write_disable(void)
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = WRITE_DISABLE_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE);
+    // w25qxx_wait_busy();
+}
+
+int w25qxx_erase_sector(uint32_t sector_addr)
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = SECTOR_ERASE_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_1_LINE,
+        .Address = sector_addr,
+        .AddressSize = QSPI_ADDRESS_24_BITS,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return -1;
+    }
+        
+    w25qxx_wait_busy();
+
+    w25qxx_write_enable();
+    
+    if (HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    
+    w25qxx_wait_busy();    
+
+    return 0;
+}
+
+int w25qxx_erase_chip(void) 
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = CHIP_ERASE_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return -1;
+    }
+        
+    w25qxx_wait_busy();
+
+    w25qxx_write_enable();
+
+    if (HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    
+    w25qxx_wait_busy();
+
+    return 0;
+}
+
+int w25qxx_page_program(uint8_t *dat, uint32_t write_addr, uint16_t nbytes) 
+{
+    QSPI_CommandTypeDef cmd = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = PAGE_PROGRAM_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_1_LINE,
+        .Address = write_addr,
+        .AddressSize = QSPI_ADDRESS_24_BITS,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_1_LINE,
+        .NbData = nbytes,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return -1;
+    }
+
+    w25qxx_wait_busy();
+
+    w25qxx_write_enable();
+
+    if (HAL_QSPI_Command(&hqspi, &cmd, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    if (HAL_QSPI_Transmit(&hqspi, dat, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+
+    w25qxx_wait_busy();
+
+    return 0;
+}
+
+int w25qxx_reset(void)
+{
+    QSPI_CommandTypeDef cmd1 = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = ENABLE_RESET_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+    QSPI_CommandTypeDef cmd2 = {
+        // Instruction
+        .InstructionMode = QSPI_INSTRUCTION_1_LINE,
+        .Instruction = RESET_DEVICE_CMD,
+        // Address
+        .AddressMode = QSPI_ADDRESS_NONE,
+        // AlternateByte
+        .AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE,
+        // Dummy
+        .DummyCycles = 0,
+        // Data
+        .DataMode = QSPI_DATA_NONE,
+        // DDR
+        .DdrMode = QSPI_DDR_MODE_DISABLE,
+    };
+        
+    if (HAL_QSPI_Abort(&hqspi) != HAL_OK) {
+        return -1;
+    }
+        
+    if (HAL_QSPI_Command(&hqspi, &cmd1, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+    if (HAL_QSPI_Command(&hqspi, &cmd2, HAL_QSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
+        return -1;
+    }
+        
+    w25qxx_wait_busy();
+    
+    return 0;
+}

board/BearPi_STM32L431RC/BSP/Hardware/W25QXX-QSPI/w25qxx.h

@@ -0,0 +1,40 @@
+#ifndef _W25QXX_H_
+#define _W25QXX_H_
+#include "main.h"
+
+enum {
+    ManufactDeviceID_CMD    = 0x90,
+    READ_STATU_REGISTER_1   = 0x05,
+    READ_STATU_REGISTER_2   = 0x35,
+    WRITE_STATU_REGISTER    = 0x01,
+    READ_DATA_CMD           = 0x03,
+    FAST_READ_CMD           = 0x0B,
+    FAST_READ_DUAL_O_CMD    = 0x3B,
+    FAST_READ_DUAL_IO_CMD   = 0xBB,
+    FAST_READ_QUAD_O_CMD    = 0x6B,
+    FAST_READ_QUAD_IO_CMD   = 0xEB,
+    WRITE_ENABLE_CMD        = 0x06,
+    WRITE_DISABLE_CMD       = 0x04,
+    SECTOR_ERASE_CMD        = 0x20,
+    CHIP_ERASE_CMD          = 0xc7,
+    PAGE_PROGRAM_CMD        = 0x02,
+    QUAD_PAGE_PROGRAM_CMD   = 0x32,
+    BLOCK_ERASE_64KB_CMD    = 0xD8,
+    BLOCK_ERASE_32KB_CMD    = 0x52,
+    ERASE_SUSPEND_CMD       = 0x75,
+    ERASE_RESUME_CMD        = 0x7A,
+    HIGH_PERFORM_MODE_CMD   = 0xA3,
+    ENABLE_RESET_CMD        = 0x66,
+    RESET_DEVICE_CMD        = 0x99,
+};
+
+int w25qxx_init(void);
+int w25qxx_memory_mapped(void);
+uint16_t w25qxx_read_deviceid(void);
+int w25qxx_read(uint8_t* buffer, uint32_t start_addr, uint16_t nbytes);
+int w25qxx_erase_sector(uint32_t sector_addr);
+int w25qxx_erase_chip(void);
+int w25qxx_page_program(uint8_t* dat, uint32_t write_addr, uint16_t nbytes);
+int w25qxx_reset(void);
+
+#endif /* _W25QXX_H_ */

board/BearPi_STM32L431RC/BSP/Inc/quadspi.h

@@ -0,0 +1,58 @@
+/**
+  ******************************************************************************
+  * File Name          : QUADSPI.h
+  * Description        : This file provides code for the configuration
+  *                      of the QUADSPI instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __quadspi_H
+#define __quadspi_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern QSPI_HandleTypeDef hqspi;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_QUADSPI_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ quadspi_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/BearPi_STM32L431RC/BSP/Inc/sdmmc.h

@@ -0,0 +1,58 @@
+/**
+  ******************************************************************************
+  * File Name          : SDMMC.h
+  * Description        : This file provides code for the configuration
+  *                      of the SDMMC instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __sdmmc_H
+#define __sdmmc_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern SD_HandleTypeDef hsd1;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_SDMMC1_SD_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ sdmmc_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/BearPi_STM32L431RC/BSP/Inc/stm32l4xx_hal_conf.h

@@ -78,11 +78,11 @@
 /*#define HAL_OSPI_MODULE_ENABLED   */
 /*#define HAL_PCD_MODULE_ENABLED   */
 /*#define HAL_QSPI_MODULE_ENABLED   */
-/*#define HAL_QSPI_MODULE_ENABLED   */
+#define HAL_QSPI_MODULE_ENABLED
 /*#define HAL_RNG_MODULE_ENABLED   */
 /*#define HAL_RTC_MODULE_ENABLED   */
 /*#define HAL_SAI_MODULE_ENABLED   */
-/*#define HAL_SD_MODULE_ENABLED   */
+#define HAL_SD_MODULE_ENABLED
 /*#define HAL_SMBUS_MODULE_ENABLED   */
 /*#define HAL_SMARTCARD_MODULE_ENABLED   */
 #define HAL_SPI_MODULE_ENABLED

board/BearPi_STM32L431RC/BSP/Src/mcu_init.c

@@ -103,21 +103,24 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_USART3
-                              |RCC_PERIPHCLK_LPUART1|RCC_PERIPHCLK_I2C1
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
+                              |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_LPUART1
+                              |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_SDMMC1
                               |RCC_PERIPHCLK_ADC;
+  PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
   PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
   PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
   PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
   PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
   PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
+  PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1;
   PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
   PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
   PeriphClkInit.PLLSAI1.PLLSAI1N = 16;
   PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
   PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
   PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
-  PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADC1CLK;
+  PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
   {
     Error_Handler();

board/BearPi_STM32L431RC/BSP/Src/quadspi.c

@@ -0,0 +1,110 @@
+/**
+  ******************************************************************************
+  * File Name          : QUADSPI.c
+  * Description        : This file provides code for the configuration
+  *                      of the QUADSPI instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "quadspi.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+QSPI_HandleTypeDef hqspi;
+
+/* QUADSPI init function */
+void MX_QUADSPI_Init(void)
+{
+
+  hqspi.Instance = QUADSPI;
+  hqspi.Init.ClockPrescaler = 0;
+  hqspi.Init.FifoThreshold = 4;
+  hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
+  hqspi.Init.FlashSize = 22;
+  hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_4_CYCLE;
+  hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
+  hqspi.Init.FlashID = QSPI_FLASH_ID_1;
+  hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
+  if (HAL_QSPI_Init(&hqspi) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_QSPI_MspInit(QSPI_HandleTypeDef* qspiHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(qspiHandle->Instance==QUADSPI)
+  {
+  /* USER CODE BEGIN QUADSPI_MspInit 0 */
+
+  /* USER CODE END QUADSPI_MspInit 0 */
+    /* QUADSPI clock enable */
+    __HAL_RCC_QSPI_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**QUADSPI GPIO Configuration
+    PB0     ------> QUADSPI_BK1_IO1
+    PB1     ------> QUADSPI_BK1_IO0
+    PB10     ------> QUADSPI_CLK
+    PB11     ------> QUADSPI_BK1_NCS
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN QUADSPI_MspInit 1 */
+
+  /* USER CODE END QUADSPI_MspInit 1 */
+  }
+}
+
+void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* qspiHandle)
+{
+
+  if(qspiHandle->Instance==QUADSPI)
+  {
+  /* USER CODE BEGIN QUADSPI_MspDeInit 0 */
+
+  /* USER CODE END QUADSPI_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_QSPI_CLK_DISABLE();
+
+    /**QUADSPI GPIO Configuration
+    PB0     ------> QUADSPI_BK1_IO1
+    PB1     ------> QUADSPI_BK1_IO0
+    PB10     ------> QUADSPI_CLK
+    PB11     ------> QUADSPI_BK1_NCS
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_11);
+
+  /* USER CODE BEGIN QUADSPI_MspDeInit 1 */
+
+  /* USER CODE END QUADSPI_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/BearPi_STM32L431RC/BSP/Src/sdmmc.c

@@ -0,0 +1,117 @@
+/**
+  ******************************************************************************
+  * File Name          : SDMMC.c
+  * Description        : This file provides code for the configuration
+  *                      of the SDMMC instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "sdmmc.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+SD_HandleTypeDef hsd1;
+
+/* SDMMC1 init function */
+
+void MX_SDMMC1_SD_Init(void)
+{
+
+  hsd1.Instance = SDMMC1;
+  hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
+  hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
+  hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
+  hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;
+  hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
+  hsd1.Init.ClockDiv = 0;
+  if (HAL_SD_Init(&hsd1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(sdHandle->Instance==SDMMC1)
+  {
+  /* USER CODE BEGIN SDMMC1_MspInit 0 */
+
+  /* USER CODE END SDMMC1_MspInit 0 */
+    /* SDMMC1 clock enable */
+    __HAL_RCC_SDMMC1_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**SDMMC1 GPIO Configuration    
+    PC8     ------> SDMMC1_D0
+    PC12     ------> SDMMC1_CK
+    PD2     ------> SDMMC1_CMD 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN SDMMC1_MspInit 1 */
+
+  /* USER CODE END SDMMC1_MspInit 1 */
+  }
+}
+
+void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle)
+{
+
+  if(sdHandle->Instance==SDMMC1)
+  {
+  /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
+
+  /* USER CODE END SDMMC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SDMMC1_CLK_DISABLE();
+  
+    /**SDMMC1 GPIO Configuration    
+    PC8     ------> SDMMC1_D0
+    PC12     ------> SDMMC1_CK
+    PD2     ------> SDMMC1_CMD 
+    */
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_12);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
+
+  /* USER CODE BEGIN SDMMC1_MspDeInit 1 */
+
+  /* USER CODE END SDMMC1_MspDeInit 1 */
+  }
+} 
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/BearPi_STM32L431RC/BSP/Src/stm32l4xx_it_mpy.c

@@ -0,0 +1,360 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32l4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l4xx_it.h"
+#include "tos_k.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "machine_uart.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern UART_HandleTypeDef hlpuart1;
+extern UART_HandleTypeDef huart2;
+extern UART_HandleTypeDef huart3;
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Prefetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles System service call via SWI instruction.
+  */
+void SVC_Handler(void)
+{
+  /* USER CODE BEGIN SVCall_IRQn 0 */
+
+  /* USER CODE END SVCall_IRQn 0 */
+  /* USER CODE BEGIN SVCall_IRQn 1 */
+
+  /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Pendable request for system service.
+  */
+__weak void PendSV_Handler(void)
+{
+  /* USER CODE BEGIN PendSV_IRQn 0 */
+
+  /* USER CODE END PendSV_IRQn 0 */
+  /* USER CODE BEGIN PendSV_IRQn 1 */
+
+  /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+  * @brief This function handles System tick timer.
+  */
+void SysTick_Handler(void)
+{
+  /* USER CODE BEGIN SysTick_IRQn 0 */
+
+  /* USER CODE END SysTick_IRQn 0 */
+  HAL_IncTick();
+  if (tos_knl_is_running())
+  {
+    tos_knl_irq_enter();
+    tos_tick_handler();
+    tos_knl_irq_leave();
+  }
+  //HAL_SYSTICK_IRQHandler();
+  /* USER CODE BEGIN SysTick_IRQn 1 */
+
+  /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32l4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles EXTI line1 interrupt.
+  */
+void EXTI1_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI1_IRQn 0 */
+
+  /* USER CODE END EXTI1_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+  /* USER CODE BEGIN EXTI1_IRQn 1 */
+
+  /* USER CODE END EXTI1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles EXTI line2 interrupt.
+  */
+void EXTI2_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI2_IRQn 0 */
+
+  /* USER CODE END EXTI2_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+  /* USER CODE BEGIN EXTI2_IRQn 1 */
+
+  /* USER CODE END EXTI2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles EXTI line3 interrupt.
+  */
+void EXTI3_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI3_IRQn 0 */
+
+  /* USER CODE END EXTI3_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+  /* USER CODE BEGIN EXTI3_IRQn 1 */
+
+  /* USER CODE END EXTI3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles EXTI line4 interrupt.
+  */
+void EXTI4_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI4_IRQn 0 */
+
+  /* USER CODE END EXTI4_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+  /* USER CODE BEGIN EXTI4_IRQn 1 */
+
+  /* USER CODE END EXTI4_IRQn 1 */
+}
+
+/**
+  * @brief This function handles EXTI line[9:5] interrupts.
+  */
+void EXTI9_5_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI9_5_IRQn 0 */
+
+  /* USER CODE END EXTI9_5_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
+  /* USER CODE BEGIN EXTI9_5_IRQn 1 */
+
+  /* USER CODE END EXTI9_5_IRQn 1 */
+}
+
+/**
+  * @brief This function handles EXTI line[15:10] interrupts.
+  */
+void EXTI15_10_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI15_10_IRQn 0 */
+
+  /* USER CODE END EXTI15_10_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14);
+  HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15);
+  /* USER CODE BEGIN EXTI15_10_IRQn 1 */
+
+  /* USER CODE END EXTI15_10_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART2 global interrupt.
+  */
+void USART2_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART2_IRQn 0 */
+
+  /* USER CODE END USART2_IRQn 0 */
+  HAL_UART_IRQHandler(&huart2);
+  /* USER CODE BEGIN USART2_IRQn 1 */
+
+  /* USER CODE END USART2_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART3 global interrupt.
+  */
+void USART3_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART3_IRQn 0 */
+
+  /* USER CODE END USART3_IRQn 0 */
+  HAL_UART_IRQHandler(&huart3);
+  /* USER CODE BEGIN USART3_IRQn 1 */
+
+  /* USER CODE END USART3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles LPUART1 global interrupt.
+  */
+void LPUART1_IRQHandler(void)
+{
+  /* USER CODE BEGIN LPUART1_IRQn 0 */
+	
+  /* USER CODE END LPUART1_IRQn 0 */
+  HAL_UART_IRQHandler(&hlpuart1);
+  /* USER CODE BEGIN LPUART1_IRQn 1 */
+	
+  /* USER CODE END LPUART1_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
+{
+    if (huart->Instance == LPUART1) {
+        mp_hal_uart_irq_handler(0);
+    } else if (huart->Instance == USART1) {
+        mp_hal_uart_irq_handler(1); 
+    } else if (huart->Instance == USART2) {
+        mp_hal_uart_irq_handler(2);
+    } else if (huart->Instance == USART3) {
+        mp_hal_uart_irq_handler(3);
+    }
+}
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

board/BearPi_STM32L431RC/BSP/Src/usart.c

@@ -24,6 +24,7 @@
 /* USER CODE BEGIN 0 */
 uint8_t data;
 uint8_t shell_data;
+extern void mp_hal_uart_rx_start(uint32_t uart_id);
 /* USER CODE END 0 */
 
 UART_HandleTypeDef hlpuart1;
@@ -49,10 +50,14 @@ void MX_LPUART1_UART_Init(void)
   {
     Error_Handler();
   }
-	HAL_UART_Receive_IT(&hlpuart1, &data, 1);
+#ifdef USE_MICROPYTHON
+  mp_hal_uart_rx_start(0);
+#else
+  HAL_UART_Receive_IT(&hlpuart1, &data, 1);
 #if AT_INPUT_TYPE_FRAME_EN 
   __HAL_UART_ENABLE_IT(&hlpuart1, UART_IT_IDLE);
 #endif
+#endif
 }
 /* USART1 init function */
 
@@ -73,6 +78,9 @@ void MX_USART1_UART_Init(void)
   {
     Error_Handler();
   }
+#ifdef USE_MICROPYTHON
+  mp_hal_uart_rx_start(1);
+#endif
 }
 /* USART2 init function */
 
@@ -93,7 +101,11 @@ void MX_USART2_UART_Init(void)
   {
     Error_Handler();
   }
+#ifdef USE_MICROPYTHON
+  mp_hal_uart_rx_start(2);
+#else
   HAL_UART_Receive_IT(&huart2, &shell_data, 1);
+#endif
 }
 /* USART3 init function */
 
@@ -114,7 +126,9 @@ void MX_USART3_UART_Init(void)
   {
     Error_Handler();
   }
-
+#ifdef USE_MICROPYTHON
+  mp_hal_uart_rx_start(3);
+#endif
 }
 
 void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)

board/BearPi_STM32L431RC/KEIL/fatfs_through_vfs/BearPi_STM32L31RC.uvprojx

@@ -0,0 +1,872 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>TencentOS_tiny</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32L431RCTx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32L4xx_DFP.2.2.0</PackID>
+          <PackURL>http://www.keil.com/pack</PackURL>
+          <Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId></DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\obj\</OutputDirectory>
+          <OutputName>TencentOS_tiny</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath>.\list\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>0</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4107</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>USE_HAL_DRIVER,STM32L431xx,WITH_TOS_NET_ADAPTER,USE_ESP8266</Define>
+              <Undefine></Undefine>
+              <IncludePath>..\..\BSP\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Inc;..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Legacy;..\..\..\..\platform\vendor_bsp\st\CMSIS\Device\ST\STM32L4xx\Include;..\..\..\..\platform\vendor_bsp\st\CMSIS\Include;..\..\..\..\kernel\core\include;..\..\TOS-CONFIG;..\..\..\..\platform\arch\arm\cortex-m4\keil;..\..\..\..\kernel\pm\include;..\..\..\..\osal\cmsis_os;..\..\..\..\arch\arm\arm-v7m\common\include;..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc;..\..\..\..\net\at\include;..\..\..\..\kernel\hal\include;..\..\BSP\Hardware\LCD_ST7789;..\..\BSP\Hardware\BH1750;..\..\..\..\examples\fatfs_through_vfs;..\..\..\..\components\fs\vfs\include;..\..\..\..\components\fs\fatfs\wrapper\include;..\..\..\..\components\fs\fatfs\3rdparty</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>1</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Application/MDK-ARM</GroupName>
+          <Files>
+            <File>
+              <FileName>startup_stm32l431xx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>startup_stm32l431xx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Application/User</GroupName>
+          <Files>
+            <File>
+              <FileName>gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>mcu_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\mcu_init.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_msp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\stm32l4xx_hal_msp.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_it.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\stm32l4xx_it.c</FilePath>
+            </File>
+            <File>
+              <FileName>usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>sdmmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\sdmmc.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>examples</GroupName>
+          <Files>
+            <File>
+              <FileName>fatfs_through_vfs_sample.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\examples\fatfs_through_vfs\fatfs_through_vfs_sample.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName>
+          <Files>
+            <File>
+              <FileName>stm32l4xx_hal_tim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_tim_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_tim_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_flash_ramfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_flash_ramfunc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_dma_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_cortex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_cortex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_adc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_dac.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_dac_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_spi_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_sd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_sd_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sd_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_ll_sdmmc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_ll_sdmmc.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers/CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>system_stm32l4xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Hardware</GroupName>
+          <Files>
+            <File>
+              <FileName>BH1750.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\BH1750\BH1750.c</FilePath>
+            </File>
+            <File>
+              <FileName>lcd_spi2_drv.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\BSP\Hardware\LCD_ST7789\lcd_spi2_drv.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>tos_mmblk.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_mmblk.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_mmheap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_mmheap.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_mutex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_mutex.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_sched.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_sched.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_sem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_sem.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_sys.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_sys.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_task.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_task.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_tick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_tick.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_time.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_event.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_event.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_global.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_global.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_pend.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_pend.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_robin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_robin.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_binary_heap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_binary_heap.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_char_fifo.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_char_fifo.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_completion.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_countdownlatch.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_countdownlatch.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_mail_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_mail_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_message_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_message_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_priority_mail_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_mail_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_priority_message_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_message_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_priority_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_priority_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_ring_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\kernel\core\tos_ring_queue.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>cpu</GroupName>
+          <Files>
+            <File>
+              <FileName>port_s.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_s.S</FilePath>
+            </File>
+            <File>
+              <FileName>tos_cpu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\common\tos_cpu.c</FilePath>
+            </File>
+            <File>
+              <FileName>port_c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\arch\arm\arm-v7m\cortex-m4\armcc\port_c.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>config</GroupName>
+          <Files>
+            <File>
+              <FileName>tos_config.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\TOS-CONFIG\tos_config.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>fatfs</GroupName>
+          <Files>
+            <File>
+              <FileName>tos_diskio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_diskio.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_fatfs_drv.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_fatfs_drv.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_fatfs_vfs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_fatfs_vfs.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_ff.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_ff.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_ffsystem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_ffsystem.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_ffunicode.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\fatfs\wrapper\tos_ffunicode.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>vfs</GroupName>
+          <Files>
+            <File>
+              <FileName>tos_vfs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\vfs\tos_vfs.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_vfs_device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\vfs\tos_vfs_device.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_vfs_file.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\vfs\tos_vfs_file.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_vfs_fs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\vfs\tos_vfs_fs.c</FilePath>
+            </File>
+            <File>
+              <FileName>tos_vfs_inode.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\components\fs\vfs\tos_vfs_inode.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>hal</GroupName>
+          <Files>
+            <File>
+              <FileName>tos_hal_sd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_sd.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>::CMSIS</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
+        <targetInfos>
+          <targetInfo name="TencentOS_tiny"/>
+        </targetInfos>
+      </component>
+    </components>
+    <files/>
+  </RTE>
+
+</Project>

board/BearPi_STM32L431RC/KEIL/fatfs_through_vfs/startup_stm32l431xx.s

@@ -0,0 +1,404 @@
+;********************** COPYRIGHT(c) 2017  STMicroelectronics ******************
+;* File Name          : startup_stm32l431xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x100
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x100
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler                   ; ADC1
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP_IRQHandler                   ; COMP Interrupt
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
+                DCD     0                                 ; Reserved
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
+                DCD     QUADSPI_IRQHandler                ; Quad SPI global interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     0                                 ; Reserved
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
+                DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     CRS_IRQHandler                    ; CRS interrupt
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     TAMP_STAMP_IRQHandler             [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_IRQHandler                   [WEAK]
+        EXPORT     CAN1_TX_IRQHandler                [WEAK]
+        EXPORT     CAN1_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN1_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN1_SCE_IRQHandler               [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_IRQHandler                   [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     COMP_IRQHandler                   [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SWPMI1_IRQHandler                 [WEAK]
+        EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+CAN1_TX_IRQHandler
+CAN1_RX0_IRQHandler
+CAN1_RX1_IRQHandler
+CAN1_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+SDMMC1_IRQHandler
+SPI3_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+LPUART1_IRQHandler
+QUADSPI_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+SAI1_IRQHandler
+SWPMI1_IRQHandler
+TSC_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+CRS_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_pin.c

@@ -0,0 +1,273 @@
+#include "tos_k.h"
+#include "mp_tos_hal_pin.h"
+#include "gpio.h"
+
+#define ST_EXTI_VECTOR_SIZE  16
+
+#define ST_PORT_NUM(port)   ((uint8_t)((port) >> 4) & 0x0F)
+#define ST_PIN_NUM(port)    ((uint8_t)((port) & 0x0F))    
+
+__STATIC__ hal_pin_cb_t hal_pin_irq_handler[ST_EXTI_VECTOR_SIZE];
+__STATIC__ void *hal_pin_irq_handler_arg[ST_EXTI_VECTOR_SIZE];
+__STATIC__ GPIO_TypeDef *hal_pin_irq_gpio[ST_EXTI_VECTOR_SIZE];
+
+__STATIC__ const uint8_t nvic_irq_channel[ST_EXTI_VECTOR_SIZE] = {
+    EXTI0_IRQn,     EXTI1_IRQn,     EXTI2_IRQn,     EXTI3_IRQn,
+    EXTI4_IRQn,     EXTI9_5_IRQn,   EXTI9_5_IRQn,   EXTI9_5_IRQn,
+    EXTI9_5_IRQn,   EXTI9_5_IRQn,   EXTI15_10_IRQn, EXTI15_10_IRQn,
+    EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn,
+};
+
+__STATIC__ int mask2no(uint32_t mask) {
+    for (int i = 0; i < 32; i++) {
+        if ((1U << i) == mask) {
+            return i;
+        }
+    }
+    return -1;
+}
+
+__API__ int tos_hal_pin_init(hal_pin_t *pin, hal_pin_port_t port, hal_pin_mode_t mode)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    GPIO_InitTypeDef gpio_init;
+
+    if (!pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)(GPIOA_BASE + ST_PORT_NUM(port) * 0x0400UL);
+    gpio_pin = 1UL << ST_PIN_NUM(port);
+
+    gpio_init.Pin = gpio_pin;
+    gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+    switch (mode) {
+    case HAL_PIN_MODE_OUTPUT:
+        gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_OUTPUT_OD:
+        gpio_init.Mode = GPIO_MODE_OUTPUT_OD;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_INPUT:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_INPUT_PULLUP:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_PULLUP;
+        break;
+    case HAL_PIN_MODE_INPUT_PULLDOWN:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_PULLDOWN;
+        break;
+    default:
+        return -1;
+    }
+    HAL_GPIO_Init((GPIO_TypeDef *)gpiox, &gpio_init);
+
+    pin->port = port;
+    pin->private_gpio = gpiox;
+    pin->private_pin  = gpio_pin;
+    pin->mode = mode;
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_irq(hal_pin_t *pin, hal_pin_irq_t irq)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    GPIO_InitTypeDef gpio_init;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+    if (gpio_pin_num >= ST_EXTI_VECTOR_SIZE) {
+        return -1;
+    }
+    
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] != NULL && hal_pin_irq_gpio[gpio_pin_num] != gpiox) {
+        TOS_CPU_INT_ENABLE();
+        return -1;
+    }
+
+    if (irq == HAL_PIN_IRQ_NONE) {
+        hal_pin_irq_gpio[gpio_pin_num] = NULL;
+        hal_pin_irq_handler[gpio_pin_num] = NULL;
+        hal_pin_irq_handler_arg[gpio_pin_num] = NULL;
+        TOS_CPU_INT_ENABLE();
+        HAL_NVIC_DisableIRQ(nvic_irq_channel[gpio_pin_num]);
+    } else {
+        hal_pin_irq_gpio[gpio_pin_num] = gpiox;
+        TOS_CPU_INT_ENABLE();
+        gpio_init.Pin = gpio_pin;
+        gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+        gpio_init.Mode = GPIO_MODE_IT_RISING_FALLING;
+        switch (irq) {
+        case HAL_PIN_IRQ_RISING:
+            gpio_init.Mode = GPIO_MODE_IT_RISING;
+            break;
+        case HAL_PIN_IRQ_FALLING:
+            gpio_init.Mode = GPIO_MODE_IT_FALLING;
+            break;
+        case HAL_PIN_IRQ_RISING_FALLING:
+            gpio_init.Mode = GPIO_MODE_IT_RISING_FALLING;
+            break;
+        }
+        switch (pin->mode) {
+            case HAL_PIN_MODE_INPUT_PULLUP:
+                gpio_init.Pull = GPIO_PULLUP;
+                break;
+            case HAL_PIN_MODE_INPUT_PULLDOWN:
+                gpio_init.Pull = GPIO_PULLDOWN;
+                break;
+            default:
+                gpio_init.Pull = GPIO_NOPULL;
+                break;
+        }
+        HAL_GPIO_Init(gpiox, &gpio_init);
+        HAL_NVIC_SetPriority(nvic_irq_channel[gpio_pin_num], 2, 0);
+        HAL_NVIC_EnableIRQ(nvic_irq_channel[gpio_pin_num]);
+
+        pin->irq = irq;
+    }
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_irq_callback(hal_pin_t *pin, hal_pin_cb_t callback, void *cb_arg)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+    if (gpio_pin_num >= ST_EXTI_VECTOR_SIZE) {
+        return -1;
+    }
+
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] != NULL && hal_pin_irq_gpio[gpio_pin_num] != gpiox) {
+        TOS_CPU_INT_ENABLE();
+        return -1;
+    }
+    hal_pin_irq_handler[gpio_pin_num] = gpiox;
+    hal_pin_irq_handler[gpio_pin_num] = callback;
+    hal_pin_irq_handler_arg[gpio_pin_num] = cb_arg;
+    TOS_CPU_INT_ENABLE();
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_write(hal_pin_t *pin, int state)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+
+    HAL_GPIO_WritePin(gpiox, gpio_pin, (state == 0) ? GPIO_PIN_RESET : GPIO_PIN_SET);
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_read(hal_pin_t *pin)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+
+    return (HAL_GPIO_ReadPin(gpiox, gpio_pin) == GPIO_PIN_RESET) ? 0 : 1;
+}
+
+__API__ int tos_hal_pin_deinit(hal_pin_t *pin)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] == gpiox) {
+        hal_pin_irq_gpio[gpio_pin_num] = NULL;
+        hal_pin_irq_handler[gpio_pin_num] = NULL;
+        hal_pin_irq_handler_arg[gpio_pin_num] = NULL;
+    }
+    TOS_CPU_INT_ENABLE();
+    HAL_GPIO_DeInit(gpiox, gpio_pin);
+
+    return 0;
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+    uint32_t gpio_pin_num = mask2no(GPIO_Pin);
+    hal_pin_cb_t callback;
+    uint32_t cb_arg;
+    if (gpio_pin_num < ST_EXTI_VECTOR_SIZE) {
+
+        callback = hal_pin_irq_handler[gpio_pin_num];
+        cb_arg = hal_pin_irq_handler_arg[gpio_pin_num];
+        if (callback) {
+            callback(cb_arg);
+        }
+    }
+}
+
+

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_pin.h

@@ -0,0 +1,45 @@
+#ifndef _TOS_HAL_PIN_H_
+#define _TOS_HAL_PIN_H_
+
+typedef unsigned char hal_pin_port_t;
+
+typedef enum hal_pin_mode_en {
+    HAL_PIN_MODE_OUTPUT = 0,
+    HAL_PIN_MODE_OUTPUT_OD,
+    HAL_PIN_MODE_INPUT,
+    HAL_PIN_MODE_INPUT_PULLUP,
+    HAL_PIN_MODE_INPUT_PULLDOWN,
+} hal_pin_mode_t;
+
+typedef enum hal_pin_irq_en {
+    HAL_PIN_IRQ_NONE            = 0x00,
+    HAL_PIN_IRQ_RISING          = 0x01,
+    HAL_PIN_IRQ_FALLING         = 0x02,
+    HAL_PIN_IRQ_RISING_FALLING  = 0x03,
+} hal_pin_irq_t;
+
+typedef struct hal_pin_st {
+    hal_pin_port_t port;
+    void *private_gpio;
+    void *private_pin;
+    hal_pin_mode_t mode;
+    hal_pin_irq_t irq;
+} hal_pin_t;
+
+
+typedef void (*hal_pin_cb_t)(void *arg);
+
+__API__ int tos_hal_pin_init(hal_pin_t *pin, hal_pin_port_t port, hal_pin_mode_t mode);
+
+__API__ int tos_hal_pin_write(hal_pin_t *pin, int state);
+
+__API__ int tos_hal_pin_read(hal_pin_t *pin);
+
+__API__ int tos_hal_pin_mode(hal_pin_t *pin, hal_pin_mode_t mode);
+
+__API__ int tos_hal_pin_irq(hal_pin_t *pin, hal_pin_irq_t irq);
+
+__API__ int tos_hal_pin_irq_callback(hal_pin_t *pin, hal_pin_cb_t callback, void *cb_arg);
+
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_spi.c

@@ -0,0 +1,80 @@
+#include "tos_k.h"
+#include "mp_tos_hal_spi.h"
+#include "stm32l4xx_hal.h"
+#include "spi.h"
+
+__API__ int tos_hal_spi_init(hal_spi_t *spi, hal_spi_port_t port)
+{
+    if (!spi) {
+        return -1;
+    }
+    
+    if (port == HAL_SPI_PORT_1) {
+        spi->private_spi = &hspi1;
+        MX_SPI1_Init();
+    } else if (port == HAL_SPI_PORT_2) {
+        spi->private_spi = &hspi2;
+        MX_SPI2_Init();
+    } else if (port == HAL_SPI_PORT_3) {
+        spi->private_spi = &hspi3;
+        MX_SPI3_Init();
+    } else {
+        return -1;
+    }
+
+    return 0;
+}
+
+__API__ int tos_hal_spi_transfer(hal_spi_t *spi, const uint8_t *send_buf, uint8_t *recv_buf, size_t size, uint32_t timeout)
+{
+    HAL_StatusTypeDef hal_status;
+    SPI_HandleTypeDef *spi_handle;
+
+    if (!spi || (!send_buf && !recv_buf)) {
+        return -1;
+    }
+
+    if (!spi->private_spi) {
+        return -1;
+    }
+
+    spi_handle = (SPI_HandleTypeDef *)spi->private_spi;
+
+    if (send_buf && recv_buf) {
+        hal_status = HAL_SPI_TransmitReceive(spi_handle, send_buf, recv_buf, size, timeout);
+    } else if (send_buf) {
+        hal_status = HAL_SPI_Transmit(spi_handle, send_buf, size, timeout);
+    } else if (recv_buf) {
+        hal_status = HAL_SPI_Receive(spi_handle, send_buf, size, timeout);
+    }
+
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+    return 0;
+}
+
+__API__ int tos_hal_spi_deinit(hal_spi_t *spi)
+{
+    HAL_StatusTypeDef hal_status;
+    SPI_HandleTypeDef *spi_handle;
+
+    if (!spi) {
+        return -1;
+    }
+
+    if (!spi->private_spi) {
+        return -1;
+    }
+
+    spi_handle = (SPI_HandleTypeDef *)spi->private_spi;
+    
+    hal_status = HAL_SPI_DeInit(spi_handle);
+    HAL_SPI_MspDeInit(spi_handle);
+
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+
+    return 0;
+}

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_spi.h

@@ -0,0 +1,22 @@
+#ifndef _TOS_HAL_SPI_H_
+#define _TOS_HAL_SPI_H_
+
+typedef enum hal_spi_port_en {
+    HAL_SPI_PORT_0 = 0,
+    HAL_SPI_PORT_1,
+    HAL_SPI_PORT_2,
+    HAL_SPI_PORT_3,
+} hal_spi_port_t;
+
+typedef struct hal_spi_st {
+    hal_spi_port_t      port;
+    void                *private_spi;
+} hal_spi_t;
+
+__API__ int tos_hal_spi_init(hal_spi_t *spi, hal_spi_port_t port);
+
+__API__ int tos_hal_spi_transfer(hal_spi_t *spi, const uint8_t *send_buf, uint8_t *recv_buf, size_t size, uint32_t timeout);
+
+__API__ int tos_hal_spi_deinit(hal_spi_t *spi);
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_uart.c

@@ -0,0 +1,26 @@
+#include "tos_k.h"
+#include "mp_tos_hal_uart.h"
+#include "stm32l4xx_hal.h"
+#include "usart.h"
+
+__API__ int tos_hal_uart_recv_start(hal_uart_t *uart, const uint8_t *buf, size_t size) 
+{
+    HAL_StatusTypeDef hal_status;
+    UART_HandleTypeDef *uart_handle;
+
+    if (!uart || !buf) {
+        return -1;
+    }
+
+    if (!uart->private_uart) {
+        return -1;
+    }
+
+    uart_handle = (UART_HandleTypeDef *)uart->private_uart;
+
+    hal_status = HAL_UART_Receive_IT(uart_handle, (uint8_t *)buf, size);
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+    return 0;
+}

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/hal/mp_tos_hal_uart.h

@@ -0,0 +1,8 @@
+#ifndef _MP_TOS_HAL_UART_H_
+#define _MP_TOS_HAL_UART_H_
+
+#include "tos_hal_uart.h"
+
+__API__ int tos_hal_uart_recv_start(hal_uart_t *uart, const uint8_t *buf, size_t size);
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/mpconfigboard.h

@@ -0,0 +1,10 @@
+/* board specific config */
+#define MICROPY_HW_BOARD_NAME                       "BearPi"
+#define MICROPY_HW_MCU_NAME                         "STM32F431RC"
+
+#define MICROPY_HW_UART_NUM                         4
+#define MICROPY_HW_UART_REPL                        2
+#define MICROPY_HW_SPI_NUM                          4
+
+/* project specific config */
+#define MICROPY_CONFIG_ROM_LEVEL                    (MICROPY_CONFIG_ROM_LEVEL_BASIC_FEATURES)

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/mphalboard.c

@@ -0,0 +1,109 @@
+
+#include "py/mpconfig.h"
+#include "py/mphal.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "modmachine.h"
+
+#if !(MP_GEN_HDR)
+#include "tos_k.h"
+#include "main.h"
+#endif
+
+/********************** Tick *************************/
+
+static uint32_t systick_get_us() {
+    // get systick value
+    uint32_t counter = SysTick->VAL;
+    uint32_t load = SysTick->LOAD;
+
+    // convert from decrementing to incrementing
+    counter = load - counter;
+
+    return (counter * 1000) / (load + 1);
+}
+
+mp_uint_t mp_hal_ticks_us(void) {
+    uint32_t ms = tos_tick2millisec(tos_systick_get());
+    uint32_t us = systick_get_us();
+    return ms * 1000 + us;
+}
+
+void mp_hal_delay_us(mp_uint_t usec) {
+    mp_uint_t ms = usec / 1000;
+    mp_uint_t us = usec % 1000;
+    if (ms > 0)
+        mp_hal_delay_ms(ms);
+    mp_uint_t start = mp_hal_ticks_us();
+    while (mp_hal_ticks_us() - start < us) {
+    }
+}
+
+/********************** GPIO *************************/
+
+#define ST_PIN(port_num, pin_num)   ((uint8_t)(((port_num) << 4) & 0xF0) | ((pin_num) & 0x0F))
+
+STATIC const mp_rom_map_elem_t machine_pins_locals_dict_table[] = {
+    
+    { MP_ROM_QSTR(MP_QSTR_A0),  MP_ROM_INT(ST_PIN(0, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_A1),  MP_ROM_INT(ST_PIN(0, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_A2),  MP_ROM_INT(ST_PIN(0, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_A3),  MP_ROM_INT(ST_PIN(0, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_A4),  MP_ROM_INT(ST_PIN(0, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_A5),  MP_ROM_INT(ST_PIN(0, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_A6),  MP_ROM_INT(ST_PIN(0, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_A7),  MP_ROM_INT(ST_PIN(0, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_A8),  MP_ROM_INT(ST_PIN(0, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_A9),  MP_ROM_INT(ST_PIN(0, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_INT(ST_PIN(0, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_INT(ST_PIN(0, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_INT(ST_PIN(0, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_INT(ST_PIN(0, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_INT(ST_PIN(0, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_INT(ST_PIN(0, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_B0),  MP_ROM_INT(ST_PIN(1, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_B1),  MP_ROM_INT(ST_PIN(1, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_B2),  MP_ROM_INT(ST_PIN(1, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_B3),  MP_ROM_INT(ST_PIN(1, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_B4),  MP_ROM_INT(ST_PIN(1, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_B5),  MP_ROM_INT(ST_PIN(1, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_B6),  MP_ROM_INT(ST_PIN(1, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_B7),  MP_ROM_INT(ST_PIN(1, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_B8),  MP_ROM_INT(ST_PIN(1, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_B9),  MP_ROM_INT(ST_PIN(1, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_INT(ST_PIN(1, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_B11), MP_ROM_INT(ST_PIN(1, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_INT(ST_PIN(1, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_INT(ST_PIN(1, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_INT(ST_PIN(1, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_INT(ST_PIN(1, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_C0),  MP_ROM_INT(ST_PIN(2, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_C1),  MP_ROM_INT(ST_PIN(2, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_C2),  MP_ROM_INT(ST_PIN(2, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_C3),  MP_ROM_INT(ST_PIN(2, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_C4),  MP_ROM_INT(ST_PIN(2, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_C5),  MP_ROM_INT(ST_PIN(2, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_C6),  MP_ROM_INT(ST_PIN(2, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_C7),  MP_ROM_INT(ST_PIN(2, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_C8),  MP_ROM_INT(ST_PIN(2, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_C9),  MP_ROM_INT(ST_PIN(2, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_C10), MP_ROM_INT(ST_PIN(2, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_C11), MP_ROM_INT(ST_PIN(2, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_C12), MP_ROM_INT(ST_PIN(2, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_INT(ST_PIN(2, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_INT(ST_PIN(2, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_INT(ST_PIN(2, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2),  MP_ROM_INT(ST_PIN(3, 2)) },
+
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_INT(ST_PIN(2, 13)) },    // C13
+    { MP_ROM_QSTR(MP_QSTR_KEY1), MP_ROM_INT(ST_PIN(1, 2)) },    // B2
+    { MP_ROM_QSTR(MP_QSTR_KEY2), MP_ROM_INT(ST_PIN(1, 3)) },    // B3
+
+};
+MP_DEFINE_CONST_DICT(machine_pins_locals_dict, machine_pins_locals_dict_table);
+
+

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/board/mphalboard.h

@@ -0,0 +1,11 @@
+#ifndef _MPHALBOARD_H_
+#define _MPHALBOARD_H_
+
+#include "py/obj.h"
+
+extern mp_uint_t mp_hal_ticks_us(void);
+extern void mp_hal_delay_us(mp_uint_t usec);
+
+extern const mp_obj_dict_t machine_pins_locals_dict;
+
+#endif /* _MPHALBOARD_H_ */

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/genhdr/moduledefs.h

@@ -0,0 +1,65 @@
+// Automatically generated by makemoduledefs.py.
+
+extern const struct _mp_obj_module_t mp_module___main__;
+#undef MODULE_DEF_MP_QSTR___MAIN__
+#define MODULE_DEF_MP_QSTR___MAIN__ { MP_ROM_QSTR(MP_QSTR___main__), MP_ROM_PTR(&mp_module___main__) },
+
+extern const struct _mp_obj_module_t mp_module_thread;
+#undef MODULE_DEF_MP_QSTR__THREAD
+#define MODULE_DEF_MP_QSTR__THREAD { MP_ROM_QSTR(MP_QSTR__thread), MP_ROM_PTR(&mp_module_thread) },
+
+extern const struct _mp_obj_module_t mp_module_builtins;
+#undef MODULE_DEF_MP_QSTR_BUILTINS
+#define MODULE_DEF_MP_QSTR_BUILTINS { MP_ROM_QSTR(MP_QSTR_builtins), MP_ROM_PTR(&mp_module_builtins) },
+
+extern const struct _mp_obj_module_t mp_module_gc;
+#undef MODULE_DEF_MP_QSTR_GC
+#define MODULE_DEF_MP_QSTR_GC { MP_ROM_QSTR(MP_QSTR_gc), MP_ROM_PTR(&mp_module_gc) },
+
+extern const struct _mp_obj_module_t mp_module_math;
+#undef MODULE_DEF_MP_QSTR_MATH
+#define MODULE_DEF_MP_QSTR_MATH { MP_ROM_QSTR(MP_QSTR_math), MP_ROM_PTR(&mp_module_math) },
+
+extern const struct _mp_obj_module_t mp_module_micropython;
+#undef MODULE_DEF_MP_QSTR_MICROPYTHON
+#define MODULE_DEF_MP_QSTR_MICROPYTHON { MP_ROM_QSTR(MP_QSTR_micropython), MP_ROM_PTR(&mp_module_micropython) },
+
+extern const struct _mp_obj_module_t mp_module_uarray;
+#undef MODULE_DEF_MP_QSTR_UARRAY
+#define MODULE_DEF_MP_QSTR_UARRAY { MP_ROM_QSTR(MP_QSTR_uarray), MP_ROM_PTR(&mp_module_uarray) },
+
+extern const struct _mp_obj_module_t mp_module_collections;
+#undef MODULE_DEF_MP_QSTR_UCOLLECTIONS
+#define MODULE_DEF_MP_QSTR_UCOLLECTIONS { MP_ROM_QSTR(MP_QSTR_ucollections), MP_ROM_PTR(&mp_module_collections) },
+
+extern const struct _mp_obj_module_t mp_module_machine;
+#undef MODULE_DEF_MP_QSTR_UMACHINE
+#define MODULE_DEF_MP_QSTR_UMACHINE { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) },
+
+extern const struct _mp_obj_module_t mp_module_ustruct;
+#undef MODULE_DEF_MP_QSTR_USTRUCT
+#define MODULE_DEF_MP_QSTR_USTRUCT { MP_ROM_QSTR(MP_QSTR_ustruct), MP_ROM_PTR(&mp_module_ustruct) },
+
+extern const struct _mp_obj_module_t mp_module_sys;
+#undef MODULE_DEF_MP_QSTR_USYS
+#define MODULE_DEF_MP_QSTR_USYS { MP_ROM_QSTR(MP_QSTR_usys), MP_ROM_PTR(&mp_module_sys) },
+
+extern const struct _mp_obj_module_t mp_module_utime;
+#undef MODULE_DEF_MP_QSTR_UTIME
+#define MODULE_DEF_MP_QSTR_UTIME { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) },
+
+
+#define MICROPY_REGISTERED_MODULES \
+    MODULE_DEF_MP_QSTR_BUILTINS \
+    MODULE_DEF_MP_QSTR_GC \
+    MODULE_DEF_MP_QSTR_MATH \
+    MODULE_DEF_MP_QSTR_MICROPYTHON \
+    MODULE_DEF_MP_QSTR_UARRAY \
+    MODULE_DEF_MP_QSTR_UCOLLECTIONS \
+    MODULE_DEF_MP_QSTR_UMACHINE \
+    MODULE_DEF_MP_QSTR_USTRUCT \
+    MODULE_DEF_MP_QSTR_USYS \
+    MODULE_DEF_MP_QSTR_UTIME \
+    MODULE_DEF_MP_QSTR__THREAD \
+    MODULE_DEF_MP_QSTR___MAIN__ \
+// MICROPY_REGISTERED_MODULES

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/genhdr/mpversion.h

@@ -0,0 +1,4 @@
+// This file was generated by py/makeversionhdr.py
+#define MICROPY_GIT_TAG "v2.5.0-74-g467a6d7d-dirty"
+#define MICROPY_GIT_HASH "467a6d7d-dirty"
+#define MICROPY_BUILD_DATE "2022-09-28"

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/genhdr/qstrdefs.generated.h

@@ -0,0 +1,436 @@
+// This file was automatically generated by makeqstrdata.py
+
+QDEF(MP_QSTRnull, 0, 0, "")
+QDEF(MP_QSTR_, 5381, 0, "")
+QDEF(MP_QSTR___dir__, 36730, 7, "__dir__")
+QDEF(MP_QSTR__0x0a_, 46511, 1, "\x0a")
+QDEF(MP_QSTR__space_, 46469, 1, " ")
+QDEF(MP_QSTR__star_, 46479, 1, "*")
+QDEF(MP_QSTR__slash_, 46474, 1, "/")
+QDEF(MP_QSTR__lt_module_gt_, 38077, 8, "<module>")
+QDEF(MP_QSTR__, 46586, 1, "_")
+QDEF(MP_QSTR___call__, 63911, 8, "__call__")
+QDEF(MP_QSTR___class__, 50475, 9, "__class__")
+QDEF(MP_QSTR___delitem__, 13821, 11, "__delitem__")
+QDEF(MP_QSTR___enter__, 47725, 9, "__enter__")
+QDEF(MP_QSTR___exit__, 63557, 8, "__exit__")
+QDEF(MP_QSTR___getattr__, 63552, 11, "__getattr__")
+QDEF(MP_QSTR___getitem__, 14630, 11, "__getitem__")
+QDEF(MP_QSTR___hash__, 51447, 8, "__hash__")
+QDEF(MP_QSTR___init__, 42335, 8, "__init__")
+QDEF(MP_QSTR___int__, 6934, 7, "__int__")
+QDEF(MP_QSTR___iter__, 13007, 8, "__iter__")
+QDEF(MP_QSTR___len__, 45282, 7, "__len__")
+QDEF(MP_QSTR___main__, 5006, 8, "__main__")
+QDEF(MP_QSTR___module__, 12543, 10, "__module__")
+QDEF(MP_QSTR___name__, 14562, 8, "__name__")
+QDEF(MP_QSTR___new__, 5497, 7, "__new__")
+QDEF(MP_QSTR___next__, 29442, 8, "__next__")
+QDEF(MP_QSTR___qualname__, 107, 12, "__qualname__")
+QDEF(MP_QSTR___repr__, 2832, 8, "__repr__")
+QDEF(MP_QSTR___setitem__, 15922, 11, "__setitem__")
+QDEF(MP_QSTR___str__, 52688, 7, "__str__")
+QDEF(MP_QSTR_ArithmeticError, 35885, 15, "ArithmeticError")
+QDEF(MP_QSTR_AssertionError, 23191, 14, "AssertionError")
+QDEF(MP_QSTR_AttributeError, 56865, 14, "AttributeError")
+QDEF(MP_QSTR_BaseException, 37383, 13, "BaseException")
+QDEF(MP_QSTR_EOFError, 49041, 8, "EOFError")
+QDEF(MP_QSTR_Ellipsis, 57584, 8, "Ellipsis")
+QDEF(MP_QSTR_Exception, 10738, 9, "Exception")
+QDEF(MP_QSTR_GeneratorExit, 25110, 13, "GeneratorExit")
+QDEF(MP_QSTR_ImportError, 39968, 11, "ImportError")
+QDEF(MP_QSTR_IndentationError, 8284, 16, "IndentationError")
+QDEF(MP_QSTR_IndexError, 44419, 10, "IndexError")
+QDEF(MP_QSTR_KeyError, 234, 8, "KeyError")
+QDEF(MP_QSTR_KeyboardInterrupt, 58031, 17, "KeyboardInterrupt")
+QDEF(MP_QSTR_LookupError, 27135, 11, "LookupError")
+QDEF(MP_QSTR_MemoryError, 33756, 11, "MemoryError")
+QDEF(MP_QSTR_NameError, 11706, 9, "NameError")
+QDEF(MP_QSTR_NoneType, 26647, 8, "NoneType")
+QDEF(MP_QSTR_NotImplementedError, 39110, 19, "NotImplementedError")
+QDEF(MP_QSTR_OSError, 26017, 7, "OSError")
+QDEF(MP_QSTR_OverflowError, 57729, 13, "OverflowError")
+QDEF(MP_QSTR_RuntimeError, 61793, 12, "RuntimeError")
+QDEF(MP_QSTR_StopIteration, 7402, 13, "StopIteration")
+QDEF(MP_QSTR_SyntaxError, 36756, 11, "SyntaxError")
+QDEF(MP_QSTR_SystemExit, 65312, 10, "SystemExit")
+QDEF(MP_QSTR_TypeError, 38437, 9, "TypeError")
+QDEF(MP_QSTR_ValueError, 34710, 10, "ValueError")
+QDEF(MP_QSTR_ZeroDivisionError, 10166, 17, "ZeroDivisionError")
+QDEF(MP_QSTR_abs, 12949, 3, "abs")
+QDEF(MP_QSTR_all, 13124, 3, "all")
+QDEF(MP_QSTR_any, 13075, 3, "any")
+QDEF(MP_QSTR_append, 38763, 6, "append")
+QDEF(MP_QSTR_args, 50882, 4, "args")
+QDEF(MP_QSTR_bool, 15595, 4, "bool")
+QDEF(MP_QSTR_builtins, 12791, 8, "builtins")
+QDEF(MP_QSTR_bytearray, 41846, 9, "bytearray")
+QDEF(MP_QSTR_bytecode, 32034, 8, "bytecode")
+QDEF(MP_QSTR_bytes, 45660, 5, "bytes")
+QDEF(MP_QSTR_callable, 28685, 8, "callable")
+QDEF(MP_QSTR_chr, 19676, 3, "chr")
+QDEF(MP_QSTR_classmethod, 36020, 11, "classmethod")
+QDEF(MP_QSTR_clear, 41084, 5, "clear")
+QDEF(MP_QSTR_close, 26419, 5, "close")
+QDEF(MP_QSTR_const, 65472, 5, "const")
+QDEF(MP_QSTR_copy, 56288, 4, "copy")
+QDEF(MP_QSTR_count, 19878, 5, "count")
+QDEF(MP_QSTR_dict, 64575, 4, "dict")
+QDEF(MP_QSTR_dir, 7930, 3, "dir")
+QDEF(MP_QSTR_divmod, 1208, 6, "divmod")
+QDEF(MP_QSTR_end, 8970, 3, "end")
+QDEF(MP_QSTR_endswith, 41755, 8, "endswith")
+QDEF(MP_QSTR_eval, 42651, 4, "eval")
+QDEF(MP_QSTR_exec, 49182, 4, "exec")
+QDEF(MP_QSTR_extend, 59491, 6, "extend")
+QDEF(MP_QSTR_find, 13312, 4, "find")
+QDEF(MP_QSTR_format, 13094, 6, "format")
+QDEF(MP_QSTR_from_bytes, 29749, 10, "from_bytes")
+QDEF(MP_QSTR_get, 15155, 3, "get")
+QDEF(MP_QSTR_getattr, 6080, 7, "getattr")
+QDEF(MP_QSTR_globals, 18845, 7, "globals")
+QDEF(MP_QSTR_hasattr, 45196, 7, "hasattr")
+QDEF(MP_QSTR_hash, 28855, 4, "hash")
+QDEF(MP_QSTR_id, 28456, 2, "id")
+QDEF(MP_QSTR_index, 10363, 5, "index")
+QDEF(MP_QSTR_insert, 21522, 6, "insert")
+QDEF(MP_QSTR_int, 21270, 3, "int")
+QDEF(MP_QSTR_isalpha, 14315, 7, "isalpha")
+QDEF(MP_QSTR_isdigit, 39592, 7, "isdigit")
+QDEF(MP_QSTR_isinstance, 48822, 10, "isinstance")
+QDEF(MP_QSTR_islower, 33020, 7, "islower")
+QDEF(MP_QSTR_isspace, 63579, 7, "isspace")
+QDEF(MP_QSTR_issubclass, 32693, 10, "issubclass")
+QDEF(MP_QSTR_isupper, 42973, 7, "isupper")
+QDEF(MP_QSTR_items, 21475, 5, "items")
+QDEF(MP_QSTR_iter, 8591, 4, "iter")
+QDEF(MP_QSTR_join, 23719, 4, "join")
+QDEF(MP_QSTR_key, 27954, 3, "key")
+QDEF(MP_QSTR_keys, 4865, 4, "keys")
+QDEF(MP_QSTR_len, 16482, 3, "len")
+QDEF(MP_QSTR_list, 7463, 4, "list")
+QDEF(MP_QSTR_little, 27273, 6, "little")
+QDEF(MP_QSTR_locals, 41275, 6, "locals")
+QDEF(MP_QSTR_lower, 52166, 5, "lower")
+QDEF(MP_QSTR_lstrip, 47589, 6, "lstrip")
+QDEF(MP_QSTR_main, 47054, 4, "main")
+QDEF(MP_QSTR_map, 17337, 3, "map")
+QDEF(MP_QSTR_micropython, 31755, 11, "micropython")
+QDEF(MP_QSTR_next, 34882, 4, "next")
+QDEF(MP_QSTR_object, 36240, 6, "object")
+QDEF(MP_QSTR_open, 15057, 4, "open")
+QDEF(MP_QSTR_ord, 24092, 3, "ord")
+QDEF(MP_QSTR_pop, 29482, 3, "pop")
+QDEF(MP_QSTR_popitem, 11455, 7, "popitem")
+QDEF(MP_QSTR_pow, 29485, 3, "pow")
+QDEF(MP_QSTR_print, 50772, 5, "print")
+QDEF(MP_QSTR_range, 24090, 5, "range")
+QDEF(MP_QSTR_read, 63927, 4, "read")
+QDEF(MP_QSTR_readinto, 48971, 8, "readinto")
+QDEF(MP_QSTR_readline, 6649, 8, "readline")
+QDEF(MP_QSTR_remove, 35427, 6, "remove")
+QDEF(MP_QSTR_replace, 9545, 7, "replace")
+QDEF(MP_QSTR_repr, 63440, 4, "repr")
+QDEF(MP_QSTR_reverse, 10789, 7, "reverse")
+QDEF(MP_QSTR_rfind, 40146, 5, "rfind")
+QDEF(MP_QSTR_rindex, 11241, 6, "rindex")
+QDEF(MP_QSTR_round, 9703, 5, "round")
+QDEF(MP_QSTR_rsplit, 165, 6, "rsplit")
+QDEF(MP_QSTR_rstrip, 38203, 6, "rstrip")
+QDEF(MP_QSTR_self, 30585, 4, "self")
+QDEF(MP_QSTR_send, 30393, 4, "send")
+QDEF(MP_QSTR_sep, 36643, 3, "sep")
+QDEF(MP_QSTR_set, 36647, 3, "set")
+QDEF(MP_QSTR_setattr, 43220, 7, "setattr")
+QDEF(MP_QSTR_setdefault, 41836, 10, "setdefault")
+QDEF(MP_QSTR_sort, 40383, 4, "sort")
+QDEF(MP_QSTR_sorted, 5470, 6, "sorted")
+QDEF(MP_QSTR_split, 13239, 5, "split")
+QDEF(MP_QSTR_start, 61317, 5, "start")
+QDEF(MP_QSTR_startswith, 59508, 10, "startswith")
+QDEF(MP_QSTR_staticmethod, 44898, 12, "staticmethod")
+QDEF(MP_QSTR_step, 13911, 4, "step")
+QDEF(MP_QSTR_stop, 13981, 4, "stop")
+QDEF(MP_QSTR_str, 36176, 3, "str")
+QDEF(MP_QSTR_strip, 7721, 5, "strip")
+QDEF(MP_QSTR_sum, 36142, 3, "sum")
+QDEF(MP_QSTR_super, 45764, 5, "super")
+QDEF(MP_QSTR_throw, 17587, 5, "throw")
+QDEF(MP_QSTR_to_bytes, 16088, 8, "to_bytes")
+QDEF(MP_QSTR_tuple, 16893, 5, "tuple")
+QDEF(MP_QSTR_type, 32669, 4, "type")
+QDEF(MP_QSTR_update, 30388, 6, "update")
+QDEF(MP_QSTR_upper, 37927, 5, "upper")
+QDEF(MP_QSTR_utf_hyphen_8, 33463, 5, "utf-8")
+QDEF(MP_QSTR_value, 13390, 5, "value")
+QDEF(MP_QSTR_values, 48765, 6, "values")
+QDEF(MP_QSTR_write, 43160, 5, "write")
+QDEF(MP_QSTR_zip, 44262, 3, "zip")
+QDEF(MP_QSTR___add__, 33476, 7, "__add__")
+QDEF(MP_QSTR___aenter__, 33868, 10, "__aenter__")
+QDEF(MP_QSTR___aexit__, 53188, 9, "__aexit__")
+QDEF(MP_QSTR___aiter__, 11086, 9, "__aiter__")
+QDEF(MP_QSTR___anext__, 46211, 9, "__anext__")
+QDEF(MP_QSTR___bases__, 12291, 9, "__bases__")
+QDEF(MP_QSTR___bool__, 25899, 8, "__bool__")
+QDEF(MP_QSTR___build_class__, 34882, 15, "__build_class__")
+QDEF(MP_QSTR___contains__, 24518, 12, "__contains__")
+QDEF(MP_QSTR___del__, 14184, 7, "__del__")
+QDEF(MP_QSTR___dict__, 21631, 8, "__dict__")
+QDEF(MP_QSTR___eq__, 15985, 6, "__eq__")
+QDEF(MP_QSTR___file__, 21507, 8, "__file__")
+QDEF(MP_QSTR___ge__, 18087, 6, "__ge__")
+QDEF(MP_QSTR___gt__, 33462, 6, "__gt__")
+QDEF(MP_QSTR___iadd__, 19053, 8, "__iadd__")
+QDEF(MP_QSTR___iand__, 8615, 8, "__iand__")
+QDEF(MP_QSTR___ifloordiv__, 3919, 13, "__ifloordiv__")
+QDEF(MP_QSTR___ilshift__, 41600, 11, "__ilshift__")
+QDEF(MP_QSTR___imatmul__, 28352, 11, "__imatmul__")
+QDEF(MP_QSTR___imod__, 34378, 8, "__imod__")
+QDEF(MP_QSTR___import__, 15928, 10, "__import__")
+QDEF(MP_QSTR___imul__, 52760, 8, "__imul__")
+QDEF(MP_QSTR___ior__, 36849, 7, "__ior__")
+QDEF(MP_QSTR___ipow__, 54660, 8, "__ipow__")
+QDEF(MP_QSTR___irshift__, 63710, 11, "__irshift__")
+QDEF(MP_QSTR___isub__, 30728, 8, "__isub__")
+QDEF(MP_QSTR___itruediv__, 545, 12, "__itruediv__")
+QDEF(MP_QSTR___ixor__, 47369, 8, "__ixor__")
+QDEF(MP_QSTR___le__, 5068, 6, "__le__")
+QDEF(MP_QSTR___lt__, 26717, 6, "__lt__")
+QDEF(MP_QSTR___ne__, 2830, 6, "__ne__")
+QDEF(MP_QSTR___path__, 9160, 8, "__path__")
+QDEF(MP_QSTR___repl_print__, 47872, 14, "__repl_print__")
+QDEF(MP_QSTR___reversed__, 65377, 12, "__reversed__")
+QDEF(MP_QSTR___sub__, 2337, 7, "__sub__")
+QDEF(MP_QSTR___traceback__, 53071, 13, "__traceback__")
+QDEF(MP_QSTR__percent__hash_o, 6764, 3, "%#o")
+QDEF(MP_QSTR__percent__hash_x, 6779, 3, "%#x")
+QDEF(MP_QSTR__brace_open__colon__hash_b_brace_close_, 14168, 5, "{:#b}")
+QDEF(MP_QSTR_maximum_space_recursion_space_depth_space_exceeded, 7795, 32, "maximum recursion depth exceeded")
+QDEF(MP_QSTR__lt_lambda_gt_, 35968, 8, "<lambda>")
+QDEF(MP_QSTR__lt_listcomp_gt_, 5588, 10, "<listcomp>")
+QDEF(MP_QSTR__lt_dictcomp_gt_, 36300, 10, "<dictcomp>")
+QDEF(MP_QSTR__lt_setcomp_gt_, 20820, 9, "<setcomp>")
+QDEF(MP_QSTR__lt_genexpr_gt_, 27188, 9, "<genexpr>")
+QDEF(MP_QSTR__lt_string_gt_, 21330, 8, "<string>")
+QDEF(MP_QSTR__lt_stdin_gt_, 25571, 7, "<stdin>")
+QDEF(MP_QSTR_A0, 29268, 2, "A0")
+QDEF(MP_QSTR_A1, 29269, 2, "A1")
+QDEF(MP_QSTR_A10, 48325, 3, "A10")
+QDEF(MP_QSTR_A11, 48324, 3, "A11")
+QDEF(MP_QSTR_A12, 48327, 3, "A12")
+QDEF(MP_QSTR_A13, 48326, 3, "A13")
+QDEF(MP_QSTR_A14, 48321, 3, "A14")
+QDEF(MP_QSTR_A15, 48320, 3, "A15")
+QDEF(MP_QSTR_A2, 29270, 2, "A2")
+QDEF(MP_QSTR_A3, 29271, 2, "A3")
+QDEF(MP_QSTR_A4, 29264, 2, "A4")
+QDEF(MP_QSTR_A5, 29265, 2, "A5")
+QDEF(MP_QSTR_A6, 29266, 2, "A6")
+QDEF(MP_QSTR_A7, 29267, 2, "A7")
+QDEF(MP_QSTR_A8, 29276, 2, "A8")
+QDEF(MP_QSTR_A9, 29277, 2, "A9")
+QDEF(MP_QSTR_B0, 29431, 2, "B0")
+QDEF(MP_QSTR_B1, 29430, 2, "B1")
+QDEF(MP_QSTR_B10, 53638, 3, "B10")
+QDEF(MP_QSTR_B11, 53639, 3, "B11")
+QDEF(MP_QSTR_B12, 53636, 3, "B12")
+QDEF(MP_QSTR_B13, 53637, 3, "B13")
+QDEF(MP_QSTR_B14, 53634, 3, "B14")
+QDEF(MP_QSTR_B15, 53635, 3, "B15")
+QDEF(MP_QSTR_B2, 29429, 2, "B2")
+QDEF(MP_QSTR_B3, 29428, 2, "B3")
+QDEF(MP_QSTR_B4, 29427, 2, "B4")
+QDEF(MP_QSTR_B5, 29426, 2, "B5")
+QDEF(MP_QSTR_B6, 29425, 2, "B6")
+QDEF(MP_QSTR_B7, 29424, 2, "B7")
+QDEF(MP_QSTR_B8, 29439, 2, "B8")
+QDEF(MP_QSTR_B9, 29438, 2, "B9")
+QDEF(MP_QSTR_C0, 29334, 2, "C0")
+QDEF(MP_QSTR_C1, 29335, 2, "C1")
+QDEF(MP_QSTR_C10, 50503, 3, "C10")
+QDEF(MP_QSTR_C11, 50502, 3, "C11")
+QDEF(MP_QSTR_C12, 50501, 3, "C12")
+QDEF(MP_QSTR_C13, 50500, 3, "C13")
+QDEF(MP_QSTR_C14, 50499, 3, "C14")
+QDEF(MP_QSTR_C15, 50498, 3, "C15")
+QDEF(MP_QSTR_C2, 29332, 2, "C2")
+QDEF(MP_QSTR_C3, 29333, 2, "C3")
+QDEF(MP_QSTR_C4, 29330, 2, "C4")
+QDEF(MP_QSTR_C5, 29331, 2, "C5")
+QDEF(MP_QSTR_C6, 29328, 2, "C6")
+QDEF(MP_QSTR_C7, 29329, 2, "C7")
+QDEF(MP_QSTR_C8, 29342, 2, "C8")
+QDEF(MP_QSTR_C9, 29343, 2, "C9")
+QDEF(MP_QSTR_D2, 29235, 2, "D2")
+QDEF(MP_QSTR_FileIO, 5573, 6, "FileIO")
+QDEF(MP_QSTR_IN, 29474, 2, "IN")
+QDEF(MP_QSTR_IN_PULLDOWN, 47946, 11, "IN_PULLDOWN")
+QDEF(MP_QSTR_IN_PULLUP, 55837, 9, "IN_PULLUP")
+QDEF(MP_QSTR_IRQ_FALLING, 49207, 11, "IRQ_FALLING")
+QDEF(MP_QSTR_IRQ_RISING, 60792, 10, "IRQ_RISING")
+QDEF(MP_QSTR_KEY1, 4963, 4, "KEY1")
+QDEF(MP_QSTR_KEY2, 4960, 4, "KEY2")
+QDEF(MP_QSTR_LED, 56456, 3, "LED")
+QDEF(MP_QSTR_LockType, 8246, 8, "LockType")
+QDEF(MP_QSTR_ONE_SHOT, 65374, 8, "ONE_SHOT")
+QDEF(MP_QSTR_OPEN_DRAIN, 18526, 10, "OPEN_DRAIN")
+QDEF(MP_QSTR_OUT, 58123, 3, "OUT")
+QDEF(MP_QSTR_PERIODIC, 13578, 8, "PERIODIC")
+QDEF(MP_QSTR_Pin, 5138, 3, "Pin")
+QDEF(MP_QSTR_PinBase, 17223, 7, "PinBase")
+QDEF(MP_QSTR_Signal, 58523, 6, "Signal")
+QDEF(MP_QSTR_StopAsyncIteration, 61676, 18, "StopAsyncIteration")
+QDEF(MP_QSTR_Timer, 8098, 5, "Timer")
+QDEF(MP_QSTR_UART, 6583, 4, "UART")
+QDEF(MP_QSTR__machine, 19391, 8, "_machine")
+QDEF(MP_QSTR__thread, 724, 7, "_thread")
+QDEF(MP_QSTR_acos, 40987, 4, "acos")
+QDEF(MP_QSTR_acquire, 54045, 7, "acquire")
+QDEF(MP_QSTR_add, 12868, 3, "add")
+QDEF(MP_QSTR_alloc_emergency_exception_buf, 10872, 29, "alloc_emergency_exception_buf")
+QDEF(MP_QSTR_allocate_lock, 60908, 13, "allocate_lock")
+QDEF(MP_QSTR_argv, 50887, 4, "argv")
+QDEF(MP_QSTR_array, 29308, 5, "array")
+QDEF(MP_QSTR_asin, 58704, 4, "asin")
+QDEF(MP_QSTR_atan, 48671, 4, "atan")
+QDEF(MP_QSTR_atan2, 33229, 5, "atan2")
+QDEF(MP_QSTR_bin, 18656, 3, "bin")
+QDEF(MP_QSTR_bound_method, 41623, 12, "bound_method")
+QDEF(MP_QSTR_buffer, 41189, 6, "buffer")
+QDEF(MP_QSTR_byteorder, 39265, 9, "byteorder")
+QDEF(MP_QSTR_calcsize, 14413, 8, "calcsize")
+QDEF(MP_QSTR_callback, 61516, 8, "callback")
+QDEF(MP_QSTR_ceil, 45062, 4, "ceil")
+QDEF(MP_QSTR_closure, 51828, 7, "closure")
+QDEF(MP_QSTR_collect, 26011, 7, "collect")
+QDEF(MP_QSTR_complex, 40389, 7, "complex")
+QDEF(MP_QSTR_copysign, 5171, 8, "copysign")
+QDEF(MP_QSTR_cos, 19578, 3, "cos")
+QDEF(MP_QSTR_decode, 22953, 6, "decode")
+QDEF(MP_QSTR_default, 32206, 7, "default")
+QDEF(MP_QSTR_degrees, 16642, 7, "degrees")
+QDEF(MP_QSTR_deinit, 36254, 6, "deinit")
+QDEF(MP_QSTR_delattr, 51419, 7, "delattr")
+QDEF(MP_QSTR_deleter, 56174, 7, "deleter")
+QDEF(MP_QSTR_dict_view, 43309, 9, "dict_view")
+QDEF(MP_QSTR_difference, 9330, 10, "difference")
+QDEF(MP_QSTR_difference_update, 64156, 17, "difference_update")
+QDEF(MP_QSTR_disable, 30353, 7, "disable")
+QDEF(MP_QSTR_discard, 28943, 7, "discard")
+QDEF(MP_QSTR_doc, 7981, 3, "doc")
+QDEF(MP_QSTR_e, 46528, 1, "e")
+QDEF(MP_QSTR_enable, 56836, 6, "enable")
+QDEF(MP_QSTR_encode, 51779, 6, "encode")
+QDEF(MP_QSTR_enumerate, 47729, 9, "enumerate")
+QDEF(MP_QSTR_errno, 4545, 5, "errno")
+QDEF(MP_QSTR_exit, 48773, 4, "exit")
+QDEF(MP_QSTR_exp, 9416, 3, "exp")
+QDEF(MP_QSTR_fabs, 4755, 4, "fabs")
+QDEF(MP_QSTR_filter, 48677, 6, "filter")
+QDEF(MP_QSTR_float, 17461, 5, "float")
+QDEF(MP_QSTR_floor, 18045, 5, "floor")
+QDEF(MP_QSTR_fmod, 17637, 4, "fmod")
+QDEF(MP_QSTR_freq, 15077, 4, "freq")
+QDEF(MP_QSTR_frexp, 38940, 5, "frexp")
+QDEF(MP_QSTR_fromkeys, 48439, 8, "fromkeys")
+QDEF(MP_QSTR_function, 551, 8, "function")
+QDEF(MP_QSTR_gc, 28257, 2, "gc")
+QDEF(MP_QSTR_generator, 50070, 9, "generator")
+QDEF(MP_QSTR_get_ident, 45566, 9, "get_ident")
+QDEF(MP_QSTR_getter, 45712, 6, "getter")
+QDEF(MP_QSTR_handler, 24029, 7, "handler")
+QDEF(MP_QSTR_heap_lock, 36013, 9, "heap_lock")
+QDEF(MP_QSTR_heap_unlock, 11606, 11, "heap_unlock")
+QDEF(MP_QSTR_help, 23700, 4, "help")
+QDEF(MP_QSTR_hex, 20592, 3, "hex")
+QDEF(MP_QSTR_imag, 46919, 4, "imag")
+QDEF(MP_QSTR_implementation, 11543, 14, "implementation")
+QDEF(MP_QSTR_init, 46111, 4, "init")
+QDEF(MP_QSTR_intersection, 10792, 12, "intersection")
+QDEF(MP_QSTR_intersection_update, 56582, 19, "intersection_update")
+QDEF(MP_QSTR_invert, 183, 6, "invert")
+QDEF(MP_QSTR_irq, 22159, 3, "irq")
+QDEF(MP_QSTR_isdisjoint, 26871, 10, "isdisjoint")
+QDEF(MP_QSTR_isenabled, 58778, 9, "isenabled")
+QDEF(MP_QSTR_isfinite, 43942, 8, "isfinite")
+QDEF(MP_QSTR_isinf, 4414, 5, "isinf")
+QDEF(MP_QSTR_isnan, 926, 5, "isnan")
+QDEF(MP_QSTR_issubset, 49593, 8, "issubset")
+QDEF(MP_QSTR_issuperset, 60668, 10, "issuperset")
+QDEF(MP_QSTR_iterable, 37413, 8, "iterable")
+QDEF(MP_QSTR_iterator, 48711, 8, "iterator")
+QDEF(MP_QSTR_kbd_intr, 5110, 8, "kbd_intr")
+QDEF(MP_QSTR_ldexp, 28480, 5, "ldexp")
+QDEF(MP_QSTR_lock, 9134, 4, "lock")
+QDEF(MP_QSTR_locked, 47631, 6, "locked")
+QDEF(MP_QSTR_log, 16161, 3, "log")
+QDEF(MP_QSTR_math, 47925, 4, "math")
+QDEF(MP_QSTR_max, 17329, 3, "max")
+QDEF(MP_QSTR_mem, 17440, 3, "mem")
+QDEF(MP_QSTR_mem16, 51719, 5, "mem16")
+QDEF(MP_QSTR_mem32, 51777, 5, "mem32")
+QDEF(MP_QSTR_mem8, 51224, 4, "mem8")
+QDEF(MP_QSTR_mem_alloc, 11090, 9, "mem_alloc")
+QDEF(MP_QSTR_mem_free, 25291, 8, "mem_free")
+QDEF(MP_QSTR_min, 17071, 3, "min")
+QDEF(MP_QSTR_mode, 49190, 4, "mode")
+QDEF(MP_QSTR_modf, 49189, 4, "modf")
+QDEF(MP_QSTR_module, 39359, 6, "module")
+QDEF(MP_QSTR_modules, 53740, 7, "modules")
+QDEF(MP_QSTR_name, 30114, 4, "name")
+QDEF(MP_QSTR_namedtuple, 5662, 10, "namedtuple")
+QDEF(MP_QSTR_oct, 23805, 3, "oct")
+QDEF(MP_QSTR_off, 23690, 3, "off")
+QDEF(MP_QSTR_on, 28516, 2, "on")
+QDEF(MP_QSTR_opt_level, 26503, 9, "opt_level")
+QDEF(MP_QSTR_pack, 53692, 4, "pack")
+QDEF(MP_QSTR_pack_into, 43295, 9, "pack_into")
+QDEF(MP_QSTR_path, 52872, 4, "path")
+QDEF(MP_QSTR_pend_throw, 29939, 10, "pend_throw")
+QDEF(MP_QSTR_period, 41120, 6, "period")
+QDEF(MP_QSTR_pi, 28700, 2, "pi")
+QDEF(MP_QSTR_platform, 6458, 8, "platform")
+QDEF(MP_QSTR_print_exception, 8732, 15, "print_exception")
+QDEF(MP_QSTR_property, 10690, 8, "property")
+QDEF(MP_QSTR_radians, 16263, 7, "radians")
+QDEF(MP_QSTR_readlines, 22890, 9, "readlines")
+QDEF(MP_QSTR_real, 63935, 4, "real")
+QDEF(MP_QSTR_release, 36844, 7, "release")
+QDEF(MP_QSTR_reversed, 28321, 8, "reversed")
+QDEF(MP_QSTR_rxbuf, 26494, 5, "rxbuf")
+QDEF(MP_QSTR_schedule, 44256, 8, "schedule")
+QDEF(MP_QSTR_setter, 22788, 6, "setter")
+QDEF(MP_QSTR_sin, 37041, 3, "sin")
+QDEF(MP_QSTR_sleep, 10218, 5, "sleep")
+QDEF(MP_QSTR_sleep_ms, 25355, 8, "sleep_ms")
+QDEF(MP_QSTR_slice, 62645, 5, "slice")
+QDEF(MP_QSTR_soft_reset, 26081, 10, "soft_reset")
+QDEF(MP_QSTR_sqrt, 17441, 4, "sqrt")
+QDEF(MP_QSTR_stack_size, 15153, 10, "stack_size")
+QDEF(MP_QSTR_start_new_thread, 9687, 16, "start_new_thread")
+QDEF(MP_QSTR_symmetric_difference, 26574, 20, "symmetric_difference")
+QDEF(MP_QSTR_symmetric_difference_update, 63584, 27, "symmetric_difference_update")
+QDEF(MP_QSTR_sys, 36540, 3, "sys")
+QDEF(MP_QSTR_tan, 25086, 3, "tan")
+QDEF(MP_QSTR_threshold, 12274, 9, "threshold")
+QDEF(MP_QSTR_tick_hz, 56189, 7, "tick_hz")
+QDEF(MP_QSTR_ticks_add, 44701, 9, "ticks_add")
+QDEF(MP_QSTR_ticks_cpu, 42266, 9, "ticks_cpu")
+QDEF(MP_QSTR_ticks_diff, 57521, 10, "ticks_diff")
+QDEF(MP_QSTR_ticks_ms, 12866, 8, "ticks_ms")
+QDEF(MP_QSTR_timeout, 21566, 7, "timeout")
+QDEF(MP_QSTR_timeout_char, 19065, 12, "timeout_char")
+QDEF(MP_QSTR_trigger, 35997, 7, "trigger")
+QDEF(MP_QSTR_trunc, 39259, 5, "trunc")
+QDEF(MP_QSTR_uarray, 34441, 6, "uarray")
+QDEF(MP_QSTR_ucollections, 39445, 12, "ucollections")
+QDEF(MP_QSTR_umachine, 32661, 8, "umachine")
+QDEF(MP_QSTR_union, 31990, 5, "union")
+QDEF(MP_QSTR_unpack, 15367, 6, "unpack")
+QDEF(MP_QSTR_unpack_from, 27918, 11, "unpack_from")
+QDEF(MP_QSTR_ustruct, 2119, 7, "ustruct")
+QDEF(MP_QSTR_usys, 62409, 4, "usys")
+QDEF(MP_QSTR_utime, 40421, 5, "utime")
+QDEF(MP_QSTR_version, 54207, 7, "version")
+QDEF(MP_QSTR_version_info, 2670, 12, "version_info")

board/BearPi_STM32L431RC/KEIL/micropython_basic_demo/startup_stm32l431xx.s

@@ -0,0 +1,404 @@
+;********************** COPYRIGHT(c) 2017  STMicroelectronics ******************
+;* File Name          : startup_stm32l431xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x100
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x100
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler                   ; ADC1
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP_IRQHandler                   ; COMP Interrupt
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
+                DCD     0                                 ; Reserved
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
+                DCD     QUADSPI_IRQHandler                ; Quad SPI global interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     0                                 ; Reserved
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
+                DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     CRS_IRQHandler                    ; CRS interrupt
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     TAMP_STAMP_IRQHandler             [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_IRQHandler                   [WEAK]
+        EXPORT     CAN1_TX_IRQHandler                [WEAK]
+        EXPORT     CAN1_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN1_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN1_SCE_IRQHandler               [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_IRQHandler                   [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     COMP_IRQHandler                   [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SWPMI1_IRQHandler                 [WEAK]
+        EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+CAN1_TX_IRQHandler
+CAN1_RX0_IRQHandler
+CAN1_RX1_IRQHandler
+CAN1_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+SDMMC1_IRQHandler
+SPI3_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+LPUART1_IRQHandler
+QUADSPI_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+SAI1_IRQHandler
+SWPMI1_IRQHandler
+TSC_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+CRS_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_pin.c

@@ -0,0 +1,273 @@
+#include "tos_k.h"
+#include "mp_tos_hal_pin.h"
+#include "gpio.h"
+
+#define ST_EXTI_VECTOR_SIZE  16
+
+#define ST_PORT_NUM(port)   ((uint8_t)((port) >> 4) & 0x0F)
+#define ST_PIN_NUM(port)    ((uint8_t)((port) & 0x0F))    
+
+__STATIC__ hal_pin_cb_t hal_pin_irq_handler[ST_EXTI_VECTOR_SIZE];
+__STATIC__ void *hal_pin_irq_handler_arg[ST_EXTI_VECTOR_SIZE];
+__STATIC__ GPIO_TypeDef *hal_pin_irq_gpio[ST_EXTI_VECTOR_SIZE];
+
+__STATIC__ const uint8_t nvic_irq_channel[ST_EXTI_VECTOR_SIZE] = {
+    EXTI0_IRQn,     EXTI1_IRQn,     EXTI2_IRQn,     EXTI3_IRQn,
+    EXTI4_IRQn,     EXTI9_5_IRQn,   EXTI9_5_IRQn,   EXTI9_5_IRQn,
+    EXTI9_5_IRQn,   EXTI9_5_IRQn,   EXTI15_10_IRQn, EXTI15_10_IRQn,
+    EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn,
+};
+
+__STATIC__ int mask2no(uint32_t mask) {
+    for (int i = 0; i < 32; i++) {
+        if ((1U << i) == mask) {
+            return i;
+        }
+    }
+    return -1;
+}
+
+__API__ int tos_hal_pin_init(hal_pin_t *pin, hal_pin_port_t port, hal_pin_mode_t mode)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    GPIO_InitTypeDef gpio_init;
+
+    if (!pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)(GPIOA_BASE + ST_PORT_NUM(port) * 0x0400UL);
+    gpio_pin = 1UL << ST_PIN_NUM(port);
+
+    gpio_init.Pin = gpio_pin;
+    gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+    switch (mode) {
+    case HAL_PIN_MODE_OUTPUT:
+        gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_OUTPUT_OD:
+        gpio_init.Mode = GPIO_MODE_OUTPUT_OD;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_INPUT:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_NOPULL;
+        break;
+    case HAL_PIN_MODE_INPUT_PULLUP:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_PULLUP;
+        break;
+    case HAL_PIN_MODE_INPUT_PULLDOWN:
+        gpio_init.Mode = GPIO_MODE_INPUT;
+        gpio_init.Pull = GPIO_PULLDOWN;
+        break;
+    default:
+        return -1;
+    }
+    HAL_GPIO_Init((GPIO_TypeDef *)gpiox, &gpio_init);
+
+    pin->port = port;
+    pin->private_gpio = gpiox;
+    pin->private_pin  = gpio_pin;
+    pin->mode = mode;
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_irq(hal_pin_t *pin, hal_pin_irq_t irq)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    GPIO_InitTypeDef gpio_init;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+    if (gpio_pin_num >= ST_EXTI_VECTOR_SIZE) {
+        return -1;
+    }
+    
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] != NULL && hal_pin_irq_gpio[gpio_pin_num] != gpiox) {
+        TOS_CPU_INT_ENABLE();
+        return -1;
+    }
+
+    if (irq == HAL_PIN_IRQ_NONE) {
+        hal_pin_irq_gpio[gpio_pin_num] = NULL;
+        hal_pin_irq_handler[gpio_pin_num] = NULL;
+        hal_pin_irq_handler_arg[gpio_pin_num] = NULL;
+        TOS_CPU_INT_ENABLE();
+        HAL_NVIC_DisableIRQ(nvic_irq_channel[gpio_pin_num]);
+    } else {
+        hal_pin_irq_gpio[gpio_pin_num] = gpiox;
+        TOS_CPU_INT_ENABLE();
+        gpio_init.Pin = gpio_pin;
+        gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+        gpio_init.Mode = GPIO_MODE_IT_RISING_FALLING;
+        switch (irq) {
+        case HAL_PIN_IRQ_RISING:
+            gpio_init.Mode = GPIO_MODE_IT_RISING;
+            break;
+        case HAL_PIN_IRQ_FALLING:
+            gpio_init.Mode = GPIO_MODE_IT_FALLING;
+            break;
+        case HAL_PIN_IRQ_RISING_FALLING:
+            gpio_init.Mode = GPIO_MODE_IT_RISING_FALLING;
+            break;
+        }
+        switch (pin->mode) {
+            case HAL_PIN_MODE_INPUT_PULLUP:
+                gpio_init.Pull = GPIO_PULLUP;
+                break;
+            case HAL_PIN_MODE_INPUT_PULLDOWN:
+                gpio_init.Pull = GPIO_PULLDOWN;
+                break;
+            default:
+                gpio_init.Pull = GPIO_NOPULL;
+                break;
+        }
+        HAL_GPIO_Init(gpiox, &gpio_init);
+        HAL_NVIC_SetPriority(nvic_irq_channel[gpio_pin_num], 2, 0);
+        HAL_NVIC_EnableIRQ(nvic_irq_channel[gpio_pin_num]);
+
+        pin->irq = irq;
+    }
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_irq_callback(hal_pin_t *pin, hal_pin_cb_t callback, void *cb_arg)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+    if (gpio_pin_num >= ST_EXTI_VECTOR_SIZE) {
+        return -1;
+    }
+
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] != NULL && hal_pin_irq_gpio[gpio_pin_num] != gpiox) {
+        TOS_CPU_INT_ENABLE();
+        return -1;
+    }
+    hal_pin_irq_handler[gpio_pin_num] = gpiox;
+    hal_pin_irq_handler[gpio_pin_num] = callback;
+    hal_pin_irq_handler_arg[gpio_pin_num] = cb_arg;
+    TOS_CPU_INT_ENABLE();
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_write(hal_pin_t *pin, int state)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+
+    HAL_GPIO_WritePin(gpiox, gpio_pin, (state == 0) ? GPIO_PIN_RESET : GPIO_PIN_SET);
+
+    return 0;
+}
+
+__API__ int tos_hal_pin_read(hal_pin_t *pin)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+
+    return (HAL_GPIO_ReadPin(gpiox, gpio_pin) == GPIO_PIN_RESET) ? 0 : 1;
+}
+
+__API__ int tos_hal_pin_deinit(hal_pin_t *pin)
+{
+    GPIO_TypeDef *gpiox;
+    uint32_t gpio_pin;
+    uint32_t gpio_pin_num;
+    TOS_CPU_CPSR_ALLOC();
+
+    if (!pin) {
+        return -1;
+    }
+
+    if (!pin->private_gpio || !pin->private_pin) {
+        return -1;
+    }
+
+    gpiox = (GPIO_TypeDef *)pin->private_gpio;
+    gpio_pin = (uint32_t)pin->private_pin;
+    gpio_pin_num = mask2no(gpio_pin);
+
+    TOS_CPU_INT_DISABLE();
+    if (hal_pin_irq_gpio[gpio_pin_num] == gpiox) {
+        hal_pin_irq_gpio[gpio_pin_num] = NULL;
+        hal_pin_irq_handler[gpio_pin_num] = NULL;
+        hal_pin_irq_handler_arg[gpio_pin_num] = NULL;
+    }
+    TOS_CPU_INT_ENABLE();
+    HAL_GPIO_DeInit(gpiox, gpio_pin);
+
+    return 0;
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+    uint32_t gpio_pin_num = mask2no(GPIO_Pin);
+    hal_pin_cb_t callback;
+    uint32_t cb_arg;
+    if (gpio_pin_num < ST_EXTI_VECTOR_SIZE) {
+
+        callback = hal_pin_irq_handler[gpio_pin_num];
+        cb_arg = hal_pin_irq_handler_arg[gpio_pin_num];
+        if (callback) {
+            callback(cb_arg);
+        }
+    }
+}
+
+

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_pin.h

@@ -0,0 +1,45 @@
+#ifndef _TOS_HAL_PIN_H_
+#define _TOS_HAL_PIN_H_
+
+typedef unsigned char hal_pin_port_t;
+
+typedef enum hal_pin_mode_en {
+    HAL_PIN_MODE_OUTPUT = 0,
+    HAL_PIN_MODE_OUTPUT_OD,
+    HAL_PIN_MODE_INPUT,
+    HAL_PIN_MODE_INPUT_PULLUP,
+    HAL_PIN_MODE_INPUT_PULLDOWN,
+} hal_pin_mode_t;
+
+typedef enum hal_pin_irq_en {
+    HAL_PIN_IRQ_NONE            = 0x00,
+    HAL_PIN_IRQ_RISING          = 0x01,
+    HAL_PIN_IRQ_FALLING         = 0x02,
+    HAL_PIN_IRQ_RISING_FALLING  = 0x03,
+} hal_pin_irq_t;
+
+typedef struct hal_pin_st {
+    hal_pin_port_t port;
+    void *private_gpio;
+    void *private_pin;
+    hal_pin_mode_t mode;
+    hal_pin_irq_t irq;
+} hal_pin_t;
+
+
+typedef void (*hal_pin_cb_t)(void *arg);
+
+__API__ int tos_hal_pin_init(hal_pin_t *pin, hal_pin_port_t port, hal_pin_mode_t mode);
+
+__API__ int tos_hal_pin_write(hal_pin_t *pin, int state);
+
+__API__ int tos_hal_pin_read(hal_pin_t *pin);
+
+__API__ int tos_hal_pin_mode(hal_pin_t *pin, hal_pin_mode_t mode);
+
+__API__ int tos_hal_pin_irq(hal_pin_t *pin, hal_pin_irq_t irq);
+
+__API__ int tos_hal_pin_irq_callback(hal_pin_t *pin, hal_pin_cb_t callback, void *cb_arg);
+
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_spi.c

@@ -0,0 +1,80 @@
+#include "tos_k.h"
+#include "mp_tos_hal_spi.h"
+#include "stm32l4xx_hal.h"
+#include "spi.h"
+
+__API__ int tos_hal_spi_init(hal_spi_t *spi, hal_spi_port_t port)
+{
+    if (!spi) {
+        return -1;
+    }
+    
+    if (port == HAL_SPI_PORT_1) {
+        spi->private_spi = &hspi1;
+        MX_SPI1_Init();
+    } else if (port == HAL_SPI_PORT_2) {
+        spi->private_spi = &hspi2;
+        MX_SPI2_Init();
+    } else if (port == HAL_SPI_PORT_3) {
+        spi->private_spi = &hspi3;
+        MX_SPI3_Init();
+    } else {
+        return -1;
+    }
+
+    return 0;
+}
+
+__API__ int tos_hal_spi_transfer(hal_spi_t *spi, const uint8_t *send_buf, uint8_t *recv_buf, size_t size, uint32_t timeout)
+{
+    HAL_StatusTypeDef hal_status;
+    SPI_HandleTypeDef *spi_handle;
+
+    if (!spi || (!send_buf && !recv_buf)) {
+        return -1;
+    }
+
+    if (!spi->private_spi) {
+        return -1;
+    }
+
+    spi_handle = (SPI_HandleTypeDef *)spi->private_spi;
+
+    if (send_buf && recv_buf) {
+        hal_status = HAL_SPI_TransmitReceive(spi_handle, send_buf, recv_buf, size, timeout);
+    } else if (send_buf) {
+        hal_status = HAL_SPI_Transmit(spi_handle, send_buf, size, timeout);
+    } else if (recv_buf) {
+        hal_status = HAL_SPI_Receive(spi_handle, send_buf, size, timeout);
+    }
+
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+    return 0;
+}
+
+__API__ int tos_hal_spi_deinit(hal_spi_t *spi)
+{
+    HAL_StatusTypeDef hal_status;
+    SPI_HandleTypeDef *spi_handle;
+
+    if (!spi) {
+        return -1;
+    }
+
+    if (!spi->private_spi) {
+        return -1;
+    }
+
+    spi_handle = (SPI_HandleTypeDef *)spi->private_spi;
+    
+    hal_status = HAL_SPI_DeInit(spi_handle);
+    HAL_SPI_MspDeInit(spi_handle);
+
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+
+    return 0;
+}

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_spi.h

@@ -0,0 +1,22 @@
+#ifndef _TOS_HAL_SPI_H_
+#define _TOS_HAL_SPI_H_
+
+typedef enum hal_spi_port_en {
+    HAL_SPI_PORT_0 = 0,
+    HAL_SPI_PORT_1,
+    HAL_SPI_PORT_2,
+    HAL_SPI_PORT_3,
+} hal_spi_port_t;
+
+typedef struct hal_spi_st {
+    hal_spi_port_t      port;
+    void                *private_spi;
+} hal_spi_t;
+
+__API__ int tos_hal_spi_init(hal_spi_t *spi, hal_spi_port_t port);
+
+__API__ int tos_hal_spi_transfer(hal_spi_t *spi, const uint8_t *send_buf, uint8_t *recv_buf, size_t size, uint32_t timeout);
+
+__API__ int tos_hal_spi_deinit(hal_spi_t *spi);
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_uart.c

@@ -0,0 +1,26 @@
+#include "tos_k.h"
+#include "mp_tos_hal_uart.h"
+#include "stm32l4xx_hal.h"
+#include "usart.h"
+
+__API__ int tos_hal_uart_recv_start(hal_uart_t *uart, const uint8_t *buf, size_t size) 
+{
+    HAL_StatusTypeDef hal_status;
+    UART_HandleTypeDef *uart_handle;
+
+    if (!uart || !buf) {
+        return -1;
+    }
+
+    if (!uart->private_uart) {
+        return -1;
+    }
+
+    uart_handle = (UART_HandleTypeDef *)uart->private_uart;
+
+    hal_status = HAL_UART_Receive_IT(uart_handle, (uint8_t *)buf, size);
+    if (hal_status != HAL_OK) {
+        return -1;
+    }
+    return 0;
+}

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/hal/mp_tos_hal_uart.h

@@ -0,0 +1,8 @@
+#ifndef _MP_TOS_HAL_UART_H_
+#define _MP_TOS_HAL_UART_H_
+
+#include "tos_hal_uart.h"
+
+__API__ int tos_hal_uart_recv_start(hal_uart_t *uart, const uint8_t *buf, size_t size);
+
+#endif

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/mpconfigboard.h

@@ -0,0 +1,16 @@
+/* board specific config */
+#define MICROPY_HW_BOARD_NAME                       "BearPi"
+#define MICROPY_HW_MCU_NAME                         "STM32F431RC"
+
+#define MICROPY_HW_UART_NUM                         4
+#define MICROPY_HW_UART_REPL                        2
+#define MICROPY_HW_SPI_NUM                          4
+
+/* project specific config */
+#define MICROPY_CONFIG_ROM_LEVEL                    (MICROPY_CONFIG_ROM_LEVEL_EXTRA_FEATURES)
+
+#define MP_USING_QSPI_FLASH
+#define MP_USING_VFS
+#define MP_USING_NETWORK
+#define MP_USING_MACHINE_SPI
+#define MP_USING_MACHINE_I2C

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/mphalboard.c

@@ -0,0 +1,109 @@
+
+#include "py/mpconfig.h"
+#include "py/mphal.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "modmachine.h"
+
+#if !(MP_GEN_HDR)
+#include "tos_k.h"
+#include "main.h"
+#endif
+
+/********************** Tick *************************/
+
+static uint32_t systick_get_us() {
+    // get systick value
+    uint32_t counter = SysTick->VAL;
+    uint32_t load = SysTick->LOAD;
+
+    // convert from decrementing to incrementing
+    counter = load - counter;
+
+    return (counter * 1000) / (load + 1);
+}
+
+mp_uint_t mp_hal_ticks_us(void) {
+    uint32_t ms = tos_tick2millisec(tos_systick_get());
+    uint32_t us = systick_get_us();
+    return ms * 1000 + us;
+}
+
+void mp_hal_delay_us(mp_uint_t usec) {
+    mp_uint_t ms = usec / 1000;
+    mp_uint_t us = usec % 1000;
+    if (ms > 0)
+        mp_hal_delay_ms(ms);
+    mp_uint_t start = mp_hal_ticks_us();
+    while (mp_hal_ticks_us() - start < us) {
+    }
+}
+
+/********************** GPIO *************************/
+
+#define ST_PIN(port_num, pin_num)   ((uint8_t)(((port_num) << 4) & 0xF0) | ((pin_num) & 0x0F))
+
+STATIC const mp_rom_map_elem_t machine_pins_locals_dict_table[] = {
+    
+    { MP_ROM_QSTR(MP_QSTR_A0),  MP_ROM_INT(ST_PIN(0, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_A1),  MP_ROM_INT(ST_PIN(0, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_A2),  MP_ROM_INT(ST_PIN(0, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_A3),  MP_ROM_INT(ST_PIN(0, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_A4),  MP_ROM_INT(ST_PIN(0, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_A5),  MP_ROM_INT(ST_PIN(0, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_A6),  MP_ROM_INT(ST_PIN(0, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_A7),  MP_ROM_INT(ST_PIN(0, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_A8),  MP_ROM_INT(ST_PIN(0, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_A9),  MP_ROM_INT(ST_PIN(0, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_INT(ST_PIN(0, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_INT(ST_PIN(0, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_INT(ST_PIN(0, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_INT(ST_PIN(0, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_INT(ST_PIN(0, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_INT(ST_PIN(0, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_B0),  MP_ROM_INT(ST_PIN(1, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_B1),  MP_ROM_INT(ST_PIN(1, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_B2),  MP_ROM_INT(ST_PIN(1, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_B3),  MP_ROM_INT(ST_PIN(1, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_B4),  MP_ROM_INT(ST_PIN(1, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_B5),  MP_ROM_INT(ST_PIN(1, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_B6),  MP_ROM_INT(ST_PIN(1, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_B7),  MP_ROM_INT(ST_PIN(1, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_B8),  MP_ROM_INT(ST_PIN(1, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_B9),  MP_ROM_INT(ST_PIN(1, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_INT(ST_PIN(1, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_B11), MP_ROM_INT(ST_PIN(1, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_INT(ST_PIN(1, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_INT(ST_PIN(1, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_INT(ST_PIN(1, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_INT(ST_PIN(1, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_C0),  MP_ROM_INT(ST_PIN(2, 0)) },
+    { MP_ROM_QSTR(MP_QSTR_C1),  MP_ROM_INT(ST_PIN(2, 1)) },
+    { MP_ROM_QSTR(MP_QSTR_C2),  MP_ROM_INT(ST_PIN(2, 2)) },
+    { MP_ROM_QSTR(MP_QSTR_C3),  MP_ROM_INT(ST_PIN(2, 3)) },
+    { MP_ROM_QSTR(MP_QSTR_C4),  MP_ROM_INT(ST_PIN(2, 4)) },
+    { MP_ROM_QSTR(MP_QSTR_C5),  MP_ROM_INT(ST_PIN(2, 5)) },
+    { MP_ROM_QSTR(MP_QSTR_C6),  MP_ROM_INT(ST_PIN(2, 6)) },
+    { MP_ROM_QSTR(MP_QSTR_C7),  MP_ROM_INT(ST_PIN(2, 7)) },
+    { MP_ROM_QSTR(MP_QSTR_C8),  MP_ROM_INT(ST_PIN(2, 8)) },
+    { MP_ROM_QSTR(MP_QSTR_C9),  MP_ROM_INT(ST_PIN(2, 9)) },
+    { MP_ROM_QSTR(MP_QSTR_C10), MP_ROM_INT(ST_PIN(2, 10)) },
+    { MP_ROM_QSTR(MP_QSTR_C11), MP_ROM_INT(ST_PIN(2, 11)) },
+    { MP_ROM_QSTR(MP_QSTR_C12), MP_ROM_INT(ST_PIN(2, 12)) },
+    { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_INT(ST_PIN(2, 13)) },
+    { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_INT(ST_PIN(2, 14)) },
+    { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_INT(ST_PIN(2, 15)) },
+
+    { MP_ROM_QSTR(MP_QSTR_D2),  MP_ROM_INT(ST_PIN(3, 2)) },
+
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_INT(ST_PIN(2, 13)) },    // C13
+    { MP_ROM_QSTR(MP_QSTR_KEY1), MP_ROM_INT(ST_PIN(1, 2)) },    // B2
+    { MP_ROM_QSTR(MP_QSTR_KEY2), MP_ROM_INT(ST_PIN(1, 3)) },    // B3
+
+};
+MP_DEFINE_CONST_DICT(machine_pins_locals_dict, machine_pins_locals_dict_table);
+
+

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/board/mphalboard.h

@@ -0,0 +1,11 @@
+#ifndef _MPHALBOARD_H_
+#define _MPHALBOARD_H_
+
+#include "py/obj.h"
+
+extern mp_uint_t mp_hal_ticks_us(void);
+extern void mp_hal_delay_us(mp_uint_t usec);
+
+extern const mp_obj_dict_t machine_pins_locals_dict;
+
+#endif /* _MPHALBOARD_H_ */

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/genhdr/moduledefs.h

@@ -0,0 +1,150 @@
+// Automatically generated by makemoduledefs.py.
+
+extern const struct _mp_obj_module_t mp_module___main__;
+#undef MODULE_DEF_MP_QSTR___MAIN__
+#define MODULE_DEF_MP_QSTR___MAIN__ { MP_ROM_QSTR(MP_QSTR___main__), MP_ROM_PTR(&mp_module___main__) },
+
+extern const struct _mp_obj_module_t mp_module_thread;
+#undef MODULE_DEF_MP_QSTR__THREAD
+#define MODULE_DEF_MP_QSTR__THREAD { MP_ROM_QSTR(MP_QSTR__thread), MP_ROM_PTR(&mp_module_thread) },
+
+extern const struct _mp_obj_module_t mp_module_uasyncio;
+#undef MODULE_DEF_MP_QSTR__UASYNCIO
+#define MODULE_DEF_MP_QSTR__UASYNCIO { MP_ROM_QSTR(MP_QSTR__uasyncio), MP_ROM_PTR(&mp_module_uasyncio) },
+
+extern const struct _mp_obj_module_t mp_module_builtins;
+#undef MODULE_DEF_MP_QSTR_BUILTINS
+#define MODULE_DEF_MP_QSTR_BUILTINS { MP_ROM_QSTR(MP_QSTR_builtins), MP_ROM_PTR(&mp_module_builtins) },
+
+extern const struct _mp_obj_module_t mp_module_cmath;
+#undef MODULE_DEF_MP_QSTR_CMATH
+#define MODULE_DEF_MP_QSTR_CMATH { MP_ROM_QSTR(MP_QSTR_cmath), MP_ROM_PTR(&mp_module_cmath) },
+
+extern const struct _mp_obj_module_t mp_module_framebuf;
+#undef MODULE_DEF_MP_QSTR_FRAMEBUF
+#define MODULE_DEF_MP_QSTR_FRAMEBUF { MP_ROM_QSTR(MP_QSTR_framebuf), MP_ROM_PTR(&mp_module_framebuf) },
+
+extern const struct _mp_obj_module_t mp_module_gc;
+#undef MODULE_DEF_MP_QSTR_GC
+#define MODULE_DEF_MP_QSTR_GC { MP_ROM_QSTR(MP_QSTR_gc), MP_ROM_PTR(&mp_module_gc) },
+
+extern const struct _mp_obj_module_t mp_module_math;
+#undef MODULE_DEF_MP_QSTR_MATH
+#define MODULE_DEF_MP_QSTR_MATH { MP_ROM_QSTR(MP_QSTR_math), MP_ROM_PTR(&mp_module_math) },
+
+extern const struct _mp_obj_module_t mp_module_micropython;
+#undef MODULE_DEF_MP_QSTR_MICROPYTHON
+#define MODULE_DEF_MP_QSTR_MICROPYTHON { MP_ROM_QSTR(MP_QSTR_micropython), MP_ROM_PTR(&mp_module_micropython) },
+
+extern const struct _mp_obj_module_t mp_module_network;
+#undef MODULE_DEF_MP_QSTR_NETWORK
+#define MODULE_DEF_MP_QSTR_NETWORK { MP_ROM_QSTR(MP_QSTR_network), MP_ROM_PTR(&mp_module_network) },
+
+extern const struct _mp_obj_module_t mp_module_uarray;
+#undef MODULE_DEF_MP_QSTR_UARRAY
+#define MODULE_DEF_MP_QSTR_UARRAY { MP_ROM_QSTR(MP_QSTR_uarray), MP_ROM_PTR(&mp_module_uarray) },
+
+extern const struct _mp_obj_module_t mp_module_ubinascii;
+#undef MODULE_DEF_MP_QSTR_UBINASCII
+#define MODULE_DEF_MP_QSTR_UBINASCII { MP_ROM_QSTR(MP_QSTR_ubinascii), MP_ROM_PTR(&mp_module_ubinascii) },
+
+extern const struct _mp_obj_module_t mp_module_collections;
+#undef MODULE_DEF_MP_QSTR_UCOLLECTIONS
+#define MODULE_DEF_MP_QSTR_UCOLLECTIONS { MP_ROM_QSTR(MP_QSTR_ucollections), MP_ROM_PTR(&mp_module_collections) },
+
+extern const struct _mp_obj_module_t mp_module_uctypes;
+#undef MODULE_DEF_MP_QSTR_UCTYPES
+#define MODULE_DEF_MP_QSTR_UCTYPES { MP_ROM_QSTR(MP_QSTR_uctypes), MP_ROM_PTR(&mp_module_uctypes) },
+
+extern const struct _mp_obj_module_t mp_module_uerrno;
+#undef MODULE_DEF_MP_QSTR_UERRNO
+#define MODULE_DEF_MP_QSTR_UERRNO { MP_ROM_QSTR(MP_QSTR_uerrno), MP_ROM_PTR(&mp_module_uerrno) },
+
+extern const struct _mp_obj_module_t mp_module_uhashlib;
+#undef MODULE_DEF_MP_QSTR_UHASHLIB
+#define MODULE_DEF_MP_QSTR_UHASHLIB { MP_ROM_QSTR(MP_QSTR_uhashlib), MP_ROM_PTR(&mp_module_uhashlib) },
+
+extern const struct _mp_obj_module_t mp_module_uheapq;
+#undef MODULE_DEF_MP_QSTR_UHEAPQ
+#define MODULE_DEF_MP_QSTR_UHEAPQ { MP_ROM_QSTR(MP_QSTR_uheapq), MP_ROM_PTR(&mp_module_uheapq) },
+
+extern const struct _mp_obj_module_t mp_module_io;
+#undef MODULE_DEF_MP_QSTR_UIO
+#define MODULE_DEF_MP_QSTR_UIO { MP_ROM_QSTR(MP_QSTR_uio), MP_ROM_PTR(&mp_module_io) },
+
+extern const struct _mp_obj_module_t mp_module_ujson;
+#undef MODULE_DEF_MP_QSTR_UJSON
+#define MODULE_DEF_MP_QSTR_UJSON { MP_ROM_QSTR(MP_QSTR_ujson), MP_ROM_PTR(&mp_module_ujson) },
+
+extern const struct _mp_obj_module_t mp_module_machine;
+#undef MODULE_DEF_MP_QSTR_UMACHINE
+#define MODULE_DEF_MP_QSTR_UMACHINE { MP_ROM_QSTR(MP_QSTR_umachine), MP_ROM_PTR(&mp_module_machine) },
+
+extern const struct _mp_obj_module_t mp_module_uos;
+#undef MODULE_DEF_MP_QSTR_UOS
+#define MODULE_DEF_MP_QSTR_UOS { MP_ROM_QSTR(MP_QSTR_uos), MP_ROM_PTR(&mp_module_uos) },
+
+extern const struct _mp_obj_module_t mp_module_urandom;
+#undef MODULE_DEF_MP_QSTR_URANDOM
+#define MODULE_DEF_MP_QSTR_URANDOM { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&mp_module_urandom) },
+
+extern const struct _mp_obj_module_t mp_module_ure;
+#undef MODULE_DEF_MP_QSTR_URE
+#define MODULE_DEF_MP_QSTR_URE { MP_ROM_QSTR(MP_QSTR_ure), MP_ROM_PTR(&mp_module_ure) },
+
+extern const struct _mp_obj_module_t mp_module_uselect;
+#undef MODULE_DEF_MP_QSTR_USELECT
+#define MODULE_DEF_MP_QSTR_USELECT { MP_ROM_QSTR(MP_QSTR_uselect), MP_ROM_PTR(&mp_module_uselect) },
+
+extern const struct _mp_obj_module_t mp_module_usocket;
+#undef MODULE_DEF_MP_QSTR_USOCKET
+#define MODULE_DEF_MP_QSTR_USOCKET { MP_ROM_QSTR(MP_QSTR_usocket), MP_ROM_PTR(&mp_module_usocket) },
+
+extern const struct _mp_obj_module_t mp_module_ustruct;
+#undef MODULE_DEF_MP_QSTR_USTRUCT
+#define MODULE_DEF_MP_QSTR_USTRUCT { MP_ROM_QSTR(MP_QSTR_ustruct), MP_ROM_PTR(&mp_module_ustruct) },
+
+extern const struct _mp_obj_module_t mp_module_sys;
+#undef MODULE_DEF_MP_QSTR_USYS
+#define MODULE_DEF_MP_QSTR_USYS { MP_ROM_QSTR(MP_QSTR_usys), MP_ROM_PTR(&mp_module_sys) },
+
+extern const struct _mp_obj_module_t mp_module_utime;
+#undef MODULE_DEF_MP_QSTR_UTIME
+#define MODULE_DEF_MP_QSTR_UTIME { MP_ROM_QSTR(MP_QSTR_utime), MP_ROM_PTR(&mp_module_utime) },
+
+extern const struct _mp_obj_module_t mp_module_uzlib;
+#undef MODULE_DEF_MP_QSTR_UZLIB
+#define MODULE_DEF_MP_QSTR_UZLIB { MP_ROM_QSTR(MP_QSTR_uzlib), MP_ROM_PTR(&mp_module_uzlib) },
+
+
+#define MICROPY_REGISTERED_MODULES \
+    MODULE_DEF_MP_QSTR_BUILTINS \
+    MODULE_DEF_MP_QSTR_CMATH \
+    MODULE_DEF_MP_QSTR_FRAMEBUF \
+    MODULE_DEF_MP_QSTR_GC \
+    MODULE_DEF_MP_QSTR_MATH \
+    MODULE_DEF_MP_QSTR_MICROPYTHON \
+    MODULE_DEF_MP_QSTR_NETWORK \
+    MODULE_DEF_MP_QSTR_UARRAY \
+    MODULE_DEF_MP_QSTR_UBINASCII \
+    MODULE_DEF_MP_QSTR_UCOLLECTIONS \
+    MODULE_DEF_MP_QSTR_UCTYPES \
+    MODULE_DEF_MP_QSTR_UERRNO \
+    MODULE_DEF_MP_QSTR_UHASHLIB \
+    MODULE_DEF_MP_QSTR_UHEAPQ \
+    MODULE_DEF_MP_QSTR_UIO \
+    MODULE_DEF_MP_QSTR_UJSON \
+    MODULE_DEF_MP_QSTR_UMACHINE \
+    MODULE_DEF_MP_QSTR_UOS \
+    MODULE_DEF_MP_QSTR_URANDOM \
+    MODULE_DEF_MP_QSTR_URE \
+    MODULE_DEF_MP_QSTR_USELECT \
+    MODULE_DEF_MP_QSTR_USOCKET \
+    MODULE_DEF_MP_QSTR_USTRUCT \
+    MODULE_DEF_MP_QSTR_USYS \
+    MODULE_DEF_MP_QSTR_UTIME \
+    MODULE_DEF_MP_QSTR_UZLIB \
+    MODULE_DEF_MP_QSTR__THREAD \
+    MODULE_DEF_MP_QSTR__UASYNCIO \
+    MODULE_DEF_MP_QSTR___MAIN__ \
+// MICROPY_REGISTERED_MODULES

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/genhdr/mpversion.h

@@ -0,0 +1,4 @@
+// This file was generated by py/makeversionhdr.py
+#define MICROPY_GIT_TAG "v2.5.0-73-g0e22ad73-dirty"
+#define MICROPY_GIT_HASH "0e22ad73-dirty"
+#define MICROPY_BUILD_DATE "2022-09-25"

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/genhdr/qstrdefs.generated.h

@@ -0,0 +1,752 @@
+// This file was automatically generated by makeqstrdata.py
+
+QDEF(MP_QSTRnull, 0, 0, "")
+QDEF(MP_QSTR_, 5381, 0, "")
+QDEF(MP_QSTR___dir__, 36730, 7, "__dir__")
+QDEF(MP_QSTR__0x0a_, 46511, 1, "\x0a")
+QDEF(MP_QSTR__space_, 46469, 1, " ")
+QDEF(MP_QSTR__star_, 46479, 1, "*")
+QDEF(MP_QSTR__slash_, 46474, 1, "/")
+QDEF(MP_QSTR__lt_module_gt_, 38077, 8, "<module>")
+QDEF(MP_QSTR__, 46586, 1, "_")
+QDEF(MP_QSTR___call__, 63911, 8, "__call__")
+QDEF(MP_QSTR___class__, 50475, 9, "__class__")
+QDEF(MP_QSTR___delitem__, 13821, 11, "__delitem__")
+QDEF(MP_QSTR___enter__, 47725, 9, "__enter__")
+QDEF(MP_QSTR___exit__, 63557, 8, "__exit__")
+QDEF(MP_QSTR___getattr__, 63552, 11, "__getattr__")
+QDEF(MP_QSTR___getitem__, 14630, 11, "__getitem__")
+QDEF(MP_QSTR___hash__, 51447, 8, "__hash__")
+QDEF(MP_QSTR___init__, 42335, 8, "__init__")
+QDEF(MP_QSTR___int__, 6934, 7, "__int__")
+QDEF(MP_QSTR___iter__, 13007, 8, "__iter__")
+QDEF(MP_QSTR___len__, 45282, 7, "__len__")
+QDEF(MP_QSTR___main__, 5006, 8, "__main__")
+QDEF(MP_QSTR___module__, 12543, 10, "__module__")
+QDEF(MP_QSTR___name__, 14562, 8, "__name__")
+QDEF(MP_QSTR___new__, 5497, 7, "__new__")
+QDEF(MP_QSTR___next__, 29442, 8, "__next__")
+QDEF(MP_QSTR___qualname__, 107, 12, "__qualname__")
+QDEF(MP_QSTR___repr__, 2832, 8, "__repr__")
+QDEF(MP_QSTR___setitem__, 15922, 11, "__setitem__")
+QDEF(MP_QSTR___str__, 52688, 7, "__str__")
+QDEF(MP_QSTR_ArithmeticError, 35885, 15, "ArithmeticError")
+QDEF(MP_QSTR_AssertionError, 23191, 14, "AssertionError")
+QDEF(MP_QSTR_AttributeError, 56865, 14, "AttributeError")
+QDEF(MP_QSTR_BaseException, 37383, 13, "BaseException")
+QDEF(MP_QSTR_EOFError, 49041, 8, "EOFError")
+QDEF(MP_QSTR_Ellipsis, 57584, 8, "Ellipsis")
+QDEF(MP_QSTR_Exception, 10738, 9, "Exception")
+QDEF(MP_QSTR_GeneratorExit, 25110, 13, "GeneratorExit")
+QDEF(MP_QSTR_ImportError, 39968, 11, "ImportError")
+QDEF(MP_QSTR_IndentationError, 8284, 16, "IndentationError")
+QDEF(MP_QSTR_IndexError, 44419, 10, "IndexError")
+QDEF(MP_QSTR_KeyError, 234, 8, "KeyError")
+QDEF(MP_QSTR_KeyboardInterrupt, 58031, 17, "KeyboardInterrupt")
+QDEF(MP_QSTR_LookupError, 27135, 11, "LookupError")
+QDEF(MP_QSTR_MemoryError, 33756, 11, "MemoryError")
+QDEF(MP_QSTR_NameError, 11706, 9, "NameError")
+QDEF(MP_QSTR_NoneType, 26647, 8, "NoneType")
+QDEF(MP_QSTR_NotImplementedError, 39110, 19, "NotImplementedError")
+QDEF(MP_QSTR_OSError, 26017, 7, "OSError")
+QDEF(MP_QSTR_OverflowError, 57729, 13, "OverflowError")
+QDEF(MP_QSTR_RuntimeError, 61793, 12, "RuntimeError")
+QDEF(MP_QSTR_StopIteration, 7402, 13, "StopIteration")
+QDEF(MP_QSTR_SyntaxError, 36756, 11, "SyntaxError")
+QDEF(MP_QSTR_SystemExit, 65312, 10, "SystemExit")
+QDEF(MP_QSTR_TypeError, 38437, 9, "TypeError")
+QDEF(MP_QSTR_ValueError, 34710, 10, "ValueError")
+QDEF(MP_QSTR_ZeroDivisionError, 10166, 17, "ZeroDivisionError")
+QDEF(MP_QSTR_abs, 12949, 3, "abs")
+QDEF(MP_QSTR_all, 13124, 3, "all")
+QDEF(MP_QSTR_any, 13075, 3, "any")
+QDEF(MP_QSTR_append, 38763, 6, "append")
+QDEF(MP_QSTR_args, 50882, 4, "args")
+QDEF(MP_QSTR_bool, 15595, 4, "bool")
+QDEF(MP_QSTR_builtins, 12791, 8, "builtins")
+QDEF(MP_QSTR_bytearray, 41846, 9, "bytearray")
+QDEF(MP_QSTR_bytecode, 32034, 8, "bytecode")
+QDEF(MP_QSTR_bytes, 45660, 5, "bytes")
+QDEF(MP_QSTR_callable, 28685, 8, "callable")
+QDEF(MP_QSTR_chr, 19676, 3, "chr")
+QDEF(MP_QSTR_classmethod, 36020, 11, "classmethod")
+QDEF(MP_QSTR_clear, 41084, 5, "clear")
+QDEF(MP_QSTR_close, 26419, 5, "close")
+QDEF(MP_QSTR_const, 65472, 5, "const")
+QDEF(MP_QSTR_copy, 56288, 4, "copy")
+QDEF(MP_QSTR_count, 19878, 5, "count")
+QDEF(MP_QSTR_dict, 64575, 4, "dict")
+QDEF(MP_QSTR_dir, 7930, 3, "dir")
+QDEF(MP_QSTR_divmod, 1208, 6, "divmod")
+QDEF(MP_QSTR_end, 8970, 3, "end")
+QDEF(MP_QSTR_endswith, 41755, 8, "endswith")
+QDEF(MP_QSTR_eval, 42651, 4, "eval")
+QDEF(MP_QSTR_exec, 49182, 4, "exec")
+QDEF(MP_QSTR_extend, 59491, 6, "extend")
+QDEF(MP_QSTR_find, 13312, 4, "find")
+QDEF(MP_QSTR_format, 13094, 6, "format")
+QDEF(MP_QSTR_from_bytes, 29749, 10, "from_bytes")
+QDEF(MP_QSTR_get, 15155, 3, "get")
+QDEF(MP_QSTR_getattr, 6080, 7, "getattr")
+QDEF(MP_QSTR_globals, 18845, 7, "globals")
+QDEF(MP_QSTR_hasattr, 45196, 7, "hasattr")
+QDEF(MP_QSTR_hash, 28855, 4, "hash")
+QDEF(MP_QSTR_id, 28456, 2, "id")
+QDEF(MP_QSTR_index, 10363, 5, "index")
+QDEF(MP_QSTR_insert, 21522, 6, "insert")
+QDEF(MP_QSTR_int, 21270, 3, "int")
+QDEF(MP_QSTR_isalpha, 14315, 7, "isalpha")
+QDEF(MP_QSTR_isdigit, 39592, 7, "isdigit")
+QDEF(MP_QSTR_isinstance, 48822, 10, "isinstance")
+QDEF(MP_QSTR_islower, 33020, 7, "islower")
+QDEF(MP_QSTR_isspace, 63579, 7, "isspace")
+QDEF(MP_QSTR_issubclass, 32693, 10, "issubclass")
+QDEF(MP_QSTR_isupper, 42973, 7, "isupper")
+QDEF(MP_QSTR_items, 21475, 5, "items")
+QDEF(MP_QSTR_iter, 8591, 4, "iter")
+QDEF(MP_QSTR_join, 23719, 4, "join")
+QDEF(MP_QSTR_key, 27954, 3, "key")
+QDEF(MP_QSTR_keys, 4865, 4, "keys")
+QDEF(MP_QSTR_len, 16482, 3, "len")
+QDEF(MP_QSTR_list, 7463, 4, "list")
+QDEF(MP_QSTR_little, 27273, 6, "little")
+QDEF(MP_QSTR_locals, 41275, 6, "locals")
+QDEF(MP_QSTR_lower, 52166, 5, "lower")
+QDEF(MP_QSTR_lstrip, 47589, 6, "lstrip")
+QDEF(MP_QSTR_main, 47054, 4, "main")
+QDEF(MP_QSTR_map, 17337, 3, "map")
+QDEF(MP_QSTR_micropython, 31755, 11, "micropython")
+QDEF(MP_QSTR_next, 34882, 4, "next")
+QDEF(MP_QSTR_object, 36240, 6, "object")
+QDEF(MP_QSTR_open, 15057, 4, "open")
+QDEF(MP_QSTR_ord, 24092, 3, "ord")
+QDEF(MP_QSTR_pop, 29482, 3, "pop")
+QDEF(MP_QSTR_popitem, 11455, 7, "popitem")
+QDEF(MP_QSTR_pow, 29485, 3, "pow")
+QDEF(MP_QSTR_print, 50772, 5, "print")
+QDEF(MP_QSTR_range, 24090, 5, "range")
+QDEF(MP_QSTR_read, 63927, 4, "read")
+QDEF(MP_QSTR_readinto, 48971, 8, "readinto")
+QDEF(MP_QSTR_readline, 6649, 8, "readline")
+QDEF(MP_QSTR_remove, 35427, 6, "remove")
+QDEF(MP_QSTR_replace, 9545, 7, "replace")
+QDEF(MP_QSTR_repr, 63440, 4, "repr")
+QDEF(MP_QSTR_reverse, 10789, 7, "reverse")
+QDEF(MP_QSTR_rfind, 40146, 5, "rfind")
+QDEF(MP_QSTR_rindex, 11241, 6, "rindex")
+QDEF(MP_QSTR_round, 9703, 5, "round")
+QDEF(MP_QSTR_rsplit, 165, 6, "rsplit")
+QDEF(MP_QSTR_rstrip, 38203, 6, "rstrip")
+QDEF(MP_QSTR_self, 30585, 4, "self")
+QDEF(MP_QSTR_send, 30393, 4, "send")
+QDEF(MP_QSTR_sep, 36643, 3, "sep")
+QDEF(MP_QSTR_set, 36647, 3, "set")
+QDEF(MP_QSTR_setattr, 43220, 7, "setattr")
+QDEF(MP_QSTR_setdefault, 41836, 10, "setdefault")
+QDEF(MP_QSTR_sort, 40383, 4, "sort")
+QDEF(MP_QSTR_sorted, 5470, 6, "sorted")
+QDEF(MP_QSTR_split, 13239, 5, "split")
+QDEF(MP_QSTR_start, 61317, 5, "start")
+QDEF(MP_QSTR_startswith, 59508, 10, "startswith")
+QDEF(MP_QSTR_staticmethod, 44898, 12, "staticmethod")
+QDEF(MP_QSTR_step, 13911, 4, "step")
+QDEF(MP_QSTR_stop, 13981, 4, "stop")
+QDEF(MP_QSTR_str, 36176, 3, "str")
+QDEF(MP_QSTR_strip, 7721, 5, "strip")
+QDEF(MP_QSTR_sum, 36142, 3, "sum")
+QDEF(MP_QSTR_super, 45764, 5, "super")
+QDEF(MP_QSTR_throw, 17587, 5, "throw")
+QDEF(MP_QSTR_to_bytes, 16088, 8, "to_bytes")
+QDEF(MP_QSTR_tuple, 16893, 5, "tuple")
+QDEF(MP_QSTR_type, 32669, 4, "type")
+QDEF(MP_QSTR_update, 30388, 6, "update")
+QDEF(MP_QSTR_upper, 37927, 5, "upper")
+QDEF(MP_QSTR_utf_hyphen_8, 33463, 5, "utf-8")
+QDEF(MP_QSTR_value, 13390, 5, "value")
+QDEF(MP_QSTR_values, 48765, 6, "values")
+QDEF(MP_QSTR_write, 43160, 5, "write")
+QDEF(MP_QSTR_zip, 44262, 3, "zip")
+QDEF(MP_QSTR___abs__, 54933, 7, "__abs__")
+QDEF(MP_QSTR___add__, 33476, 7, "__add__")
+QDEF(MP_QSTR___aenter__, 33868, 10, "__aenter__")
+QDEF(MP_QSTR___aexit__, 53188, 9, "__aexit__")
+QDEF(MP_QSTR___aiter__, 11086, 9, "__aiter__")
+QDEF(MP_QSTR___and__, 56078, 7, "__and__")
+QDEF(MP_QSTR___anext__, 46211, 9, "__anext__")
+QDEF(MP_QSTR___bases__, 12291, 9, "__bases__")
+QDEF(MP_QSTR___bool__, 25899, 8, "__bool__")
+QDEF(MP_QSTR___build_class__, 34882, 15, "__build_class__")
+QDEF(MP_QSTR___contains__, 24518, 12, "__contains__")
+QDEF(MP_QSTR___del__, 14184, 7, "__del__")
+QDEF(MP_QSTR___delattr__, 30555, 11, "__delattr__")
+QDEF(MP_QSTR___delete__, 60892, 10, "__delete__")
+QDEF(MP_QSTR___dict__, 21631, 8, "__dict__")
+QDEF(MP_QSTR___divmod__, 4472, 10, "__divmod__")
+QDEF(MP_QSTR___eq__, 15985, 6, "__eq__")
+QDEF(MP_QSTR___file__, 21507, 8, "__file__")
+QDEF(MP_QSTR___floordiv__, 24390, 12, "__floordiv__")
+QDEF(MP_QSTR___ge__, 18087, 6, "__ge__")
+QDEF(MP_QSTR___get__, 36787, 7, "__get__")
+QDEF(MP_QSTR___globals__, 44701, 11, "__globals__")
+QDEF(MP_QSTR___gt__, 33462, 6, "__gt__")
+QDEF(MP_QSTR___iadd__, 19053, 8, "__iadd__")
+QDEF(MP_QSTR___iand__, 8615, 8, "__iand__")
+QDEF(MP_QSTR___ifloordiv__, 3919, 13, "__ifloordiv__")
+QDEF(MP_QSTR___ilshift__, 41600, 11, "__ilshift__")
+QDEF(MP_QSTR___imatmul__, 28352, 11, "__imatmul__")
+QDEF(MP_QSTR___imod__, 34378, 8, "__imod__")
+QDEF(MP_QSTR___import__, 15928, 10, "__import__")
+QDEF(MP_QSTR___imul__, 52760, 8, "__imul__")
+QDEF(MP_QSTR___invert__, 30711, 10, "__invert__")
+QDEF(MP_QSTR___ior__, 36849, 7, "__ior__")
+QDEF(MP_QSTR___ipow__, 54660, 8, "__ipow__")
+QDEF(MP_QSTR___irshift__, 63710, 11, "__irshift__")
+QDEF(MP_QSTR___isub__, 30728, 8, "__isub__")
+QDEF(MP_QSTR___itruediv__, 545, 12, "__itruediv__")
+QDEF(MP_QSTR___ixor__, 47369, 8, "__ixor__")
+QDEF(MP_QSTR___le__, 5068, 6, "__le__")
+QDEF(MP_QSTR___lshift__, 34825, 10, "__lshift__")
+QDEF(MP_QSTR___lt__, 26717, 6, "__lt__")
+QDEF(MP_QSTR___matmul__, 62281, 10, "__matmul__")
+QDEF(MP_QSTR___mod__, 14179, 7, "__mod__")
+QDEF(MP_QSTR___mul__, 16945, 7, "__mul__")
+QDEF(MP_QSTR___ne__, 2830, 6, "__ne__")
+QDEF(MP_QSTR___neg__, 54633, 7, "__neg__")
+QDEF(MP_QSTR___or__, 47928, 6, "__or__")
+QDEF(MP_QSTR___path__, 9160, 8, "__path__")
+QDEF(MP_QSTR___pos__, 61481, 7, "__pos__")
+QDEF(MP_QSTR___pow__, 45, 7, "__pow__")
+QDEF(MP_QSTR___radd__, 50454, 8, "__radd__")
+QDEF(MP_QSTR___rand__, 11996, 8, "__rand__")
+QDEF(MP_QSTR___repl_print__, 47872, 14, "__repl_print__")
+QDEF(MP_QSTR___reversed__, 65377, 12, "__reversed__")
+QDEF(MP_QSTR___rfloordiv__, 38996, 13, "__rfloordiv__")
+QDEF(MP_QSTR___rlshift__, 53531, 11, "__rlshift__")
+QDEF(MP_QSTR___rmatmul__, 987, 11, "__rmatmul__")
+QDEF(MP_QSTR___rmod__, 35377, 8, "__rmod__")
+QDEF(MP_QSTR___rmul__, 355, 8, "__rmul__")
+QDEF(MP_QSTR___ror__, 56362, 7, "__ror__")
+QDEF(MP_QSTR___rpow__, 39679, 8, "__rpow__")
+QDEF(MP_QSTR___rrshift__, 40389, 11, "__rrshift__")
+QDEF(MP_QSTR___rshift__, 38999, 10, "__rshift__")
+QDEF(MP_QSTR___rsub__, 30579, 8, "__rsub__")
+QDEF(MP_QSTR___rtruediv__, 55130, 12, "__rtruediv__")
+QDEF(MP_QSTR___rxor__, 34546, 8, "__rxor__")
+QDEF(MP_QSTR___set__, 45991, 7, "__set__")
+QDEF(MP_QSTR___setattr__, 6484, 11, "__setattr__")
+QDEF(MP_QSTR___sub__, 2337, 7, "__sub__")
+QDEF(MP_QSTR___traceback__, 53071, 13, "__traceback__")
+QDEF(MP_QSTR___truediv__, 61320, 11, "__truediv__")
+QDEF(MP_QSTR___xor__, 60448, 7, "__xor__")
+QDEF(MP_QSTR__gt__gt__gt__space_, 44187, 4, ">>> ")
+QDEF(MP_QSTR__dot__dot__dot__space_, 10379, 4, "... ")
+QDEF(MP_QSTR__percent__hash_o, 6764, 3, "%#o")
+QDEF(MP_QSTR__percent__hash_x, 6779, 3, "%#x")
+QDEF(MP_QSTR__brace_open__colon__hash_b_brace_close_, 14168, 5, "{:#b}")
+QDEF(MP_QSTR_maximum_space_recursion_space_depth_space_exceeded, 7795, 32, "maximum recursion depth exceeded")
+QDEF(MP_QSTR__lt_lambda_gt_, 35968, 8, "<lambda>")
+QDEF(MP_QSTR__lt_listcomp_gt_, 5588, 10, "<listcomp>")
+QDEF(MP_QSTR__lt_dictcomp_gt_, 36300, 10, "<dictcomp>")
+QDEF(MP_QSTR__lt_setcomp_gt_, 20820, 9, "<setcomp>")
+QDEF(MP_QSTR__lt_genexpr_gt_, 27188, 9, "<genexpr>")
+QDEF(MP_QSTR__lt_string_gt_, 21330, 8, "<string>")
+QDEF(MP_QSTR__lt_stdin_gt_, 25571, 7, "<stdin>")
+QDEF(MP_QSTR_A0, 29268, 2, "A0")
+QDEF(MP_QSTR_A1, 29269, 2, "A1")
+QDEF(MP_QSTR_A10, 48325, 3, "A10")
+QDEF(MP_QSTR_A11, 48324, 3, "A11")
+QDEF(MP_QSTR_A12, 48327, 3, "A12")
+QDEF(MP_QSTR_A13, 48326, 3, "A13")
+QDEF(MP_QSTR_A14, 48321, 3, "A14")
+QDEF(MP_QSTR_A15, 48320, 3, "A15")
+QDEF(MP_QSTR_A2, 29270, 2, "A2")
+QDEF(MP_QSTR_A3, 29271, 2, "A3")
+QDEF(MP_QSTR_A4, 29264, 2, "A4")
+QDEF(MP_QSTR_A5, 29265, 2, "A5")
+QDEF(MP_QSTR_A6, 29266, 2, "A6")
+QDEF(MP_QSTR_A7, 29267, 2, "A7")
+QDEF(MP_QSTR_A8, 29276, 2, "A8")
+QDEF(MP_QSTR_A9, 29277, 2, "A9")
+QDEF(MP_QSTR_AF_INET, 47083, 7, "AF_INET")
+QDEF(MP_QSTR_AF_INET6, 46461, 8, "AF_INET6")
+QDEF(MP_QSTR_AP_IF, 38404, 5, "AP_IF")
+QDEF(MP_QSTR_ARRAY, 31324, 5, "ARRAY")
+QDEF(MP_QSTR_B0, 29431, 2, "B0")
+QDEF(MP_QSTR_B1, 29430, 2, "B1")
+QDEF(MP_QSTR_B10, 53638, 3, "B10")
+QDEF(MP_QSTR_B11, 53639, 3, "B11")
+QDEF(MP_QSTR_B12, 53636, 3, "B12")
+QDEF(MP_QSTR_B13, 53637, 3, "B13")
+QDEF(MP_QSTR_B14, 53634, 3, "B14")
+QDEF(MP_QSTR_B15, 53635, 3, "B15")
+QDEF(MP_QSTR_B2, 29429, 2, "B2")
+QDEF(MP_QSTR_B3, 29428, 2, "B3")
+QDEF(MP_QSTR_B4, 29427, 2, "B4")
+QDEF(MP_QSTR_B5, 29426, 2, "B5")
+QDEF(MP_QSTR_B6, 29425, 2, "B6")
+QDEF(MP_QSTR_B7, 29424, 2, "B7")
+QDEF(MP_QSTR_B8, 29439, 2, "B8")
+QDEF(MP_QSTR_B9, 29438, 2, "B9")
+QDEF(MP_QSTR_BFINT16, 58005, 7, "BFINT16")
+QDEF(MP_QSTR_BFINT32, 57939, 7, "BFINT32")
+QDEF(MP_QSTR_BFINT8, 39498, 6, "BFINT8")
+QDEF(MP_QSTR_BFUINT16, 42560, 8, "BFUINT16")
+QDEF(MP_QSTR_BFUINT32, 42502, 8, "BFUINT32")
+QDEF(MP_QSTR_BFUINT8, 44991, 7, "BFUINT8")
+QDEF(MP_QSTR_BF_LEN, 45081, 6, "BF_LEN")
+QDEF(MP_QSTR_BF_POS, 40274, 6, "BF_POS")
+QDEF(MP_QSTR_BIG_ENDIAN, 20991, 10, "BIG_ENDIAN")
+QDEF(MP_QSTR_BytesIO, 46874, 7, "BytesIO")
+QDEF(MP_QSTR_C0, 29334, 2, "C0")
+QDEF(MP_QSTR_C1, 29335, 2, "C1")
+QDEF(MP_QSTR_C10, 50503, 3, "C10")
+QDEF(MP_QSTR_C11, 50502, 3, "C11")
+QDEF(MP_QSTR_C12, 50501, 3, "C12")
+QDEF(MP_QSTR_C13, 50500, 3, "C13")
+QDEF(MP_QSTR_C14, 50499, 3, "C14")
+QDEF(MP_QSTR_C15, 50498, 3, "C15")
+QDEF(MP_QSTR_C2, 29332, 2, "C2")
+QDEF(MP_QSTR_C3, 29333, 2, "C3")
+QDEF(MP_QSTR_C4, 29330, 2, "C4")
+QDEF(MP_QSTR_C5, 29331, 2, "C5")
+QDEF(MP_QSTR_C6, 29328, 2, "C6")
+QDEF(MP_QSTR_C7, 29329, 2, "C7")
+QDEF(MP_QSTR_C8, 29342, 2, "C8")
+QDEF(MP_QSTR_C9, 29343, 2, "C9")
+QDEF(MP_QSTR_CancelledError, 39926, 14, "CancelledError")
+QDEF(MP_QSTR_D2, 29235, 2, "D2")
+QDEF(MP_QSTR_DecompIO, 46995, 8, "DecompIO")
+QDEF(MP_QSTR_EACCES, 49719, 6, "EACCES")
+QDEF(MP_QSTR_EADDRINUSE, 4375, 10, "EADDRINUSE")
+QDEF(MP_QSTR_EAGAIN, 60448, 6, "EAGAIN")
+QDEF(MP_QSTR_EALREADY, 5446, 8, "EALREADY")
+QDEF(MP_QSTR_EBADF, 41825, 5, "EBADF")
+QDEF(MP_QSTR_ECONNABORTED, 43815, 12, "ECONNABORTED")
+QDEF(MP_QSTR_ECONNREFUSED, 11322, 12, "ECONNREFUSED")
+QDEF(MP_QSTR_ECONNRESET, 64281, 10, "ECONNRESET")
+QDEF(MP_QSTR_EEXIST, 44371, 6, "EEXIST")
+QDEF(MP_QSTR_EHOSTUNREACH, 9606, 12, "EHOSTUNREACH")
+QDEF(MP_QSTR_EINPROGRESS, 41114, 11, "EINPROGRESS")
+QDEF(MP_QSTR_EINVAL, 65372, 6, "EINVAL")
+QDEF(MP_QSTR_EIO, 42630, 3, "EIO")
+QDEF(MP_QSTR_EISDIR, 20389, 6, "EISDIR")
+QDEF(MP_QSTR_ENOBUFS, 34787, 7, "ENOBUFS")
+QDEF(MP_QSTR_ENODEV, 26550, 6, "ENODEV")
+QDEF(MP_QSTR_ENOENT, 25950, 6, "ENOENT")
+QDEF(MP_QSTR_ENOMEM, 34212, 6, "ENOMEM")
+QDEF(MP_QSTR_ENOTCONN, 55161, 8, "ENOTCONN")
+QDEF(MP_QSTR_EOPNOTSUPP, 38828, 10, "EOPNOTSUPP")
+QDEF(MP_QSTR_EPERM, 32746, 5, "EPERM")
+QDEF(MP_QSTR_ESP8266, 55433, 7, "ESP8266")
+QDEF(MP_QSTR_ETIMEDOUT, 63743, 9, "ETIMEDOUT")
+QDEF(MP_QSTR_FLOAT32, 34740, 7, "FLOAT32")
+QDEF(MP_QSTR_FLOAT64, 34583, 7, "FLOAT64")
+QDEF(MP_QSTR_FileIO, 5573, 6, "FileIO")
+QDEF(MP_QSTR_FrameBuffer, 48856, 11, "FrameBuffer")
+QDEF(MP_QSTR_FrameBuffer1, 39401, 12, "FrameBuffer1")
+QDEF(MP_QSTR_GS2_HMSB, 49960, 8, "GS2_HMSB")
+QDEF(MP_QSTR_GS4_HMSB, 29550, 8, "GS4_HMSB")
+QDEF(MP_QSTR_GS8, 49321, 3, "GS8")
+QDEF(MP_QSTR_IN, 29474, 2, "IN")
+QDEF(MP_QSTR_INT, 55094, 3, "INT")
+QDEF(MP_QSTR_INT16, 30353, 5, "INT16")
+QDEF(MP_QSTR_INT32, 30295, 5, "INT32")
+QDEF(MP_QSTR_INT64, 30196, 5, "INT64")
+QDEF(MP_QSTR_INT8, 48590, 4, "INT8")
+QDEF(MP_QSTR_IN_PULLDOWN, 47946, 11, "IN_PULLDOWN")
+QDEF(MP_QSTR_IN_PULLUP, 55837, 9, "IN_PULLUP")
+QDEF(MP_QSTR_IOBase, 48694, 6, "IOBase")
+QDEF(MP_QSTR_IRQ_FALLING, 49207, 11, "IRQ_FALLING")
+QDEF(MP_QSTR_IRQ_RISING, 60792, 10, "IRQ_RISING")
+QDEF(MP_QSTR_KEY1, 4963, 4, "KEY1")
+QDEF(MP_QSTR_KEY2, 4960, 4, "KEY2")
+QDEF(MP_QSTR_LED, 56456, 3, "LED")
+QDEF(MP_QSTR_LITTLE_ENDIAN, 23487, 13, "LITTLE_ENDIAN")
+QDEF(MP_QSTR_LONG, 25871, 4, "LONG")
+QDEF(MP_QSTR_LONGLONG, 54405, 8, "LONGLONG")
+QDEF(MP_QSTR_LSB, 57048, 3, "LSB")
+QDEF(MP_QSTR_LockType, 8246, 8, "LockType")
+QDEF(MP_QSTR_MONO_HLSB, 38988, 9, "MONO_HLSB")
+QDEF(MP_QSTR_MONO_HMSB, 33741, 9, "MONO_HMSB")
+QDEF(MP_QSTR_MONO_VLSB, 64530, 9, "MONO_VLSB")
+QDEF(MP_QSTR_MSB, 51801, 3, "MSB")
+QDEF(MP_QSTR_MVLSB, 5123, 5, "MVLSB")
+QDEF(MP_QSTR_NATIVE, 36356, 6, "NATIVE")
+QDEF(MP_QSTR_NotImplemented, 50750, 14, "NotImplemented")
+QDEF(MP_QSTR_ONE_SHOT, 65374, 8, "ONE_SHOT")
+QDEF(MP_QSTR_OPEN_DRAIN, 18526, 10, "OPEN_DRAIN")
+QDEF(MP_QSTR_OUT, 58123, 3, "OUT")
+QDEF(MP_QSTR_OrderedDict, 32496, 11, "OrderedDict")
+QDEF(MP_QSTR_PERIODIC, 13578, 8, "PERIODIC")
+QDEF(MP_QSTR_POLLERR, 49375, 7, "POLLERR")
+QDEF(MP_QSTR_POLLHUP, 35447, 7, "POLLHUP")
+QDEF(MP_QSTR_POLLIN, 24957, 6, "POLLIN")
+QDEF(MP_QSTR_POLLOUT, 34164, 7, "POLLOUT")
+QDEF(MP_QSTR_PTR, 3251, 3, "PTR")
+QDEF(MP_QSTR_Pin, 5138, 3, "Pin")
+QDEF(MP_QSTR_PinBase, 17223, 7, "PinBase")
+QDEF(MP_QSTR_RGB565, 52324, 6, "RGB565")
+QDEF(MP_QSTR_SHORT, 7159, 5, "SHORT")
+QDEF(MP_QSTR_SOCK_DGRAM, 5299, 10, "SOCK_DGRAM")
+QDEF(MP_QSTR_SOCK_RAW, 38602, 8, "SOCK_RAW")
+QDEF(MP_QSTR_SOCK_STREAM, 48690, 11, "SOCK_STREAM")
+QDEF(MP_QSTR_SOL_SOCKET, 57103, 10, "SOL_SOCKET")
+QDEF(MP_QSTR_SO_KEEPALIVE, 41770, 12, "SO_KEEPALIVE")
+QDEF(MP_QSTR_SO_RCVTIMEO, 10459, 11, "SO_RCVTIMEO")
+QDEF(MP_QSTR_SO_REUSEADDR, 21281, 12, "SO_REUSEADDR")
+QDEF(MP_QSTR_SO_SNDTIMEO, 65317, 11, "SO_SNDTIMEO")
+QDEF(MP_QSTR_SPI, 4591, 3, "SPI")
+QDEF(MP_QSTR_STA_IF, 7091, 6, "STA_IF")
+QDEF(MP_QSTR_Signal, 58523, 6, "Signal")
+QDEF(MP_QSTR_SoftI2C, 61971, 7, "SoftI2C")
+QDEF(MP_QSTR_SoftSPI, 22561, 7, "SoftSPI")
+QDEF(MP_QSTR_StopAsyncIteration, 61676, 18, "StopAsyncIteration")
+QDEF(MP_QSTR_StringIO, 30326, 8, "StringIO")
+QDEF(MP_QSTR_Task, 16904, 4, "Task")
+QDEF(MP_QSTR_TaskQueue, 23705, 9, "TaskQueue")
+QDEF(MP_QSTR_TextIOWrapper, 36269, 13, "TextIOWrapper")
+QDEF(MP_QSTR_Timer, 8098, 5, "Timer")
+QDEF(MP_QSTR_UART, 6583, 4, "UART")
+QDEF(MP_QSTR_UINT, 15651, 4, "UINT")
+QDEF(MP_QSTR_UINT16, 6084, 6, "UINT16")
+QDEF(MP_QSTR_UINT32, 6018, 6, "UINT32")
+QDEF(MP_QSTR_UINT64, 6241, 6, "UINT64")
+QDEF(MP_QSTR_UINT8, 57787, 5, "UINT8")
+QDEF(MP_QSTR_ULONG, 36218, 5, "ULONG")
+QDEF(MP_QSTR_ULONGLONG, 50800, 9, "ULONGLONG")
+QDEF(MP_QSTR_USHORT, 62626, 6, "USHORT")
+QDEF(MP_QSTR_UnicodeError, 53538, 12, "UnicodeError")
+QDEF(MP_QSTR_VOID, 62001, 4, "VOID")
+QDEF(MP_QSTR_VfsTos, 55502, 6, "VfsTos")
+QDEF(MP_QSTR__machine, 19391, 8, "_machine")
+QDEF(MP_QSTR__task_queue, 50649, 11, "_task_queue")
+QDEF(MP_QSTR__thread, 724, 7, "_thread")
+QDEF(MP_QSTR__uasyncio, 24527, 9, "_uasyncio")
+QDEF(MP_QSTR_a2b_base64, 2876, 10, "a2b_base64")
+QDEF(MP_QSTR_abs_tol, 28029, 7, "abs_tol")
+QDEF(MP_QSTR_accept, 35205, 6, "accept")
+QDEF(MP_QSTR_acos, 40987, 4, "acos")
+QDEF(MP_QSTR_acquire, 54045, 7, "acquire")
+QDEF(MP_QSTR_add, 12868, 3, "add")
+QDEF(MP_QSTR_addr, 31414, 4, "addr")
+QDEF(MP_QSTR_addressof, 63834, 9, "addressof")
+QDEF(MP_QSTR_addrsize, 37267, 8, "addrsize")
+QDEF(MP_QSTR_alloc_emergency_exception_buf, 10872, 29, "alloc_emergency_exception_buf")
+QDEF(MP_QSTR_allocate_lock, 60908, 13, "allocate_lock")
+QDEF(MP_QSTR_arg, 13457, 3, "arg")
+QDEF(MP_QSTR_argv, 50887, 4, "argv")
+QDEF(MP_QSTR_array, 29308, 5, "array")
+QDEF(MP_QSTR_asin, 58704, 4, "asin")
+QDEF(MP_QSTR_atan, 48671, 4, "atan")
+QDEF(MP_QSTR_atan2, 33229, 5, "atan2")
+QDEF(MP_QSTR_b2a_base64, 36668, 10, "b2a_base64")
+QDEF(MP_QSTR_baudrate, 55541, 8, "baudrate")
+QDEF(MP_QSTR_bin, 18656, 3, "bin")
+QDEF(MP_QSTR_bind, 25732, 4, "bind")
+QDEF(MP_QSTR_bits, 26697, 4, "bits")
+QDEF(MP_QSTR_blit, 20726, 4, "blit")
+QDEF(MP_QSTR_bound_method, 41623, 12, "bound_method")
+QDEF(MP_QSTR_buffer, 41189, 6, "buffer")
+QDEF(MP_QSTR_buffering, 56101, 9, "buffering")
+QDEF(MP_QSTR_bytearray_at, 23708, 12, "bytearray_at")
+QDEF(MP_QSTR_byteorder, 39265, 9, "byteorder")
+QDEF(MP_QSTR_bytes_at, 23990, 8, "bytes_at")
+QDEF(MP_QSTR_calcsize, 14413, 8, "calcsize")
+QDEF(MP_QSTR_callback, 61516, 8, "callback")
+QDEF(MP_QSTR_cancel, 34563, 6, "cancel")
+QDEF(MP_QSTR_ceil, 45062, 4, "ceil")
+QDEF(MP_QSTR_center, 48974, 6, "center")
+QDEF(MP_QSTR_chdir, 45745, 5, "chdir")
+QDEF(MP_QSTR_choice, 13102, 6, "choice")
+QDEF(MP_QSTR_closure, 51828, 7, "closure")
+QDEF(MP_QSTR_cmath, 62646, 5, "cmath")
+QDEF(MP_QSTR_code, 55912, 4, "code")
+QDEF(MP_QSTR_collect, 26011, 7, "collect")
+QDEF(MP_QSTR_compile, 51700, 7, "compile")
+QDEF(MP_QSTR_complex, 40389, 7, "complex")
+QDEF(MP_QSTR_connect, 15835, 7, "connect")
+QDEF(MP_QSTR_copysign, 5171, 8, "copysign")
+QDEF(MP_QSTR_coro, 56244, 4, "coro")
+QDEF(MP_QSTR_cos, 19578, 3, "cos")
+QDEF(MP_QSTR_crc32, 59510, 5, "crc32")
+QDEF(MP_QSTR_cur_task, 11763, 8, "cur_task")
+QDEF(MP_QSTR_data, 56341, 4, "data")
+QDEF(MP_QSTR_decode, 22953, 6, "decode")
+QDEF(MP_QSTR_decompress, 64354, 10, "decompress")
+QDEF(MP_QSTR_default, 32206, 7, "default")
+QDEF(MP_QSTR_degrees, 16642, 7, "degrees")
+QDEF(MP_QSTR_deinit, 36254, 6, "deinit")
+QDEF(MP_QSTR_delattr, 51419, 7, "delattr")
+QDEF(MP_QSTR_deleter, 56174, 7, "deleter")
+QDEF(MP_QSTR_deque, 39173, 5, "deque")
+QDEF(MP_QSTR_dict_view, 43309, 9, "dict_view")
+QDEF(MP_QSTR_difference, 9330, 10, "difference")
+QDEF(MP_QSTR_difference_update, 64156, 17, "difference_update")
+QDEF(MP_QSTR_digest, 50381, 6, "digest")
+QDEF(MP_QSTR_disable, 30353, 7, "disable")
+QDEF(MP_QSTR_discard, 28943, 7, "discard")
+QDEF(MP_QSTR_doc, 7981, 3, "doc")
+QDEF(MP_QSTR_done, 837, 4, "done")
+QDEF(MP_QSTR_dump, 12265, 4, "dump")
+QDEF(MP_QSTR_dumps, 11642, 5, "dumps")
+QDEF(MP_QSTR_e, 46528, 1, "e")
+QDEF(MP_QSTR_enable, 56836, 6, "enable")
+QDEF(MP_QSTR_encode, 51779, 6, "encode")
+QDEF(MP_QSTR_encoding, 39942, 8, "encoding")
+QDEF(MP_QSTR_enumerate, 47729, 9, "enumerate")
+QDEF(MP_QSTR_errno, 4545, 5, "errno")
+QDEF(MP_QSTR_errorcode, 56592, 9, "errorcode")
+QDEF(MP_QSTR_execfile, 10328, 8, "execfile")
+QDEF(MP_QSTR_exit, 48773, 4, "exit")
+QDEF(MP_QSTR_exp, 9416, 3, "exp")
+QDEF(MP_QSTR_fabs, 4755, 4, "fabs")
+QDEF(MP_QSTR_factorial, 13004, 9, "factorial")
+QDEF(MP_QSTR_file, 13507, 4, "file")
+QDEF(MP_QSTR_fileno, 30338, 6, "fileno")
+QDEF(MP_QSTR_fill, 13514, 4, "fill")
+QDEF(MP_QSTR_fill_rect, 60725, 9, "fill_rect")
+QDEF(MP_QSTR_filter, 48677, 6, "filter")
+QDEF(MP_QSTR_firstbit, 14624, 8, "firstbit")
+QDEF(MP_QSTR_float, 17461, 5, "float")
+QDEF(MP_QSTR_floor, 18045, 5, "floor")
+QDEF(MP_QSTR_flush, 49505, 5, "flush")
+QDEF(MP_QSTR_fmod, 17637, 4, "fmod")
+QDEF(MP_QSTR_framebuf, 33385, 8, "framebuf")
+QDEF(MP_QSTR_freq, 15077, 4, "freq")
+QDEF(MP_QSTR_frexp, 38940, 5, "frexp")
+QDEF(MP_QSTR_fromkeys, 48439, 8, "fromkeys")
+QDEF(MP_QSTR_frozenset, 40173, 9, "frozenset")
+QDEF(MP_QSTR_function, 551, 8, "function")
+QDEF(MP_QSTR_gc, 28257, 2, "gc")
+QDEF(MP_QSTR_generator, 50070, 9, "generator")
+QDEF(MP_QSTR_get_ident, 45566, 9, "get_ident")
+QDEF(MP_QSTR_getaddrinfo, 6254, 11, "getaddrinfo")
+QDEF(MP_QSTR_getcwd, 53251, 6, "getcwd")
+QDEF(MP_QSTR_getrandbits, 32102, 11, "getrandbits")
+QDEF(MP_QSTR_getter, 45712, 6, "getter")
+QDEF(MP_QSTR_getvalue, 44152, 8, "getvalue")
+QDEF(MP_QSTR_group, 45242, 5, "group")
+QDEF(MP_QSTR_handler, 24029, 7, "handler")
+QDEF(MP_QSTR_heap_lock, 36013, 9, "heap_lock")
+QDEF(MP_QSTR_heap_unlock, 11606, 11, "heap_unlock")
+QDEF(MP_QSTR_heapify, 11695, 7, "heapify")
+QDEF(MP_QSTR_heappop, 10198, 7, "heappop")
+QDEF(MP_QSTR_heappush, 27527, 8, "heappush")
+QDEF(MP_QSTR_help, 23700, 4, "help")
+QDEF(MP_QSTR_hex, 20592, 3, "hex")
+QDEF(MP_QSTR_hexlify, 32554, 7, "hexlify")
+QDEF(MP_QSTR_hline, 15491, 5, "hline")
+QDEF(MP_QSTR_ilistdir, 27249, 8, "ilistdir")
+QDEF(MP_QSTR_imag, 46919, 4, "imag")
+QDEF(MP_QSTR_implementation, 11543, 14, "implementation")
+QDEF(MP_QSTR_indices, 18522, 7, "indices")
+QDEF(MP_QSTR_inf, 21252, 3, "inf")
+QDEF(MP_QSTR_init, 46111, 4, "init")
+QDEF(MP_QSTR_input, 23155, 5, "input")
+QDEF(MP_QSTR_intersection, 10792, 12, "intersection")
+QDEF(MP_QSTR_intersection_update, 56582, 19, "intersection_update")
+QDEF(MP_QSTR_invert, 183, 6, "invert")
+QDEF(MP_QSTR_ioctl, 49784, 5, "ioctl")
+QDEF(MP_QSTR_ipoll, 23891, 5, "ipoll")
+QDEF(MP_QSTR_irq, 22159, 3, "irq")
+QDEF(MP_QSTR_isclose, 20041, 7, "isclose")
+QDEF(MP_QSTR_isdisjoint, 26871, 10, "isdisjoint")
+QDEF(MP_QSTR_isenabled, 58778, 9, "isenabled")
+QDEF(MP_QSTR_isfinite, 43942, 8, "isfinite")
+QDEF(MP_QSTR_isinf, 4414, 5, "isinf")
+QDEF(MP_QSTR_isnan, 926, 5, "isnan")
+QDEF(MP_QSTR_issubset, 49593, 8, "issubset")
+QDEF(MP_QSTR_issuperset, 60668, 10, "issuperset")
+QDEF(MP_QSTR_iterable, 37413, 8, "iterable")
+QDEF(MP_QSTR_iterator, 48711, 8, "iterator")
+QDEF(MP_QSTR_kbd_intr, 5110, 8, "kbd_intr")
+QDEF(MP_QSTR_keepends, 35682, 8, "keepends")
+QDEF(MP_QSTR_ldexp, 28480, 5, "ldexp")
+QDEF(MP_QSTR_line, 7371, 4, "line")
+QDEF(MP_QSTR_listdir, 58264, 7, "listdir")
+QDEF(MP_QSTR_listen, 3788, 6, "listen")
+QDEF(MP_QSTR_load, 9315, 4, "load")
+QDEF(MP_QSTR_loads, 45232, 5, "loads")
+QDEF(MP_QSTR_lock, 9134, 4, "lock")
+QDEF(MP_QSTR_locked, 47631, 6, "locked")
+QDEF(MP_QSTR_log, 16161, 3, "log")
+QDEF(MP_QSTR_machine, 43872, 7, "machine")
+QDEF(MP_QSTR_makefile, 54721, 8, "makefile")
+QDEF(MP_QSTR_match, 8854, 5, "match")
+QDEF(MP_QSTR_math, 47925, 4, "math")
+QDEF(MP_QSTR_max, 17329, 3, "max")
+QDEF(MP_QSTR_maxsize, 28884, 7, "maxsize")
+QDEF(MP_QSTR_mem, 17440, 3, "mem")
+QDEF(MP_QSTR_mem16, 51719, 5, "mem16")
+QDEF(MP_QSTR_mem32, 51777, 5, "mem32")
+QDEF(MP_QSTR_mem8, 51224, 4, "mem8")
+QDEF(MP_QSTR_mem_alloc, 11090, 9, "mem_alloc")
+QDEF(MP_QSTR_mem_free, 25291, 8, "mem_free")
+QDEF(MP_QSTR_mem_info, 61905, 8, "mem_info")
+QDEF(MP_QSTR_memaddr, 59539, 7, "memaddr")
+QDEF(MP_QSTR_memoryview, 17513, 10, "memoryview")
+QDEF(MP_QSTR_min, 17071, 3, "min")
+QDEF(MP_QSTR_miso, 39069, 4, "miso")
+QDEF(MP_QSTR_mkdir, 46492, 5, "mkdir")
+QDEF(MP_QSTR_mkfs, 45174, 4, "mkfs")
+QDEF(MP_QSTR_mode, 49190, 4, "mode")
+QDEF(MP_QSTR_modf, 49189, 4, "modf")
+QDEF(MP_QSTR_modify, 26357, 6, "modify")
+QDEF(MP_QSTR_module, 39359, 6, "module")
+QDEF(MP_QSTR_modules, 53740, 7, "modules")
+QDEF(MP_QSTR_mosi, 49693, 4, "mosi")
+QDEF(MP_QSTR_mount, 3496, 5, "mount")
+QDEF(MP_QSTR_name, 30114, 4, "name")
+QDEF(MP_QSTR_namedtuple, 5662, 10, "namedtuple")
+QDEF(MP_QSTR_nan, 22756, 3, "nan")
+QDEF(MP_QSTR_network, 10331, 7, "network")
+QDEF(MP_QSTR_newline, 35127, 7, "newline")
+QDEF(MP_QSTR_nodename, 43874, 8, "nodename")
+QDEF(MP_QSTR_oct, 23805, 3, "oct")
+QDEF(MP_QSTR_off, 23690, 3, "off")
+QDEF(MP_QSTR_on, 28516, 2, "on")
+QDEF(MP_QSTR_opt_level, 26503, 9, "opt_level")
+QDEF(MP_QSTR_pack, 53692, 4, "pack")
+QDEF(MP_QSTR_pack_into, 43295, 9, "pack_into")
+QDEF(MP_QSTR_partition, 58759, 9, "partition")
+QDEF(MP_QSTR_path, 52872, 4, "path")
+QDEF(MP_QSTR_peek, 49534, 4, "peek")
+QDEF(MP_QSTR_pend_throw, 29939, 10, "pend_throw")
+QDEF(MP_QSTR_period, 41120, 6, "period")
+QDEF(MP_QSTR_ph_key, 6901, 6, "ph_key")
+QDEF(MP_QSTR_phase, 54634, 5, "phase")
+QDEF(MP_QSTR_pi, 28700, 2, "pi")
+QDEF(MP_QSTR_pixel, 61517, 5, "pixel")
+QDEF(MP_QSTR_platform, 6458, 8, "platform")
+QDEF(MP_QSTR_polar, 3077, 5, "polar")
+QDEF(MP_QSTR_polarity, 60737, 8, "polarity")
+QDEF(MP_QSTR_poll, 55706, 4, "poll")
+QDEF(MP_QSTR_popleft, 39537, 7, "popleft")
+QDEF(MP_QSTR_print_exception, 8732, 15, "print_exception")
+QDEF(MP_QSTR_property, 10690, 8, "property")
+QDEF(MP_QSTR_ps1, 28919, 3, "ps1")
+QDEF(MP_QSTR_ps2, 28916, 3, "ps2")
+QDEF(MP_QSTR_push, 32443, 4, "push")
+QDEF(MP_QSTR_pwd, 28710, 3, "pwd")
+QDEF(MP_QSTR_qstr_info, 33200, 9, "qstr_info")
+QDEF(MP_QSTR_r, 46551, 1, "r")
+QDEF(MP_QSTR_radians, 16263, 7, "radians")
+QDEF(MP_QSTR_randint, 56495, 7, "randint")
+QDEF(MP_QSTR_random, 11454, 6, "random")
+QDEF(MP_QSTR_randrange, 16035, 9, "randrange")
+QDEF(MP_QSTR_rb, 28885, 2, "rb")
+QDEF(MP_QSTR_readblocks, 7213, 10, "readblocks")
+QDEF(MP_QSTR_readfrom, 45377, 8, "readfrom")
+QDEF(MP_QSTR_readfrom_into, 16258, 13, "readfrom_into")
+QDEF(MP_QSTR_readfrom_mem, 25915, 12, "readfrom_mem")
+QDEF(MP_QSTR_readfrom_mem_into, 36408, 17, "readfrom_mem_into")
+QDEF(MP_QSTR_readlines, 22890, 9, "readlines")
+QDEF(MP_QSTR_readonly, 35075, 8, "readonly")
+QDEF(MP_QSTR_real, 63935, 4, "real")
+QDEF(MP_QSTR_rect, 63973, 4, "rect")
+QDEF(MP_QSTR_recv, 63975, 4, "recv")
+QDEF(MP_QSTR_recvfrom, 37009, 8, "recvfrom")
+QDEF(MP_QSTR_register, 41388, 8, "register")
+QDEF(MP_QSTR_rel_tol, 18006, 7, "rel_tol")
+QDEF(MP_QSTR_release, 36844, 7, "release")
+QDEF(MP_QSTR_rename, 6197, 6, "rename")
+QDEF(MP_QSTR_reversed, 28321, 8, "reversed")
+QDEF(MP_QSTR_rmdir, 42821, 5, "rmdir")
+QDEF(MP_QSTR_route, 10300, 5, "route")
+QDEF(MP_QSTR_rpartition, 53269, 10, "rpartition")
+QDEF(MP_QSTR_rxbuf, 26494, 5, "rxbuf")
+QDEF(MP_QSTR_scan, 36378, 4, "scan")
+QDEF(MP_QSTR_schedule, 44256, 8, "schedule")
+QDEF(MP_QSTR_sck, 36862, 3, "sck")
+QDEF(MP_QSTR_scl, 36857, 3, "scl")
+QDEF(MP_QSTR_scroll, 23080, 6, "scroll")
+QDEF(MP_QSTR_sda, 36691, 3, "sda")
+QDEF(MP_QSTR_search, 49579, 6, "search")
+QDEF(MP_QSTR_seed, 30098, 4, "seed")
+QDEF(MP_QSTR_seek, 30109, 4, "seek")
+QDEF(MP_QSTR_select, 16781, 6, "select")
+QDEF(MP_QSTR_sendall, 40760, 7, "sendall")
+QDEF(MP_QSTR_sendto, 802, 6, "sendto")
+QDEF(MP_QSTR_separators, 3307, 10, "separators")
+QDEF(MP_QSTR_setblocking, 6254, 11, "setblocking")
+QDEF(MP_QSTR_setsockopt, 59448, 10, "setsockopt")
+QDEF(MP_QSTR_setter, 22788, 6, "setter")
+QDEF(MP_QSTR_settimeout, 35548, 10, "settimeout")
+QDEF(MP_QSTR_sha256, 302, 6, "sha256")
+QDEF(MP_QSTR_sin, 37041, 3, "sin")
+QDEF(MP_QSTR_single, 8255, 6, "single")
+QDEF(MP_QSTR_sizeof, 29513, 6, "sizeof")
+QDEF(MP_QSTR_sleep, 10218, 5, "sleep")
+QDEF(MP_QSTR_sleep_ms, 25355, 8, "sleep_ms")
+QDEF(MP_QSTR_slice, 62645, 5, "slice")
+QDEF(MP_QSTR_socket, 52320, 6, "socket")
+QDEF(MP_QSTR_soft_reset, 26081, 10, "soft_reset")
+QDEF(MP_QSTR_splitlines, 54122, 10, "splitlines")
+QDEF(MP_QSTR_sqrt, 17441, 4, "sqrt")
+QDEF(MP_QSTR_ssid, 19208, 4, "ssid")
+QDEF(MP_QSTR_stack_size, 15153, 10, "stack_size")
+QDEF(MP_QSTR_stack_use, 63383, 9, "stack_use")
+QDEF(MP_QSTR_start_new_thread, 9687, 16, "start_new_thread")
+QDEF(MP_QSTR_stat, 13783, 4, "stat")
+QDEF(MP_QSTR_state, 61650, 5, "state")
+QDEF(MP_QSTR_statvfs, 6420, 7, "statvfs")
+QDEF(MP_QSTR_stderr, 22691, 6, "stderr")
+QDEF(MP_QSTR_stdin, 1057, 5, "stdin")
+QDEF(MP_QSTR_stdout, 33544, 6, "stdout")
+QDEF(MP_QSTR_struct, 36882, 6, "struct")
+QDEF(MP_QSTR_sub, 36129, 3, "sub")
+QDEF(MP_QSTR_symmetric_difference, 26574, 20, "symmetric_difference")
+QDEF(MP_QSTR_symmetric_difference_update, 63584, 27, "symmetric_difference_update")
+QDEF(MP_QSTR_sync, 25250, 4, "sync")
+QDEF(MP_QSTR_sys, 36540, 3, "sys")
+QDEF(MP_QSTR_sysname, 13979, 7, "sysname")
+QDEF(MP_QSTR_tan, 25086, 3, "tan")
+QDEF(MP_QSTR_tau, 25061, 3, "tau")
+QDEF(MP_QSTR_tell, 45332, 4, "tell")
+QDEF(MP_QSTR_text, 44952, 4, "text")
+QDEF(MP_QSTR_threshold, 12274, 9, "threshold")
+QDEF(MP_QSTR_tick_hz, 56189, 7, "tick_hz")
+QDEF(MP_QSTR_ticks_add, 44701, 9, "ticks_add")
+QDEF(MP_QSTR_ticks_cpu, 42266, 9, "ticks_cpu")
+QDEF(MP_QSTR_ticks_diff, 57521, 10, "ticks_diff")
+QDEF(MP_QSTR_ticks_ms, 12866, 8, "ticks_ms")
+QDEF(MP_QSTR_timeout, 21566, 7, "timeout")
+QDEF(MP_QSTR_timeout_char, 19065, 12, "timeout_char")
+QDEF(MP_QSTR_trigger, 35997, 7, "trigger")
+QDEF(MP_QSTR_trunc, 39259, 5, "trunc")
+QDEF(MP_QSTR_uarray, 34441, 6, "uarray")
+QDEF(MP_QSTR_ubinascii, 35012, 9, "ubinascii")
+QDEF(MP_QSTR_ucollections, 39445, 12, "ucollections")
+QDEF(MP_QSTR_uctypes, 29176, 7, "uctypes")
+QDEF(MP_QSTR_uerrno, 59828, 6, "uerrno")
+QDEF(MP_QSTR_uhashlib, 40293, 8, "uhashlib")
+QDEF(MP_QSTR_uheapq, 17181, 6, "uheapq")
+QDEF(MP_QSTR_uio, 26294, 3, "uio")
+QDEF(MP_QSTR_ujson, 12520, 5, "ujson")
+QDEF(MP_QSTR_umachine, 32661, 8, "umachine")
+QDEF(MP_QSTR_umount, 40669, 6, "umount")
+QDEF(MP_QSTR_uname, 40119, 5, "uname")
+QDEF(MP_QSTR_unhexlify, 47537, 9, "unhexlify")
+QDEF(MP_QSTR_uniform, 62721, 7, "uniform")
+QDEF(MP_QSTR_union, 31990, 5, "union")
+QDEF(MP_QSTR_unlink, 36862, 6, "unlink")
+QDEF(MP_QSTR_unpack, 15367, 6, "unpack")
+QDEF(MP_QSTR_unpack_from, 27918, 11, "unpack_from")
+QDEF(MP_QSTR_unregister, 54295, 10, "unregister")
+QDEF(MP_QSTR_uos, 26604, 3, "uos")
+QDEF(MP_QSTR_urandom, 44715, 7, "urandom")
+QDEF(MP_QSTR_ure, 25479, 3, "ure")
+QDEF(MP_QSTR_uselect, 36440, 7, "uselect")
+QDEF(MP_QSTR_usocket, 117, 7, "usocket")
+QDEF(MP_QSTR_ustruct, 2119, 7, "ustruct")
+QDEF(MP_QSTR_usys, 62409, 4, "usys")
+QDEF(MP_QSTR_utime, 40421, 5, "utime")
+QDEF(MP_QSTR_uzlib, 39789, 5, "uzlib")
+QDEF(MP_QSTR_version, 54207, 7, "version")
+QDEF(MP_QSTR_version_info, 2670, 12, "version_info")
+QDEF(MP_QSTR_vline, 63005, 5, "vline")
+QDEF(MP_QSTR_write_readinto, 33929, 14, "write_readinto")
+QDEF(MP_QSTR_writeblocks, 57090, 11, "writeblocks")
+QDEF(MP_QSTR_writeto, 14595, 7, "writeto")
+QDEF(MP_QSTR_writeto_mem, 60793, 11, "writeto_mem")
+QDEF(MP_QSTR_writevto, 30069, 8, "writevto")

board/BearPi_STM32L431RC/KEIL/micropython_extra_demo/startup_stm32l431xx.s

@@ -0,0 +1,404 @@
+;********************** COPYRIGHT(c) 2017  STMicroelectronics ******************
+;* File Name          : startup_stm32l431xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x100
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x100
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler                   ; ADC1
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP_IRQHandler                   ; COMP Interrupt
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
+                DCD     0                                 ; Reserved
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
+                DCD     QUADSPI_IRQHandler                ; Quad SPI global interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     0                                 ; Reserved
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
+                DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     CRS_IRQHandler                    ; CRS interrupt
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     TAMP_STAMP_IRQHandler             [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_IRQHandler                   [WEAK]
+        EXPORT     CAN1_TX_IRQHandler                [WEAK]
+        EXPORT     CAN1_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN1_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN1_SCE_IRQHandler               [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_IRQHandler                   [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     COMP_IRQHandler                   [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SWPMI1_IRQHandler                 [WEAK]
+        EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+CAN1_TX_IRQHandler
+CAN1_RX0_IRQHandler
+CAN1_RX1_IRQHandler
+CAN1_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+SDMMC1_IRQHandler
+SPI3_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+LPUART1_IRQHandler
+QUADSPI_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+SAI1_IRQHandler
+SWPMI1_IRQHandler
+TSC_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+CRS_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/BearPi_STM32L431RC/KEIL/qcloud_csdk_iot_explorer/startup_stm32l431xx.s

@@ -0,0 +1,404 @@
+;********************** COPYRIGHT(c) 2017  STMicroelectronics ******************
+;* File Name          : startup_stm32l431xx.s
+;* Author             : MCD Application Team
+;* Description        : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the Cortex-M4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>
+;*******************************************************************************
+;*
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;*
+;*******************************************************************************
+;
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size		EQU     0x100
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size      EQU     0x100
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog
+                DCD     PVD_PVM_IRQHandler                ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
+                DCD     FLASH_IRQHandler                  ; FLASH
+                DCD     RCC_IRQHandler                    ; RCC
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4
+                DCD     DMA1_Channel1_IRQHandler          ; DMA1 Channel 1
+                DCD     DMA1_Channel2_IRQHandler          ; DMA1 Channel 2
+                DCD     DMA1_Channel3_IRQHandler          ; DMA1 Channel 3
+                DCD     DMA1_Channel4_IRQHandler          ; DMA1 Channel 4
+                DCD     DMA1_Channel5_IRQHandler          ; DMA1 Channel 5
+                DCD     DMA1_Channel6_IRQHandler          ; DMA1 Channel 6
+                DCD     DMA1_Channel7_IRQHandler          ; DMA1 Channel 7
+                DCD     ADC1_IRQHandler                   ; ADC1
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
+                DCD     TIM1_BRK_TIM15_IRQHandler         ; TIM1 Break and TIM15
+                DCD     TIM1_UP_TIM16_IRQHandler          ; TIM1 Update and TIM16
+                DCD     TIM1_TRG_COM_IRQHandler           ; TIM1 Trigger and Commutation
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
+                DCD     TIM2_IRQHandler                   ; TIM2
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error
+                DCD     SPI1_IRQHandler                   ; SPI1
+                DCD     SPI2_IRQHandler                   ; SPI2
+                DCD     USART1_IRQHandler                 ; USART1
+                DCD     USART2_IRQHandler                 ; USART2
+                DCD     USART3_IRQHandler                 ; USART3
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SDMMC1_IRQHandler                 ; SDMMC1
+                DCD     0                                 ; Reserved
+                DCD     SPI3_IRQHandler                   ; SPI3
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
+                DCD     TIM7_IRQHandler                   ; TIM7
+                DCD     DMA2_Channel1_IRQHandler          ; DMA2 Channel 1
+                DCD     DMA2_Channel2_IRQHandler          ; DMA2 Channel 2
+                DCD     DMA2_Channel3_IRQHandler          ; DMA2 Channel 3
+                DCD     DMA2_Channel4_IRQHandler          ; DMA2 Channel 4
+                DCD     DMA2_Channel5_IRQHandler          ; DMA2 Channel 5
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     COMP_IRQHandler                   ; COMP Interrupt
+                DCD     LPTIM1_IRQHandler                 ; LP TIM1 interrupt
+                DCD     LPTIM2_IRQHandler                 ; LP TIM2 interrupt
+                DCD     0                                 ; Reserved
+                DCD     DMA2_Channel6_IRQHandler          ; DMA2 Channel 6
+                DCD     DMA2_Channel7_IRQHandler          ; DMA2 Channel 7
+                DCD     LPUART1_IRQHandler                 ; LP UART1 interrupt
+                DCD     QUADSPI_IRQHandler                ; Quad SPI global interrupt
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error
+                DCD     SAI1_IRQHandler                   ; Serial Audio Interface 1 global interrupt
+                DCD     0                                 ; Reserved
+                DCD     SWPMI1_IRQHandler                 ; Serial Wire Interface 1 global interrupt
+                DCD     TSC_IRQHandler                    ; Touch Sense Controller global interrupt
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     RNG_IRQHandler                    ; RNG global interrupt
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     CRS_IRQHandler                    ; CRS interrupt
+
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+        EXPORT     WWDG_IRQHandler                   [WEAK]
+        EXPORT     PVD_PVM_IRQHandler                [WEAK]
+        EXPORT     TAMP_STAMP_IRQHandler             [WEAK]
+        EXPORT     RTC_WKUP_IRQHandler               [WEAK]
+        EXPORT     FLASH_IRQHandler                  [WEAK]
+        EXPORT     RCC_IRQHandler                    [WEAK]
+        EXPORT     EXTI0_IRQHandler                  [WEAK]
+        EXPORT     EXTI1_IRQHandler                  [WEAK]
+        EXPORT     EXTI2_IRQHandler                  [WEAK]
+        EXPORT     EXTI3_IRQHandler                  [WEAK]
+        EXPORT     EXTI4_IRQHandler                  [WEAK]
+        EXPORT     DMA1_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel5_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA1_Channel7_IRQHandler          [WEAK]
+        EXPORT     ADC1_IRQHandler                   [WEAK]
+        EXPORT     CAN1_TX_IRQHandler                [WEAK]
+        EXPORT     CAN1_RX0_IRQHandler               [WEAK]
+        EXPORT     CAN1_RX1_IRQHandler               [WEAK]
+        EXPORT     CAN1_SCE_IRQHandler               [WEAK]
+        EXPORT     EXTI9_5_IRQHandler                [WEAK]
+        EXPORT     TIM1_BRK_TIM15_IRQHandler         [WEAK]
+        EXPORT     TIM1_UP_TIM16_IRQHandler          [WEAK]
+        EXPORT     TIM1_TRG_COM_IRQHandler           [WEAK]
+        EXPORT     TIM1_CC_IRQHandler                [WEAK]
+        EXPORT     TIM2_IRQHandler                   [WEAK]
+        EXPORT     I2C1_EV_IRQHandler                [WEAK]
+        EXPORT     I2C1_ER_IRQHandler                [WEAK]
+        EXPORT     I2C2_EV_IRQHandler                [WEAK]
+        EXPORT     I2C2_ER_IRQHandler                [WEAK]
+        EXPORT     SPI1_IRQHandler                   [WEAK]
+        EXPORT     SPI2_IRQHandler                   [WEAK]
+        EXPORT     USART1_IRQHandler                 [WEAK]
+        EXPORT     USART2_IRQHandler                 [WEAK]
+        EXPORT     USART3_IRQHandler                 [WEAK]
+        EXPORT     EXTI15_10_IRQHandler              [WEAK]
+        EXPORT     RTC_Alarm_IRQHandler              [WEAK]
+        EXPORT     SDMMC1_IRQHandler                 [WEAK]
+        EXPORT     SPI3_IRQHandler                   [WEAK]
+        EXPORT     TIM6_DAC_IRQHandler               [WEAK]
+        EXPORT     TIM7_IRQHandler                   [WEAK]
+        EXPORT     DMA2_Channel1_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel2_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel3_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel4_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel5_IRQHandler          [WEAK]
+        EXPORT     COMP_IRQHandler                   [WEAK]
+        EXPORT     LPTIM1_IRQHandler                 [WEAK]
+        EXPORT     LPTIM2_IRQHandler                 [WEAK]
+        EXPORT     DMA2_Channel6_IRQHandler          [WEAK]
+        EXPORT     DMA2_Channel7_IRQHandler          [WEAK]
+        EXPORT     LPUART1_IRQHandler                [WEAK]
+        EXPORT     QUADSPI_IRQHandler                [WEAK]
+        EXPORT     I2C3_EV_IRQHandler                [WEAK]
+        EXPORT     I2C3_ER_IRQHandler                [WEAK]
+        EXPORT     SAI1_IRQHandler                   [WEAK]
+        EXPORT     SWPMI1_IRQHandler                 [WEAK]
+        EXPORT     TSC_IRQHandler                    [WEAK]
+        EXPORT     RNG_IRQHandler                    [WEAK]
+        EXPORT     FPU_IRQHandler                    [WEAK]
+        EXPORT     CRS_IRQHandler                    [WEAK]
+
+WWDG_IRQHandler
+PVD_PVM_IRQHandler
+TAMP_STAMP_IRQHandler
+RTC_WKUP_IRQHandler
+FLASH_IRQHandler
+RCC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+DMA1_Channel5_IRQHandler
+DMA1_Channel6_IRQHandler
+DMA1_Channel7_IRQHandler
+ADC1_IRQHandler
+CAN1_TX_IRQHandler
+CAN1_RX0_IRQHandler
+CAN1_RX1_IRQHandler
+CAN1_SCE_IRQHandler
+EXTI9_5_IRQHandler
+TIM1_BRK_TIM15_IRQHandler
+TIM1_UP_TIM16_IRQHandler
+TIM1_TRG_COM_IRQHandler
+TIM1_CC_IRQHandler
+TIM2_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+SPI1_IRQHandler
+SPI2_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+USART3_IRQHandler
+EXTI15_10_IRQHandler
+RTC_Alarm_IRQHandler
+SDMMC1_IRQHandler
+SPI3_IRQHandler
+TIM6_DAC_IRQHandler
+TIM7_IRQHandler
+DMA2_Channel1_IRQHandler
+DMA2_Channel2_IRQHandler
+DMA2_Channel3_IRQHandler
+DMA2_Channel4_IRQHandler
+DMA2_Channel5_IRQHandler
+COMP_IRQHandler
+LPTIM1_IRQHandler
+LPTIM2_IRQHandler
+DMA2_Channel6_IRQHandler
+DMA2_Channel7_IRQHandler
+LPUART1_IRQHandler
+QUADSPI_IRQHandler
+I2C3_EV_IRQHandler
+I2C3_ER_IRQHandler
+SAI1_IRQHandler
+SWPMI1_IRQHandler
+TSC_IRQHandler
+RNG_IRQHandler
+FPU_IRQHandler
+CRS_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+
+                 ELSE
+
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

board/BearPi_STM32L431RC/TOS-CONFIG/tos_config.h

@@ -9,7 +9,7 @@
 
 #define TOS_CFG_OBJECT_VERIFY_EN        1u
 
-#define TOS_CFG_TASK_DYNAMIC_CREATE_EN  0u
+#define TOS_CFG_OBJ_DYNAMIC_CREATE_EN   1u
 
 #define TOS_CFG_EVENT_EN                1u
 

board/Linux_Posix/bcrypt_demo/CMakeLists.txt

@@ -0,0 +1,44 @@
+cmake_minimum_required(VERSION 3.8)
+
+project(ini_test)
+
+set(CMAKE_BUILD_TYPE "Debug")
+set(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb")
+set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall")
+
+set(TINY_ROOT ../../../)
+
+include_directories(${TINY_ROOT}/osal/cmsis_os)
+include_directories(${TINY_ROOT}/kernel/core/include)
+include_directories(${TINY_ROOT}/kernel/evtdrv/include)
+include_directories(${TINY_ROOT}/kernel/hal/include)
+include_directories(${TINY_ROOT}/kernel/pm/include)
+
+set(CMSIS_SRCS ${TINY_ROOT}/osal/cmsis_os/cmsis_os.c)
+aux_source_directory(${TINY_ROOT}/kernel/core CORE_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/evtdrv EVTDRV_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/pm PM_SRCS)
+
+set(ARCH_ROOT ${TINY_ROOT}/arch/linux)
+
+include_directories(${ARCH_ROOT}/common/include)
+include_directories(${ARCH_ROOT}/posix/gcc)
+include_directories(${TINY_ROOT}/components/utils/Bcrypt/include)
+
+aux_source_directory(${ARCH_ROOT}/common ARCH_COMMON_SRCS)
+aux_source_directory(${ARCH_ROOT}/posix/gcc ARCH_POSIX_SRCS)
+
+aux_source_directory(${TINY_ROOT}/components/utils/Bcrypt/src BCRYPT_SRCS)
+
+set(ARCH_SRCS ${ARCH_COMMON_SRCS} ${ARCH_POSIX_SRCS})
+
+set(TINY_SRCS ${ARCH_SRCS} ${CMSIS_SRCS} ${EVTDRV_SRCS} ${PM_SRCS} ${CORE_SRCS} ${BCRYPT_SRCS} )
+
+include_directories(./)
+include_directories(./inc)
+
+set(APP_SRCS src/main.c)
+
+add_executable(bcrypt_demo ${APP_SRCS} ${TINY_SRCS})
+
+target_link_libraries(bcrypt_demo pthread)

board/Linux_Posix/bcrypt_demo/Makefile

@@ -0,0 +1,50 @@
+###################################################################
+#automatic detection QTOP and LOCALDIR
+CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
+TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
+        echo $$QTOP;\
+        else\
+        cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
+        dir=`cd ../;pwd`;                       \
+        if [ "$$dir" = "/" ] ; then             \
+           echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
+           exit 1;                              \
+        fi ;                                    \
+        cd $$dir;                               \
+        done ;                                  \
+        pwd;                                    \
+        fi)
+QTOP ?= $(realpath ${TRYQTOP})
+
+ifeq ($(QTOP),)
+$(error Please run this in a tree)
+endif
+LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
+export QTOP
+
+####################################################################
+
+
+export BP=Linux_Posix
+
+TREE_LIB_ENABLE=1
+lib=
+subdirs =
+
+
+all::
+	make -C ${QTOP}/arch BP=${BP}
+	make -C ${QTOP}/kernel BP=${BP}
+	make -C ${QTOP}/osal BP=${BP}
+	make -C ${QTOP}/net BP=${BP}
+	make -C ${QTOP}/devices BP=${BP}
+exec = 
+LD_A_FILES += $(LIBDIR)/libarch.a
+LD_A_FILES += $(LIBDIR)/libkernel.a
+LD_A_FILES += $(LIBDIR)/libbcrypt_demo.a
+LD_A_FILES += $(LIBDIR)/libcmsis_os.a
+LDFLAGS += -lpthread
+
+include ${QTOP}/qmk/generic/Make.exec
+
+

board/Linux_Posix/bcrypt_demo/inc/lwipopts.h

@@ -0,0 +1,236 @@
+/**
+  ******************************************************************************
+  * @file    lwipopts.h
+  * @author  MCD Application Team
+  * @version V1.1.0
+  * @date    31-July-2013
+  * @brief   lwIP Options Configuration.
+  *          This file is based on Utilities\lwip_v1.4.1\src\include\lwip\opt.h
+  *          and contains the lwIP configuration for the STM32F4x7 demonstration.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software
+  * distributed under the License is distributed on an "AS IS" BASIS,
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
+ * critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT 1
+
+/**
+ * NO_SYS==1: Provides VERY minimal functionality. Otherwise,
+ * use lwIP facilities.
+ */
+#define NO_SYS 0
+
+/**
+ * NO_SYS_NO_TIMERS==1: Drop support for sys_timeout when NO_SYS==1
+ * Mainly for compatibility to old versions.
+ */
+#define NO_SYS_NO_TIMERS 0
+
+/* ---------- Memory options ---------- */
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
+   lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
+   byte alignment -> define MEM_ALIGNMENT to 2. */
+#define MEM_ALIGNMENT 4
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE (5 * 1024)
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+   sends a lot of data out of ROM (or other static memory), this
+   should be set high. */
+#define MEMP_NUM_PBUF 25
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+   per active UDP "connection". */
+#define MEMP_NUM_UDP_PCB 4
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB 6
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB_LISTEN 6
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+   segments. */
+#define MEMP_NUM_TCP_SEG 150
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
+   timeouts. */
+#define MEMP_NUM_SYS_TIMEOUT 6
+
+/* ---------- Pbuf options ---------- */
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
+#define PBUF_POOL_SIZE 25
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
+#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS + 40 + PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN)
+
+/* ---------- TCP options ---------- */
+#define LWIP_TCP 1
+#define TCP_TTL 255
+
+/* Controls if TCP should queue segments that arrive out of
+   order. Define to 0 if your device is low on memory. */
+#define TCP_QUEUE_OOSEQ 0
+
+/* TCP Maximum segment size. */
+#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
+
+/* TCP sender buffer space (bytes). */
+#define TCP_SND_BUF (7 * TCP_MSS)
+
+/*  TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
+  as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
+
+#define TCP_SND_QUEUELEN (8 * TCP_SND_BUF / TCP_MSS)
+
+/* TCP receive window. */
+#define TCP_WND (9 * TCP_MSS)
+
+/* ---------- ICMP options ---------- */
+#define LWIP_ICMP 1
+
+/* ---------- DHCP options ---------- */
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of
+   interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
+   turning this on does currently not work. */
+#define LWIP_DHCP 1
+
+/* ---------- UDP options ---------- */
+#define LWIP_UDP 1
+#define UDP_TTL 255
+
+/* ---------- Statistics options ---------- */
+#define LWIP_STATS 0
+#define LWIP_PROVIDE_ERRNO 1
+
+/* ---------- link callback options ---------- */
+/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
+ * whenever the link changes (i.e., link down)
+ */
+#define LWIP_NETIF_LINK_CALLBACK 0
+/*
+   --------------------------------------
+   ---------- Checksum options ----------
+   --------------------------------------
+*/
+
+/*
+The STM32F4x7 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
+ - To use this feature let the following define uncommented.
+ - To disable it and process by CPU comment the  the checksum.
+*/
+#define CHECKSUM_BY_HARDWARE
+//#undef CHECKSUM_BY_HARDWARE
+
+#ifdef CHECKSUM_BY_HARDWARE
+/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 0
+/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 0
+/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 0
+/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 0
+/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 0
+/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 0
+/* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 0
+#else
+/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 1
+/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 1
+/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 1
+/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 1
+/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 1
+/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 1
+/* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 1
+#endif
+
+#define LWIP_TCPIP_CORE_LOCKING 1
+
+/*
+   ----------------------------------------------
+   ---------- Sequential layer options ----------
+   ----------------------------------------------
+*/
+/**
+ * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
+ */
+#define LWIP_NETCONN 1
+
+/*
+   ------------------------------------
+   ---------- Socket options ----------
+   ------------------------------------
+*/
+/**
+ * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
+ */
+#define LWIP_SOCKET 1
+
+/*
+   ---------------------------------
+   ---------- OS options ----------
+   ---------------------------------
+*/
+
+#define DEFAULT_UDP_RECVMBOX_SIZE       10
+#define DEFAULT_TCP_RECVMBOX_SIZE       10
+#define DEFAULT_ACCEPTMBOX_SIZE         10
+#define DEFAULT_THREAD_STACKSIZE        1024 * 2
+
+#define TCPIP_THREAD_NAME               "lwip"
+#define TCPIP_THREAD_STACKSIZE          1024
+#define TCPIP_MBOX_SIZE                 10
+#define TCPIP_THREAD_PRIO               1
+
+#define LWIP_DNS_API_DECLARE_STRUCTS        1
+#define LWIP_DNS                                1
+
+/** DNS server IP address */
+#ifndef DNS_SERVER_ADDRESS
+#define DNS_SERVER_ADDRESS(ipaddr)        (ip4_addr_set_u32(ipaddr, ipaddr_addr("208.67.222.222"))) /* resolver1.opendns.com */
+#endif
+
+/*
+   ----------------------------------------
+   ---------- Lwip Debug options ----------
+   ----------------------------------------
+*/
+#define LWIP_DEBUG 0
+
+#define ethernet_with_mac 1
+
+#endif /* __LWIPOPTS_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

board/Linux_Posix/bcrypt_demo/inc/tos_config.h

@@ -0,0 +1,51 @@
+#ifndef _TOS_CONFIG_H_
+#define _TOS_CONFIG_H_
+
+#include "stddef.h"
+#include "stdint.h"
+
+#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量
+
+#define TOS_CFG_ROUND_ROBIN_EN 1u // 配置TencentOS tiny的内核是否开启时间片轮转
+
+#define TOS_CFG_OBJECT_VERIFY_EN 1u // 配置TencentOS tiny是否校验指针合法
+
+#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏
+
+#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块
+
+#define TOS_CFG_MMHEAP_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块
+
+#define TOS_CFG_MESSAGE_QUEUE_EN        1u
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN	1u
+
+#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN	1u
+#define TOS_CFG_TIMER_EN 1u // 配置TencentOS tiny是否开启软件定时器模块
+
+#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
+
+#define TOS_CFG_MMBLK_EN            1u
+
+#if (TOS_CFG_QUEUE_EN > 0u)
+#define TOS_CFG_MSG_EN 1u
+#else
+#define TOS_CFG_MSG_EN 0u
+#endif
+
+#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE 256u // 配置TencentOS tiny空闲任务栈大小
+
+#define TOS_CFG_CPU_TICK_PER_SECOND 1000u // 配置TencentOS tiny的tick频率
+
+#define TOS_CFG_CPU_CLOCK 1000000u // 配置TencentOS tiny CPU频率
+
+#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式
+
+#endif

board/Linux_Posix/bcrypt_demo/readme.md

@@ -0,0 +1,36 @@
+# How to run the demo in linux
+
+## step1
+make sure your develop environment.
++ `cmake` and version greater than 3.8.2
++ `gcc` `gdb` `make` is installed
+
+## step2
+make `build` directory and compile in `build`
+
+```bash
+mkdir build && cd build
+cmake ..
+make
+```
+
+## step3
+run program !!
+
+```bash
+# in build directory
+./bcrypt_demo
+```
+
+## other
+you can copy this demo to other path, but if you want do it,
+you need modify `CMakeLists.txt`. find line
+
+```cmake
+set(TINY_ROOT ../../../)
+```
+
+and modify `path-to-tinyos`
+```cmake
+set(TINY_ROOT path-to-tinyos)
+```

board/Linux_Posix/bcrypt_demo/src/main.c

@@ -0,0 +1,84 @@
+#include "cmsis_os.h"
+#include "bcrypt.h"
+
+#define TASK1_STK_SIZE  512
+void task1(void *arg);
+osThreadDef(task1, osPriorityNormal, 1, TASK1_STK_SIZE);
+
+int Bcrypt(const char *Src, char *Dst)
+{
+    int Ret = -1;
+    char Salt[BCRYPT_HASHSIZE] = {0};
+    char Hash[BCRYPT_HASHSIZE] = {0};
+
+    if(NULL == Src)
+    {
+        printf("Src is NULL!\n");
+        goto ErrorHandler;
+    }
+
+    if(NULL == Dst)
+    {
+        printf("Dst is NULL!\n");
+        goto ErrorHandler;
+    }
+
+    Ret = bcrypt_gensalt(12, Salt);
+    if(Ret < 0)
+    {
+        printf("bcrypt_gensalt failed!\n");
+        goto ErrorHandler;
+    }
+
+    Ret = bcrypt_hashpw(Src, Salt, Hash);
+    if(Ret < 0)
+    {
+        printf("bcrypt_hashpw failed!\n");
+        goto ErrorHandler;
+    }
+
+    memcpy(Dst, Hash, sizeof(Hash));
+
+    return 0;
+
+ErrorHandler:
+    return -1;
+}
+
+void task1(void *arg)
+{
+    int Ret = -1;
+    char Hash[BCRYPT_HASHSIZE] = {0};
+    const char *DeviceKey = "8HLWBzFvOoZDo9wHZnCAKaAZeb8";
+
+    Ret = Bcrypt(DeviceKey, Hash);
+    if(Ret < 0)
+    {
+        printf("Bcrypt failed!\n");
+        return ;
+    }
+
+    printf("Bcrypt DeviceKey = %s\n", Hash);
+    
+    while(1)
+    {
+        printf("BcryptTest success!\n");
+        osDelay(1000);
+    }
+}
+
+void application_entry(void *arg)
+{
+    osThreadCreate(osThread(task1), NULL); // Create task1
+}
+
+int main(void)
+{
+   osKernelInitialize(); //TOS Tiny kernel initialize
+   application_entry(NULL);
+   osKernelStart(); //Start TOS Tiny
+   
+   while (1)
+   {
+   }
+}

board/Linux_Posix/hello_world/CMakeLists.txt

@@ -0,0 +1,41 @@
+cmake_minimum_required(VERSION 3.8)
+
+project(hello_world)
+
+set(CMAKE_BUILD_TYPE "Debug")
+set(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb")
+set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall")
+
+set(TINY_ROOT ../../../)
+
+include_directories(${TINY_ROOT}/osal/cmsis_os)
+include_directories(${TINY_ROOT}/kernel/core/include)
+include_directories(${TINY_ROOT}/kernel/evtdrv/include)
+include_directories(${TINY_ROOT}/kernel/hal/include)
+include_directories(${TINY_ROOT}/kernel/pm/include)
+
+set(CMSIS_SRCS ${TINY_ROOT}/osal/cmsis_os/cmsis_os.c)
+aux_source_directory(${TINY_ROOT}/kernel/core CORE_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/evtdrv EVTDRV_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/pm PM_SRCS)
+
+set(ARCH_ROOT ${TINY_ROOT}/arch/linux)
+
+include_directories(${ARCH_ROOT}/common/include)
+include_directories(${ARCH_ROOT}/posix/gcc)
+
+aux_source_directory(${ARCH_ROOT}/common ARCH_COMMON_SRCS)
+aux_source_directory(${ARCH_ROOT}/posix/gcc ARCH_POSIX_SRCS)
+
+set(ARCH_SRCS ${ARCH_COMMON_SRCS} ${ARCH_POSIX_SRCS})
+
+set(TINY_SRCS ${ARCH_SRCS} ${CMSIS_SRCS} ${EVTDRV_SRCS} ${PM_SRCS} ${CORE_SRCS} )
+
+include_directories(./)
+include_directories(./inc)
+
+set(APP_SRCS src/main.c)
+
+add_executable(hello_world ${APP_SRCS} ${TINY_SRCS})
+
+target_link_libraries(hello_world pthread)

board/Linux_Posix/hello_world/Makefile

@@ -0,0 +1,50 @@
+###################################################################
+#automatic detection QTOP and LOCALDIR
+CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
+TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
+        echo $$QTOP;\
+        else\
+        cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
+        dir=`cd ../;pwd`;                       \
+        if [ "$$dir" = "/" ] ; then             \
+           echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
+           exit 1;                              \
+        fi ;                                    \
+        cd $$dir;                               \
+        done ;                                  \
+        pwd;                                    \
+        fi)
+QTOP ?= $(realpath ${TRYQTOP})
+
+ifeq ($(QTOP),)
+$(error Please run this in a tree)
+endif
+LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
+export QTOP
+
+####################################################################
+
+
+export BP=Linux_Posix
+
+TREE_LIB_ENABLE=1
+lib=
+subdirs =
+
+
+all::
+	make -C ${QTOP}/arch BP=${BP}
+	make -C ${QTOP}/kernel BP=${BP}
+	make -C ${QTOP}/osal BP=${BP}
+	make -C ${QTOP}/net BP=${BP}
+	make -C ${QTOP}/devices BP=${BP}
+exec = 
+LD_A_FILES += $(LIBDIR)/libarch.a
+LD_A_FILES += $(LIBDIR)/libkernel.a
+LD_A_FILES += $(LIBDIR)/libhello_world.a
+LD_A_FILES += $(LIBDIR)/libcmsis_os.a
+LDFLAGS += -lpthread
+
+include ${QTOP}/qmk/generic/Make.exec
+
+

board/Linux_Posix/hello_world/inc/lwipopts.h

@@ -0,0 +1,236 @@
+/**
+  ******************************************************************************
+  * @file    lwipopts.h
+  * @author  MCD Application Team
+  * @version V1.1.0
+  * @date    31-July-2013
+  * @brief   lwIP Options Configuration.
+  *          This file is based on Utilities\lwip_v1.4.1\src\include\lwip\opt.h
+  *          and contains the lwIP configuration for the STM32F4x7 demonstration.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software
+  * distributed under the License is distributed on an "AS IS" BASIS,
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
+ * critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT 1
+
+/**
+ * NO_SYS==1: Provides VERY minimal functionality. Otherwise,
+ * use lwIP facilities.
+ */
+#define NO_SYS 0
+
+/**
+ * NO_SYS_NO_TIMERS==1: Drop support for sys_timeout when NO_SYS==1
+ * Mainly for compatibility to old versions.
+ */
+#define NO_SYS_NO_TIMERS 0
+
+/* ---------- Memory options ---------- */
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
+   lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
+   byte alignment -> define MEM_ALIGNMENT to 2. */
+#define MEM_ALIGNMENT 4
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE (5 * 1024)
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+   sends a lot of data out of ROM (or other static memory), this
+   should be set high. */
+#define MEMP_NUM_PBUF 25
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+   per active UDP "connection". */
+#define MEMP_NUM_UDP_PCB 4
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB 6
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB_LISTEN 6
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+   segments. */
+#define MEMP_NUM_TCP_SEG 150
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
+   timeouts. */
+#define MEMP_NUM_SYS_TIMEOUT 6
+
+/* ---------- Pbuf options ---------- */
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
+#define PBUF_POOL_SIZE 25
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
+#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS + 40 + PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN)
+
+/* ---------- TCP options ---------- */
+#define LWIP_TCP 1
+#define TCP_TTL 255
+
+/* Controls if TCP should queue segments that arrive out of
+   order. Define to 0 if your device is low on memory. */
+#define TCP_QUEUE_OOSEQ 0
+
+/* TCP Maximum segment size. */
+#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
+
+/* TCP sender buffer space (bytes). */
+#define TCP_SND_BUF (7 * TCP_MSS)
+
+/*  TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
+  as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
+
+#define TCP_SND_QUEUELEN (8 * TCP_SND_BUF / TCP_MSS)
+
+/* TCP receive window. */
+#define TCP_WND (9 * TCP_MSS)
+
+/* ---------- ICMP options ---------- */
+#define LWIP_ICMP 1
+
+/* ---------- DHCP options ---------- */
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of
+   interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
+   turning this on does currently not work. */
+#define LWIP_DHCP 1
+
+/* ---------- UDP options ---------- */
+#define LWIP_UDP 1
+#define UDP_TTL 255
+
+/* ---------- Statistics options ---------- */
+#define LWIP_STATS 0
+#define LWIP_PROVIDE_ERRNO 1
+
+/* ---------- link callback options ---------- */
+/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
+ * whenever the link changes (i.e., link down)
+ */
+#define LWIP_NETIF_LINK_CALLBACK 0
+/*
+   --------------------------------------
+   ---------- Checksum options ----------
+   --------------------------------------
+*/
+
+/*
+The STM32F4x7 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
+ - To use this feature let the following define uncommented.
+ - To disable it and process by CPU comment the  the checksum.
+*/
+#define CHECKSUM_BY_HARDWARE
+//#undef CHECKSUM_BY_HARDWARE
+
+#ifdef CHECKSUM_BY_HARDWARE
+/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 0
+/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 0
+/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 0
+/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 0
+/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 0
+/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 0
+/* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 0
+#else
+/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 1
+/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 1
+/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 1
+/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 1
+/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 1
+/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 1
+/* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 1
+#endif
+
+#define LWIP_TCPIP_CORE_LOCKING 1
+
+/*
+   ----------------------------------------------
+   ---------- Sequential layer options ----------
+   ----------------------------------------------
+*/
+/**
+ * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
+ */
+#define LWIP_NETCONN 1
+
+/*
+   ------------------------------------
+   ---------- Socket options ----------
+   ------------------------------------
+*/
+/**
+ * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
+ */
+#define LWIP_SOCKET 1
+
+/*
+   ---------------------------------
+   ---------- OS options ----------
+   ---------------------------------
+*/
+
+#define DEFAULT_UDP_RECVMBOX_SIZE       10
+#define DEFAULT_TCP_RECVMBOX_SIZE       10
+#define DEFAULT_ACCEPTMBOX_SIZE         10
+#define DEFAULT_THREAD_STACKSIZE        1024 * 2
+
+#define TCPIP_THREAD_NAME               "lwip"
+#define TCPIP_THREAD_STACKSIZE          1024
+#define TCPIP_MBOX_SIZE                 10
+#define TCPIP_THREAD_PRIO               1
+
+#define LWIP_DNS_API_DECLARE_STRUCTS        1
+#define LWIP_DNS                                1
+
+/** DNS server IP address */
+#ifndef DNS_SERVER_ADDRESS
+#define DNS_SERVER_ADDRESS(ipaddr)        (ip4_addr_set_u32(ipaddr, ipaddr_addr("208.67.222.222"))) /* resolver1.opendns.com */
+#endif
+
+/*
+   ----------------------------------------
+   ---------- Lwip Debug options ----------
+   ----------------------------------------
+*/
+#define LWIP_DEBUG 0
+
+#define ethernet_with_mac 1
+
+#endif /* __LWIPOPTS_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

board/Linux_Posix/hello_world/inc/tos_config.h

@@ -0,0 +1,51 @@
+#ifndef _TOS_CONFIG_H_
+#define _TOS_CONFIG_H_
+
+#include "stddef.h"
+#include "stdint.h"
+
+#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量
+
+#define TOS_CFG_ROUND_ROBIN_EN 1u // 配置TencentOS tiny的内核是否开启时间片轮转
+
+#define TOS_CFG_OBJECT_VERIFY_EN 1u // 配置TencentOS tiny是否校验指针合法
+
+#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏
+
+#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块
+
+#define TOS_CFG_MMHEAP_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块
+
+#define TOS_CFG_MESSAGE_QUEUE_EN        1u
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN	1u
+
+#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN	1u
+#define TOS_CFG_TIMER_EN 1u // 配置TencentOS tiny是否开启软件定时器模块
+
+#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
+
+#define TOS_CFG_MMBLK_EN            1u
+
+#if (TOS_CFG_QUEUE_EN > 0u)
+#define TOS_CFG_MSG_EN 1u
+#else
+#define TOS_CFG_MSG_EN 0u
+#endif
+
+#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE 256u // 配置TencentOS tiny空闲任务栈大小
+
+#define TOS_CFG_CPU_TICK_PER_SECOND 1000u // 配置TencentOS tiny的tick频率
+
+#define TOS_CFG_CPU_CLOCK 1000000u // 配置TencentOS tiny CPU频率
+
+#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式
+
+#endif

board/Linux_Posix/hello_world/readme.md

@@ -0,0 +1,36 @@
+# How to run the demo in linux
+
+## step1
+make sure your develop environment.
++ `cmake` and version greater than 3.8.2
++ `gcc` `gdb` `make` is installed
+
+## step2
+make `build` directory and compile in `build`
+
+```bash
+mkdir build && cd build
+cmake ..
+make
+```
+
+## step3
+run program !!
+
+```bash
+# in build directory
+./hello_world
+```
+
+## other
+you can copy this demo to other path, but if you want do it,
+you need modify `CMakeLists.txt`. find line
+
+```cmake
+set(TINY_ROOT ../../../)
+```
+
+and modify `path-to-tinyos`
+```cmake
+set(TINY_ROOT path-to-tinyos)
+```

board/Linux_Posix/hello_world/src/main.c

@@ -0,0 +1,53 @@
+#include "cmsis_os.h"
+
+#define TASK1_STK_SIZE		512
+void task1(void *arg);
+osThreadDef(task1, osPriorityNormal, 1, TASK1_STK_SIZE);
+
+#define TASK2_STK_SIZE		512
+void task2(void *arg);
+osThreadDef(task2, osPriorityNormal, 1, TASK2_STK_SIZE);
+
+void task1(void *arg)
+{
+    int count = 1;
+    while (1) {
+        printf("###This is task1, %d\r\n", count++);
+        osDelay(2000);
+    }
+}
+
+void task2(void *arg)
+{
+    int count = 1;
+    while (1) {
+#if TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN > 0u
+        k_err_t rc;
+        int depth;
+
+        rc = tos_task_stack_draught_depth(K_NULL, &depth);
+        printf("%d  %d\n", rc, depth);
+#endif
+
+        printf("***This is task2, %d\r\n", count++);
+        osDelay(1000);
+    }
+}
+
+void application_entry(void *arg)
+{
+    osThreadCreate(osThread(task1), NULL); // Create task1
+    osThreadCreate(osThread(task2), NULL); // Create task2
+}
+
+
+int main(void)
+{
+   osKernelInitialize(); //TOS Tiny kernel initialize
+   application_entry(NULL);
+   osKernelStart(); //Start TOS Tiny
+   
+   while (1)
+   {
+   }
+}

board/Linux_Posix/ini_demo/CMakeLists.txt

@@ -0,0 +1,44 @@
+cmake_minimum_required(VERSION 3.8)
+
+project(ini_test)
+
+set(CMAKE_BUILD_TYPE "Debug")
+set(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb")
+set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall")
+
+set(TINY_ROOT ../../../)
+
+include_directories(${TINY_ROOT}/osal/cmsis_os)
+include_directories(${TINY_ROOT}/kernel/core/include)
+include_directories(${TINY_ROOT}/kernel/evtdrv/include)
+include_directories(${TINY_ROOT}/kernel/hal/include)
+include_directories(${TINY_ROOT}/kernel/pm/include)
+
+set(CMSIS_SRCS ${TINY_ROOT}/osal/cmsis_os/cmsis_os.c)
+aux_source_directory(${TINY_ROOT}/kernel/core CORE_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/evtdrv EVTDRV_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/pm PM_SRCS)
+
+set(ARCH_ROOT ${TINY_ROOT}/arch/linux)
+
+include_directories(${ARCH_ROOT}/common/include)
+include_directories(${ARCH_ROOT}/posix/gcc)
+include_directories(${TINY_ROOT}/components/utils/INI/include)
+
+aux_source_directory(${ARCH_ROOT}/common ARCH_COMMON_SRCS)
+aux_source_directory(${ARCH_ROOT}/posix/gcc ARCH_POSIX_SRCS)
+
+aux_source_directory(${TINY_ROOT}/components/utils/INI/src INI_SRCS)
+
+set(ARCH_SRCS ${ARCH_COMMON_SRCS} ${ARCH_POSIX_SRCS})
+
+set(TINY_SRCS ${ARCH_SRCS} ${CMSIS_SRCS} ${EVTDRV_SRCS} ${PM_SRCS} ${CORE_SRCS} ${INI_SRCS} )
+
+include_directories(./)
+include_directories(./inc)
+
+set(APP_SRCS src/main.c)
+
+add_executable(inidemo ${APP_SRCS} ${TINY_SRCS})
+
+target_link_libraries(inidemo pthread)

board/Linux_Posix/ini_demo/Makefile

@@ -0,0 +1,50 @@
+###################################################################
+#automatic detection QTOP and LOCALDIR
+CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
+TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
+        echo $$QTOP;\
+        else\
+        cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
+        dir=`cd ../;pwd`;                       \
+        if [ "$$dir" = "/" ] ; then             \
+           echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
+           exit 1;                              \
+        fi ;                                    \
+        cd $$dir;                               \
+        done ;                                  \
+        pwd;                                    \
+        fi)
+QTOP ?= $(realpath ${TRYQTOP})
+
+ifeq ($(QTOP),)
+$(error Please run this in a tree)
+endif
+LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
+export QTOP
+
+####################################################################
+
+
+export BP=Linux_Posix
+
+TREE_LIB_ENABLE=1
+lib=
+subdirs =
+
+
+all::
+	make -C ${QTOP}/arch BP=${BP}
+	make -C ${QTOP}/kernel BP=${BP}
+	make -C ${QTOP}/osal BP=${BP}
+	make -C ${QTOP}/net BP=${BP}
+	make -C ${QTOP}/devices BP=${BP}
+exec = 
+LD_A_FILES += $(LIBDIR)/libarch.a
+LD_A_FILES += $(LIBDIR)/libkernel.a
+LD_A_FILES += $(LIBDIR)/libini_demo.a
+LD_A_FILES += $(LIBDIR)/libcmsis_os.a
+LDFLAGS += -lpthread
+
+include ${QTOP}/qmk/generic/Make.exec
+
+

board/Linux_Posix/ini_demo/inc/lwipopts.h

@@ -0,0 +1,236 @@
+/**
+  ******************************************************************************
+  * @file    lwipopts.h
+  * @author  MCD Application Team
+  * @version V1.1.0
+  * @date    31-July-2013
+  * @brief   lwIP Options Configuration.
+  *          This file is based on Utilities\lwip_v1.4.1\src\include\lwip\opt.h
+  *          and contains the lwIP configuration for the STM32F4x7 demonstration.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software
+  * distributed under the License is distributed on an "AS IS" BASIS,
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+/**
+ * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain
+ * critical regions during buffer allocation, deallocation and memory
+ * allocation and deallocation.
+ */
+#define SYS_LIGHTWEIGHT_PROT 1
+
+/**
+ * NO_SYS==1: Provides VERY minimal functionality. Otherwise,
+ * use lwIP facilities.
+ */
+#define NO_SYS 0
+
+/**
+ * NO_SYS_NO_TIMERS==1: Drop support for sys_timeout when NO_SYS==1
+ * Mainly for compatibility to old versions.
+ */
+#define NO_SYS_NO_TIMERS 0
+
+/* ---------- Memory options ---------- */
+/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which
+   lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2
+   byte alignment -> define MEM_ALIGNMENT to 2. */
+#define MEM_ALIGNMENT 4
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE (5 * 1024)
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+   sends a lot of data out of ROM (or other static memory), this
+   should be set high. */
+#define MEMP_NUM_PBUF 25
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+   per active UDP "connection". */
+#define MEMP_NUM_UDP_PCB 4
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB 6
+/* MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB_LISTEN 6
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+   segments. */
+#define MEMP_NUM_TCP_SEG 150
+/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active
+   timeouts. */
+#define MEMP_NUM_SYS_TIMEOUT 6
+
+/* ---------- Pbuf options ---------- */
+/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
+#define PBUF_POOL_SIZE 25
+/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
+#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS + 40 + PBUF_LINK_ENCAPSULATION_HLEN + PBUF_LINK_HLEN)
+
+/* ---------- TCP options ---------- */
+#define LWIP_TCP 1
+#define TCP_TTL 255
+
+/* Controls if TCP should queue segments that arrive out of
+   order. Define to 0 if your device is low on memory. */
+#define TCP_QUEUE_OOSEQ 0
+
+/* TCP Maximum segment size. */
+#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
+
+/* TCP sender buffer space (bytes). */
+#define TCP_SND_BUF (7 * TCP_MSS)
+
+/*  TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least
+  as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
+
+#define TCP_SND_QUEUELEN (8 * TCP_SND_BUF / TCP_MSS)
+
+/* TCP receive window. */
+#define TCP_WND (9 * TCP_MSS)
+
+/* ---------- ICMP options ---------- */
+#define LWIP_ICMP 1
+
+/* ---------- DHCP options ---------- */
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of
+   interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
+   turning this on does currently not work. */
+#define LWIP_DHCP 1
+
+/* ---------- UDP options ---------- */
+#define LWIP_UDP 1
+#define UDP_TTL 255
+
+/* ---------- Statistics options ---------- */
+#define LWIP_STATS 0
+#define LWIP_PROVIDE_ERRNO 1
+
+/* ---------- link callback options ---------- */
+/* LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface
+ * whenever the link changes (i.e., link down)
+ */
+#define LWIP_NETIF_LINK_CALLBACK 0
+/*
+   --------------------------------------
+   ---------- Checksum options ----------
+   --------------------------------------
+*/
+
+/*
+The STM32F4x7 allows computing and verifying the IP, UDP, TCP and ICMP checksums by hardware:
+ - To use this feature let the following define uncommented.
+ - To disable it and process by CPU comment the  the checksum.
+*/
+#define CHECKSUM_BY_HARDWARE
+//#undef CHECKSUM_BY_HARDWARE
+
+#ifdef CHECKSUM_BY_HARDWARE
+/* CHECKSUM_GEN_IP==0: Generate checksums by hardware for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 0
+/* CHECKSUM_GEN_UDP==0: Generate checksums by hardware for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 0
+/* CHECKSUM_GEN_TCP==0: Generate checksums by hardware for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 0
+/* CHECKSUM_CHECK_IP==0: Check checksums by hardware for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 0
+/* CHECKSUM_CHECK_UDP==0: Check checksums by hardware for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 0
+/* CHECKSUM_CHECK_TCP==0: Check checksums by hardware for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 0
+/* CHECKSUM_CHECK_ICMP==0: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 0
+#else
+/* CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.*/
+#define CHECKSUM_GEN_IP 1
+/* CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.*/
+#define CHECKSUM_GEN_UDP 1
+/* CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.*/
+#define CHECKSUM_GEN_TCP 1
+/* CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.*/
+#define CHECKSUM_CHECK_IP 1
+/* CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.*/
+#define CHECKSUM_CHECK_UDP 1
+/* CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.*/
+#define CHECKSUM_CHECK_TCP 1
+/* CHECKSUM_CHECK_ICMP==1: Check checksums by hardware for incoming ICMP packets.*/
+#define CHECKSUM_GEN_ICMP 1
+#endif
+
+#define LWIP_TCPIP_CORE_LOCKING 1
+
+/*
+   ----------------------------------------------
+   ---------- Sequential layer options ----------
+   ----------------------------------------------
+*/
+/**
+ * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c)
+ */
+#define LWIP_NETCONN 1
+
+/*
+   ------------------------------------
+   ---------- Socket options ----------
+   ------------------------------------
+*/
+/**
+ * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c)
+ */
+#define LWIP_SOCKET 1
+
+/*
+   ---------------------------------
+   ---------- OS options ----------
+   ---------------------------------
+*/
+
+#define DEFAULT_UDP_RECVMBOX_SIZE       10
+#define DEFAULT_TCP_RECVMBOX_SIZE       10
+#define DEFAULT_ACCEPTMBOX_SIZE         10
+#define DEFAULT_THREAD_STACKSIZE        1024 * 2
+
+#define TCPIP_THREAD_NAME               "lwip"
+#define TCPIP_THREAD_STACKSIZE          1024
+#define TCPIP_MBOX_SIZE                 10
+#define TCPIP_THREAD_PRIO               1
+
+#define LWIP_DNS_API_DECLARE_STRUCTS        1
+#define LWIP_DNS                                1
+
+/** DNS server IP address */
+#ifndef DNS_SERVER_ADDRESS
+#define DNS_SERVER_ADDRESS(ipaddr)        (ip4_addr_set_u32(ipaddr, ipaddr_addr("208.67.222.222"))) /* resolver1.opendns.com */
+#endif
+
+/*
+   ----------------------------------------
+   ---------- Lwip Debug options ----------
+   ----------------------------------------
+*/
+#define LWIP_DEBUG 0
+
+#define ethernet_with_mac 1
+
+#endif /* __LWIPOPTS_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+

board/Linux_Posix/ini_demo/inc/tos_config.h

@@ -0,0 +1,51 @@
+#ifndef _TOS_CONFIG_H_
+#define _TOS_CONFIG_H_
+
+#include "stddef.h"
+#include "stdint.h"
+
+#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量
+
+#define TOS_CFG_ROUND_ROBIN_EN 1u // 配置TencentOS tiny的内核是否开启时间片轮转
+
+#define TOS_CFG_OBJECT_VERIFY_EN 1u // 配置TencentOS tiny是否校验指针合法
+
+#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏
+
+#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块
+
+#define TOS_CFG_MMHEAP_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块
+
+#define TOS_CFG_MESSAGE_QUEUE_EN        1u
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN	1u
+
+#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN	1u
+#define TOS_CFG_TIMER_EN 1u // 配置TencentOS tiny是否开启软件定时器模块
+
+#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
+
+#define TOS_CFG_MMBLK_EN            1u
+
+#if (TOS_CFG_QUEUE_EN > 0u)
+#define TOS_CFG_MSG_EN 1u
+#else
+#define TOS_CFG_MSG_EN 0u
+#endif
+
+#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE 256u // 配置TencentOS tiny空闲任务栈大小
+
+#define TOS_CFG_CPU_TICK_PER_SECOND 1000u // 配置TencentOS tiny的tick频率
+
+#define TOS_CFG_CPU_CLOCK 1000000u // 配置TencentOS tiny CPU频率
+
+#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式
+
+#endif

board/Linux_Posix/ini_demo/readme.md

@@ -0,0 +1,36 @@
+# How to run the demo in linux
+
+## step1
+make sure your develop environment.
++ `cmake` and version greater than 3.8.2
++ `gcc` `gdb` `make` is installed
+
+## step2
+make `build` directory and compile in `build`
+
+```bash
+mkdir build && cd build
+cmake ..
+make
+```
+
+## step3
+run program !!
+
+```bash
+# in build directory
+./inidemo
+```
+
+## other
+you can copy this demo to other path, but if you want do it,
+you need modify `CMakeLists.txt`. find line
+
+```cmake
+set(TINY_ROOT ../../../)
+```
+
+and modify `path-to-tinyos`
+```cmake
+set(TINY_ROOT path-to-tinyos)
+```

board/Linux_Posix/ini_demo/src/main.c

@@ -0,0 +1,170 @@
+#include "cmsis_os.h"
+#include "iniparser.h"
+#define CONFIG_NAME "Config.ini"
+
+struct DataInfo_t
+{
+    int InitData;
+    int VolumeData;
+    int LanguageVersion;
+};
+
+#define TASK1_STK_SIZE  512
+void task1(void *arg);
+osThreadDef(task1, osPriorityNormal, 1, TASK1_STK_SIZE);
+
+void task1(void *arg)
+{
+    int Len = -1;
+    int Ret = -1;
+    char Buf[128];
+    char *DataPtr = NULL;
+    struct DataInfo_t Data;
+    FILE *IniTest = NULL ;
+    FILE *DefaultIni = NULL;
+    dictionary  *ConfigIni = NULL;
+    
+    /*1. Create ini config file*/
+    IniTest = fopen(CONFIG_NAME, "w");
+    if(NULL == IniTest)
+    {
+        printf("IniTest is Null!\n");
+        return ;
+    }
+    
+    fprintf(IniTest,
+        "[Setting]\n"
+        "init_data=0;\n"
+        "volume_data=1;\n"
+        "language_version=1;\n"
+    );
+    
+    Ret = fclose(IniTest);
+    if(Ret != 0)
+    {
+        printf("close IniTest fail!\n");
+        return ;
+    }
+    
+    IniTest = NULL;
+    
+    IniTest = fopen(CONFIG_NAME, "r");
+    if(NULL == IniTest)
+    {
+        printf("IniTest is Null!\n");
+        return ;
+    }
+    
+    memset(Buf, 0, sizeof(Buf));
+    while(fgets(Buf, sizeof(Buf), IniTest))
+    {
+        printf("Buf: %s", Buf);
+    }
+    
+    fclose(IniTest);
+    IniTest = NULL;
+    
+    putchar('\n');
+    
+    /*2. Test read ini config file data*/
+    ConfigIni = iniparser_load(CONFIG_NAME);
+    if(NULL == ConfigIni)
+    {
+        printf("ConfigIni is NULL!\n");
+        return ;
+    }
+    
+    //iniparser_dump(ConfigIni, stderr);
+    Data.InitData = iniparser_getint(ConfigIni,"Setting:init_data",-1);
+    if(-1 == Data.InitData)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    Data.VolumeData = iniparser_getint(ConfigIni,"Setting:volume_data",-1);
+    if(-1 == Data.VolumeData)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    Data.LanguageVersion = iniparser_getint(ConfigIni,"Setting:language_version",-1);
+    if(-1 == Data.LanguageVersion)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    
+    printf("Data.InitData:%d\n", Data.InitData);
+    printf("Data.VolumeData:%d\n", Data.VolumeData);
+    printf("Data.LanguageVersion:%d\n", Data.LanguageVersion);
+    
+    /* 3. Set modify one of the parameters*/
+    iniparser_set(ConfigIni,"Setting:init_data", "111");
+    iniparser_set(ConfigIni,"Setting:volume_data", "222");
+    iniparser_set(ConfigIni,"Setting:language_version", "333");
+    
+    putchar('\n');
+    
+    /*4. Write data to int config file*/
+    DefaultIni = fopen(CONFIG_NAME, "w");
+    if(NULL == DefaultIni)
+    {
+        printf("DefaultIni is NULL!\n");
+        return ;
+    }
+    iniparser_dump_ini(ConfigIni, DefaultIni);
+    Ret = fclose(DefaultIni);
+    if(Ret != 0)
+    {
+        printf("close DefaultIni fail!\n");
+        return ;
+    }
+    
+    /*5.Read the modified Config ini file data*/
+    Data.InitData = iniparser_getint(ConfigIni, "Setting:init_data", -1);
+    if(-1 == Data.InitData)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    Data.VolumeData = iniparser_getint(ConfigIni, "Setting:volume_data", -1);
+    if(-1 == Data.VolumeData)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    Data.LanguageVersion = iniparser_getint(ConfigIni, "Setting:language_version", -1);
+    if(-1 == Data.LanguageVersion)
+    {
+        printf("iniparser_getint fail!\n");
+        return ;
+    }
+    
+    printf("Data.InitData:%d\n", Data.InitData);
+    printf("Data.VolumeData:%d\n", Data.VolumeData);
+    printf("Data.LanguageVersion:%d\n", Data.LanguageVersion);
+    
+    iniparser_freedict(ConfigIni);
+    
+    while(1)
+    {
+        printf("Ini test success!\n");
+        osDelay(1000);
+    }
+}
+
+void application_entry(void *arg)
+{
+    osThreadCreate(osThread(task1), NULL); // Create task1
+}
+
+int main(void)
+{
+   osKernelInitialize(); //TOS Tiny kernel initialize
+   application_entry(NULL);
+   osKernelStart(); //Start TOS Tiny
+   
+   while (1)
+   {
+   }
+}

board/Linux_Posix/mqtt_demo/CMakeLists.txt

@@ -0,0 +1,86 @@
+cmake_minimum_required(VERSION 3.8)
+
+project(mqtt_demo)
+
+set(CMAKE_BUILD_TYPE "Debug")
+set(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb")
+set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall")
+
+set(TINY_ROOT ../../../)
+
+add_definitions(-DMQTT_NETWORK_TYPE_NO_TLS -DMQTT_NETSOCKET_USING_AT)
+
+## kernel
+include_directories(${TINY_ROOT}/osal/cmsis_os)
+include_directories(${TINY_ROOT}/kernel/core/include)
+include_directories(${TINY_ROOT}/kernel/evtdrv/include)
+include_directories(${TINY_ROOT}/kernel/hal/include)
+include_directories(${TINY_ROOT}/kernel/pm/include)
+
+set(CMSIS_SRCS ${TINY_ROOT}/osal/cmsis_os/cmsis_os.c)
+aux_source_directory(${TINY_ROOT}/kernel/core CORE_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/evtdrv EVTDRV_SRCS)
+aux_source_directory(${TINY_ROOT}/kernel/pm PM_SRCS)
+
+set(KERNEL_SRCS ${CMSIS_SRCS} ${EVTDRV_SRCS} ${PM_SRCS} ${CORE_SRCS})
+
+## net
+include_directories(${TINY_ROOT}/net/sal_module_wrapper)
+include_directories(${TINY_ROOT}/components/connectivity/mqttclient/mqttclient)
+
+aux_source_directory(${TINY_ROOT}/net/sal_module_wrapper SAL_SRCS)
+
+set(MQTT_ROOT ${TINY_ROOT}/components/connectivity/mqttclient)
+include_directories(${MQTT_ROOT}/common)
+include_directories(${MQTT_ROOT}/common/log)
+include_directories(${MQTT_ROOT}/mqtt)
+include_directories(${MQTT_ROOT}/mqttclient)
+include_directories(${MQTT_ROOT}/network)
+include_directories(${MQTT_ROOT}/platform/TencentOS-tiny)
+
+aux_source_directory(${MQTT_ROOT}/common MQTT_COMMON)
+aux_source_directory(${MQTT_ROOT}/common/log MQTT_COMMON_LOG)
+aux_source_directory(${MQTT_ROOT}/mqttclient MQTT_CLIENT)
+aux_source_directory(${MQTT_ROOT}/mqtt MQTT_CORE)
+aux_source_directory(${MQTT_ROOT}/network MQTT_NETWORK)
+aux_source_directory(${MQTT_ROOT}/platform/TencentOS-tiny MQTT_PLATFORM)
+
+set(MQTT_SRCS 
+    ${MQTT_ROOT}/common/log/arch/tencentos-tiny/arch.c
+    ${MQTT_COMMON}
+    ${MQTT_COMMON_LOG}
+    ${MQTT_CLIENT}
+    ${MQTT_CORE}
+    ${MQTT_NETWORK}
+    ${MQTT_PLATFORM}
+)
+
+set(NET_SRCS ${MQTT_SRCS} ${SAL_SRCS})
+
+## arch
+set(ARCH_ROOT ${TINY_ROOT}/arch/linux)
+
+include_directories(${ARCH_ROOT}/common/include)
+include_directories(${ARCH_ROOT}/posix/gcc)
+
+aux_source_directory(${ARCH_ROOT}/common ARCH_COMMON_SRCS)
+aux_source_directory(${ARCH_ROOT}/posix/gcc ARCH_POSIX_SRCS)
+
+set(ARCH_SRCS ${ARCH_COMMON_SRCS} ${ARCH_POSIX_SRCS})
+
+
+include_directories(${TINY_ROOT}/components/utils/JSON/include)
+
+set(UTILS_SRCS ${TINY_ROOT}/components/utils/JSON/src/cJSON.c)
+
+set(TINY_SRCS ${ARCH_SRCS} ${KERNEL_SRCS} ${NET_SRCS} ${UTILS_SRCS})
+
+## app
+include_directories(./)
+include_directories(./inc)
+
+aux_source_directory(./src APP_SRCS)
+
+add_executable(mqtt_demo ${APP_SRCS} ${TINY_SRCS})
+
+target_link_libraries(mqtt_demo pthread)

board/Linux_Posix/mqtt_demo/Makefile

@@ -0,0 +1,58 @@
+###################################################################
+#automatic detection QTOP and LOCALDIR
+CUR_DIR := $(patsubst %/,%,$(dir $(realpath $(firstword $(MAKEFILE_LIST)))))
+TRYQTOP := $(shell if [ -n "$$QTOP" ] ; then\
+        echo $$QTOP;\
+        else\
+        cd $(CUR_DIR); while /usr/bin/test ! -e qmk ; do \
+        dir=`cd ../;pwd`;                       \
+        if [ "$$dir" = "/" ] ; then             \
+           echo Cannot find QTOP in $(firstword $(MAKEFILE_LIST)) 1>&2; \
+           exit 1;                              \
+        fi ;                                    \
+        cd $$dir;                               \
+        done ;                                  \
+        pwd;                                    \
+        fi)
+QTOP ?= $(realpath ${TRYQTOP})
+
+ifeq ($(QTOP),)
+$(error Please run this in a tree)
+endif
+LOCALDIR = $(patsubst %/,%,$(subst $(realpath $(QTOP))/,,$(CUR_DIR)))
+export QTOP
+
+####################################################################
+
+
+export BP=Linux_Posix
+
+TREE_LIB_ENABLE=1
+lib=
+subdirs =
+
+CFGFLAGS += -I$(CUR_DIR)/inc
+CFGFLAGS += -I$(QTOP)/net/sal_module_wrapper
+CFGFLAGS += -I$(QTOP)/components/connectivity/Eclipse-Paho-MQTT/wrapper/include
+CFGFLAGS += -I$(QTOP)/components/connectivity/Eclipse-Paho-MQTT/3rdparty/include
+
+all::
+	make -C ${QTOP}/arch BP=Linux_Posix
+	make -C ${QTOP}/kernel
+	make -C ${QTOP}/osal
+	make -C ${QTOP}/net
+	make -C ${QTOP}/devices
+	make -C ${QTOP}/components/connectivity/Eclipse-Paho-MQTT
+
+exec = 
+LD_A_FILES += $(LIBDIR)/libarch.a
+LD_A_FILES += $(LIBDIR)/libkernel.a
+LD_A_FILES += $(LIBDIR)/libhello_world.a
+LD_A_FILES += $(LIBDIR)/libcmsis_os.a
+LD_A_FILES += $(LIBDIR)/libEclipse-Paho-MQTT.a
+LD_A_FILES += $(LIBDIR)/libsal_module_wrapper.a
+LDFLAGS += -lpthread
+
+include ${QTOP}/qmk/generic/Make.exec
+
+

board/Linux_Posix/mqtt_demo/inc/mqtt_config.h

@@ -0,0 +1,27 @@
+#ifndef  TOS_MQTT_CONFIG_H
+#define  TOS_MQTT_CONFIG_H
+
+#define MQTT_SERVER_IP          "111.230.189.156"
+#define MQTT_SERVER_PORT        "1883"
+#define MQTT_PRODUCT_ID         "$product"
+#define MQTT_DEV_NAME           "$dev"
+#define MQTT_CLIENT_ID          "$product$dev"
+#define MQTT_USR_NAME           "$product$dev;21010406;12365;4294967295"
+#define MQTT_PASSWORD           "$sign;hmacsha1"
+#define MQTT_SUBSCRIBE_TOPIC    "$product/$dev/$sub"
+#define MQTT_PUBLISH_TOPIC      "$product/$dev/$pub"
+
+//#error please replace yourself server configuration
+/**
+ * 1. run python tool
+ * ```
+ *  cd tiny/tools/
+ *  python3 mqtt_config_gen.py
+ * ```
+ * then input your server information
+ * 
+ * 2. tool will generate `mqtt_config.h` file, copy to replace this file
+ */
+
+#endif
+

board/Linux_Posix/mqtt_demo/inc/socket_wrapper.h

@@ -0,0 +1,8 @@
+#ifndef _SOCKET_WRAPPER_
+#define _SOCKET_WRAPPER_
+
+#include "sal_module_wrapper.h"
+
+sal_module_t *get_socket_module(void);
+
+#endif //_SOCKET_WRAPPER_

board/Linux_Posix/mqtt_demo/inc/tos_config.h

@@ -0,0 +1,46 @@
+#ifndef _TOS_CONFIG_H_
+#define _TOS_CONFIG_H_
+
+#include "stddef.h"
+
+#define TOS_CFG_TASK_PRIO_MAX 10u // 配置TencentOS tiny默认支持的最大优先级数量
+
+#define TOS_CFG_ROUND_ROBIN_EN 1u // 配置TencentOS tiny的内核是否开启时间片轮转
+
+#define TOS_CFG_OBJECT_VERIFY 0u // 配置TencentOS tiny是否校验指针合法
+
+#define TOS_CFG_EVENT_EN 1u // TencentOS tiny 事件模块功能宏
+
+#define TOS_CFG_MMHEAP_EN 1u // 配置TencentOS tiny是否开启动态内存模块
+
+#define TOS_CFG_MMHEAP_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x100 // 配置TencentOS tiny动态内存池大小
+
+#define TOS_CFG_MUTEX_EN 1u // 配置TencentOS tiny是否开启互斥锁模块
+
+#define TOS_CFG_QUEUE_EN 1u // 配置TencentOS tiny是否开启队列模块
+
+#define TOS_CFG_TIMER_EN 1u // 配置TencentOS tiny是否开启软件定时器模块
+
+#define TOS_CFG_SEM_EN 1u // 配置TencentOS tiny是否开启信号量模块
+
+#define TOS_CFG_MMBLK_EN            1u
+
+#if (TOS_CFG_QUEUE_EN > 0u)
+#define TOS_CFG_MSG_EN 1u
+#else
+#define TOS_CFG_MSG_EN 0u
+#endif
+
+#define TOS_CFG_MSG_POOL_SIZE 10u // 配置TencentOS tiny消息队列大小
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE 256u // 配置TencentOS tiny空闲任务栈大小
+
+#define TOS_CFG_CPU_TICK_PER_SECOND 1000u // 配置TencentOS tiny的tick频率
+
+#define TOS_CFG_CPU_CLOCK 1000000u // 配置TencentOS tiny CPU频率
+
+#define TOS_CFG_TIMER_AS_PROC 1u // 配置是否将TIMER配置成函数模式
+
+#endif

board/Linux_Posix/mqtt_demo/readme.md

@@ -0,0 +1,79 @@
+# How to run the demo in linux
+
+## step1
+make sure your develop environment.
++ `cmake` and version greater than 3.8.2
++ `gcc` `gdb` `make` is installed
+
+## step2
+configure your server and add a transmit rule
+
+reference [tencent cloud IoT guide?](../../../doc/8.TencentOS-tiny对接腾讯云IoTHub开发指南.md)
+
+additional thing, add a rule for send a message to the demo
+1. select filter topic is the ${demo device}/event and 
+SELECT * FROM ${demo device}/event
+2. select action type is Republish and topic is the ${demo device}/control
+
+the page like this
+_____________________________________________
+|规则引擎
+|--------------------------------------------
+|基本信息
+|规则名称  loop
+|规则描述  未填写
+|--------------------------------------------
+|筛选数据
+|字段  *
+|Topic  ${demo device}/event
+|条件
+|当前SQL语句是：
+|SELECT * ${demo device}/event
+|--------------------------------------------
+|行为操作
+|行为类型  数据转发到另一个Topic ( Republish )
+|Topic ${demo device}/control
+|  ...
+_____________________________________________
+
+
+## step3
+generate `mqtt_config.h` file to replace `./inc/mqtt_config.h`
+
+cd `tiny/tools/` directory, run python script
+```bash
+python3 mqtt_config_gen.py
+```
+
+then input your server configuration, generate `mqtt_config.h` file
+copy to `./inc/` replace old file
+
+## step4
+make `build` directory and compile in `build`
+
+```bash
+mkdir build && cd build
+cmake ..
+make
+```
+
+## step5
+run program !!
+
+```bash
+# in build directory
+./mqtt_demo
+```
+
+## other
+you can copy this demo to other path, but if you want do it,
+you need modify `CMakeLists.txt`. find line
+
+```cmake
+set(TINY_ROOT ../../../)
+```
+
+and modify `path-to-tinyos`
+```cmake
+set(TINY_ROOT path-to-tinyos)
+```

board/Linux_Posix/mqtt_demo/src/main.c

@@ -0,0 +1,94 @@
+#include "cmsis_os.h"
+#include "socket_wrapper.h"
+#include "sal_module_wrapper.h"
+// #include "mqtt_wrapper.h"
+#include "mqtt_config.h"
+#include "mqttclient.h"
+
+#include <stdio.h>
+
+int sock_id = 0;
+
+//mqtt_publisher
+#define MQTT_PUBLISHER_STK_SIZE 1024
+void mqtt_publisher(void *pdata);
+osThreadDef(mqtt_publisher, osPriorityNormal, 1, MQTT_PUBLISHER_STK_SIZE);
+
+static void tos_topic_handler(void* client, message_data_t* msg)
+{
+   (void)client;
+   MQTT_LOG_I("-----------------------------------------------------------------------------------");
+   MQTT_LOG_I("%s:%d %s()...\ntopic: %s, qos: %d. \nmessage:\n\t%s\n", __FILE__, __LINE__, __FUNCTION__,
+              msg->topic_name, msg->message->qos, (char *)msg->message->payload);
+   MQTT_LOG_I("-----------------------------------------------------------------------------------\n");
+}
+
+void mqtt_publisher(void *pdata)
+{
+   int error;
+   char buf[100] = {0};
+   mqtt_client_t *client = NULL;
+   mqtt_message_t msg;
+
+   memset(&msg, 0, sizeof(msg));
+
+   mqtt_log_init();
+   client = mqtt_lease();
+
+   mqtt_set_port(client, MQTT_SERVER_PORT);
+   mqtt_set_host(client, MQTT_SERVER_IP);
+   mqtt_set_client_id(client, MQTT_CLIENT_ID);
+   mqtt_set_user_name(client, MQTT_USR_NAME);
+   mqtt_set_password(client, MQTT_PASSWORD);
+   mqtt_set_clean_session(client, 1);
+
+   error = mqtt_connect(client);
+
+   MQTT_LOG_D("mqtt connect error is %#x", error);
+
+   mqtt_subscribe(client, MQTT_SUBSCRIBE_TOPIC, QOS0, tos_topic_handler);
+
+   MQTT_LOG_D("mqtt subscribe error is %#x", error);
+
+   memset(&msg, 0, sizeof(msg));
+
+   for (;;)
+   {
+      sprintf(buf, "welcome to mqttclient, this is a publish test, a rand number: %d ...", random_number());
+
+      msg.qos = QOS0;
+      msg.payload = (void *)buf;
+
+      error = mqtt_publish(client, MQTT_PUBLISH_TOPIC, &msg);
+
+      osDelay(4000);
+   }
+}
+
+// void mqtt_reciever(void *pdata)
+// {
+//    uint8_t read_data[100];
+//    int8_t topic[30];
+//    uint32_t read_len;
+
+//    for (;;)
+//    {
+//       read_len = tos_mqtt_receive(topic, sizeof(topic), read_data, sizeof(read_data));
+//       if (read_len >= 0)
+//       {
+//          printf("receive topic-->%s| data-->%s| \n", topic, read_data);
+//       }
+//       osDelay(100);
+//    }
+// }
+
+int main(void)
+{
+   osKernelInitialize();                           //TOS Tiny kernel initialize
+   osThreadCreate(osThread(mqtt_publisher), NULL); // start connect and publish
+   osKernelStart();                                //Start TOS Tiny
+
+   while (1)
+   {
+   }
+}

board/Linux_Posix/mqtt_demo/src/socket_wrapper.c

@@ -0,0 +1,143 @@
+#include "socket_wrapper.h"
+#include "cmsis_os.h"
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <signal.h>
+#include <fcntl.h>
+
+static osMutexId socket_send_lock, socket_recv_lock;
+
+osMutexDef(socket_send_lock);
+osMutexDef(socket_recv_lock);
+
+static osSemaphoreId socket_recv_event;
+osSemaphoreDef(socket_recv_event);
+
+int socket_init(void)
+{
+    socket_send_lock = osMutexCreate(osMutex(socket_send_lock));
+    socket_recv_lock = osMutexCreate(osMutex(socket_recv_lock));
+    socket_recv_event = osSemaphoreCreate(osSemaphore(socket_recv_event),0);
+
+    return (
+        (socket_recv_event != NULL) && 
+        (socket_recv_lock != NULL) && 
+        (socket_send_lock != NULL)
+    );
+}
+
+void io_signal_handle(int signal)
+{
+    osSemaphoreRelease(socket_recv_event);
+}
+
+int socket_connect(const char *ip, const char *port, sal_proto_t proto)
+{
+    struct sockaddr_in addr = {
+        .sin_family = AF_INET,
+        .sin_port = htons(atoi(port))};
+    int socket_proto = 0;
+    struct sigaction sig_install;
+
+    inet_pton(AF_INET, ip, &addr.sin_addr);
+
+    if (TOS_SAL_PROTO_TCP == proto)
+    {
+        socket_proto = IPPROTO_TCP;
+    }
+    else if (TOS_SAL_PROTO_UDP == proto)
+    {
+        socket_proto = IPPROTO_UDP;
+    }
+    else
+    {
+        return -1;
+    }
+
+    int socket_id = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
+    
+    fcntl( socket_id, __F_SETOWN, getpid() );
+    fcntl( socket_id, __F_SETSIG, SIGIO );
+    fcntl( socket_id, F_SETFL, O_ASYNC );
+
+    sig_install.sa_flags = 0;
+	sig_install.sa_handler = io_signal_handle;
+	sigfillset( &sig_install.sa_mask );
+
+    if ( 0 != sigaction( SIGIO, &sig_install, NULL ) )
+	{
+		printf( "socket problem installing %d\n",SIGIO );
+	}
+
+    connect(socket_id, &addr, sizeof(addr));
+    return socket_id;
+}
+
+int socket_send(int sock, const void *buf, size_t len)
+{
+    ssize_t send_len = 0, state;
+    if (sock < 0)
+        return -1;
+    osMutexWait(socket_send_lock, TOS_TIME_FOREVER);
+    do
+    {
+        state = send(sock, (buf + send_len), (len - send_len), MSG_DONTWAIT);
+        if (state > 0)
+        {
+            send_len += state;
+        }
+        if (send_len != len)
+        {
+            osSemaphoreWait(socket_recv_event,100);
+        }
+    } while (len != send_len);
+    osMutexRelease(socket_send_lock);
+    return send_len;
+}
+
+int socket_recv(int sock, void *buf, size_t len)
+{
+    ssize_t recv_len = 0, state;
+    if (sock < 0)
+        return -1;
+    osMutexWait(socket_recv_lock, TOS_TIME_FOREVER);
+    do
+    {
+        state = recv(sock, (buf + recv_len), (len - recv_len), MSG_DONTWAIT);
+        if (state > 0)
+        {
+            recv_len += state;
+        }
+        if (recv_len != len)
+        {
+            osSemaphoreWait(socket_recv_event,100);
+        }
+    } while (len != recv_len);
+    osMutexRelease(socket_recv_lock);
+    return recv_len;
+}
+
+int socket_close(int sock)
+{
+    close(sock);
+}
+
+static sal_module_t linux_sal = {
+    .init    = socket_init,
+    .connect = socket_connect,
+    .send    = socket_send,
+    .recv    = socket_recv,
+    .close   = socket_close,
+    // .sendto             = NULL,
+    // .recv_timeout       = NULL,
+    // .recvfrom           = NULL,
+    // .recvfrom_timeout   = NULL,
+    // .parse_domain       = NULL,
+};
+
+sal_module_t *get_socket_module(void)
+{
+    return (&linux_sal);
+}

board/TencentOS_Tiny_CH32V307_EVB/.cproject

@@ -62,6 +62,25 @@
 							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1731377187" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1567947810" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Debug}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/include}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/include/common}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/include/config}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/include/services/common}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/include/services/explorer}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/common/cryptology/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/common/mqtt_packet/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/common/utils/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/examples}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/platform/network/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/services/explorer/data_template/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/services/explorer/service_mqtt/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/services/common/log_upload/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/c-sdk/services/common/mqtt_client/inc}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/net/sal_module_wrapper}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/devices/esp8266}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/fs/kv/include}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/fs/fatfs/include}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/fs/vfs/include}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/kernel/hal/include}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/net/at/include}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/net/tencent_firmware_module_wrapper}&quot;"/>
@@ -70,7 +89,6 @@
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/arch/common/include}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/arch/rv32i/gcc}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/kernel/core/include}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/kernel/hal/include}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Core}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/User}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/Peripheral/inc}&quot;"/>
@@ -91,6 +109,7 @@
 								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys.351964161" name="Do not use syscalls (--specs=nosys.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs.16994550" name="Other objects" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs" useByScannerDiscovery="false" valueType="userObjs"/>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags.1125808200" name="Linker flags (-Xlinker [option])" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags" useByScannerDiscovery="false" valueType="stringList"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.834465884" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs"/>
 								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1859223768" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
 									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
 									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@@ -123,17 +142,27 @@
 						</toolChain>
 					</folderInfo>
 					<sourceEntries>
-						<entry excluding="platform/hal/wch/ch32v30xx|kernel/hal|devices/esp8266_tencent_firmware|net/tencent_firmware_module_wrapper|kernel/core|net/at|kernel|arch|TencentOS-Tiny|Startup|Peripheral|Ld|Debug|Core" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+						<entry excluding="examples/qcloud_csdk_iot_explorer|c-sdk/services/common|c-sdk/include|examples/mqtt_iot_explorer.c|c-sdk/examples|c-sdk/app|c-sdk/services/explorer|c-sdk/explorer|c-sdk/platform|devices/esp8266|c-sdk/common|net/sal_module_wrapper|examples/fatfs_through_vfs_sample.c|User/mqtt_iot_explorer.c|examples/kv_sample.c|fs/fatfs|fs/vfs|fs/kv|components/kv|platform/hal/wch/ch32v30xx|kernel/hal|devices/esp8266_tencent_firmware|net/tencent_firmware_module_wrapper|kernel/core|net/at|kernel|arch|TencentOS-Tiny|Startup|Peripheral|Ld|Debug|Core" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Debug"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Ld"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Peripheral"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="arch"/>
+						<entry excluding="utils/test|mqtt_packet/test|cryptology/test" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="c-sdk/common"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="c-sdk/include"/>
+						<entry excluding="os/Linux" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="c-sdk/platform"/>
+						<entry excluding="system/test|system/sample|ota/test|ota/sample|mqtt_client/test|mqtt_client/sample|log_upload/test|log_upload/sample|cos/sample|dynreg/test|dynreg/sample|dynreg/src/dynreg.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="c-sdk/services/common"/>
+						<entry excluding="service_mqtt/test|service_mqtt/sample|data_template/test|data_template/sample" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="c-sdk/services/explorer"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="devices/esp8266"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="devices/esp8266_tencent_firmware"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="fs/fatfs"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="fs/kv"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="fs/vfs"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="kernel/core"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="kernel/hal"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="net/at"/>
+						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="net/sal_module_wrapper"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="net/tencent_firmware_module_wrapper"/>
 						<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="platform/hal/wch/ch32v30xx"/>
 					</sourceEntries>

board/TencentOS_Tiny_CH32V307_EVB/.launch

@@ -1,61 +1,61 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?xml version="1.0" encoding="UTF-8" ?> 
 <launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
-  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set architecture riscv:rv32&#13;&#10;set remotetimeout unlimited"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${eclipse_home}toolchain/OpenOCD/bin/openocd.exe"/>
-  <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f &quot;${eclipse_home}toolchain/OpenOCD/bin/wch-riscv.cfg&quot;"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666"/>
-  <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
-  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${eclipse_home}template/wizard/WCH/RISC-V/CH32V307/NoneOS/CH32V307xx.svd"/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
-  <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="handle_reset"/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
-  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
-  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
-  <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe"/>
-  <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
-  <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
-  <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
-  <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="obj\TencentOS-Tiny.elf"/>
-  <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="TencentOS-Tiny"/>
-  <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
-  <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true" />
+  <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#xD;&#xA;set architecture riscv:rv32&#xD;&#xA;set remotetimeout unlimited" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value="" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value="" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${eclipse_home}toolchain/OpenOCD/bin/openocd.exe" />
+  <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value="" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f &quot;${eclipse_home}toolchain/OpenOCD/bin/wch-riscv.cfg&quot;" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTclPortNumber" value="6666" />
+  <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value="" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value="" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="halt" />
+  <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${eclipse_home}template/wizard/WCH/RISC-V/CH32V307/NoneOS/CH32V307xx.svd" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value="" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value="" />
+  <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="handle_reset" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="" />
+  <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value="" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true" />
+  <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true" />
+  <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe" />
+  <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false" />
+  <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2" />
+  <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value="" />
+  <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="obj\TencentOS-Tiny.elf" />
+  <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="TencentOS-Tiny" />
+  <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true" />
+  <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="" />
   <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
-    <listEntry value="/TencentOS-Tiny"/>
+    <listEntry value="/TencentOS-Tiny" />
   </listAttribute>
   <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
-    <listEntry value="4"/>
+    <listEntry value="4" />
   </listAttribute>
-  <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
-  <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+  <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#xD;&#xA;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#xD;&#xA;" />
+  <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory" />
 </launchConfiguration>

board/TencentOS_Tiny_CH32V307_EVB/.project

@@ -1,18 +1,18 @@
-<?xml version="1.0" encoding="UTF-8" ?> 
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <projectDescription>
   <name>TencentOS-Tiny</name>
-  <comment />
-  <projects />
+  <comment/>
+  <projects/>
   <buildSpec>
     <buildCommand>
       <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
       <triggers>clean,full,incremental,</triggers>
-      <arguments />
+      <arguments/>
     </buildCommand>
     <buildCommand>
       <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
       <triggers>full,incremental,</triggers>
-      <arguments />
+      <arguments/>
     </buildCommand>
   </buildSpec>
   <natures>
@@ -24,43 +24,93 @@
     <link>
       <name>arch</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/arch/risc-v/risc-v3a</location>
+      <locationURI>PARENT-2-PROJECT_LOC/arch/risc-v/risc-v3a</locationURI>
     </link>
     <link>
-      <name>kernel/core</name>
+      <name>c-sdk/common</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/kernel/core</location>
+      <locationURI>PARENT-2-PROJECT_LOC/components/connectivity/iot-hub-device-c-sdk/common</locationURI>
     </link>
     <link>
-      <name>net/at</name>
+      <name>c-sdk/include</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/net/at</location>
+      <locationURI>PARENT-2-PROJECT_LOC/components/connectivity/iot-hub-device-c-sdk/include</locationURI>
     </link>
     <link>
-      <name>net/tencent_firmware_module_wrapper</name>
+      <name>c-sdk/platform</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/net/tencent_firmware_module_wrapper</location>
+      <locationURI>PARENT-2-PROJECT_LOC/components/connectivity/iot-hub-device-c-sdk/platform</locationURI>
+    </link>
+    <link>
+      <name>devices/esp8266</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/devices/esp8266</locationURI>
     </link>
     <link>
       <name>devices/esp8266_tencent_firmware</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/devices/esp8266_tencent_firmware</location>
+      <locationURI>PARENT-2-PROJECT_LOC/devices/esp8266_tencent_firmware</locationURI>
+    </link>
+    <link>
+      <name>fs/fatfs</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/components/fs/fatfs/wrapper</locationURI>
+    </link>
+    <link>
+      <name>fs/kv</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/components/fs/kv</locationURI>
+    </link>
+    <link>
+      <name>fs/vfs</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/components/fs/vfs</locationURI>
+    </link>
+    <link>
+      <name>kernel/core</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/kernel/core</locationURI>
     </link>
     <link>
       <name>kernel/hal</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/kernel/hal</location>
+      <locationURI>PARENT-2-PROJECT_LOC/kernel/hal</locationURI>
+    </link>
+    <link>
+      <name>net/at</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/net/at</locationURI>
+    </link>
+    <link>
+      <name>net/sal_module_wrapper</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/net/sal_module_wrapper</locationURI>
+    </link>
+    <link>
+      <name>net/tencent_firmware_module_wrapper</name>
+      <type>2</type>
+      <locationURI>PARENT-2-PROJECT_LOC/net/tencent_firmware_module_wrapper</locationURI>
     </link>
     <link>
       <name>platform/hal/wch/ch32v30xx</name>
       <type>2</type>
-      <location>PARENT-2-PROJECT_LOC/platform/hal/wch/ch32v30xx/src</location>
+      <locationURI>PARENT-2-PROJECT_LOC/platform/hal/wch/ch32v30xx/src</locationURI>
+    </link>
+    <link>
+      <name>c-sdk/services/common</name>
+      <type>2</type>
+      <location>PARENT-2-PROJECT_LOC/components/connectivity/iot-hub-device-c-sdk/services/common</location>
+    </link>
+    <link>
+      <name>c-sdk/services/explorer</name>
+      <type>2</type>
+      <location>PARENT-2-PROJECT_LOC/components/connectivity/iot-hub-device-c-sdk/services/explorer</location>
     </link>
   </linkedResources>
   <filteredResources>
     <filter>
       <id>1595986042669</id>
-      <name />
+      <name/>
       <type>22</type>
       <matcher>
         <id>org.eclipse.ui.ide.multiFilter</id>

board/TencentOS_Tiny_CH32V307_EVB/Peripheral/src/ch32v30x_adc.c

@@ -1071,8 +1071,8 @@ int16_t Get_CalibrationValue(ADC_TypeDef* ADCx)
         buf[i] = ADCx->RDATAR;
     }
 
-    for(i=0; i<10; i++){
-        for(j=0; j<10; j++){
+    for(i=0; i<9; i++){
+        for(j=0; j<9-i; j++){
             if(buf[j]>buf[j+1]){
               t=buf[j];
               buf[j]=buf[j+1];

board/TencentOS_Tiny_CH32V307_EVB/Startup/startup_ch32v30x.S

@@ -42,7 +42,7 @@ _vector_base:
     .word   0
     .word   SysTick_Handler            /* SysTick */
     .word   0
-    .word   SW_handler                 /* SW */
+    .word   SW_Handler                 /* SW */
     .word   0
     /* External Interrupts */
     .word   WWDG_IRQHandler            /* Window Watchdog */
@@ -143,7 +143,7 @@ _vector_base:
     .weak   Ecall_U_Mode_Handler       /* Ecall U Mode */
     .weak   Break_Point_Handler        /* Break Point */
     .weak   SysTick_Handler            /* SysTick */
-    .weak   SW_handler                 /* SW */
+    .weak   SW_Handler                 /* SW */
     .weak   WWDG_IRQHandler            /* Window Watchdog */
     .weak   PVD_IRQHandler             /* PVD through EXTI Line detect */
     .weak   TAMPER_IRQHandler          /* TAMPER */
@@ -239,7 +239,7 @@ Ecall_M_Mode_Handler:  1:  j 1b
 Ecall_U_Mode_Handler:  1:  j 1b
 Break_Point_Handler:  1:  j 1b
 SysTick_Handler:  1:  j 1b
-SW_handler:  1:  j 1b
+SW_Handler:  1:  j 1b
 WWDG_IRQHandler:  1:  j 1b
 PVD_IRQHandler:  1:  j 1b
 TAMPER_IRQHandler:  1:  j 1b

board/TencentOS_Tiny_CH32V307_EVB/TOS_CONFIG/tos_config.h

@@ -13,8 +13,7 @@
 
 #define TOS_CFG_OBJECT_VERIFY 1u
 
-#define TOS_CFG_TASK_DYNAMIC_CREATE_EN  1u
-
+#define TOS_CFG_OBJ_DYNAMIC_CREATE_EN  1u
 
 #define TOS_CFG_EVENT_EN 1u
 
@@ -24,7 +23,7 @@
 
 #define TOS_CFG_MMHEAP_DEFAULT_POOL_EN  1u
 
-#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x3000
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE 0x8000
 
 #define TOS_CFG_MAIL_QUEUE_EN           1u
 
@@ -44,7 +43,7 @@
 
 #define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN      0u
 
-#define TOS_CFG_CPU_SYSTICK_PRIO       0xF0     //V307<30><37><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>Ч
+#define TOS_CFG_CPU_SYSTICK_PRIO       0xF0     //V307<30><37><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>Ч
 
 
 #define TOS_CFG_IDLE_TASK_STK_SIZE 512u

board/TencentOS_Tiny_CH32V307_EVB/User/ch32v30x_it.c

@@ -8,12 +8,11 @@
 #include "ch32v30x_it.h"
 #include "tos_k.h"
 #include "tos_at.h"
-
 extern at_agent_t esp8266_tf_agent;
+extern at_agent_t esp8266_agent;
 
 void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
-
 void USART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 void UART6_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 void UART7_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
@@ -78,7 +77,7 @@ void UART6_IRQHandler(void)
   if(USART_GetITStatus(UART6, USART_IT_RXNE) != RESET)
   {
       data= USART_ReceiveData(UART6);
-      tos_at_uart_input_byte(&esp8266_tf_agent,data);
+      tos_at_uart_input_byte(&esp8266_agent,data);
 
   }
 

board/TencentOS_Tiny_CH32V307_EVB/User/main.c

@@ -7,56 +7,229 @@
 *******************************************************************************/
 #include "debug.h"
 #include "tos_k.h"
+#include "sdio.h"
 #include "lcd_init.h"
 #include "lcd.h"
 #include "pic.h"
+#include "spi_flash.h"
 
-
-void led_init(void)
+void led_key_init(void)
 {
     GPIO_InitTypeDef GPIO_InitStructure = {0};
 
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE|RCC_APB2Periph_GPIOA, ENABLE);
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
     GPIO_Init(GPIOE, &GPIO_InitStructure);
+    GPIO_SetBits(GPIOE,GPIO_Pin_2);
+    GPIO_SetBits(GPIOE,GPIO_Pin_3);
+    GPIO_SetBits(GPIOE,GPIO_Pin_4);
+    GPIO_SetBits(GPIOE,GPIO_Pin_5);
+    /* key 1 2 3 */
+    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_8;
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
 }
-#define TASK1_STK_SIZE       1024
-k_task_t task1;
-__aligned(4) uint8_t task1_stk[TASK1_STK_SIZE];
 
+uint8_t get_key(void)
+{
+    uint16_t value=0;
+    if((GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_0) & GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_1)\
+         & GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_8)) == 0 )
+    {
+        Delay_Ms(15);
+        if((GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_0) & GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_1)\
+             & GPIO_ReadInputDataBit(GPIOA,GPIO_Pin_8)) == 0 )
+        {
+           value= GPIO_ReadInputData(GPIOA);
+           if((value&0x1)==0) return 1;
+           else if((value&0x2)==0)return 2;
+           else if((value&0x100)==0) return 3;
+           else return 0;
+        }
+    }
+   return 0;
+}
 
-#define TASK2_STK_SIZE       1024
-k_task_t task2;
-__aligned(4) uint8_t task2_stk[TASK2_STK_SIZE];
+void lcd_test()
+{
+    u8 i,j;
+    float t=0;
 
+    LCD_ShowString(0,0,"Welcome TencentOS",WHITE,BLACK,32,0);
+    LCD_ShowString(0,40,"LCD_W:",WHITE,BLACK,16,0);
+    LCD_ShowIntNum(48,40,LCD_W,3,WHITE,BLACK,16);
+    LCD_ShowString(80,40,"LCD_H:",WHITE,BLACK,16,0);
+    LCD_ShowIntNum(128,40,LCD_H,3,WHITE,BLACK,16);
+    LCD_ShowString(80,40,"LCD_H:",WHITE,BLACK,16,0);
+    LCD_ShowString(0,70,"Increaseing Nun:",WHITE,BLACK,16,0);
+    LCD_ShowFloatNum1(128,70,t,4,WHITE,BLACK,16);
+    t+=0.11;
+    for(j=0;j<3;j++)
+    {
+        for(i=0;i<6;i++)
+        {
+            LCD_ShowPicture(40*i,120+j*40,40,40,gImage_1);
+        }
+    }
+    printf("lcd test finish\r\n");
+}
+
+/*********************************************************************
+ * @fn      show_sdcard_info
+ *
+ * @brief   SD Card information.
+ *
+ * @return  none
+ */
+void show_sdcard_info(void)
+{
+    switch(SDCardInfo.CardType)
+    {
+        case SDIO_STD_CAPACITY_SD_CARD_V1_1:printf("Card Type:SDSC V1.1\r\n");break;
+        case SDIO_STD_CAPACITY_SD_CARD_V2_0:printf("Card Type:SDSC V2.0\r\n");break;
+        case SDIO_HIGH_CAPACITY_SD_CARD:printf("Card Type:SDHC V2.0\r\n");break;
+        case SDIO_MULTIMEDIA_CARD:printf("Card Type:MMC Card\r\n");break;
+    }
+    printf("Card ManufacturerID:%d\r\n",SDCardInfo.SD_cid.ManufacturerID);
+    printf("Card RCA:%d\r\n",SDCardInfo.RCA);
+    printf("Card Capacity:%d MB\r\n",(u32)(SDCardInfo.CardCapacity>>20));
+    printf("Card BlockSize:%d\r\n\r\n",SDCardInfo.CardBlockSize);
+}
+const u8 TEXT_Buf[]={"CH32V307 SPI FLASH W25Qxx"};
+void spi_flash_test(void)
+{
+    u8 datap[SIZE];
+    u16 Flash_Model;
+//    SPI_Flash_Init();
+    Delay_Ms(50);
+
+    Flash_Model = SPI_Flash_ReadID();
+
+    switch(Flash_Model)
+    {
+       case W25Q80:
+            printf("W25Q80 OK!\r\n");
+            break;
+
+       case W25Q16:
+            printf("W25Q16 OK!\r\n");
+            break;
+
+       case W25Q32:
+            printf("W25Q32 OK!\r\n");
+            break;
+
+       case W25Q64:
+            printf("W25Q64 OK!\r\n");
+            break;
+
+       case W25Q128:
+            printf("W25Q128 OK!\r\n");
+            break;
+
+       default:
+            printf("Fail!\r\n");
+            break;
+    }
+    printf("Start Read W25Qxx before erase....\r\n");
+    SPI_Flash_Read(datap,0x0,SIZE);
+    for(int16_t i=0;i<SIZE;i++)
+    {
+        printf("%x ", datap[i] );
+    }
+    printf("\r\n" );
+
+    printf("Start Erase W25Qxx....\r\n");
+    SPI_Flash_Erase_Sector(0);
+
+    Delay_Ms(500);
+
+    printf("Start Read W25Qxx....\r\n");
+    SPI_Flash_Read(datap,0x0,SIZE);
+    for(int16_t i=0;i<SIZE;i++)
+    {
+        printf("%x ", datap[i] );
+    }
+    printf("\r\n" );
+
+    Delay_Ms(500);
+
+    printf("Start Write W25Qxx....\r\n");
+    SPI_Flash_Write((u8*)TEXT_Buf,0,SIZE);
+
+    Delay_Ms(500);
+
+    SPI_Flash_Read(datap,0x0,SIZE);
+    printf("%s\r\n", datap );
+
+    if(memcmp(TEXT_Buf, datap, SIZE))
+    {
+        LCD_ShowString(16,16+16+16,"SPI Flash: Fail",WHITE,BLACK,16,0);
+    }
+    else
+    {
+        LCD_ShowString(16,16+16+16,"SPI Flash: OK",WHITE,BLACK,16,0);
+    }
+}
+
+u8 buf[512];
+u8 Readbuf[512];
+
+/* sdcard test */
+void SD_Card_test(void)
+{
+    u32 i;
+    u32 Sector_Nums;
+
+    while(SD_Init())
+    {
+        printf("SD Card Error!\r\n");
+        delay_ms(1000);
+    }
+
+    show_sdcard_info();
+
+    printf("SD Card OK\r\n");
+    Sector_Nums = ((u32)(SDCardInfo.CardCapacity>>20))/2;
+    printf("Sector_Nums:%d\r\n", Sector_Nums);
+
+    for(i=0; i<512; i++){
+        buf[i] = i;
+    }
+
+    for(i=0; i<Sector_Nums/2; i++)
+    {
+        if(SD_WriteDisk(buf,i,1)) {printf("Wr %d sector fail\n", i);}
+        if(SD_ReadDisk(Readbuf,i,1)){ printf("Rd %d sector fail\n", i);}
+
+        if(memcmp(buf, Readbuf, 512))
+        {
+            printf(" %d sector Verify fail\n", i);
+            LCD_ShowString(16,16+16+16+16,"SD Sector:FAIL",WHITE,BLACK,16,0);
+            break;
+        }
+    }
+    if(i==Sector_Nums/2)
+    {
+        LCD_ShowString(16,16+16+16+16+16,"SD: OK",WHITE,BLACK,16,0);
+        printf("SD OK\r\n");
+    }
+    else
+    {
+        LCD_ShowString(16,16+16+16+16+16,"SD ALL: FAIL",WHITE,BLACK,16,0);
+    }
+}
 
 #define APPLICATION_TASK_STK_SIZE       4096
 k_task_t application_task;
 __aligned(4) uint8_t application_task_stk[APPLICATION_TASK_STK_SIZE];
 
-extern void application_entry1(void *arg);
-
-void task1_entry(void *arg)
-{
-    while (1)
-    {
-        printf("###I am task1\r\n");
-        tos_task_delay(2000);
-    }
-}
-
-void task2_entry(void *arg)
-{
-    while (1)
-    {
-        printf("***I am task2\r\n");
-        tos_task_delay(1000);
-    }
-}
-
+extern void application_entry(void *arg);
 
+volatile uint8_t key=0;
 /*******************************************************************************
 * Function Name  : main
 * Description    : Main program.
@@ -65,51 +238,41 @@ void task2_entry(void *arg)
 *******************************************************************************/
 int main(void)
 {
-    u8 i,j;
-    float t=0;
 	Delay_Init();
 	USART_Printf_Init(115200);
 	printf("SystemClk:%d\r\n",SystemCoreClock);
-	led_init();
-    LCD_Init();//LCD<43><44>ʼ<EFBFBD><CABC>
-    LCD_Fill(0,0,LCD_W,LCD_H,WHITE);
-
+	led_key_init();
+    LCD_Init();
+    SPI_Flash_Init();
     printf("Welcome to TencentOS tiny(%s)\r\n", TOS_VERSION);
-    LCD_ShowString(0,0,"Welcome to TencentOS",RED,WHITE,16,0);
+    LCD_Fill(0,0,LCD_W,LCD_H,BLACK);
+    LCD_ShowString(0,0,"Welcome to TencentOS",WHITE,BLACK,16,0);
+
     tos_knl_init();
-    tos_task_create(&application_task, "application_task", application_entry1, NULL, 4, application_task_stk, APPLICATION_TASK_STK_SIZE, 0);
-    //tos_task_create(&task1, "task1", task1_entry, NULL, 3, task1_stk, TASK1_STK_SIZE, 0); // Create task1
-    //tos_task_create(&task2, "task2", task2_entry, NULL, 3, task2_stk, TASK2_STK_SIZE, 0);// Create task2
+    tos_task_create(&application_task, "application_task", application_entry, NULL, 4, application_task_stk, APPLICATION_TASK_STK_SIZE, 0);
     tos_knl_start();
 
     printf("should not run at here!\r\n");
+    while(!key)
+    {
+        key=get_key();
+    }
 
-	while(1)
-	{
-	    LCD_ShowString(0,0,"Welcome TencentOS",RED,WHITE,32,0);
-        LCD_ShowString(0,40,"LCD_W:",RED,WHITE,16,0);
-        LCD_ShowIntNum(48,40,LCD_W,3,RED,WHITE,16);
-        LCD_ShowString(80,40,"LCD_H:",RED,WHITE,16,0);
-        LCD_ShowIntNum(128,40,LCD_H,3,RED,WHITE,16);
-        LCD_ShowString(80,40,"LCD_H:",RED,WHITE,16,0);
-        LCD_ShowString(0,70,"Increaseing Nun:",RED,WHITE,16,0);
-        LCD_ShowFloatNum1(128,70,t,4,RED,WHITE,16);
-        t+=0.11;
-        for(j=0;j<3;j++)
-        {
-            for(i=0;i<6;i++)
-            {
-                LCD_ShowPicture(40*i,120+j*40,40,40,gImage_1);
-                printf("pic test\r\n");
-            }
-        }
-        printf("lcd test\r\n");
-	}
+    switch(key)
+    {
+        case 1:
+            lcd_test();
+            break;
+        case 2:
+            LCD_Fill(0,0,LCD_W,LCD_H,BLACK);
+            spi_flash_test();
+            SD_Card_test();
+            break;
+        case 3:
+            LCD_Fill(0,0,LCD_W,LCD_H,BLACK);
+            break;
+        default:
+            break;
+    }
+	while(1);
 }
-
-
-
-
-
-
-

board/TencentOS_Tiny_CH32V307_EVB/User/sdio.h

@@ -0,0 +1,348 @@
+/********************************** (C) COPYRIGHT *******************************
+* File Name          : sdio.h
+* Author             : WCH
+* Version            : V1.0.0
+* Date               : 2021/06/06
+* Description        : This file contains the headers of the SDIO.
+*******************************************************************************/
+#ifndef __SDIO_H
+#define __SDIO_H
+
+#include"debug.h"
+
+#define  delay_ms(x)  Delay_Ms(x)
+
+
+/*SDIO flag*/
+#define SDIO_FLAG_CCRCFAIL                  ((uint32_t)0x00000001)
+#define SDIO_FLAG_DCRCFAIL                  ((uint32_t)0x00000002)
+#define SDIO_FLAG_CTIMEOUT                  ((uint32_t)0x00000004)
+#define SDIO_FLAG_DTIMEOUT                  ((uint32_t)0x00000008)
+#define SDIO_FLAG_TXUNDERR                  ((uint32_t)0x00000010)
+#define SDIO_FLAG_RXOVERR                   ((uint32_t)0x00000020)
+#define SDIO_FLAG_CMDREND                   ((uint32_t)0x00000040)
+#define SDIO_FLAG_CMDSENT                   ((uint32_t)0x00000080)
+#define SDIO_FLAG_DATAEND                   ((uint32_t)0x00000100)
+#define SDIO_FLAG_STBITERR                  ((uint32_t)0x00000200)
+#define SDIO_FLAG_DBCKEND                   ((uint32_t)0x00000400)
+#define SDIO_FLAG_CMDACT                    ((uint32_t)0x00000800)
+#define SDIO_FLAG_TXACT                     ((uint32_t)0x00001000)
+#define SDIO_FLAG_RXACT                     ((uint32_t)0x00002000)
+#define SDIO_FLAG_TXFIFOHE                  ((uint32_t)0x00004000)
+#define SDIO_FLAG_RXFIFOHF                  ((uint32_t)0x00008000)
+#define SDIO_FLAG_TXFIFOF                   ((uint32_t)0x00010000)
+#define SDIO_FLAG_RXFIFOF                   ((uint32_t)0x00020000)
+#define SDIO_FLAG_TXFIFOE                   ((uint32_t)0x00040000)
+#define SDIO_FLAG_RXFIFOE                   ((uint32_t)0x00080000)
+#define SDIO_FLAG_TXDAVL                    ((uint32_t)0x00100000)
+#define SDIO_FLAG_RXDAVL                    ((uint32_t)0x00200000)
+#define SDIO_FLAG_SDIOIT                    ((uint32_t)0x00400000)
+#define SDIO_FLAG_CEATAEND                  ((uint32_t)0x00800000)
+
+/* SDIO clock */
+#define SDIO_INIT_CLK_DIV        0xFE
+#define SDIO_TRANSFER_CLK_DIV    0x00
+
+/* SDIO work mode */
+#define SD_POLLING_MODE     0
+#define SD_DMA_MODE         1
+
+/*SDIO Err define */
+typedef enum
+{
+    /* special err */
+    SD_CMD_CRC_FAIL                    = (1),
+    SD_DATA_CRC_FAIL                   = (2),
+    SD_CMD_RSP_TIMEOUT                 = (3),
+    SD_DATA_TIMEOUT                    = (4),
+    SD_TX_UNDERRUN                     = (5),
+    SD_RX_OVERRUN                      = (6),
+    SD_START_BIT_ERR                   = (7),
+    SD_CMD_OUT_OF_RANGE                = (8),
+    SD_ADDR_MISALIGNED                 = (9),
+    SD_BLOCK_LEN_ERR                   = (10),
+    SD_ERASE_SEQ_ERR                   = (11),
+    SD_BAD_ERASE_PARAM                 = (12),
+    SD_WRITE_PROT_VIOLATION            = (13),
+    SD_LOCK_UNLOCK_FAILED              = (14),
+    SD_COM_CRC_FAILED                  = (15),
+    SD_ILLEGAL_CMD                     = (16),
+    SD_CARD_ECC_FAILED                 = (17),
+    SD_CC_ERROR                        = (18),
+    SD_GENERAL_UNKNOWN_ERROR           = (19),
+    SD_STREAM_READ_UNDERRUN            = (20),
+    SD_STREAM_WRITE_OVERRUN            = (21),
+    SD_CID_CSD_OVERWRITE               = (22),
+    SD_WP_ERASE_SKIP                   = (23),
+    SD_CARD_ECC_DISABLED               = (24),
+    SD_ERASE_RESET                     = (25),
+    SD_AKE_SEQ_ERROR                   = (26),
+    SD_INVALID_VOLTRANGE               = (27),
+    SD_ADDR_OUT_OF_RANGE               = (28),
+    SD_SWITCH_ERROR                    = (29),
+    SD_SDIO_DISABLED                   = (30),
+    SD_SDIO_FUNCTION_BUSY              = (31),
+    SD_SDIO_FUNCTION_FAILED            = (32),
+    SD_SDIO_UNKNOWN_FUNCTION           = (33),
+    /* Standard err */
+    SD_INTERNAL_ERROR,
+    SD_NOT_CONFIGURED,
+    SD_REQUEST_PENDING,
+    SD_REQUEST_NOT_APPLICABLE,
+    SD_INVALID_PARAMETER,
+    SD_UNSUPPORTED_FEATURE,
+    SD_UNSUPPORTED_HW,
+    SD_ERROR,
+    SD_OK = 0
+} SD_Error;
+
+/*SD——CSD*/
+typedef struct
+{
+    u8  CSDStruct;
+    u8  SysSpecVersion;
+    u8  Reserved1;
+    u8  TAAC;
+    u8  NSAC;
+    u8  MaxBusClkFrec;
+    u16 CardComdClasses;
+    u8  RdBlockLen;
+    u8  PartBlockRead;
+    u8  WrBlockMisalign;
+    u8  RdBlockMisalign;
+    u8  DSRImpl;
+    u8  Reserved2;
+    u32 DeviceSize;
+    u8  MaxRdCurrentVDDMin;
+    u8  MaxRdCurrentVDDMax;
+    u8  MaxWrCurrentVDDMin;
+    u8  MaxWrCurrentVDDMax;
+    u8  DeviceSizeMul;
+    u8  EraseGrSize;
+    u8  EraseGrMul;
+    u8  WrProtectGrSize;
+    u8  WrProtectGrEnable;
+    u8  ManDeflECC;
+    u8  WrSpeedFact;
+    u8  MaxWrBlockLen;
+    u8  WriteBlockPaPartial;
+    u8  Reserved3;
+    u8  ContentProtectAppli;
+    u8  FileFormatGrouop;
+    u8  CopyFlag;
+    u8  PermWrProtect;
+    u8  TempWrProtect;
+    u8  FileFormat;
+    u8  ECC;
+    u8  CSD_CRC;
+    u8  Reserved4;
+} SD_CSD;   
+
+/*SD——CID*/
+typedef struct
+{
+    u8  ManufacturerID;
+    u16 OEM_AppliID;
+    u32 ProdName1;
+    u8  ProdName2;
+    u8  ProdRev;
+    u32 ProdSN;
+    u8  Reserved1;
+    u16 ManufactDate;
+    u8  CID_CRC;
+    u8  Reserved2;
+} SD_CID;
+
+/* SD statue */
+typedef enum
+{
+    SD_CARD_READY                  = ((uint32_t)0x00000001),
+    SD_CARD_IDENTIFICATION         = ((uint32_t)0x00000002),
+    SD_CARD_STANDBY                = ((uint32_t)0x00000003),
+    SD_CARD_TRANSFER               = ((uint32_t)0x00000004),
+    SD_CARD_SENDING                = ((uint32_t)0x00000005),
+    SD_CARD_RECEIVING              = ((uint32_t)0x00000006),
+    SD_CARD_PROGRAMMING            = ((uint32_t)0x00000007),
+    SD_CARD_DISCONNECTED           = ((uint32_t)0x00000008),
+    SD_CARD_ERROR                  = ((uint32_t)0x000000FF)
+}SDCardState;
+
+/* SD informatiion */
+typedef struct
+{
+  SD_CSD SD_csd;
+  SD_CID SD_cid;
+  long long CardCapacity;
+  u32 CardBlockSize;
+  u16 RCA;
+  u8 CardType;
+} SD_CardInfo;
+extern SD_CardInfo SDCardInfo;
+
+/* SDIO instruction*/
+#define SD_CMD_GO_IDLE_STATE                       ((u8)0)
+#define SD_CMD_SEND_OP_COND                        ((u8)1)
+#define SD_CMD_ALL_SEND_CID                        ((u8)2)
+#define SD_CMD_SET_REL_ADDR                        ((u8)3)
+#define SD_CMD_SET_DSR                             ((u8)4)
+#define SD_CMD_SDIO_SEN_OP_COND                    ((u8)5)
+#define SD_CMD_HS_SWITCH                           ((u8)6)
+#define SD_CMD_SEL_DESEL_CARD                      ((u8)7)
+#define SD_CMD_HS_SEND_EXT_CSD                     ((u8)8)
+#define SD_CMD_SEND_CSD                            ((u8)9)
+#define SD_CMD_SEND_CID                            ((u8)10)
+#define SD_CMD_READ_DAT_UNTIL_STOP                 ((u8)11)
+#define SD_CMD_STOP_TRANSMISSION                   ((u8)12)
+#define SD_CMD_SEND_STATUS                         ((u8)13)
+#define SD_CMD_HS_BUSTEST_READ                     ((u8)14)
+#define SD_CMD_GO_INACTIVE_STATE                   ((u8)15)
+#define SD_CMD_SET_BLOCKLEN                        ((u8)16)
+#define SD_CMD_READ_SINGLE_BLOCK                   ((u8)17)
+#define SD_CMD_READ_MULT_BLOCK                     ((u8)18)
+#define SD_CMD_HS_BUSTEST_WRITE                    ((u8)19)
+#define SD_CMD_WRITE_DAT_UNTIL_STOP                ((u8)20) 
+#define SD_CMD_SET_BLOCK_COUNT                     ((u8)23) 
+#define SD_CMD_WRITE_SINGLE_BLOCK                  ((u8)24)
+#define SD_CMD_WRITE_MULT_BLOCK                    ((u8)25)
+#define SD_CMD_PROG_CID                            ((u8)26)
+#define SD_CMD_PROG_CSD                            ((u8)27)
+#define SD_CMD_SET_WRITE_PROT                      ((u8)28)
+#define SD_CMD_CLR_WRITE_PROT                      ((u8)29)
+#define SD_CMD_SEND_WRITE_PROT                     ((u8)30)
+#define SD_CMD_SD_ERASE_GRP_START                  ((u8)32)
+#define SD_CMD_SD_ERASE_GRP_END                    ((u8)33)
+#define SD_CMD_ERASE_GRP_START                     ((u8)35)
+#define SD_CMD_ERASE_GRP_END                       ((u8)36)
+#define SD_CMD_ERASE                               ((u8)38)
+#define SD_CMD_FAST_IO                             ((u8)39)
+#define SD_CMD_GO_IRQ_STATE                        ((u8)40)
+#define SD_CMD_LOCK_UNLOCK                         ((u8)42)
+#define SD_CMD_APP_CMD                             ((u8)55)
+#define SD_CMD_GEN_CMD                             ((u8)56)
+#define SD_CMD_NO_CMD                              ((u8)64)
+
+/*Following commands are SD Card Specific commands.
+  SDIO_APP_CMD ：CMD55 should be sent before sending these commands.
+*/
+#define SD_CMD_APP_SD_SET_BUSWIDTH                 ((u8)6)
+#define SD_CMD_SD_APP_STAUS                        ((u8)13)
+#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS        ((u8)22)
+#define SD_CMD_SD_APP_OP_COND                      ((u8)41)
+#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT          ((u8)42)
+#define SD_CMD_SD_APP_SEND_SCR                     ((u8)51)
+#define SD_CMD_SDIO_RW_DIRECT                      ((u8)52)
+#define SD_CMD_SDIO_RW_EXTENDED                    ((u8)53)
+
+/*Following commands are SD Card Specific security commands.
+  SDIO_APP_CMD should be sent before sending these commands.
+*/
+#define SD_CMD_SD_APP_GET_MKB                      ((u8)43)
+#define SD_CMD_SD_APP_GET_MID                      ((u8)44)
+#define SD_CMD_SD_APP_SET_CER_RN1                  ((u8)45)
+#define SD_CMD_SD_APP_GET_CER_RN2                  ((u8)46)
+#define SD_CMD_SD_APP_SET_CER_RES2                 ((u8)47)
+#define SD_CMD_SD_APP_GET_CER_RES1                 ((u8)48)
+#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK   ((u8)18)
+#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK  ((u8)25)
+#define SD_CMD_SD_APP_SECURE_ERASE                 ((u8)38)
+#define SD_CMD_SD_APP_CHANGE_SECURE_AREA           ((u8)49)
+#define SD_CMD_SD_APP_SECURE_WRITE_MKB             ((u8)48)
+
+/* SD definition */
+#define SDIO_STD_CAPACITY_SD_CARD_V1_1             ((u32)0x00000000)
+#define SDIO_STD_CAPACITY_SD_CARD_V2_0             ((u32)0x00000001)
+#define SDIO_HIGH_CAPACITY_SD_CARD                 ((u32)0x00000002)
+#define SDIO_MULTIMEDIA_CARD                       ((u32)0x00000003)
+#define SDIO_SECURE_DIGITAL_IO_CARD                ((u32)0x00000004)
+#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD            ((u32)0x00000005)
+#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD          ((u32)0x00000006)
+#define SDIO_HIGH_CAPACITY_MMC_CARD                ((u32)0x00000007)
+
+/* SDIO parameter definition */
+#define SDIO_STATIC_FLAGS               ((u32)0x000005FF)
+#define SDIO_CMD0TIMEOUT                ((u32)0x00010000)
+#define SDIO_DATATIMEOUT                ((u32)0xFFFFFFFF)
+#define SDIO_FIFO_Address               ((u32)0x40018080)
+
+/* Mask for errors Card Status R1 (OCR Register) */
+#define SD_OCR_ADDR_OUT_OF_RANGE        ((u32)0x80000000)
+#define SD_OCR_ADDR_MISALIGNED          ((u32)0x40000000)
+#define SD_OCR_BLOCK_LEN_ERR            ((u32)0x20000000)
+#define SD_OCR_ERASE_SEQ_ERR            ((u32)0x10000000)
+#define SD_OCR_BAD_ERASE_PARAM          ((u32)0x08000000)
+#define SD_OCR_WRITE_PROT_VIOLATION     ((u32)0x04000000)
+#define SD_OCR_LOCK_UNLOCK_FAILED       ((u32)0x01000000)
+#define SD_OCR_COM_CRC_FAILED           ((u32)0x00800000)
+#define SD_OCR_ILLEGAL_CMD              ((u32)0x00400000)
+#define SD_OCR_CARD_ECC_FAILED          ((u32)0x00200000)
+#define SD_OCR_CC_ERROR                 ((u32)0x00100000)
+#define SD_OCR_GENERAL_UNKNOWN_ERROR    ((u32)0x00080000)
+#define SD_OCR_STREAM_READ_UNDERRUN     ((u32)0x00040000)
+#define SD_OCR_STREAM_WRITE_OVERRUN     ((u32)0x00020000)
+#define SD_OCR_CID_CSD_OVERWRIETE       ((u32)0x00010000)
+#define SD_OCR_WP_ERASE_SKIP            ((u32)0x00008000)
+#define SD_OCR_CARD_ECC_DISABLED        ((u32)0x00004000)
+#define SD_OCR_ERASE_RESET              ((u32)0x00002000)
+#define SD_OCR_AKE_SEQ_ERROR            ((u32)0x00000008)
+#define SD_OCR_ERRORBITS                ((u32)0xFDFFE008)
+
+/* Masks for R6 Response */
+#define SD_R6_GENERAL_UNKNOWN_ERROR     ((u32)0x00002000)
+#define SD_R6_ILLEGAL_CMD               ((u32)0x00004000)
+#define SD_R6_COM_CRC_FAILED            ((u32)0x00008000)
+
+#define SD_VOLTAGE_WINDOW_SD            ((u32)0x80100000)
+#define SD_HIGH_CAPACITY                ((u32)0x40000000)
+#define SD_STD_CAPACITY                 ((u32)0x00000000)
+#define SD_CHECK_PATTERN                ((u32)0x000001AA)
+#define SD_VOLTAGE_WINDOW_MMC           ((u32)0x80FF8000)
+
+#define SD_MAX_VOLT_TRIAL               ((u32)0x0000FFFF)
+#define SD_ALLZERO                      ((u32)0x00000000)
+
+#define SD_WIDE_BUS_SUPPORT             ((u32)0x00040000)
+#define SD_SINGLE_BUS_SUPPORT           ((u32)0x00010000)
+#define SD_CARD_LOCKED                  ((u32)0x02000000)
+#define SD_CARD_PROGRAMMING             ((u32)0x00000007)
+#define SD_CARD_RECEIVING               ((u32)0x00000006)
+#define SD_DATATIMEOUT                  ((u32)0xFFFFFFFF)
+#define SD_0TO7BITS                     ((u32)0x000000FF)
+#define SD_8TO15BITS                    ((u32)0x0000FF00)
+#define SD_16TO23BITS                   ((u32)0x00FF0000)
+#define SD_24TO31BITS                   ((u32)0xFF000000)
+#define SD_MAX_DATA_LENGTH              ((u32)0x01FFFFFF)
+
+#define SD_HALFFIFO                     ((u32)0x00000008)
+#define SD_HALFFIFOBYTES                ((u32)0x00000020)
+
+/*Command Class Supported */
+#define SD_CCCC_LOCK_UNLOCK             ((u32)0x00000080)
+#define SD_CCCC_WRITE_PROT              ((u32)0x00000040)
+#define SD_CCCC_ERASE                   ((u32)0x00000020)
+
+/*CMD8*/
+#define SDIO_SEND_IF_COND               ((u32)0x00000008)
+
+SD_Error SD_Init(void);
+void SDIO_Clock_Set(u8 clkdiv);
+void SDIO_Send_Cmd(u8 cmdindex,u8 waitrsp,u32 arg);
+void SDIO_Send_Data_Cfg(u32 datatimeout,u32 datalen,u8 blksize,u8 dir);
+SD_Error SD_PowerON(void);    
+SD_Error SD_PowerOFF(void);
+SD_Error SD_InitializeCards(void);
+SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo);
+SD_Error SD_EnableWideBusOperation(u32 wmode);
+SD_Error SD_SetDeviceMode(u32 mode);
+SD_Error SD_SelectDeselect(u32 addr); 
+SD_Error SD_SendStatus(uint32_t *pcardstatus);
+SDCardState SD_GetState(void);
+SD_Error SD_ReadBlock(u8 *buf,long long addr,u16 blksize);  
+SD_Error SD_ReadMultiBlocks(u8 *buf,long long  addr,u16 blksize,u32 nblks);  
+SD_Error SD_WriteBlock(u8 *buf,long long addr,  u16 blksize);
+SD_Error SD_WriteMultiBlocks(u8 *buf,long long addr,u16 blksize,u32 nblks);
+SD_Error SD_ProcessIRQSrc(void);
+void SD_DMA_Config(u32*mbuf,u32 bufsize,u32 dir); 
+u8 SD_ReadDisk(u8*buf,u32 sector,u8 cnt);
+u8 SD_WriteDisk(u8*buf,u32 sector,u8 cnt);
+
+#endif

board/TencentOS_Tiny_CH32V307_EVB/User/spi_flash.c

@@ -0,0 +1,468 @@
+#include "spi_flash.h"
+#include "debug.h"
+
+
+
+
+
+/*********************************************************************
+ * @fn      SPI1_ReadWriteByte
+ *
+ * @brief   SPI1 read or write one byte.
+ *
+ * @param   TxData - write one byte data.
+ *
+ * @return  Read one byte data.
+ */
+u8 SPI1_ReadWriteByte(u8 TxData)
+{
+	u8 i=0;
+
+	while (SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_TXE) == RESET)
+	{
+		i++;
+		if(i>200)return 0;
+	}
+
+	SPI_I2S_SendData(SPI3, TxData);
+	i=0;
+
+	while (SPI_I2S_GetFlagStatus(SPI3, SPI_I2S_FLAG_RXNE) == RESET)
+	{
+		i++;
+		if(i>200)return 0;
+	}
+
+	return SPI_I2S_ReceiveData(SPI3);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Init
+ *
+ * @brief   Configuring the SPI for operation flash.
+ *
+ * @return  none
+ */
+void SPI_Flash_Init(void)
+{
+	GPIO_InitTypeDef GPIO_InitStructure={0};
+	SPI_InitTypeDef  SPI_InitStructure={0};
+
+	RCC_APB2PeriphClockCmd(	RCC_APB2Periph_GPIOA/*|RCC_APB2Periph_SPI1*/|RCC_APB2Periph_GPIOB, ENABLE );
+    RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI3, ENABLE );
+
+
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
+	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+	GPIO_Init(GPIOA, &GPIO_InitStructure);
+	GPIO_SetBits(GPIOA, GPIO_Pin_15); //SPI3_NSS
+
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
+	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+	GPIO_Init( GPIOB, &GPIO_InitStructure );//SPI3_SCK
+
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+	GPIO_Init( GPIOB, &GPIO_InitStructure );//SPI3_MISO
+
+	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+	GPIO_Init( GPIOB, &GPIO_InitStructure );//SPI3_MOSI
+
+	SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
+	SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
+	SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
+	SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
+	SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
+	SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
+	SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
+	SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
+	SPI_InitStructure.SPI_CRCPolynomial = 7;
+	SPI_Init(SPI3, &SPI_InitStructure);
+
+	SPI_Cmd(SPI3, ENABLE);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_ReadSR
+ *
+ * @brief   Read W25Qxx status register.
+ *        <20><><EFBFBD><EFBFBD>BIT7  6   5   4   3   2   1   0
+ *        <20><><EFBFBD><EFBFBD>SPR   RV  TB  BP2 BP1 BP0 WEL BUSY
+ *
+ * @return  byte - status register value.
+ */
+u8 SPI_Flash_ReadSR(void)
+{
+	u8 byte=0;
+
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+	SPI1_ReadWriteByte(W25X_ReadStatusReg);
+	byte=SPI1_ReadWriteByte(0Xff);
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+
+	return byte;
+}
+
+/*********************************************************************
+ * @fn      SPI_FLASH_Write_SR
+ *
+ * @brief   Write W25Qxx status register.
+ *
+ * @param   sr - status register value.
+ *
+ * @return  none
+ */
+void SPI_FLASH_Write_SR(u8 sr)
+{
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+	SPI1_ReadWriteByte(W25X_WriteStatusReg);
+	SPI1_ReadWriteByte(sr);
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Wait_Busy
+ *
+ * @brief   Wait flash free.
+ *
+ * @return  none
+ */
+void SPI_Flash_Wait_Busy(void)
+{
+	while((SPI_Flash_ReadSR()&0x01)==0x01);
+}
+
+/*********************************************************************
+ * @fn      SPI_FLASH_Write_Enable
+ *
+ * @brief   Enable flash write.
+ *
+ * @return  none
+ */
+void SPI_FLASH_Write_Enable(void)
+{
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_WriteEnable);
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+}
+
+/*********************************************************************
+ * @fn      SPI_FLASH_Write_Disable
+ *
+ * @brief   Disable flash write.
+ *
+ * @return  none
+ */
+void SPI_FLASH_Write_Disable(void)
+{
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_WriteDisable);
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_ReadID
+ *
+ * @brief   Read flash ID.
+ *
+ * @return  Temp - FLASH ID.
+ */
+u16 SPI_Flash_ReadID(void)
+{
+	u16 Temp = 0;
+
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+	Delay_Ms(10);
+	SPI1_ReadWriteByte(W25X_ManufactDeviceID);
+	SPI1_ReadWriteByte(0x00);
+	SPI1_ReadWriteByte(0x00);
+	SPI1_ReadWriteByte(0x00);
+	Temp|=SPI1_ReadWriteByte(0xFF)<<8;
+	Temp|=SPI1_ReadWriteByte(0xFF);
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+
+	return Temp;
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Erase_Sector
+ *
+ * @brief   Erase one sector(4Kbyte).
+ *
+ * @param   Dst_Addr - 0 <20><><EFBFBD><EFBFBD> 2047
+ *
+ * @return  none
+ */
+void SPI_Flash_Erase_Sector(u32 Dst_Addr)
+{
+	Dst_Addr*=4096;
+  SPI_FLASH_Write_Enable();
+  SPI_Flash_Wait_Busy();
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_SectorErase);
+  SPI1_ReadWriteByte((u8)((Dst_Addr)>>16));
+  SPI1_ReadWriteByte((u8)((Dst_Addr)>>8));
+  SPI1_ReadWriteByte((u8)Dst_Addr);
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+  SPI_Flash_Wait_Busy();
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Erase_Sector
+ *
+ * @brief   Erase amount sector(4Kbyte).
+ *
+ * @param   addr - Initial address(24bit).
+ *          size - Data length.
+ *
+ * @return  errcode
+ */
+int SPI_Flash_Erase(u32 Addr, int size)
+{
+    uint32_t begin;
+    uint32_t end;
+    int i;
+
+    if (size < 0
+        || Addr > SPI_FLASH_TOTAL_SIZE
+        || Addr + size > SPI_FLASH_TOTAL_SIZE)
+    {
+        return -1;
+    }
+
+    begin = Addr / SPI_FLASH_SECTOR * SPI_FLASH_SECTOR;
+    end = (Addr + size - 1) / SPI_FLASH_SECTOR * SPI_FLASH_SECTOR;
+
+    for (i = begin; i <= end; i += SPI_FLASH_SECTOR)
+    {
+        SPI_Flash_Erase_Sector(i);
+    }
+
+    return 0;
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Read
+ *
+ * @brief   Read data from flash.
+ *
+ * @param   pBuffer -
+ *          ReadAddr -Initial address(24bit).
+ *          size - Data length.
+ *
+ * @return  none
+ */
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size)
+{
+ 	u16 i;
+
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_ReadData);
+  SPI1_ReadWriteByte((u8)((ReadAddr)>>16));
+  SPI1_ReadWriteByte((u8)((ReadAddr)>>8));
+  SPI1_ReadWriteByte((u8)ReadAddr);
+
+  for(i=0;i<size;i++)
+	{
+		pBuffer[i]=SPI1_ReadWriteByte(0XFF);
+  }
+
+	GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Write_Page
+ *
+ * @brief   Write data by one page.
+ *
+ * @param   pBuffer -
+ *          WriteAddr - Initial address(24bit).
+ *          size - Data length.
+ *
+ * @return  none
+ */
+void SPI_Flash_Write_Page(u8* pBuffer,u32 WriteAddr,u16 size)
+{
+ 	u16 i;
+
+  SPI_FLASH_Write_Enable();
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_PageProgram);
+  SPI1_ReadWriteByte((u8)((WriteAddr)>>16));
+  SPI1_ReadWriteByte((u8)((WriteAddr)>>8));
+  SPI1_ReadWriteByte((u8)WriteAddr);
+
+  for(i=0;i<size;i++)
+	{
+		SPI1_ReadWriteByte(pBuffer[i]);
+	}
+
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+	SPI_Flash_Wait_Busy();
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Write_NoCheck
+ *
+ * @brief   Write data to flash.(need Erase)
+ *          All data in address rang is 0xFF.
+ *
+ * @param   pBuffer -
+ *          WriteAddr - Initial address(24bit).
+ *          size - Data length.
+ *
+ * @return  none
+ */
+void SPI_Flash_Write_NoCheck(u8* pBuffer,u32 WriteAddr,u16 size)
+{
+	u16 pageremain;
+
+	pageremain=256-WriteAddr%256;
+
+	if(size<=pageremain)pageremain=size;
+
+	while(1)
+	{
+		SPI_Flash_Write_Page(pBuffer,WriteAddr,pageremain);
+
+		if(size==pageremain)
+		{
+			break;
+		}
+	 	else
+		{
+			pBuffer+=pageremain;
+			WriteAddr+=pageremain;
+			size-=pageremain;
+
+			if(size>256)pageremain=256;
+			else pageremain=size;
+		}
+	}
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Write
+ *
+ * @brief   Write data to flash.(no need Erase)
+ *
+ * @param   pBuffer -
+ *          WriteAddr - Initial address(24bit).
+ *          size - Data length.
+ *
+ * @return  none
+ */
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size)
+{
+	u32 secpos;
+	u16 secoff;
+	u16 secremain;
+ 	u16 i;
+
+	secpos=WriteAddr/4096;
+	secoff=WriteAddr%4096;
+	secremain=4096-secoff;
+
+	if(size<=secremain)secremain=size;
+
+	while(1)
+	{
+		SPI_Flash_Read(SPI_FLASH_BUF,secpos*4096,4096);
+
+		for(i=0;i<secremain;i++)
+		{
+			if(SPI_FLASH_BUF[secoff+i]!=0XFF)break;
+		}
+
+		if(i<secremain)
+		{
+			SPI_Flash_Erase_Sector(secpos);
+
+			for(i=0;i<secremain;i++)
+			{
+				SPI_FLASH_BUF[i+secoff]=pBuffer[i];
+			}
+
+			SPI_Flash_Write_NoCheck(SPI_FLASH_BUF,secpos*4096,4096);
+
+		}
+		else{
+			SPI_Flash_Write_NoCheck(pBuffer,WriteAddr,secremain);
+		}
+
+		if(size==secremain){
+			break;
+		}
+		else
+		{
+			secpos++;
+			secoff=0;
+
+		  pBuffer+=secremain;
+			WriteAddr+=secremain;
+		  size-=secremain;
+
+			if(size>4096)
+			{
+				secremain=4096;
+			}
+			else
+			{
+				secremain=size;
+			}
+		}
+	}
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_Erase_Chip
+ *
+ * @brief   Erase all FLASH pages.
+ *
+ * @return  none
+ */
+void SPI_Flash_Erase_Chip(void)
+{
+  SPI_FLASH_Write_Enable();
+  SPI_Flash_Wait_Busy();
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_ChipErase);
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+	SPI_Flash_Wait_Busy();
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_PowerDown
+ *
+ * @brief   Enter power down mode.
+ *
+ * @return  none
+ */
+void SPI_Flash_PowerDown(void)
+{
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+  SPI1_ReadWriteByte(W25X_PowerDown);
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+  Delay_Us(3);
+}
+
+/*********************************************************************
+ * @fn      SPI_Flash_WAKEUP
+ *
+ * @brief   Power down wake up.
+ *
+ * @return  none
+ */
+void SPI_Flash_WAKEUP(void)
+{
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 0);
+	SPI1_ReadWriteByte(W25X_ReleasePowerDown);
+  GPIO_WriteBit(GPIOA, GPIO_Pin_15, 1);
+	Delay_Us(3);
+}
+
+

board/TencentOS_Tiny_CH32V307_EVB/User/spi_flash.h

@@ -0,0 +1,69 @@
+#ifndef __SPI_FLASH_H
+#define __SPI_FLASH_H
+#include "debug.h"
+#include "string.h"
+
+/* Winbond SPIFalsh ID */
+#define W25Q80  0XEF13
+#define W25Q16  0XEF14
+#define W25Q32  0XEF15
+#define W25Q64  0XEF16
+#define W25Q128 0XEF17
+
+/* Winbond W25Q64 */
+#define SPI_FLASH_PAGESIZE                         256
+#define SPI_FLASH_SECTOR                           4096
+#define SPI_FLASH_TOTAL_SIZE                       0x7FFFFF
+
+/* Winbond SPIFalsh Instruction List */
+#define W25X_WriteEnable		  0x06
+#define W25X_WriteDisable		  0x04
+#define W25X_ReadStatusReg		0x05
+#define W25X_WriteStatusReg		0x01
+#define W25X_ReadData			    0x03
+#define W25X_FastReadData		  0x0B
+#define W25X_FastReadDual		  0x3B
+#define W25X_PageProgram		  0x02
+#define W25X_BlockErase			  0xD8
+#define W25X_SectorErase		  0x20
+#define W25X_ChipErase			  0xC7
+#define W25X_PowerDown			  0xB9
+#define W25X_ReleasePowerDown	0xAB
+#define W25X_DeviceID			    0xAB
+#define W25X_ManufactDeviceID	0x90
+#define W25X_JedecDeviceID		0x9F
+
+#define SIZE sizeof(TEXT_Buf)
+u8 SPI_FLASH_BUF[4096];
+
+
+
+
+
+
+u8 SPI1_ReadWriteByte(u8 TxData);
+void SPI_Flash_Init(void);
+u8 SPI_Flash_ReadSR(void);
+void SPI_FLASH_Write_SR(u8 sr);
+void SPI_Flash_Wait_Busy(void);
+void SPI_FLASH_Write_Enable(void);
+void SPI_FLASH_Write_Disable(void);
+u16 SPI_Flash_ReadID(void);
+void SPI_Flash_Erase_Sector(u32 Dst_Addr);
+int SPI_Flash_Erase(u32 Addr, int size);
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size);
+void SPI_Flash_Write_Page(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write_NoCheck(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Erase_Chip(void);
+void SPI_Flash_PowerDown(void);
+void SPI_Flash_WAKEUP(void);
+
+#endif
+
+
+
+
+
+
+

board/TencentOS_Tiny_CH32V307_EVB/User/spi_flash_kv.c

@@ -0,0 +1,35 @@
+#include "tos_kv.h"
+#include "spi_flash.h"
+
+#define SECTOR_SIZE                 4096    // sector size for spiflash
+#define SECTOR_SIZE_LOG2            12      // 2 ^ 12 = 4096
+
+int ch32v30x_spiflash_read(uint32_t addr, void *buf, size_t len)
+{
+    SPI_Flash_Read(buf, addr, len);
+
+    return 0;
+}
+
+int ch32v30x_spiflash_write(uint32_t addr, const void *buf, size_t len)
+{
+    SPI_Flash_Write((void*)buf, addr, len);
+
+    return 0;
+}
+
+int ch32v30x_spiflash_erase(uint32_t addr, size_t size)
+{
+    return SPI_Flash_Erase(addr, size);
+}
+
+kv_flash_drv_t ch32v30x_spiflash_drv = {
+    .write  = ch32v30x_spiflash_write,
+    .read   = ch32v30x_spiflash_read,
+    .erase  = ch32v30x_spiflash_erase,
+};
+
+kv_flash_prop_t ch32v30x_spiflash_prop = {
+    .sector_size_log2   = SECTOR_SIZE_LOG2,
+    .pgm_type           = KV_FLASH_PROGRAM_TYPE_BYTE,
+};

board/TencentOS_Tiny_CH32V307_EVB/examples/fatfs_through_vfs_sample.c

@@ -0,0 +1,84 @@
+#include "tos_k.h"
+#include "tos_hal.h"
+#include "ff.h"
+#include "tos_vfs.h"
+#include "tos_fatfs_drv.h"
+#include "tos_fatfs_vfs.h"
+
+char buf[512];
+
+void application_entry(void *arg)
+{
+    int fd, ret;
+    vfs_err_t err;
+    extern vfs_blkdev_ops_t sd_dev;
+    extern vfs_fs_ops_t fatfs_ops;
+
+    err = tos_vfs_block_device_register("/dev/sd", &sd_dev);
+    if (err != VFS_ERR_NONE) {
+        printf("/dev/sd block device register failed!\n");
+    }
+
+    err = tos_vfs_fs_register("fatfs_sd", &fatfs_ops);
+    if (err != VFS_ERR_NONE) {
+        printf("fatfs_sd fs register failed!\n");
+    }
+
+    if (tos_vfs_fs_mkfs("/dev/sd", "fatfs_sd", FM_FAT32, 0) != 0) {
+        printf("mkfs failed!\n");
+    }
+
+    if (tos_vfs_fs_mount("/dev/sd", "/fs/fatfs_sd", "fatfs_sd") != 0) {
+        printf("mount failed!\n");
+    }
+
+    fd = tos_vfs_open("/fs/fatfs_sd/test_file.txt", VFS_OFLAG_CREATE_ALWAYS | VFS_OFLAG_WRITE);
+    if (fd < 0) {
+        printf("open failed!\n");
+    }
+
+    ret = tos_vfs_write(fd, "fatfs sample content", strlen("fatfs sample content"));
+    if (ret >= 0) {
+        printf("write ok\n");
+        printf("write data:\n%s\n", "fatfs sample content");
+    } else {
+        printf("write error: %d\n", ret);
+    }
+    ret = tos_vfs_close(fd);
+    if (ret < 0) {
+        printf("close failed!\n");
+    }
+
+    fd = tos_vfs_open("/fs/fatfs_sd/test_file.txt", VFS_OFLAG_EXISTING | VFS_OFLAG_READ);
+    if (fd < 0) {
+        printf("open file error!\n");
+    }
+
+    memset(buf, 0, sizeof(buf));
+    ret = tos_vfs_read(fd, buf, sizeof(buf));
+    if (ret >= 0) {
+        printf("read ok: %d\n", ret);
+        printf("read data:\n%s\n", buf);
+    } else {
+        printf("read error: %d\n", ret);
+    }
+
+    ////////////////////////////////////////////////
+    ret = tos_vfs_lseek(fd, 2, VFS_SEEK_CUR);
+    if (ret < 0) {
+        printf("lseek error\n");
+    }
+
+    memset(buf, 0, sizeof(buf));
+    ret = tos_vfs_read(fd, buf, sizeof(buf));
+    if (ret >= 0) {
+        printf("read ok: %d\n", ret);
+        printf("read data:\n%s\n", buf);
+    } else {
+        printf("read error: %d\n", ret);
+    }
+    /////////////////////////////////////////////////
+
+    tos_vfs_close(fd);
+}
+

board/TencentOS_Tiny_CH32V307_EVB/examples/hello_world.c

@@ -0,0 +1,34 @@
+#include "tos_k.h"
+
+#define TASK1_STK_SIZE       1024
+k_task_t task1;
+uint8_t task1_stk[TASK1_STK_SIZE];
+
+
+#define TASK2_STK_SIZE       1024
+k_task_t task2;
+uint8_t task2_stk[TASK2_STK_SIZE];
+
+void task1_entry(void *arg)
+{
+    while (1) {
+        printf("###I am task1\r\n");
+        tos_task_delay(2000);
+    }
+}
+
+void task2_entry(void *arg)
+{
+    while (1) {
+        printf("***I am task2\r\n");
+        tos_task_delay(1000);
+    }
+}
+
+
+void application_entry(void *arg)
+{
+    tos_task_create(&task1, "task1", task1_entry, NULL, 3, task1_stk, TASK1_STK_SIZE, 0); // Create task1
+    tos_task_create(&task2, "task2", task2_entry, NULL, 3, task2_stk, TASK2_STK_SIZE, 0);// Create task2
+}
+

board/TencentOS_Tiny_CH32V307_EVB/examples/kv_sample.c

@@ -0,0 +1,84 @@
+#include "tos_kv.h"
+
+extern kv_flash_drv_t ch32v30x_spiflash_drv;
+extern kv_flash_prop_t ch32v30x_spiflash_prop;
+
+//#define KV_SAMPLE_DEBUG
+
+void disp_value(uint8_t *value, uint32_t value_len)
+{
+    int i = 0;
+
+    printf("value_len: %d\r\n", value_len);
+
+    printf("\"");
+    for (i = 0; i < value_len; ++i) {
+        printf("%c", value[i]);
+    }
+    printf("\"\r\n\n");
+}
+
+void kv_test(void)
+{
+    int has_key;
+    kv_err_t err;
+    uint8_t value_buf[40];
+    uint32_t value_len;
+
+    err = tos_kv_init(0, 2 * 4096, &ch32v30x_spiflash_drv, &ch32v30x_spiflash_prop);
+    printf("kv init, rc: %d\r\n", err);
+
+    has_key = tos_kv_has_key("key00");
+    printf("has key[%s] ? %s\r\n\n", "key00", has_key ? "True" : "False");
+
+    err = tos_kv_set("key00", "value_00", strlen("value_00"));
+    printf("kv set(%s), rc: %d\r\n\n", "key00", err);
+
+    has_key = tos_kv_has_key("key00");
+    printf("has key[%s] ? %s\r\n\n", "key00", has_key ? "True" : "False");
+
+    if (err == KV_ERR_NONE) {
+        err = tos_kv_get("key00", value_buf, sizeof(value_buf), &value_len);
+        printf("kv get(%s), rc: %d\r\n\n", "key00", err);
+
+        if (err == KV_ERR_NONE) {
+            disp_value(value_buf, value_len);
+        }
+
+#ifdef KV_SAMPLE_DEBUG
+        tos_kv_walkthru();
+#endif
+    }
+
+    err = tos_kv_set("key00", "value_xx", strlen("value_xx"));
+    printf("kv set(%s), rc: %d\r\n\n", "key00", err);
+
+    if (err == KV_ERR_NONE) {
+        err = tos_kv_get("key00", value_buf, sizeof(value_buf), &value_len);
+        printf("kv get(%s), rc: %d\r\n\n", "key00", err);
+
+        if (err == KV_ERR_NONE) {
+            disp_value(value_buf, value_len);
+        }
+    }
+
+#ifdef KV_SAMPLE_DEBUG
+    tos_kv_walkthru();
+#endif
+
+    err = tos_kv_del("key00");
+    printf("kv del(%s), rc: %d\r\n\n", "key00", err);
+
+    has_key = tos_kv_has_key("key00");
+    printf("has key[%s] ? %s\r\n\n", "key00", has_key ? "True" : "False");
+
+#ifdef KV_SAMPLE_DEBUG
+    tos_kv_walkthru();
+#endif
+}
+
+void application_entry(void *arg)
+{
+    kv_test();
+}
+

board/TencentOS_Tiny_CH32V307_EVB/examples/mqtt_iot_explorer.c

@@ -31,7 +31,7 @@ void mqtt_demo_task(void)
     char *product_id = PRODUCT_ID;
     char *device_name = DEVICE_NAME;
     char *key = DEVICE_KEY;
-    
+
     device_info_t dev_info;
     memset(&dev_info, 0, sizeof(device_info_t));
 
@@ -39,11 +39,11 @@ void mqtt_demo_task(void)
      * Please Choose your AT Port first, default is HAL_UART_2(USART2)
     */
     ret = esp8266_tencent_firmware_sal_init(HAL_UART_PORT_2);
-    
+
     if (ret < 0) {
         printf("esp8266 tencent firmware sal init fail, ret is %d\r\n", ret);
     }
-    
+
     esp8266_tencent_firmware_join_ap("TencentOS", "tencentos");
 
     strncpy(dev_info.product_id, product_id, PRODUCT_ID_MAX_SIZE);
@@ -72,25 +72,25 @@ void mqtt_demo_task(void)
     } else {
         printf("module mqtt sub success\n");
     }
-    
+
     memset(report_topic_name, 0, sizeof(report_topic_name));
     size = snprintf(report_topic_name, TOPIC_NAME_MAX_SIZE, "$thing/up/property/%s/%s", product_id, device_name);
 
     if (size < 0 || size > sizeof(report_topic_name) - 1) {
         printf("pub topic content length not enough! content size:%d  buf size:%d", size, (int)sizeof(report_topic_name));
     }
-  
+
     while (1) {
         tos_sleep_ms(5000);
 
         /* use AT+PUB AT command */
         memset(payload, 0, sizeof(payload));
         snprintf(payload, sizeof(payload), REPORT_DATA_TEMPLATE, lightness++);
-        
+
         if (lightness > 100) {
             lightness = 0;
         }
-        
+
         if (tos_tf_module_mqtt_pub(report_topic_name, QOS0, payload) != 0) {
             printf("module mqtt pub fail\n");
             break;
@@ -100,7 +100,7 @@ void mqtt_demo_task(void)
     }
 }
 
-void application_entry1(void *arg)
+void application_entry(void *arg)
 {
     mqtt_demo_task();
     while (1) {