This commit is contained in:
daishengdong
2020-05-07 15:09:14 +08:00
13 changed files with 6115 additions and 60 deletions

View File

@@ -356,4 +356,4 @@ uint8_t LSM6DS3_Get_Step(sensor_motion_t* sensor_motion)
HAL_I2C_Mem_Read(&hi2c1, LSM6DS3_ADDR_RD, LSM6DS3_STEP_COUNTER_L, I2C_MEMADD_SIZE_8BIT, &step_l, 1, 0xFFFF);
sensor_motion->stepCount = (uint16_t)step_h<<8|step_l;
return 0;
}
}

View File

@@ -0,0 +1,43 @@
// File: STM32L0x1_0x2_0x3_DBGMCU.ini
// Version: 1.0.0
// Note: refer to STM32L0x1 reference manual (RM0377)
// refer to STM32L0x1 datasheet
// refer to STM32L0x2 reference manual (RM0376)
// refer to STM32L0x2 datasheet
// refer to STM32L0x3 reference manual (RM0367)
// refer to STM32L0x3 datasheet
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <i> Reserved bits must be kept at reset value
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
// <i> Reserved bits must be kept at reset value
// <o.31> DBG_LPTIMER_STOP <i> LPTIM1 counter stopped when core is halted
// <o.30> DBG_I2C3_STOP <i> I2C3 SMBUS timeout mode stopped when core is halted
// <o.22> DBG_I2C2_STOP <i> I2C2 SMBUS timeout mode stopped when core is halted
// <o.21> DBG_I2C1_STOP <i> I2C1 SMBUS timeout mode stopped when core is halted
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.10> DBG_RTC_STOP <i> Debug RTC stopped when core is halted
// <o.5> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.4> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.0> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
// <i> Reserved bits must be kept at reset value
// <o.5> DBG_TIM22_STOP <i> TIM22 counter stopped when core is halted
// <o.2> DBG_TIM21_STOP <i> TIM21 counter stopped when core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>

View File

@@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l0xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

View File

@@ -183,7 +183,7 @@
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@@ -203,7 +203,7 @@
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@@ -303,17 +303,65 @@
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@@ -445,7 +493,7 @@
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@@ -515,6 +563,18 @@
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<FilenameWithoutPath>stm32l0xx_hal_flash_ex2.c</FilenameWithoutPath>
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@@ -525,7 +585,7 @@
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@@ -649,7 +709,7 @@
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View File

@@ -338,7 +338,7 @@
<MiscControls></MiscControls>
<Define>USE_HAL_DRIVER,STM32L073xx,USE_HAL_DRIVER,STM32L073xx</Define>
<Undefine></Undefine>
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@@ -522,6 +542,11 @@
<FileType>1</FileType>
<FilePath>../../../../platform/vendor_bsp/st/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c</FilePath>
</File>
<File>
<FileName>stm32l0xx_hal_flash_ex2.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L0xx_HAL_Driver\Src\stm32l0xx_hal_flash_ex2.c</FilePath>
</File>
</Files>
</Group>
<Group>

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@@ -0,0 +1,125 @@
<html>
<body>
<pre>
<h1><EFBFBD>Vision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: <20>Vision V5.26.2.0
Copyright (C) 2018 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: 1 Microsoft, Microsoft, LIC=GE7GK-ZWT6B-GQR0H-WAWBW-YESB9-6JHGD
Tool Versions:
Toolchain: MDK-ARM Professional Version: 5.26.2.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.26.2.0
Dialog DLL: DARMCM1.DLL V1.19.1.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.5.0
Dialog DLL: TARMCM1.DLL V1.14.0.0
<h2>Project:</h2>
C:\Users\supowang\Documents\GitHub\TencentOS-tiny\board\NUCLEO_STM32L073RZ\KEIL\lorawan\TencentOS_tiny.uvprojx
Project File Date: 05/07/2020
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Rebuild target 'TencentOS_tiny'
assembling startup_stm32l073xx.s...
compiling usart.c...
compiling stm32l0xx_hal_msp.c...
compiling main.c...
compiling gpio.c...
compiling stm32l0xx_it_lorawan.c...
compiling mcu_init.c...
compiling i2c.c...
compiling bsp.c...
compiling LSM6DS3.c...
compiling LPS22HB.c...
compiling HTS221.c...
compiling stm32l0xx_hal_tim.c...
compiling LIS3MDL.c...
compiling stm32l0xx_hal_tim_ex.c...
compiling stm32l0xx_hal_uart.c...
compiling stm32l0xx_hal_uart_ex.c...
compiling stm32l0xx_hal_rcc_ex.c...
compiling stm32l0xx_hal_rcc.c...
compiling stm32l0xx_hal.c...
compiling stm32l0xx_hal_i2c_ex.c...
compiling stm32l0xx_hal_i2c.c...
compiling stm32l0xx_hal_flash_ramfunc.c...
compiling stm32l0xx_hal_flash.c...
compiling stm32l0xx_hal_gpio.c...
compiling stm32l0xx_hal_flash_ex.c...
compiling stm32l0xx_hal_pwr_ex.c...
compiling stm32l0xx_hal_cortex.c...
compiling stm32l0xx_hal_pwr.c...
compiling stm32l0xx_hal_dma.c...
compiling stm32l0xx_hal_flash_ex2.c...
assembling port_s.S...
compiling tos_cpu.c...
compiling system_stm32l0xx.c...
compiling port_c.c...
compiling tos_mmblk.c...
compiling tos_global.c...
compiling tos_event.c...
compiling tos_pend.c...
compiling tos_mmheap.c...
compiling tos_mutex.c...
compiling tos_robin.c...
compiling tos_sem.c...
compiling tos_sched.c...
compiling tos_time.c...
compiling tos_sys.c...
compiling tos_task.c...
compiling tos_timer.c...
compiling tos_tick.c...
compiling tos_char_fifo.c...
compiling tos_countdownlatch.c...
compiling tos_binary_heap.c...
compiling tos_completion.c...
compiling tos_mail_queue.c...
compiling tos_message_queue.c...
compiling tos_priority_message_queue.c...
compiling tos_priority_mail_queue.c...
compiling tos_ring_queue.c...
compiling lora_demo.c...
compiling cmsis_os.c...
compiling tos_priority_queue.c...
compiling RHF76.c...
compiling lora_module_wrapper.c...
compiling tos_hal_uart.c...
compiling tos_at.c...
compiling tos_at_utils.c...
linking...
Program Size: Code=31288 RO-data=532 RW-data=136 ZI-data=17328
FromELF: creating hex file...
"TencentOS_tiny\TencentOS_tiny.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.4.0.pack
ARM.CMSIS.5.4.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.1.2
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32L0xx_DFP.2.0.0.pack
Keil.STM32L0xx_DFP.2.0.0
STMicroelectronics STM32L0 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_TencentOS_tiny
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Core\Include
C:\Keil_v5\ARM\PACK\Keil\STM32L0xx_DFP\2.0.0\Drivers\CMSIS\Device\ST\STM32L0xx\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.1.2
Build Time Elapsed: 00:00:18
</pre>
</body>
</html>

File diff suppressed because it is too large Load Diff

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@@ -0,0 +1,16 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00030000 { ; load region size_region
ER_IROM1 0x08000000 0x00030000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00005000 { ; RW data
.ANY (+RW +ZI)
}
}

547
devices/m26/m26.c Normal file
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@@ -0,0 +1,547 @@
/**
* @brief Quectel M26 GSM/GPRS Module
* @author Mculover666 <2412828003@qq.com>
* @date 2020/05/07
*/
#include "m26.h"
#include "tos_at.h"
#include "tos_hal.h"
#include "sal_module_wrapper.h"
#include <stdio.h>
#include <stdbool.h>
#include <ctype.h>
static int m26_echo_close(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 300, "ATE0\r\n");
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
return -1;
}
static int m26_sim_card_check(void)
{
at_echo_t echo;
int try = 0;
char echo_buffer[32];
while (try++ < 10) {
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 2000, "AT+CPIN?\r\n");
if (echo.status != AT_ECHO_STATUS_OK) {
return -1;
}
if(strstr(echo.buffer, "READY"))
{
return 0;
}
}
return -1;
}
static int m26_signal_quality_check(void)
{
int rssi, ber;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CSQ\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
str = strstr(echo.buffer, "+CSQ:");
sscanf(str, "+CSQ:%d,%d", &rssi, &ber);
if (rssi != 99) {
return 0;
}
}
return -1;
}
static int m26_gsm_network_check(void)
{
int n, stat;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CREG?\r\n");
if (echo.status != AT_ECHO_STATUS_OK) {
return -1;
}
str = strstr(echo.buffer, "+CREG:");
sscanf(str, "+CREG:%d,%d", &n, &stat);
if (stat == 1) {
return 0;
}
}
return -1;
}
static int m26_gprs_network_check(void)
{
int n, stat;
at_echo_t echo;
char echo_buffer[32], *str;
int try = 0;
while (try++ < 10)
{
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 1000, "AT+CGREG?\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
str = strstr(echo.buffer, "+CGREG:");
sscanf(str, "+CGREG:%d,%d", &n, &stat);
if (stat == 1)
{
return 0;
}
}
return -1;
}
static int m26_close_apn(void)
{
at_echo_t echo;
char echo_buffer[32];
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 3000, "AT+QIDEACT\r\n");
if(strstr(echo.buffer, "DEACT OK") == NULL)
{
return -1;
}
return 0;
}
static int m26_send_mode_set(sal_send_mode_t mode)
{
int try = 0;
at_echo_t echo;
while (try++ < 10)
{
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 300, "AT+QIMODE=%d\r\n", mode == SAL_SEND_MODE_NORMAL ? 0 : 1);
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
}
return -1;
}
static int m26_multilink_set(sal_multilink_state_t state)
{
int try = 0;
at_echo_t echo;
while (try++ < 10)
{
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 300, "AT+QIMUX=%d\r\n", state == SAL_MULTILINK_STATE_ENABLE ? 1 : 0);
if (echo.status == AT_ECHO_STATUS_OK)
{
return 0;
}
}
return -1;
}
static int m26_recv_mode_set()
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 300, "AT+QINDI=0\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
return 0;
}
static int m26_set_apn(void)
{
at_echo_t echo;
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 300, "AT+QICSGP=1,\"CMNET\"\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
tos_at_cmd_exec(&echo, 300, "AT+QIFGCNT=0\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
tos_at_cmd_exec(&echo, 300, "AT+QIREGAPP\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
tos_at_cmd_exec(&echo, 3000, "AT+QIACT\r\n");
if (echo.status != AT_ECHO_STATUS_OK)
{
return -1;
}
tos_at_cmd_exec(&echo, 300, "AT+QILOCIP\r\n");
return 0;
}
static int m26_init(void)
{
printf("Init m26 ...\n" );
if (m26_echo_close() != 0)
{
printf("echo close failed\n");
return -1;
}
if(m26_sim_card_check() != 0)
{
printf("sim card check failed,please insert your card\n");
return -1;
}
if (m26_signal_quality_check() != 0)
{
printf("signal quality check status failed\n");
return -1;
}
if(m26_gsm_network_check() != 0)
{
printf("GSM network register status check fail\n");
return -1;
}
if(m26_gprs_network_check() != 0)
{
printf("GPRS network register status check fail\n");
return -1;
}
if(m26_close_apn() != 0)
{
printf("close apn failed\n");
return -1;
}
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
if (m26_multilink_set(SAL_MULTILINK_STATE_DISABLE) != 0)
{
printf("multilink set FAILED\n");
return -1;
}
#else
if (m26_multilink_set(SAL_MULTILINK_STATE_ENABLE) != 0)
{
printf("multilink set FAILED\n");
return -1;
}
#endif
if (m26_send_mode_set(SAL_SEND_MODE_NORMAL) != 0)
{
printf("send mode set FAILED\n");
return -1;
}
if(m26_recv_mode_set() != 0)
{
printf("recv mode set FAILED\n");
return -1;
}
if (m26_set_apn() != 0) {
printf("apn set FAILED\n");
return -1;
}
printf("Init m26 ok\n" );
return 0;
}
static int m26_connect(const char *ip, const char *port, sal_proto_t proto)
{
int id;
at_echo_t echo;
id = tos_at_channel_alloc(ip, port);
if (id == -1) {
return -1;
}
tos_at_echo_create(&echo, NULL, 0, NULL);
tos_at_cmd_exec(&echo, 2000, "%s=1\r\n", "AT+QIHEAD");
if (echo.status != AT_ECHO_STATUS_OK) {
tos_at_channel_free(id);
return -1;
}
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
tos_at_cmd_exec(&echo, 4000, "AT+QIOPEN=\"%s\",\"%s\",\"%s\"\r\n",
proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
if (echo.status == AT_ECHO_STATUS_OK) {
return id;
}
#else
tos_at_echo_create(&echo, NULL, 0, "CONNECT OK");
tos_at_cmd_exec(&echo, 4000, "AT+QIOPEN=%d,\"%s\",\"%s\",%d\r\n",
id, proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, atoi(port));
if (echo.status == AT_ECHO_STATUS_OK) {
return id;
}
#endif
tos_at_channel_free(id);
return -1;
}
static int m26_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
{
return tos_at_channel_read_timed(id, buf, len, timeout);
}
static int m26_recv(int id, void *buf, size_t len)
{
return m26_recv_timeout(id, buf, len, (uint32_t)4000);
}
int m26_send(int id, const void *buf, size_t len)
{
at_echo_t echo;
if (tos_at_global_lock_pend() != 0) {
return -1;
}
tos_at_echo_create(&echo, NULL, 0, ">");
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
tos_at_cmd_exec(&echo, 1000,
"AT+QISEND=%d\r\n",
len);
#else
tos_at_cmd_exec(&echo, 1000,
"AT+QISEND=%d,%d\r\n",
id, len);
#endif
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
tos_at_global_lock_post();
return -1;
}
tos_at_echo_create(&echo, NULL, 0, "SEND OK");
tos_at_raw_data_send(&echo, 1000, (uint8_t *)buf, len);
if (echo.status != AT_ECHO_STATUS_OK && echo.status != AT_ECHO_STATUS_EXPECT) {
tos_at_global_lock_post();
return -1;
}
tos_at_global_lock_post();
return len;
}
static void m26_transparent_mode_exit(void)
{
tos_at_cmd_exec(NULL, 500, "+++");
}
static int m26_close(int id)
{
m26_transparent_mode_exit();
#if TOS_CFG_MODULE_SINGLE_LINK_EN > 0u
tos_at_cmd_exec(NULL, 1000, "AT+QICLOSE=%d\r\n", id);
#else
tos_at_cmd_exec(NULL, 1000, "AT+QICLOSE=%d\r\n", id);
#endif
tos_at_channel_free(id);
return 0;
}
static int m26_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
{
char *str;
at_echo_t echo;
char echo_buffer[64];
tos_at_echo_create(&echo, echo_buffer, sizeof(echo_buffer), NULL);
tos_at_cmd_exec(&echo, 2000, "AT+QIDNSGIP=\"%s\"\r\n", host_name);
if (echo.status != AT_ECHO_STATUS_OK) {
return -1;
}
/*
"xxx.xxx.xxx.xxx"
*/
int seg1, seg2, seg3, seg4;
str = strstr(echo.buffer, "OK");
str += strlen("OK\r\n");
sscanf(str, "%d.%d.%d.%d", &seg1, &seg2, &seg3, &seg4);
snprintf(host_ip, host_ip_len, "%d.%d.%d.%d", seg1, seg2, seg3, seg4);
host_ip[host_ip_len - 1] = '\0';
printf("GOT IP: %s\n", host_ip);
return 0;
}
__STATIC__ void m26_incoming_data_process(void)
{
uint8_t data;
int channel_id = 0, data_len = 0, read_len;
uint8_t buffer[128];
/*
+RECEIVE: 0, <data_len>
IPD<data_len>:<data context>
+RECEIVE: prefix
0: scoket id
*/
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
while (1)
{
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
if (data == ',')
{
break;
}
channel_id = channel_id * 10 + (data - '0');
}
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
while (1)
{
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
if (data == '\r')
{
break;
}
data_len = data_len * 10 + (data - '0');
}
while (1)
{
if (tos_at_uart_read(&data, 1) != 1)
{
return;
}
if (data == ':')
{
break;
}
}
do {
#define MIN(a, b) ((a) < (b) ? (a) : (b))
read_len = MIN(data_len, sizeof(buffer));
if (tos_at_uart_read(buffer, read_len) != read_len) {
return;
}
if (tos_at_channel_write(channel_id, buffer, read_len) <= 0) {
return;
}
data_len -= read_len;
} while (data_len > 0);
return;
}
at_event_t m26_at_event[] = {
{ "+RECEIVE:", m26_incoming_data_process},
};
sal_module_t sal_module_m26 = {
.init = m26_init,
.connect = m26_connect,
.send = m26_send,
.recv_timeout = m26_recv_timeout,
.recv = m26_recv,
.close = m26_close,
.parse_domain = m26_parse_domain,
};
int m26_sal_init(hal_uart_port_t uart_port)
{
if (tos_at_init(uart_port, m26_at_event,
sizeof(m26_at_event) / sizeof(m26_at_event[0])) != 0) {
return -1;
}
if (tos_sal_module_register(&sal_module_m26) != 0) {
return -1;
}
if (tos_sal_module_init() != 0) {
return -1;
}
return 0;
}

36
devices/m26/m26.h Normal file
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@@ -0,0 +1,36 @@
/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef __M26_H__
#define __M26_H__
#include "tos_hal.h"
typedef enum sal_send_mode {
SAL_SEND_MODE_NORMAL,
SAL_SEND_MODE_TRANSPARENT,
} sal_send_mode_t;
typedef enum sal_multilink_state {
SAL_MULTILINK_STATE_ENABLE,
SAL_MULTILINK_STATE_DISABLE,
} sal_multilink_state_t;
int m26_sal_init(hal_uart_port_t uart_port);
#endif /* __M26_H__ */

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@@ -40,4 +40,4 @@ HAL_StatusTypeDef HAL_FLASH_ReadHalfWord(uint32_t Address, uint16_t* Data);
}
#endif
#endif /* __STM32L0xx_HAL_FLASH_EX2_H */
#endif /* __STM32L0xx_HAL_FLASH_EX2_H */

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@@ -86,4 +86,4 @@ HAL_StatusTypeDef HAL_FLASH_ReadHalfWord(uint32_t Address, uint16_t* Data)
*Data = *(__IO uint16_t*)Address;
}
return status;
}
}