acevest
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bce32faac2
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fix bumblebee irq entry aligment, fix eclic
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2020-01-09 20:18:18 +08:00 |
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acevest
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c17df06ff7
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reduce two instructions in risc-v irq handler
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2019-10-09 19:05:20 +08:00 |
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acevest
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19e65a4bb7
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remove extra instructions in port_sched_start
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2019-10-09 11:43:56 +08:00 |
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acevest
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21f48361de
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make irq_restore be executed likely
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2019-10-08 21:36:51 +08:00 |
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acevest
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1fc66ae527
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fix did not save & restore register x1
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2019-10-08 21:24:02 +08:00 |
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acevest
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ae3ada8dfe
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reduce one instruction when switch to irq stack
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2019-10-08 20:44:58 +08:00 |
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acevest
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93ae1c96ca
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risc-v add irq stack
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2019-10-08 20:42:40 +08:00 |
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acevest
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41ad2d711e
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adjust the order of registers on the stack
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2019-10-08 14:42:58 +08:00 |
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acevest
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b147d060fb
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save 48bytes when no need to switch task in interrupt handler
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2019-10-08 14:41:30 +08:00 |
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acevest
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e5e905e9bb
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adjust the order of registers on the stack
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2019-10-08 14:41:30 +08:00 |
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acevest
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2d419440f3
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divide bumblebee and spike irq trap entry code
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2019-10-08 14:41:30 +08:00 |
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acevest
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1e04f5b344
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risc-v reduce use 128 bytes irq stack
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2019-10-08 13:48:52 +08:00 |
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acevest
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3ef8f4eae5
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detach risc-v kernel code from gd32v lib
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2019-10-02 16:41:23 +08:00 |
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acevest
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e4038592b9
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improve risc-v context switch
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2019-09-27 17:27:59 +08:00 |
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acevest
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1747cedc61
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support GD32VF103C START board
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2019-09-24 10:29:31 +08:00 |
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acevest
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2d9580cf78
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gd32vf103 jump to task success
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2019-09-24 10:28:14 +08:00 |
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acezhao
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262dbe0b56
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move rv32i port code under gcc
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2019-09-18 12:54:03 +08:00 |
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