add event-driven framework

see examples/event_driven_at_module and examples/event_driven_hello_world, demo project: TencentOS-tiny\board\TencentOS_tiny_EVB_MX\KEIL\event_driven_hello_world
This commit is contained in:
SheldonDai
2019-09-24 17:21:58 +08:00
parent 97be1b9e93
commit 9727512631
45 changed files with 16682 additions and 7 deletions

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l4xx_it.h"
#include "tos_evtdrv.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern UART_HandleTypeDef hlpuart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
__weak void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
tos_evtdrv_tick_handler();
//HAL_SYSTICK_IRQHandler();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32L4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32l4xx.s). */
/******************************************************************************/
/**
* @brief This function handles EXTI line1 interrupt.
*/
void EXTI1_IRQHandler(void)
{
/* USER CODE BEGIN EXTI1_IRQn 0 */
/* USER CODE END EXTI1_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
/* USER CODE BEGIN EXTI1_IRQn 1 */
/* USER CODE END EXTI1_IRQn 1 */
}
/**
* @brief This function handles EXTI line2 interrupt.
*/
void EXTI2_IRQHandler(void)
{
/* USER CODE BEGIN EXTI2_IRQn 0 */
/* USER CODE END EXTI2_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
/* USER CODE BEGIN EXTI2_IRQn 1 */
/* USER CODE END EXTI2_IRQn 1 */
}
/**
* @brief This function handles EXTI line3 interrupt.
*/
void EXTI3_IRQHandler(void)
{
/* USER CODE BEGIN EXTI3_IRQn 0 */
/* USER CODE END EXTI3_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
/* USER CODE BEGIN EXTI3_IRQn 1 */
/* USER CODE END EXTI3_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
/* USER CODE BEGIN USART3_IRQn 1 */
/* USER CODE END USART3_IRQn 1 */
}
/**
* @brief This function handles LPUART1 global interrupt.
*/
void LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN LPUART1_IRQn 0 */
/* USER CODE END LPUART1_IRQn 0 */
HAL_UART_IRQHandler(&hlpuart1);
/* USER CODE BEGIN LPUART1_IRQn 1 */
/* USER CODE END LPUART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l4xx_it.h"
#include "tos_evtdrv.h"
#include "tos_at_evtdrv.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern UART_HandleTypeDef hlpuart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
__weak void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
tos_evtdrv_tick_handler();
//HAL_SYSTICK_IRQHandler();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32L4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32l4xx.s). */
/******************************************************************************/
/**
* @brief This function handles EXTI line1 interrupt.
*/
void EXTI1_IRQHandler(void)
{
/* USER CODE BEGIN EXTI1_IRQn 0 */
/* USER CODE END EXTI1_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
/* USER CODE BEGIN EXTI1_IRQn 1 */
/* USER CODE END EXTI1_IRQn 1 */
}
/**
* @brief This function handles EXTI line2 interrupt.
*/
void EXTI2_IRQHandler(void)
{
/* USER CODE BEGIN EXTI2_IRQn 0 */
/* USER CODE END EXTI2_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
/* USER CODE BEGIN EXTI2_IRQn 1 */
/* USER CODE END EXTI2_IRQn 1 */
}
/**
* @brief This function handles EXTI line3 interrupt.
*/
void EXTI3_IRQHandler(void)
{
/* USER CODE BEGIN EXTI3_IRQn 0 */
/* USER CODE END EXTI3_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
/* USER CODE BEGIN EXTI3_IRQn 1 */
/* USER CODE END EXTI3_IRQn 1 */
}
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
/* USER CODE BEGIN USART3_IRQn 1 */
/* USER CODE END USART3_IRQn 1 */
}
/**
* @brief This function handles LPUART1 global interrupt.
*/
void LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN LPUART1_IRQn 0 */
/* USER CODE END LPUART1_IRQn 0 */
tos_knl_irq_enter();
HAL_UART_IRQHandler(&hlpuart1);
tos_knl_irq_leave();
/* USER CODE BEGIN LPUART1_IRQn 1 */
/* USER CODE END LPUART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
{
extern uint8_t data;
if (huart->Instance == LPUART1) {
HAL_UART_Receive_IT(&hlpuart1, &data, 1);
tos_at_uart_write_byte(data);
}
}
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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// File: STM32L43x_44x_45x_46x.dbgconf
// Version: 1.0.0
// Note: refer to STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference manual (RM0394)
// refer to STM32L431xx, STM32L432xx, STM32L433xx, STM32L442xx, STM32L443xx, STM32L451xx, STM32L452xx, STM32L462xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o0.2> DBG_STANDBY
// <i> Debug Standby mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.1> DBG_STOP
// <i> Debug Stop mode
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
// <o0.0> DBG_SLEEP
// <i> Debug Sleep mode
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
// <o0.31> DBG_LPTIM1_STOP
// <i> LPTIM1 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
// <o0.25> DBG_CAN_STOP
// <i> bxCAN1 stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The bxCAN1 receive registers are frozen
// <o0.23> DBG_I2C3_STOP
// <i> I2C3 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C3 SMBus timeout is frozen
// <o0.22> DBG_I2C2_STOP
// <i> I2C2 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C2 SMBus timeout is frozen
// <o0.21> DBG_I2C1_STOP
// <i> I2C1 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C1 SMBus timeout is frozen
// <o0.12> DBG_IWDG_STOP
// <i> Independent watchdog counter stopped when core is halted
// <i> 0: The independent watchdog counter clock continues even if the core is halted
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
// <o0.11> DBG_WWDG_STOP
// <i> Window watchdog counter stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_RTC_STOP
// <i> RTC counter stopped when core is halted
// <i> 0: The clock of the RTC counter is fed even if the core is halted
// <i> 1: The clock of the RTC counter is stopped when the core is halted
// <o0.5> DBG_TIM7_STOP
// <i> TIM7 counter stopped when core is halted
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
// <o0.4> DBG_TIM6_STOP
// <i> TIM6 counter stopped when core is halted
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
// <o0.0> DBG_TIM2_STOP
// <i> TIM2 counter stopped when core is halted
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz1 = 0x00000000;
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
// <o0.5> DBG_LPTIM2_STOP
// <i> LPTIM2 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz2 = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
// <o0.17> DBG_TIM16_STOP
// <i> TIM16 counter stopped when core is halted
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
// <o0.16> DBG_TIM15_STOP
// <i> TIM15 counter stopped when core is halted
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
// <o0.11> DBG_TIM1_STOP
// <i> TIM1 counter stopped when core is halted
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// </h>
// <<< end of configuration section >>>

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<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

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/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>TencentOS_tiny</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32L431RCTx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\obj\</OutputDirectory>
<OutputName>TencentOS_tiny</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\list\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
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<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/CMSIS</GroupName>
<Files>
<File>
<FileName>system_stm32l4xx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Hardware</GroupName>
<Files>
<File>
<FileName>DHT11_BUS.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
</File>
<File>
<FileName>oled.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>config</GroupName>
<Files>
<File>
<FileName>tos_config.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\TOS-CONFIG\event_driven\tos_config.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>esp8266_evtdrv</GroupName>
<Files>
<File>
<FileName>esp8266_evtdrv.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\examples\event_driven_at_module\esp8266_evtdrv\esp8266_evtdrv.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>at_evtdrv</GroupName>
<Files>
<File>
<FileName>tos_at_evtdrv.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\examples\event_driven_at_module\at_evtdrv\src\tos_at_evtdrv.c</FilePath>
</File>
<File>
<FileName>tos_at_utils_evtdrv.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\examples\event_driven_at_module\at_evtdrv\src\tos_at_utils_evtdrv.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>hal</GroupName>
<Files>
<File>
<FileName>tos_hal_uart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\hal\st\stm32l4xx\src\tos_hal_uart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>sal_module_wrapper</GroupName>
<Files>
<File>
<FileName>sal_module_wrapper.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\net\sal_module_wrapper\sal_module_wrapper.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>pwrmgr</GroupName>
<Files>
<File>
<FileName>tos_pm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\pm\tos_pm.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="TencentOS_tiny"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

View File

@@ -0,0 +1,404 @@
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
;* File Name : startup_stm32l431xx.s
;* Author : MCD Application Team
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;*
;* Redistribution and use in source and binary forms, with or without modification,
;* are permitted provided that the following conditions are met:
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
;* may be used to endorse or promote products derived from this software
;* without specific prior written permission.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;*
;*******************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x1000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x100
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_IRQHandler ; ADC1
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SDMMC1_IRQHandler ; SDMMC1
DCD 0 ; Reserved
DCD SPI3_IRQHandler ; SPI3
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD COMP_IRQHandler ; COMP Interrupt
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
DCD 0 ; Reserved
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
DCD LPUART1_IRQHandler ; LP UART1 interrupt
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
DCD 0 ; Reserved
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD RNG_IRQHandler ; RNG global interrupt
DCD FPU_IRQHandler ; FPU
DCD CRS_IRQHandler ; CRS interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_PVM_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT SDMMC1_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_IRQHandler [WEAK]
EXPORT DMA2_Channel5_IRQHandler [WEAK]
EXPORT COMP_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT DMA2_Channel6_IRQHandler [WEAK]
EXPORT DMA2_Channel7_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT QUADSPI_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT SAI1_IRQHandler [WEAK]
EXPORT SWPMI1_IRQHandler [WEAK]
EXPORT TSC_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT CRS_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_PVM_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM15_IRQHandler
TIM1_UP_TIM16_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
SDMMC1_IRQHandler
SPI3_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_IRQHandler
DMA2_Channel5_IRQHandler
COMP_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
DMA2_Channel6_IRQHandler
DMA2_Channel7_IRQHandler
LPUART1_IRQHandler
QUADSPI_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
SAI1_IRQHandler
SWPMI1_IRQHandler
TSC_IRQHandler
RNG_IRQHandler
FPU_IRQHandler
CRS_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

View File

@@ -0,0 +1,97 @@
// File: STM32L43x_44x_45x_46x.dbgconf
// Version: 1.0.0
// Note: refer to STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference manual (RM0394)
// refer to STM32L431xx, STM32L432xx, STM32L433xx, STM32L442xx, STM32L443xx, STM32L451xx, STM32L452xx, STM32L462xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <o0.2> DBG_STANDBY
// <i> Debug Standby mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) The digital part is not unpowered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.1> DBG_STOP
// <i> Debug Stop mode
// <i> 0: (FCLK=Off, HCLK=Off) In STOP mode, the clock controller disables all clocks (including HCLK and FCLK).
// <i> 1: (FCLK=On, HCLK=On) When entering STOP mode, FCLK and HCLK are provided by the internal RC oscillator which remains active in STOP mode.
// <o0.0> DBG_SLEEP
// <i> Debug Sleep mode
// <i> 0: (FCLK=On, HCLK=Off) In Sleep mode, FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled.
// <i> 1: (FCLK=On, HCLK=On) When entering Sleep mode, HCLK is fed by the same clock that is provided to FCLK (system clock as previously configured by the software).
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1)
// <o0.31> DBG_LPTIM1_STOP
// <i> LPTIM1 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM1 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM1 is stopped when the core is halted
// <o0.25> DBG_CAN_STOP
// <i> bxCAN1 stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The bxCAN1 receive registers are frozen
// <o0.23> DBG_I2C3_STOP
// <i> I2C3 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C3 SMBus timeout is frozen
// <o0.22> DBG_I2C2_STOP
// <i> I2C2 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C2 SMBus timeout is frozen
// <o0.21> DBG_I2C1_STOP
// <i> I2C1 SMBUS timeout counter stopped when core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The I2C1 SMBus timeout is frozen
// <o0.12> DBG_IWDG_STOP
// <i> Independent watchdog counter stopped when core is halted
// <i> 0: The independent watchdog counter clock continues even if the core is halted
// <i> 1: The independent watchdog counter clock is stopped when the core is halted
// <o0.11> DBG_WWDG_STOP
// <i> Window watchdog counter stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_RTC_STOP
// <i> RTC counter stopped when core is halted
// <i> 0: The clock of the RTC counter is fed even if the core is halted
// <i> 1: The clock of the RTC counter is stopped when the core is halted
// <o0.5> DBG_TIM7_STOP
// <i> TIM7 counter stopped when core is halted
// <i> 0: The counter clock of TIM7 is fed even if the core is halted
// <i> 1: The counter clock of TIM7 is stopped when the core is halted
// <o0.4> DBG_TIM6_STOP
// <i> TIM6 counter stopped when core is halted
// <i> 0: The counter clock of TIM6 is fed even if the core is halted
// <i> 1: The counter clock of TIM6 is stopped when the core is halted
// <o0.0> DBG_TIM2_STOP
// <i> TIM2 counter stopped when core is halted
// <i> 0: The counter clock of TIM2 is fed even if the core is halted
// <i> 1: The counter clock of TIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz1 = 0x00000000;
// <h> Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2)
// <o0.5> DBG_LPTIM2_STOP
// <i> LPTIM2 counter stopped when core is halted
// <i> 0: The counter clock of LPTIM2 is fed even if the core is halted
// <i> 1: The counter clock of LPTIM2 is stopped when the core is halted
// </h>
DbgMCU_APB1_Fz2 = 0x00000000;
// <h> Debug MCU APB2 freeze register (DBGMCU_APB2FZR)
// <o0.17> DBG_TIM16_STOP
// <i> TIM16 counter stopped when core is halted
// <i> 0: The clock of the TIM16 counter is fed even if the core is halted
// <i> 1: The clock of the TIM16 counter is stopped when the core is halted
// <o0.16> DBG_TIM15_STOP
// <i> TIM15 counter stopped when core is halted
// <i> 0: The clock of the TIM15 counter is fed even if the core is halted
// <i> 1: The clock of the TIM15 counter is stopped when the core is halted
// <o0.11> DBG_TIM1_STOP
// <i> TIM1 counter stopped when core is halted
// <i> 0: The clock of the TIM1 counter is fed even if the core is halted
// <i> 1: The clock of the TIM1 counter is stopped when the core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// </h>
// <<< end of configuration section >>>

View File

@@ -0,0 +1,9 @@
<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

View File

@@ -0,0 +1,20 @@
/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'TencentOS_tiny'
* Target: 'TencentOS_tiny'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32l4xx.h"
#endif /* RTE_COMPONENTS_H */

File diff suppressed because one or more lines are too long

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,802 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>TencentOS_tiny</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32L431RCTx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32L4xx_DFP.2.0.0</PackID>
<PackURL>http://www.keil.com/pack</PackURL>
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32L431RCTx$CMSIS\SVD\STM32L4x1.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\obj\</OutputDirectory>
<OutputName>TencentOS_tiny</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\list\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
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<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_adc.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dac.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_dac_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dac_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_spi.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_spi_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_spi_ex.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c</FilePath>
</File>
<File>
<FileName>stm32l4xx_hal_rtc_ex.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\platform\vendor_bsp\st\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers/CMSIS</GroupName>
<Files>
<File>
<FileName>system_stm32l4xx.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Src\system_stm32l4xx.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Hardware</GroupName>
<Files>
<File>
<FileName>DHT11_BUS.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\DHT11\DHT11_BUS.c</FilePath>
</File>
<File>
<FileName>oled.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\BSP\Hardware\OLED\oled.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>config</GroupName>
<Files>
<File>
<FileName>tos_config.h</FileName>
<FileType>5</FileType>
<FilePath>..\..\TOS-CONFIG\event_driven\tos_config.h</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>pwrmgr</GroupName>
<Files>
<File>
<FileName>tos_pm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\..\kernel\pm\tos_pm.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="TencentOS_tiny"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

View File

@@ -0,0 +1,404 @@
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
;* File Name : startup_stm32l431xx.s
;* Author : MCD Application Team
;* Description : STM32L431xx Ultra Low Power devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;*
;* Redistribution and use in source and binary forms, with or without modification,
;* are permitted provided that the following conditions are met:
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
;* may be used to endorse or promote products derived from this software
;* without specific prior written permission.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;*
;*******************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x1000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x100
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_IRQHandler ; ADC1
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SDMMC1_IRQHandler ; SDMMC1
DCD 0 ; Reserved
DCD SPI3_IRQHandler ; SPI3
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD COMP_IRQHandler ; COMP Interrupt
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
DCD 0 ; Reserved
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
DCD LPUART1_IRQHandler ; LP UART1 interrupt
DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
DCD 0 ; Reserved
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD RNG_IRQHandler ; RNG global interrupt
DCD FPU_IRQHandler ; FPU
DCD CRS_IRQHandler ; CRS interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_PVM_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT SDMMC1_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_IRQHandler [WEAK]
EXPORT DMA2_Channel5_IRQHandler [WEAK]
EXPORT COMP_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT DMA2_Channel6_IRQHandler [WEAK]
EXPORT DMA2_Channel7_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT QUADSPI_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT SAI1_IRQHandler [WEAK]
EXPORT SWPMI1_IRQHandler [WEAK]
EXPORT TSC_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
EXPORT CRS_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_PVM_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM15_IRQHandler
TIM1_UP_TIM16_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
SDMMC1_IRQHandler
SPI3_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_IRQHandler
DMA2_Channel5_IRQHandler
COMP_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
DMA2_Channel6_IRQHandler
DMA2_Channel7_IRQHandler
LPUART1_IRQHandler
QUADSPI_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
SAI1_IRQHandler
SWPMI1_IRQHandler
TSC_IRQHandler
RNG_IRQHandler
FPU_IRQHandler
CRS_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

View File

@@ -0,0 +1,19 @@
#ifndef _TOS_CONFIG_H_
#define _TOS_CONFIG_H_
#include "stm32l4xx.h"
#define TOS_CFG_EVENT_DRIVEN_EN 1u
#define TOS_CFG_MMHEAP_EN 1u
#define TOS_CFG_MMHEAP_POOL_SIZE 0x8000
#define TOS_CFG_PWR_MGR_EN 0u
#define TOS_CFG_CPU_TICK_PER_SECOND 1000u
#define TOS_CFG_CPU_CLOCK (SystemCoreClock)
#endif

View File

@@ -0,0 +1,405 @@
/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef _TOS_AT_H_
#define _TOS_AT_H_
#include "tos_evtdrv.h"
#include "tos_at_utils_evtdrv.h"
#include "tos_hal.h"
#define AT_AGENT_ECHO_OK "OK"
#define AT_AGENT_ECHO_FAIL "FAIL"
#define AT_AGENT_ECHO_ERROR "ERROR"
#define AT_DATA_CHANNEL_NUM 6
#define AT_DATA_CHANNEL_FIFO_BUFFER_SIZE (2048 + 1024)
#define AT_UART_RX_FIFO_BUFFER_SIZE (2048 + 1024)
#define AT_RECV_CACHE_SIZE 2048
#define AT_CMD_BUFFER_SIZE 512
#define AT_PARSER_TASK_STACK_SIZE 2048
#define AT_PARSER_TASK_PRIO 2
#define EVENT_AT_UART_INCOMING (1u << 0)
#define EVENT_AT_PARSE_STATUS_OVERFLOW (1u << 1)
#define EVENT_AT_PARSE_STATUS_EVENT (1u << 2)
#define EVENT_AT_PARSE_STATUS_EXPECT (1U << 3)
#define EVENT_AT_PARSE_STATUS_NEWLINE (1U << 4)
typedef enum at_status_en {
AT_STATUS_OK,
AT_STATUS_ERROR,
AT_STATUS_INVALID_ARGS,
} at_status_t;
typedef struct at_cache_st {
uint8_t *buffer;
size_t buffer_size;
size_t recv_len;
size_t curr_len;
size_t last_data;
} at_cache_t;
typedef enum at_parse_status_en {
AT_PARSE_STATUS_NONE,
AT_PARSE_STATUS_NEWLINE,
AT_PARSE_STATUS_EVENT,
AT_PARSE_STATUS_EXPECT,
AT_PARSE_STATUS_OVERFLOW,
} at_parse_status_t;
typedef enum at_echo_status_en {
AT_ECHO_STATUS_NONE,
AT_ECHO_STATUS_OK,
AT_ECHO_STATUS_FAIL,
AT_ECHO_STATUS_ERROR,
AT_ECHO_STATUS_EXPECT,
} at_echo_status_t;
typedef enum at_channel_status_en {
AT_CHANNEL_STATUS_NONE, /*< usually means we are try to get a channel status with invalid id */
AT_CHANNEL_STATUS_HANGING, /*< channel is not used */
AT_CHANNEL_STATUS_WORKING, /*< channel is being using */
AT_CHANNEL_STATUS_BROKEN, /*< channel is broken(module link to remote server is broken) */
} at_channel_status_t;
typedef struct at_data_channel_st {
uint8_t is_free;
k_fifo_t rx_fifo;
uint8_t *rx_fifo_buffer;
at_channel_status_t status;
const char *remote_ip;
const char *remote_port;
} at_data_channel_t;
typedef struct at_echo_st {
char *buffer;
size_t buffer_size;
char *echo_expect;
evtdrv_task_id_t module_task_id;
evtdrv_event_flag_t event_flags;
int line_num;
at_echo_status_t status;
size_t __w_idx;
evtdrv_event_flag_t __expect_event;
} at_echo_t;
typedef void (*at_event_callback_t)(void);
typedef struct at_event_st {
const char *event_header;
at_event_callback_t event_callback;
} at_event_t;
typedef struct at_agent_st {
evtdrv_task_id_t at_task_id;
at_data_channel_t data_channel[AT_DATA_CHANNEL_NUM];
at_event_t *event_table;
size_t event_table_size;
at_echo_t *echo;
at_cache_t recv_cache;
at_timer_t timer;
char *cmd_buf;
hal_uart_t uart;
k_fifo_t uart_rx_fifo;
uint8_t *uart_rx_fifo_buffer;
} at_agent_t;
#define AT_AGENT ((at_agent_t *)(&at_agent))
/**
* @brief Write data to a channel.
* Write data to a channel with certain id.
*
* @attention None
*
* @param[in] channel_id id of the channel.
* @param[in] buffer data buffer to write.
* @param[in] buffer_len length of the buffer.
*
* @return errcode
* @retval -1 write failed(error).
* @retval none -1 the number of bytes written.
*/
int tos_at_channel_write(int channel_id, uint8_t *buffer, size_t buffer_len);
/**
* @brief Read data from a channel.
* Read data from a channel with a timeout.
*
* @attention None
*
* @param[in] channel_id id of the channel.
* @param[out] buffer buffer to hold the data read.
* @param[in] buffer_len length of the buffer.
* @param[in] timeout timeout.
*
* @return errcode
* @retval -1 read failed(error).
* @retval none -1 the number of bytes read.
*/
int tos_at_channel_read_timed(int channel_id, uint8_t *buffer, size_t buffer_len, uint32_t timeout);
/**
* @brief Read data from a channel.
* Read data from a channel.
*
* @attention None
*
* @param[in] channel_id id of the channel.
* @param[out] buffer buffer to hold the data read.
* @param[in] buffer_len length of the buffer.
*
* @return errcode
* @retval -1 read failed(error).
* @retval none -1 the number of bytes read.
*/
int tos_at_channel_read(int channel_id, uint8_t *buffer, size_t buffer_len);
/**
* @brief Allocate a channel.
* Allocate a channel with certain id.
*
* @attention None
*
* @param[in] channel_id id of the channel.
* @param[in] ip remote ip of the channel.
* @param[in] port remote port of the channel.
*
* @return errcode
* @retval -1 allocate failed(error).
* @retval none -1 the id of the channel.
*/
int tos_at_channel_alloc_id(int channel_id, const char *ip, const char *port);
/**
* @brief Allocate a channel.
* Allocate a channel.
*
* @attention None
*
* @param[in] ip remote ip of the channel.
* @param[in] port remote port of the channel.
*
* @return errcode
* @retval -1 allocate failed(error).
* @retval none -1 the id of the channel.
*/
int tos_at_channel_alloc(const char *ip, const char *port);
/**
* @brief Free a channel.
* Free a channel with certain id.
*
* @attention None
*
* @param[in] channel_id id of the channel.
*
* @return errcode
* @retval -1 free failed(error).
* @retval 0 free successfully.
*/
int tos_at_channel_free(int channel_id);
/**
* @brief Set channel broken.
*
* @attention None
*
* @param[in] channel_id id of the channel.
*
* @return errcode
* @retval -1 set failed(error).
* @retval 0 set successfully.
*/
__API__ int tos_at_channel_set_broken(int channel_id);
/**
* @brief Judge whether channel is working.
*
* @attention None
*
* @param[in] channel_id id of the channel.
*
* @return at channel status(type of at_channel_status_t)
*/
__API__ int tos_at_channel_is_working(int channel_id);
/**
* @brief Initialize the at framework.
*
* @attention None
*
* @param[in] uart_port port number of the uart thougth which the module connect to the MCU.
* @param[in] event_table the listened event table.
* @param[in] event_table_size the size of the listened event table.
*
* @return errcode
* @retval -1 initialize failed(error).
* @retval 0 initialize successfully.
*/
__API__ int tos_at_init(hal_uart_port_t uart_port, evtdrv_task_id_t at_task_id, at_event_t *event_table, size_t event_table_size);
/**
* @brief De-initialize the at framework.
*
* @attention None
*
* @return
None
*/
void tos_at_deinit(void);
/**
* @brief Create a echo struct.
*
* @attention None
*
* @param[in] echo pointer to the echo struct.
* @param[out] buffer buffer to hold the received message from the module.
* @param[in] buffer_size size of the buffer.
* @param[in] echo_expect the expected echo message.
*
* @return errcode
* @retval -1 create failed(error).
* @retval 0 create successfully.
*/
int tos_at_echo_create(at_echo_t *echo, char *buffer, size_t buffer_size, char *echo_expect, evtdrv_task_id_t module_task_id, evtdrv_event_flag_t event_flags);
/**
* @brief Execute an at command.
*
* @attention None
*
* @param[in] echo pointer to the echo struct.
* @param[in] timeout command wait timeout .
* @param[in] cmd at command.
*
* @return errcode
* @retval -1 execute failed(error).
* @retval 0 execute successfully.
*/
int tos_at_cmd_exec(at_echo_t *echo, uint32_t timeout, const char *cmd, ...);
/**
* @brief Send raw data througth uart.
*
* @attention None
*
* @param[in] echo pointer to the echo struct.
* @param[in] timeout command wait timeout .
* @param[in] buf data to send.
* @param[in] size size of the buf.
*
* @return errcode
* @retval -1 execute failed(error).
* @retval 0 execute successfully.
*/
int tos_at_raw_data_send(at_echo_t *echo, uint32_t timeout, const uint8_t *buf, size_t size);
/**
* @brief Write byte to the at uart.
* The function called by the uart interrupt, to put the data from the uart to the at framework.
*
* @attention None
*
* @param[in] data uart received data.
*
* @return None
*/
void tos_at_uart_write_byte(uint8_t data);
/**
* @brief Read data from the uart.
* Read data from the uart, usually called in listened event callback.
*
* @attention None
*
* @param[out] buffer buffer to hold the data read from the uart.
* @param[in] buffer_len length of the buffer.
*
* @return length of the data read from the uart.
*/
int tos_at_uart_read(uint8_t *buffer, size_t buffer_len);
/**
* @brief Read data from the uart.
* Read data from the uart until meet a '\n', usually called in listened event callback.
*
* @attention None
*
* @param[out] buffer buffer to hold the data read from the uart.
* @param[in] buffer_len length of the buffer.
*
* @return length of the data read from the uart.
*/
int tos_at_uart_readline(uint8_t *buffer, size_t buffer_len);
/**
* @brief Read data from the uart.
* Read data from the uart until no more incoming data, usually called in listened event callback.
*
* @attention None
*
* @param[out] buffer buffer to hold the data read from the uart.
* @param[in] buffer_len length of the buffer.
*
* @return length of the data read from the uart.
*/
int tos_at_uart_drain(uint8_t *buffer, size_t buffer_len);
/**
* @brief Get the remote ip of a channel.
* Get the remote ip of a channel with certain id.
*
* @attention None
*
* @param[in] channel_id id of the channel.
*
* @return remote ip of the channel.
*/
const char *tos_at_agent_channel_ip_get(int channel_id);
/**
* @brief Get the remote port of a channel.
* Get the remote port of a channel with certain id.
*
* @attention None
*
* @param[in] channel_id id of the channel.
*
* @return remote port of the channel.
*/
const char *tos_at_agent_channel_port_get(int channel_id);
evtdrv_event_flag_t tos_at_evtdrv_task(evtdrv_event_flag_t event);
#endif /* __AT_AGENT_H_ */

View File

@@ -0,0 +1,23 @@
#ifndef _TOS_AT_UTILS_H_
#define _TOS_AT_UTILS_H_
typedef struct at_timer_st {
evtdrv_tick_t end_time;
} at_timer_t;
void at_delay(evtdrv_tick_t tick);
void at_delay_ms(uint32_t millisec);
int at_timer_is_expired(at_timer_t *tmr);
void at_timer_countdown(at_timer_t *tmr, evtdrv_tick_t tick);
void at_timer_countdown_ms(at_timer_t *tmr, uint32_t millisec);
evtdrv_tick_t at_timer_remain(at_timer_t *tmr);
void at_timer_init(at_timer_t *tmr);
#endif

View File

@@ -0,0 +1,756 @@
#include "tos_at_evtdrv.h"
__STATIC__ at_agent_t at_agent;
__STATIC__ int at_uart_getchar(uint8_t *data, k_tick_t timeout)
{
k_err_t err;
at_delay(1);
err = tos_fifo_pop(&AT_AGENT->uart_rx_fifo, data);
return err == K_ERR_NONE ? 0 : -1;
}
__STATIC__ at_event_t *at_event_do_get(char *buffer, size_t buffer_len)
{
int i = 0;
at_event_t *event_table = K_NULL, *event = K_NULL;
size_t event_table_size = 0, event_len;
event_table = AT_AGENT->event_table;
event_table_size = AT_AGENT->event_table_size;
for (i = 0; i < event_table_size; ++i) {
event = &event_table[i];
event_len = strlen(event->event_header);
if (buffer_len < event_len) {
continue;
}
if (strncmp(event->event_header, buffer, event_len) == 0) {
return event;
}
}
return K_NULL;
}
__STATIC__ at_event_t *at_get_event(void)
{
char *buffer;
size_t buffer_len;
at_cache_t *at_cache = K_NULL;
at_cache = &AT_AGENT->recv_cache;
buffer = (char *)at_cache->buffer;
buffer_len = at_cache->recv_len;
return at_event_do_get(buffer, buffer_len);
}
__API__ int tos_at_uart_read(uint8_t *buffer, size_t buffer_len)
{
uint8_t data;
size_t read_len = 0;
while (K_TRUE) {
if (at_uart_getchar(&data, TOS_TIME_FOREVER) != 0) {
return read_len;
}
buffer[read_len++] = data;
if (read_len == buffer_len) {
return buffer_len;
}
}
}
__API__ int tos_at_uart_readline(uint8_t *buffer, size_t buffer_len)
{
uint8_t data;
size_t read_len = 0;
while (K_TRUE) {
if (at_uart_getchar(&data, TOS_TIME_FOREVER) != 0) {
return read_len;
}
buffer[read_len++] = data;
if (data == '\n') {
return read_len;
} else if (read_len == buffer_len) {
return buffer_len;
}
}
}
__API__ int tos_at_uart_drain(uint8_t *buffer, size_t buffer_len)
{
uint8_t data;
size_t read_len = 0;
while (K_TRUE) {
if (at_uart_getchar(&data, TOS_TIME_NOWAIT) != 0) {
return read_len;
}
buffer[read_len++] = data;
if (read_len == buffer_len) {
return buffer_len;
}
}
}
__STATIC__ int at_is_echo_expect(void)
{
char *recv_buffer, *expect;
size_t recv_buffer_len, expect_len;
at_echo_t *at_echo = K_NULL;
at_cache_t *at_cache = K_NULL;
at_echo = AT_AGENT->echo;
if (!at_echo || !at_echo->echo_expect) {
return 0;
}
at_cache = &AT_AGENT->recv_cache;
recv_buffer = (char *)at_cache->buffer;
recv_buffer_len = at_cache->recv_len;
expect = at_echo->echo_expect;
expect_len = strlen(expect);
if (recv_buffer_len < expect_len) {
return 0;
}
if (strncmp(expect, recv_buffer, expect_len) == 0) {
return 1;
}
return 0;
}
__STATIC__ void at_echo_buffer_copy(at_cache_t *at_cache, at_echo_t *echo)
{
uint8_t *recv_buffer = K_NULL;
size_t recv_buffer_len, copy_len, remain_len;
recv_buffer = at_cache->buffer;
recv_buffer_len = at_cache->recv_len;
remain_len = echo->buffer_size - echo->__w_idx;
if (remain_len == 0) {
return;
}
copy_len = remain_len < recv_buffer_len ? remain_len : recv_buffer_len;
memcpy(echo->buffer + echo->__w_idx, recv_buffer, copy_len);
echo->__w_idx += copy_len;
++echo->line_num;
}
__STATIC__ int at_uart_send(const uint8_t *buf, size_t size, uint32_t timeout)
{
return tos_hal_uart_write(&AT_AGENT->uart, buf, size, timeout);
}
__API__ int tos_at_echo_create(at_echo_t *echo, char *buffer, size_t buffer_size, char *echo_expect, evtdrv_task_id_t module_task_id, evtdrv_event_flag_t event_flags)
{
if (!echo) {
return -1;
}
if (buffer) {
memset(buffer, 0, buffer_size);
}
echo->buffer = buffer;
echo->buffer_size = buffer_size;
echo->echo_expect = echo_expect;
echo->module_task_id = module_task_id;
echo->event_flags = event_flags;
echo->line_num = 0;
echo->status = AT_ECHO_STATUS_NONE;
echo->__w_idx = 0;
return 0;
}
__STATIC_INLINE__ void at_echo_flush(at_echo_t *echo)
{
echo->line_num = 0;
echo->status = AT_ECHO_STATUS_NONE;
echo->__w_idx = 0;
}
__STATIC_INLINE void at_echo_attach(at_echo_t *echo)
{
at_echo_flush(echo);
AT_AGENT->echo = echo;
}
__API__ int tos_at_raw_data_send(at_echo_t *echo, uint32_t timeout, const uint8_t *buf, size_t size)
{
int ret = 0;
if (echo) {
at_echo_attach(echo);
}
ret = at_uart_send(buf, size, 0xFFFF);
return ret;
}
__STATIC__ int at_cmd_do_exec(const char *format, va_list args)
{
size_t cmd_len = 0;
cmd_len = vsnprintf(AT_AGENT->cmd_buf, AT_CMD_BUFFER_SIZE, format, args);
printf("AT CMD:\n%s\n", AT_AGENT->cmd_buf);
at_uart_send((uint8_t *)AT_AGENT->cmd_buf, cmd_len, 0xFFFF);
return 0;
}
__API__ int tos_at_cmd_exec(at_echo_t *echo, uint32_t timeout, const char *cmd, ...)
{
int ret = 0;
va_list args;
if (echo) {
at_echo_attach(echo);
}
va_start(args, cmd);
ret = at_cmd_do_exec(cmd, args);
va_end(args);
if (ret != 0) {
AT_AGENT->echo = K_NULL;
return -1;
}
return 0;
}
__STATIC__ int at_recv_cache_init(void)
{
uint8_t *buffer = K_NULL;
buffer = tos_mmheap_alloc(AT_RECV_CACHE_SIZE);
if (!buffer) {
AT_AGENT->recv_cache.buffer = K_NULL;
return - 1;
}
AT_AGENT->recv_cache.buffer = buffer;
AT_AGENT->recv_cache.buffer_size = AT_RECV_CACHE_SIZE;
AT_AGENT->recv_cache.recv_len = 0;
return 0;
}
__STATIC__ void at_recv_cache_deinit(void)
{
uint8_t *buffer = K_NULL;
buffer = AT_AGENT->recv_cache.buffer;
if (buffer) {
tos_mmheap_free(buffer);
}
AT_AGENT->recv_cache.buffer = K_NULL;
AT_AGENT->recv_cache.buffer_size = 0;
AT_AGENT->recv_cache.recv_len = 0;
}
__STATIC__ at_data_channel_t *at_channel_get(int channel_id, int is_alloc)
{
/*
if is_alloc is K_TRUE, means we are allocating a channel with certain id,
data_channel[channel_id] must be free if return none K_NULL.
otherwise if is_alloc is K_FALSE, means we are trying to get a channel with
certain id, data_channel[channel_id] must be not free if return none K_NULL.
*/
at_data_channel_t *data_channel = K_NULL;
if (channel_id < 0 || channel_id >= AT_DATA_CHANNEL_NUM) {
return K_NULL;
}
data_channel = &AT_AGENT->data_channel[channel_id];
if (is_alloc && data_channel->is_free) {
return data_channel;
}
if (!is_alloc && !data_channel->is_free) {
return data_channel;
}
return K_NULL;
}
__API__ int tos_at_channel_read(int channel_id, uint8_t *buffer, size_t buffer_len)
{
int read_len;
size_t total_read_len = 0;
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel || data_channel->status == AT_CHANNEL_STATUS_BROKEN) {
return -1;
}
while (K_TRUE) {
read_len = tos_fifo_pop_stream(&data_channel->rx_fifo, buffer, buffer_len);
total_read_len += read_len;
if (total_read_len < buffer_len) {
continue;
} else {
return buffer_len;
}
}
}
__API__ int tos_at_channel_read_timed(int channel_id, uint8_t *buffer, size_t buffer_len, uint32_t timeout)
{
int read_len = 0;
size_t total_read_len = 0;
k_tick_t tick, remain_tick;
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel || data_channel->status == AT_CHANNEL_STATUS_BROKEN) {
return -1;
}
tick = tos_millisec2tick(timeout);
at_timer_countdown(&AT_AGENT->timer, tick);
while (!at_timer_is_expired(&AT_AGENT->timer)) {
remain_tick = at_timer_remain(&AT_AGENT->timer);
if (remain_tick == (k_tick_t)0u) {
return total_read_len;
}
read_len = tos_fifo_pop_stream(&data_channel->rx_fifo, buffer + read_len, buffer_len - total_read_len);
total_read_len += read_len;
if (total_read_len < buffer_len) {
continue;
} else {
return buffer_len;
}
}
return total_read_len;
}
__API__ int tos_at_channel_write(int channel_id, uint8_t *buffer, size_t buffer_len)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel) {
return -1;
}
return tos_fifo_push_stream(&data_channel->rx_fifo, buffer, buffer_len);
}
__STATIC_INLINE__ int at_channel_construct(at_data_channel_t *data_channel, const char *ip, const char *port)
{
uint8_t *fifo_buffer = K_NULL;
fifo_buffer = tos_mmheap_alloc(AT_DATA_CHANNEL_FIFO_BUFFER_SIZE);
if (!fifo_buffer) {
return -1;
}
data_channel->rx_fifo_buffer = fifo_buffer;
tos_fifo_create(&data_channel->rx_fifo, fifo_buffer, AT_DATA_CHANNEL_FIFO_BUFFER_SIZE);
data_channel->remote_ip = ip;
data_channel->remote_port = port;
data_channel->is_free = K_FALSE;
data_channel->status = AT_CHANNEL_STATUS_WORKING;
return 0;
}
__API__ int tos_at_channel_alloc_id(int channel_id, const char *ip, const char *port)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_TRUE);
if (!data_channel) {
return -1;
}
if (at_channel_construct(data_channel, ip, port) != 0) {
return -1;
}
return channel_id;
}
__API__ int tos_at_channel_alloc(const char *ip, const char *port)
{
int id = 0;
at_data_channel_t *data_channel = K_NULL;
for (id = 0; id < AT_DATA_CHANNEL_NUM; ++id) {
data_channel = &AT_AGENT->data_channel[id];
if (data_channel->is_free) {
break;
}
}
if (id == AT_DATA_CHANNEL_NUM || !data_channel) {
return -1;
}
if (at_channel_construct(data_channel, ip, port) != 0) {
return -1;
}
return id;
}
__API__ int tos_at_channel_free(int channel_id)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel) {
return -1;
}
tos_mmheap_free(data_channel->rx_fifo_buffer);
tos_fifo_destroy(&data_channel->rx_fifo);
memset(data_channel, 0, sizeof(at_data_channel_t));
data_channel->is_free = K_TRUE;
data_channel->status = AT_CHANNEL_STATUS_HANGING;
return 0;
}
__API__ int tos_at_channel_set_broken(int channel_id)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel) {
return -1;
}
data_channel->status = AT_CHANNEL_STATUS_BROKEN;
return 0;
}
__API__ int tos_at_channel_is_working(int channel_id)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
return data_channel && data_channel->status == AT_CHANNEL_STATUS_WORKING;
}
__STATIC__ void at_channel_init(void)
{
int i = 0;
for (i = 0; i < AT_DATA_CHANNEL_NUM; ++i) {
memset(&AT_AGENT->data_channel[i], 0, sizeof(at_data_channel_t));
AT_AGENT->data_channel[i].is_free = K_TRUE;
AT_AGENT->data_channel[i].status = AT_CHANNEL_STATUS_HANGING;
}
}
__STATIC__ void at_channel_deinit(void)
{
int i = 0;
for (i = 0; i < AT_DATA_CHANNEL_NUM; ++i) {
tos_at_channel_free(i);
}
}
__API__ const char *tos_at_channel_ip_get(int channel_id)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel) {
return K_NULL;
}
return data_channel[channel_id].remote_ip;
}
__API__ const char *tos_at_channel_port_get(int channel_id)
{
at_data_channel_t *data_channel = K_NULL;
data_channel = at_channel_get(channel_id, K_FALSE);
if (!data_channel) {
return K_NULL;
}
return data_channel[channel_id].remote_port;
}
__STATIC__ void at_event_table_set(at_event_t *event_table, size_t event_table_size)
{
AT_AGENT->event_table = event_table;
AT_AGENT->event_table_size = event_table_size;
}
__API__ int tos_at_init(hal_uart_port_t uart_port, evtdrv_task_id_t at_task_id, at_event_t *event_table, size_t event_table_size)
{
void *buffer = K_NULL;
memset(AT_AGENT, 0, sizeof(at_agent_t));
AT_AGENT->at_task_id = at_task_id;
at_event_table_set(event_table, event_table_size);
at_channel_init();
at_timer_init(&AT_AGENT->timer);
buffer = tos_mmheap_alloc(AT_UART_RX_FIFO_BUFFER_SIZE);
if (!buffer) {
return -1;
}
AT_AGENT->uart_rx_fifo_buffer = (uint8_t *)buffer;
tos_fifo_create(&AT_AGENT->uart_rx_fifo, (uint8_t *)buffer, AT_UART_RX_FIFO_BUFFER_SIZE);
buffer = tos_mmheap_alloc(AT_CMD_BUFFER_SIZE);
if (!buffer) {
goto errout0;
}
AT_AGENT->cmd_buf = (char *)buffer;
if (at_recv_cache_init() != 0) {
goto errout1;
}
if (tos_hal_uart_init(&AT_AGENT->uart, uart_port) != 0) {
goto errout2;
}
return 0;
errout2:
at_recv_cache_deinit();
errout1:
tos_mmheap_free(AT_AGENT->cmd_buf);
AT_AGENT->cmd_buf = K_NULL;
errout0:
tos_mmheap_free(AT_AGENT->uart_rx_fifo_buffer);
AT_AGENT->uart_rx_fifo_buffer = K_NULL;
tos_fifo_destroy(&AT_AGENT->uart_rx_fifo);
return -1;
}
__API__ void tos_at_deinit(void)
{
tos_hal_uart_deinit(&AT_AGENT->uart);
at_recv_cache_deinit();
tos_mmheap_free(AT_AGENT->cmd_buf);
AT_AGENT->cmd_buf = K_NULL;
tos_mmheap_free(AT_AGENT->uart_rx_fifo_buffer);
AT_AGENT->uart_rx_fifo_buffer = K_NULL;
tos_fifo_destroy(&AT_AGENT->uart_rx_fifo);
at_channel_deinit();
}
/* To completely decouple the uart intterupt and at agent, we need a more powerful
hal(driver framework), that would be a huge work, we place it in future plans. */
__API__ void tos_at_uart_write_byte(uint8_t data)
{
if (tos_fifo_push(&AT_AGENT->uart_rx_fifo, data) == K_ERR_NONE) {
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_UART_INCOMING);
}
}
__STATIC__ void at_echo_event_emit(at_echo_t *echo)
{
tos_evtdrv_event_set(echo->module_task_id, echo->event_flags);
}
__STATIC__ void at_echo_status_set(at_echo_t *echo)
{
char *buffer;
at_cache_t *at_cache;
at_cache = &AT_AGENT->recv_cache;
buffer = (char *)at_cache->buffer;
if (strstr(buffer, AT_AGENT_ECHO_OK) != K_NULL) {
echo->status = AT_ECHO_STATUS_OK;
} else if (strstr(buffer, AT_AGENT_ECHO_ERROR) != K_NULL) {
echo->status = AT_ECHO_STATUS_ERROR;
} else if (strstr(buffer, AT_AGENT_ECHO_FAIL) != K_NULL) {
echo->status = AT_ECHO_STATUS_FAIL;
}
}
__STATIC__ void at_recv_cache_reset(void)
{
at_cache_t *recv_cache = K_NULL;
recv_cache = &AT_AGENT->recv_cache;
recv_cache->recv_len = 0;
recv_cache->curr_len = 0;
recv_cache->last_data = 0;
memset(recv_cache->buffer, 0, recv_cache->buffer_size);
}
evtdrv_event_flag_t tos_at_evtdrv_task(evtdrv_event_flag_t event)
{
at_echo_t *at_echo = K_NULL;
at_event_t *at_event = K_NULL;
at_cache_t *recv_cache = K_NULL;
recv_cache = &AT_AGENT->recv_cache;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
at_recv_cache_reset();
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
return TOS_EVTDRV_SYS_EVENT_MSG;
}
if (event & EVENT_AT_PARSE_STATUS_OVERFLOW) {
// TODO: fix me
at_recv_cache_reset();
return EVENT_AT_PARSE_STATUS_OVERFLOW;
}
if (event & EVENT_AT_PARSE_STATUS_EVENT) {
at_event = at_get_event();
if (at_event && at_event->event_callback) {
at_event->event_callback();
}
at_recv_cache_reset();
return EVENT_AT_PARSE_STATUS_EVENT;
}
if (event & EVENT_AT_PARSE_STATUS_EXPECT ||
event & EVENT_AT_PARSE_STATUS_NEWLINE) {
printf("--->%s\n", recv_cache->buffer);
at_echo = AT_AGENT->echo;
if (!at_echo) {
at_recv_cache_reset();
return event & EVENT_AT_PARSE_STATUS_EXPECT ?
EVENT_AT_PARSE_STATUS_EXPECT : EVENT_AT_PARSE_STATUS_NEWLINE;
}
if (at_echo->status == AT_ECHO_STATUS_NONE) {
if (event & EVENT_AT_PARSE_STATUS_EXPECT) {
at_echo->status = AT_ECHO_STATUS_EXPECT;
} else if (event & EVENT_AT_PARSE_STATUS_NEWLINE) {
at_echo_status_set(at_echo);
}
if (at_echo->status != AT_ECHO_STATUS_NONE) {
at_echo_event_emit(at_echo);
}
}
if (at_echo->buffer) {
at_echo_buffer_copy(recv_cache, at_echo);
}
at_recv_cache_reset();
return event & EVENT_AT_PARSE_STATUS_EXPECT ?
EVENT_AT_PARSE_STATUS_EXPECT : EVENT_AT_PARSE_STATUS_NEWLINE;
}
if (event & EVENT_AT_UART_INCOMING) {
uint8_t data;
if (at_uart_getchar(&data, TOS_TIME_FOREVER) != 0) {
return EVENT_AT_UART_INCOMING;
}
if (data == '\0') {
return EVENT_AT_UART_INCOMING;
}
if (recv_cache->curr_len < recv_cache->buffer_size) {
recv_cache->buffer[recv_cache->curr_len++] = data;
recv_cache->recv_len = recv_cache->curr_len;
} else {
recv_cache->buffer[recv_cache->buffer_size - 1] = '\0';
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_PARSE_STATUS_OVERFLOW);
return EVENT_AT_UART_INCOMING;
}
if (at_get_event() != K_NULL) {
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_PARSE_STATUS_EVENT);
return EVENT_AT_UART_INCOMING;
}
if (at_is_echo_expect()) {
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_PARSE_STATUS_EXPECT);
return EVENT_AT_UART_INCOMING;
}
if (data == '\n' && recv_cache->last_data == '\r') { // 0xd 0xa
recv_cache->curr_len -= 1;
recv_cache->buffer[recv_cache->curr_len - 1] = '\n';
recv_cache->recv_len = recv_cache->curr_len;
if (recv_cache->curr_len == 1) { // only a blank newline, ignore
recv_cache->last_data = 0;
recv_cache->curr_len = 0;
recv_cache->recv_len = 0;
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_PARSE_STATUS_NEWLINE);
return EVENT_AT_UART_INCOMING;
}
tos_evtdrv_event_set(AT_AGENT->at_task_id, EVENT_AT_PARSE_STATUS_NEWLINE);
return EVENT_AT_UART_INCOMING;
}
recv_cache->last_data = data;
return EVENT_AT_UART_INCOMING;
}
return TOS_EVTDRV_EVENT_NONE;
}

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@@ -0,0 +1,79 @@
#include "tos_evtdrv.h"
#include "tos_at_evtdrv.h"
void at_delay(evtdrv_tick_t tick)
{
evtdrv_tick_t now;
now = tos_evtdrv_systick_get();
while ((tos_evtdrv_systick_get() - now) < tick) {
;
}
}
void at_delay_ms(uint32_t millisec)
{
evtdrv_tick_t tick;
tick = tos_evtdrv_millisec2tick(millisec);
at_delay(tick);
}
int at_timer_is_expired(at_timer_t *tmr)
{
evtdrv_tick_t now;
if (!tmr) {
return -1;
}
now = tos_evtdrv_systick_get();
return now >= tmr->end_time;
}
void at_timer_countdown(at_timer_t *tmr, evtdrv_tick_t tick)
{
evtdrv_tick_t now;
if (!tmr) {
return;
}
now = tos_evtdrv_systick_get();
tmr->end_time = now + tick;
}
void at_timer_countdown_ms(at_timer_t *tmr, uint32_t millisec)
{
evtdrv_tick_t expire;
if (!tmr) {
return;
}
expire = tos_millisec2tick(millisec);
at_timer_countdown(tmr, expire);
}
evtdrv_tick_t at_timer_remain(at_timer_t *tmr)
{
evtdrv_tick_t now;
now = tos_evtdrv_systick_get();
if (at_timer_is_expired(tmr)) {
return (evtdrv_tick_t)0u;
}
return tmr->end_time - now;
}
void at_timer_init(at_timer_t *tmr)
{
if (!tmr) {
return;
}
tmr->end_time = 0;
}

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@@ -0,0 +1,687 @@
#include "tos_at_evtdrv.h"
#include "esp8266_evtdrv.h"
#include "sal_module_wrapper.h"
#include "stdio.h"
#include "stdbool.h"
#include "ctype.h"
typedef struct esp8266_send_info_st {
int sockid;
void *buf;
size_t len;
} esp8266_send_info_t;
typedef struct esp8266_domain_parse_info_st {
char *host_ip;
size_t host_ip_len;
} esp8266_domain_parse_info_t;
typedef struct esp8266_context_st {
at_echo_t echo;
char echo_buffer[64];
int try;
evtdrv_task_id_t self_task_id;
int sockid;
evtdrv_task_id_t caller_task_id;
char *ssid;
char *pwd;
esp8266_send_info_t send_info;
esp8266_domain_parse_info_t domain_parse_info;
} esp8266_context_t;
esp8266_context_t esp8266_context;
#define CONTEXT(field) (esp8266_context.##field)
static void esp8266_restore(void)
{
tos_at_echo_create(&CONTEXT(echo), NULL, 0, NULL, CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_RESTORE);
tos_at_cmd_exec(&CONTEXT(echo), 3000, "AT+RESTORE\r\n");
}
static void esp8266_echo_close(void)
{
tos_at_echo_create(&CONTEXT(echo), NULL, 0, NULL, CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_ECHO_CLOSE);
tos_at_cmd_exec(&CONTEXT(echo), 1000, "ATE0\r\n");
}
static void esp8266_net_mode_set(sal_net_mode_t mode)
{
char *cmd = NULL;
switch (mode) {
case SAL_NET_MODE_STA:
cmd = "AT+CWMODE=1\r\n";
break;
case SAL_NET_MODE_AP:
cmd = "AT+CWMODE=2\r\n";
break;
case SAL_NET_MODE_STA_AP:
cmd = "AT+CWMODE=3\r\n";
break;
default:
return;
}
tos_at_echo_create(&CONTEXT(echo), NULL, 0, "no change", CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_NET_MODE_SET);
tos_at_cmd_exec(&CONTEXT(echo), 1000, cmd);
}
static void esp8266_send_mode_set(sal_send_mode_t mode)
{
tos_at_echo_create(&CONTEXT(echo), NULL, 0, NULL, CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_SEND_MODE_SET);
tos_at_cmd_exec(&CONTEXT(echo), 1000, "AT+CIPMODE=%d\r\n", mode == SAL_SEND_MODE_NORMAL ? 0 : 1);
}
static void esp8266_multilink_set(sal_multilink_state_t state)
{
tos_at_echo_create(&CONTEXT(echo), NULL, 0, NULL, CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_MULTILINK_SET);
tos_at_cmd_exec(&CONTEXT(echo), 500, "AT+CIPMUX=%d\r\n", state == SAL_MULTILINK_STATE_ENABLE ? 1 : 0);
}
static void esp8266_do_join_ap(const char *ssid, const char *pwd)
{
tos_at_echo_create(&CONTEXT(echo), NULL, 0, "OK", CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_JOIN_AP);
tos_at_cmd_exec(&CONTEXT(echo), 1000, "AT+CWJAP=\"%s\",\"%s\"\r\n", ssid, pwd);
}
static int esp8266_do_connect(const char *ip, const char *port, sal_proto_t proto)
{
CONTEXT(sockid) = tos_at_channel_alloc(ip, port);
if (CONTEXT(sockid) == -1) {
return -1;
}
tos_at_echo_create(&CONTEXT(echo), NULL, 0, "OK", CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_CONNECT);
tos_at_cmd_exec(&CONTEXT(echo), 10000,
"AT+CIPSTART=%d,\"%s\",\"%s\",%s\r\n",
CONTEXT(sockid), proto == TOS_SAL_PROTO_UDP ? "UDP" : "TCP", ip, port);
return 0;
}
static int esp8266_recv_timeout(int id, void *buf, size_t len, uint32_t timeout)
{
return tos_at_channel_read_timed(id, buf, len, timeout);
}
static int esp8266_recv(int id, void *buf, size_t len)
{
return esp8266_recv_timeout(id, buf, len, (uint32_t)4000);
}
static int esp8266_is_link_broken(const char *echo_buffer)
{
if (strstr(echo_buffer, "CLOSED") ||
strstr(echo_buffer, "link is not valid")) {
return 1;
}
return 0;
}
static int esp8266_do_send(int id, const void *buf, size_t len)
{
tos_at_echo_create(&CONTEXT(echo), CONTEXT(echo_buffer), sizeof(CONTEXT(echo_buffer)), "SEND OK", CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_SEND);
/*
ATTENTION: we should wait util "SEND OK" is echoed, otherwise the next
time we execute at command, the esp8266 maybe in a "busy s ..." state.
*/
tos_at_raw_data_send(&CONTEXT(echo), 10000, (uint8_t *)buf, len);
return 0;
}
static int esp8266_do_send_ready(int id, const void *buf, size_t len)
{
if (!tos_at_channel_is_working(id)) {
return -1;
}
CONTEXT(sockid) = id;
tos_at_echo_create(&CONTEXT(echo), CONTEXT(echo_buffer), sizeof(CONTEXT(echo_buffer)), ">", CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_SEND_READY);
tos_at_cmd_exec(&CONTEXT(echo), 1000,
"AT+CIPSEND=%d,%d\r\n",
id, len);
return 0;
}
static int esp8266_do_close(int id)
{
tos_at_cmd_exec(NULL, 1000, "AT+CIPCLOSE=%d\r\n", id);
tos_at_channel_free(id);
return 0;
}
static int esp8266_close(int id)
{
esp8266_imsg_close_t *msg_close;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_close_t));
msg_close = (esp8266_imsg_close_t *)msg_body;
msg_close->header.event = EVENT_IMSG_ESP8266_CLOSE;
msg_close->header.sender_id = tos_evtdrv_task_self();
msg_close->sockid = id;
if (tos_evtdrv_msg_send(CONTEXT(self_task_id), (evtdrv_msg_body_t)msg_close) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
static int esp8266_send(int id, const void *buf, size_t len)
{
esp8266_imsg_send_t *msg_send;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_send_t));
msg_send = (esp8266_imsg_send_t *)msg_body;
msg_send->header.event = EVENT_IMSG_ESP8266_SEND;
msg_send->header.sender_id = tos_evtdrv_task_self();
msg_send->sockid = id;
msg_send->buf = (void *)buf;
msg_send->len = len;
if (tos_evtdrv_msg_send(CONTEXT(self_task_id), (evtdrv_msg_body_t)msg_send) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
static int esp8266_connect(const char *ip, const char *port, sal_proto_t proto)
{
esp8266_imsg_connect_t *msg_connect;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_connect_t));
msg_connect = (esp8266_imsg_connect_t *)msg_body;
msg_connect->header.event = EVENT_IMSG_ESP8266_CONNECT;
msg_connect->header.sender_id = tos_evtdrv_task_self();
msg_connect->ip = (char *)ip;
msg_connect->port = (char *)port;
msg_connect->proto = proto;
if (tos_evtdrv_msg_send(CONTEXT(self_task_id), (evtdrv_msg_body_t)msg_connect) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
static int esp8266_do_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
{
tos_at_echo_create(&CONTEXT(echo), CONTEXT(echo_buffer), sizeof(CONTEXT(echo_buffer)), NULL, CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_DOMAIN_PARSE);
tos_at_cmd_exec(&CONTEXT(echo), 2000, "AT+CIPDOMAIN=\"%s\"\r\n", host_name);
return 0;
}
static int esp8266_parse_domain(const char *host_name, char *host_ip, size_t host_ip_len)
{
esp8266_imsg_domain_parse_t *msg_domain_parse;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_domain_parse_t));
msg_domain_parse = (esp8266_imsg_domain_parse_t *)msg_body;
msg_domain_parse->header.event = EVENT_IMSG_ESP8266_DOMAIN_PARSE;
msg_domain_parse->header.sender_id = tos_evtdrv_task_self();
msg_domain_parse->host_name = (char *)host_name;
msg_domain_parse->host_ip = (char *)host_ip;
msg_domain_parse->host_ip_len = host_ip_len;
if (tos_evtdrv_msg_send(CONTEXT(self_task_id), (evtdrv_msg_body_t)msg_domain_parse) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
static int esp8266_init(void)
{
if (tos_evtdrv_event_set(CONTEXT(self_task_id), EVENT_INTERNAL_ESP8266_INIT) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
__STATIC__ uint8_t incoming_data_buffer[512];
__STATIC__ void esp8266_incoming_data_process(void)
{
uint8_t data;
int channel_id = 0, data_len = 0;
/*
+IPD,0,44:1234...
+IPD: prefix
0: link id
44: data length
1234...: data content
*/
while (1) {
if (tos_at_uart_read(&data, 1) != 1) {
return;
}
if (data == ',') {
break;
}
channel_id = channel_id * 10 + (data - '0');
}
while (1) {
if (tos_at_uart_read(&data, 1) != 1) {
return;
}
if (data == ':') {
break;
}
data_len = data_len * 10 + (data - '0');
}
if (data_len > sizeof(incoming_data_buffer)) {
data_len = sizeof(incoming_data_buffer);
}
if (tos_at_uart_read(incoming_data_buffer, data_len) != data_len) {
return;
}
tos_at_channel_write(channel_id, incoming_data_buffer, data_len);
}
at_event_t esp8266_at_event[] = {
{ "+IPD,", esp8266_incoming_data_process },
};
sal_module_t sal_module_esp8266 = {
.init = esp8266_init,
.connect = esp8266_connect,
.send = esp8266_send,
.recv_timeout = esp8266_recv_timeout,
.recv = esp8266_recv,
.close = esp8266_close,
.parse_domain = esp8266_parse_domain,
};
int esp8266_join_ap(const char *ssid, const char *pwd)
{
esp8266_imsg_join_ap_t *msg_join_ap;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_join_ap_t));
msg_join_ap = (esp8266_imsg_join_ap_t *)msg_body;
msg_join_ap->header.event = EVENT_IMSG_ESP8266_JOIN_AP;
msg_join_ap->header.sender_id = tos_evtdrv_task_self();
msg_join_ap->ssid = (char *)ssid;
msg_join_ap->pwd = (char *)pwd;
if (tos_evtdrv_msg_send(CONTEXT(self_task_id), (evtdrv_msg_body_t)msg_join_ap) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
int esp8266_sal_init(hal_uart_port_t uart_port, evtdrv_task_id_t at_task_id, evtdrv_task_id_t esp8266_task_id)
{
esp8266_imsg_init_t *msg_init;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_imsg_init_t));
msg_init = (esp8266_imsg_init_t *)msg_body;
msg_init->header.event = EVENT_IMSG_ESP8266_INIT;
msg_init->header.sender_id = tos_evtdrv_task_self();
msg_init->uart_port = uart_port;
msg_init->at_task_id = at_task_id;
msg_init->esp8266_task_id = esp8266_task_id;
if (tos_evtdrv_msg_send(esp8266_task_id, (evtdrv_msg_body_t)msg_init) != EVTDRV_ERR_NONE) {
return -1;
}
return 0;
}
static void esp8266_send_msg_reply(int write_len)
{
esp8266_omsg_send_t *omsg_send;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_omsg_send_t));
omsg_send = (esp8266_omsg_send_t *)msg_body;
omsg_send->header.event = EVENT_OMSG_ESP8266_SEND;
omsg_send->header.sender_id = tos_evtdrv_task_self();
omsg_send->write_len = write_len;
tos_evtdrv_msg_send(CONTEXT(caller_task_id), (evtdrv_msg_body_t)omsg_send);
}
static void esp8266_connect_msg_reply(int sockid)
{
esp8266_omsg_connect_t *omsg_connect;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_omsg_connect_t));
omsg_connect = (esp8266_omsg_connect_t *)msg_body;
omsg_connect->header.event = EVENT_OMSG_ESP8266_CONNECT;
omsg_connect->header.sender_id = tos_evtdrv_task_self();
omsg_connect->sockid = sockid;
tos_evtdrv_msg_send(CONTEXT(caller_task_id), (evtdrv_msg_body_t)omsg_connect);
}
static void esp8266_common_msg_reply(evtdrv_event_flag_t event_flag, int return_code)
{
esp8266_omsg_common_t *omsg_common;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(esp8266_omsg_common_t));
omsg_common = (esp8266_omsg_common_t *)msg_body;
omsg_common->header.event = event_flag;
omsg_common->header.sender_id = tos_evtdrv_task_self();
omsg_common->return_code = return_code;
tos_evtdrv_msg_send(CONTEXT(caller_task_id), (evtdrv_msg_body_t)omsg_common);
}
evtdrv_event_flag_t esp8266_task(evtdrv_event_flag_t event)
{
esp8266_event_hdr_t *event_hdr;
esp8266_imsg_init_t *imsg_init;
esp8266_imsg_join_ap_t *imsg_join_ap;
esp8266_imsg_connect_t *imsg_connect;
esp8266_imsg_send_t *imsg_send;
esp8266_imsg_close_t *imsg_close;
esp8266_imsg_domain_parse_t *imsg_domain_parse;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
while (event_hdr = (esp8266_event_hdr_t *)tos_evtdrv_msg_recv()) {
switch (event_hdr->event) {
case EVENT_IMSG_ESP8266_INIT:
imsg_init = (esp8266_imsg_init_t *)event_hdr;
CONTEXT(caller_task_id) = event_hdr->sender_id;
CONTEXT(self_task_id) = imsg_init->esp8266_task_id;
CONTEXT(try) = 0;
if (tos_at_init(imsg_init->uart_port, imsg_init->at_task_id, esp8266_at_event,
sizeof(esp8266_at_event) / sizeof(esp8266_at_event[0])) != 0) {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
break;
}
if (tos_sal_module_register(&sal_module_esp8266) != 0) {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
break;
}
tos_sal_module_init();
break;
case EVENT_IMSG_ESP8266_JOIN_AP:
imsg_join_ap = (esp8266_imsg_join_ap_t *)event_hdr;
CONTEXT(ssid) = imsg_join_ap->ssid;
CONTEXT(pwd) = imsg_join_ap->pwd;
esp8266_do_join_ap(imsg_join_ap->ssid, imsg_join_ap->pwd);
break;
case EVENT_IMSG_ESP8266_CONNECT:
imsg_connect = (esp8266_imsg_connect_t *)event_hdr;
if (esp8266_do_connect(imsg_connect->ip, imsg_connect->port, imsg_connect->proto) < 0) {
esp8266_connect_msg_reply(-1);
}
break;
case EVENT_IMSG_ESP8266_SEND:
imsg_send = (esp8266_imsg_send_t *)event_hdr;
CONTEXT(send_info).sockid = imsg_send->sockid;
CONTEXT(send_info).buf = imsg_send->buf;
CONTEXT(send_info).len = imsg_send->len;
if (esp8266_do_send_ready(imsg_send->sockid, imsg_send->buf, imsg_send->len) != 0) {
esp8266_send_msg_reply(-1);
}
break;
case EVENT_IMSG_ESP8266_CLOSE:
imsg_close = (esp8266_imsg_close_t *)event_hdr;
esp8266_do_close(imsg_close->sockid);
break;
case EVENT_IMSG_ESP8266_DOMAIN_PARSE:
imsg_domain_parse = (esp8266_imsg_domain_parse_t *)event_hdr;
CONTEXT(domain_parse_info).host_ip = imsg_domain_parse->host_ip;
CONTEXT(domain_parse_info).host_ip_len = imsg_domain_parse->host_ip_len;
esp8266_do_parse_domain(imsg_domain_parse->host_name, imsg_domain_parse->host_ip, imsg_domain_parse->host_ip_len);
break;
}
tos_evtdrv_msg_free((evtdrv_msg_body_t)event_hdr);
}
return TOS_EVTDRV_SYS_EVENT_MSG;
}
if (event & EVENT_INTERNAL_ESP8266_INIT) {
esp8266_restore();
return EVENT_INTERNAL_ESP8266_INIT;
}
if (event & EVENT_INTERNAL_ESP8266_RESTORE) {
at_delay_ms(3000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
if (CONTEXT(try)++ < 10) {
esp8266_restore();
} else {
printf("restore failed\n");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
}
} else {
esp8266_echo_close();
}
CONTEXT(try) = 0;
return EVENT_INTERNAL_ESP8266_RESTORE;
}
if (event & EVENT_INTERNAL_ESP8266_ECHO_CLOSE) {
at_delay_ms(2000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
printf("echo close failed\n");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
} else {
esp8266_net_mode_set(SAL_NET_MODE_STA);
}
return EVENT_INTERNAL_ESP8266_ECHO_CLOSE;
}
if (event & EVENT_INTERNAL_ESP8266_NET_MODE_SET) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK &&
CONTEXT(echo).status != AT_ECHO_STATUS_EXPECT) {
if (CONTEXT(try)++ < 10) {
esp8266_net_mode_set(SAL_NET_MODE_STA);
} else {
printf("net mode set failed\n");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
}
} else {
esp8266_send_mode_set(SAL_SEND_MODE_NORMAL);
}
CONTEXT(try) = 0;
return EVENT_INTERNAL_ESP8266_NET_MODE_SET;
}
if (event & EVENT_INTERNAL_ESP8266_SEND_MODE_SET) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
if (CONTEXT(try)++ < 10) {
esp8266_send_mode_set(SAL_SEND_MODE_NORMAL);
} else {
printf("send mode set failed\n");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
}
} else {
esp8266_multilink_set(SAL_MULTILINK_STATE_ENABLE);
}
CONTEXT(try) = 0;
return EVENT_INTERNAL_ESP8266_SEND_MODE_SET;
}
if (event & EVENT_INTERNAL_ESP8266_MULTILINK_SET) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
if (CONTEXT(try)++ < 10) {
esp8266_multilink_set(SAL_MULTILINK_STATE_ENABLE);
} else {
printf("multilink set failed\n");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, -1);
}
} else {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_INIT, 0);
}
CONTEXT(try) = 0;
return EVENT_INTERNAL_ESP8266_MULTILINK_SET;
}
if (event & EVENT_INTERNAL_ESP8266_JOIN_AP) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_EXPECT) {
if (CONTEXT(try)++ < 10) {
esp8266_do_join_ap(CONTEXT(ssid), CONTEXT(pwd));
} else {
printf("esp8266 join ap failed");
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_JOIN_AP, -1);
}
} else {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_JOIN_AP, 0);
}
CONTEXT(try) = 0;
return EVENT_INTERNAL_ESP8266_JOIN_AP;
}
if (event & EVENT_INTERNAL_ESP8266_CONNECT) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_EXPECT &&
CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
printf("esp8266 connect failed\n");
esp8266_connect_msg_reply(-1);
} else {
esp8266_connect_msg_reply(CONTEXT(sockid));
}
return EVENT_INTERNAL_ESP8266_CONNECT;
}
if (event & EVENT_INTERNAL_ESP8266_SEND_READY) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK &&
CONTEXT(echo).status != AT_ECHO_STATUS_EXPECT) {
if (esp8266_is_link_broken((const char *)CONTEXT(echo).buffer)) {
tos_at_channel_set_broken(CONTEXT(sockid));
}
esp8266_send_msg_reply(-1);
} else {
esp8266_do_send(CONTEXT(send_info).sockid, CONTEXT(send_info).buf, CONTEXT(send_info).len);
}
return EVENT_INTERNAL_ESP8266_SEND_READY;
}
if (event & EVENT_INTERNAL_ESP8266_SEND) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_EXPECT) {
if (esp8266_is_link_broken((const char *)CONTEXT(echo).buffer)) {
tos_at_channel_set_broken(CONTEXT(sockid));
}
esp8266_send_msg_reply(-1);
} else {
esp8266_send_msg_reply(CONTEXT(send_info).len);
}
return EVENT_INTERNAL_ESP8266_SEND;
}
if (event & EVENT_INTERNAL_ESP8266_DOMAIN_PARSE) {
at_delay_ms(1000);
if (CONTEXT(echo).status != AT_ECHO_STATUS_OK) {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_DOMAIN_PARSE, -1);
} else {
/*
+CIPDOMAIN:183.232.231.172
*/
char *str = strstr((const char *)CONTEXT(echo_buffer), "+CIPDOMAIN:");
if (!str) {
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_DOMAIN_PARSE, -1);
} else {
char *host_ip_buffer = CONTEXT(domain_parse_info).host_ip;
size_t host_ip_buffer_len = CONTEXT(domain_parse_info).host_ip_len;
sscanf(str, "+CIPDOMAIN:%s", host_ip_buffer);
host_ip_buffer[host_ip_buffer_len - 1] = '\0';
printf("GOT IP: %s\n", host_ip_buffer);
esp8266_common_msg_reply(EVENT_OMSG_ESP8266_DOMAIN_PARSE, 0);
}
}
return EVENT_INTERNAL_ESP8266_DOMAIN_PARSE;
}
return TOS_EVTDRV_EVENT_NONE;
}

View File

@@ -0,0 +1,134 @@
/*----------------------------------------------------------------------------
* Tencent is pleased to support the open source community by making TencentOS
* available.
*
* Copyright (C) 2019 THL A29 Limited, a Tencent company. All rights reserved.
* If you have downloaded a copy of the TencentOS binary from Tencent, please
* note that the TencentOS binary is licensed under the BSD 3-Clause License.
*
* If you have downloaded a copy of the TencentOS source code from Tencent,
* please note that TencentOS source code is licensed under the BSD 3-Clause
* License, except for the third-party components listed below which are
* subject to different license terms. Your integration of TencentOS into your
* own projects may require compliance with the BSD 3-Clause License, as well
* as the other licenses applicable to the third-party components included
* within TencentOS.
*---------------------------------------------------------------------------*/
#ifndef __ESP8266_H__
#define __ESP8266_H__
#include "tos_evtdrv.h"
#include "tos_hal.h"
#include "sal_module_wrapper.h"
#define EVENT_INTERNAL_ESP8266_INIT (1u << 0)
#define EVENT_INTERNAL_ESP8266_RESTORE (1u << 1)
#define EVENT_INTERNAL_ESP8266_ECHO_CLOSE (1u << 2)
#define EVENT_INTERNAL_ESP8266_NET_MODE_SET (1u << 3)
#define EVENT_INTERNAL_ESP8266_SEND_MODE_SET (1u << 4)
#define EVENT_INTERNAL_ESP8266_MULTILINK_SET (1u << 5)
#define EVENT_INTERNAL_ESP8266_JOIN_AP (1u << 6)
#define EVENT_INTERNAL_ESP8266_CONNECT (1u << 7)
#define EVENT_INTERNAL_ESP8266_SEND_READY (1u << 8)
#define EVENT_INTERNAL_ESP8266_SEND (1u << 9)
#define EVENT_INTERNAL_ESP8266_DOMAIN_PARSE (1u << 10)
#define EVENT_IMSG_ESP8266_INIT (1u << 0)
#define EVENT_IMSG_ESP8266_JOIN_AP (1u << 1)
#define EVENT_IMSG_ESP8266_CONNECT (1u << 2)
#define EVENT_IMSG_ESP8266_SEND (1u << 3)
#define EVENT_IMSG_ESP8266_CLOSE (1u << 4)
#define EVENT_IMSG_ESP8266_DOMAIN_PARSE (1u << 5)
#define EVENT_OMSG_ESP8266_INIT (1u << 0)
#define EVENT_OMSG_ESP8266_JOIN_AP (1u << 1)
#define EVENT_OMSG_ESP8266_CONNECT (1u << 2)
#define EVENT_OMSG_ESP8266_SEND (1u << 3)
#define EVENT_OMSG_ESP8266_DOMAIN_PARSE (1u << 4)
typedef struct esp8266_event_header_st {
evtdrv_event_flag_t event;
evtdrv_task_id_t sender_id;
} esp8266_event_hdr_t;
typedef struct esp8266_in_msg_init_st {
esp8266_event_hdr_t header;
hal_uart_port_t uart_port;
evtdrv_task_id_t at_task_id;
evtdrv_task_id_t esp8266_task_id;
} esp8266_imsg_init_t;
typedef struct esp8266_in_msg_join_ap_st {
esp8266_event_hdr_t header;
char *ssid;
char *pwd;
} esp8266_imsg_join_ap_t;
typedef struct esp8266_in_msg_connect_st {
esp8266_event_hdr_t header;
char *ip;
char *port;
sal_proto_t proto;
} esp8266_imsg_connect_t;
typedef struct esp8266_in_msg_send_st {
esp8266_event_hdr_t header;
int sockid;
void *buf;
size_t len;
} esp8266_imsg_send_t;
typedef struct esp8266_in_msg_close_st {
esp8266_event_hdr_t header;
int sockid;
} esp8266_imsg_close_t;
typedef struct esp8266_in_msg_domain_parse_st {
esp8266_event_hdr_t header;
char *host_name;
char *host_ip;
size_t host_ip_len;
} esp8266_imsg_domain_parse_t;
typedef struct esp8266_out_msg_common_st {
esp8266_event_hdr_t header;
int return_code;
} esp8266_omsg_common_t;
typedef struct esp8266_out_msg_connect_st {
esp8266_event_hdr_t header;
int sockid;
} esp8266_omsg_connect_t;
typedef struct esp8266_out_msg_send_st {
esp8266_event_hdr_t header;
int write_len;
} esp8266_omsg_send_t;
typedef enum sal_net_mode {
SAL_NET_MODE_STA,
SAL_NET_MODE_AP,
SAL_NET_MODE_STA_AP,
} sal_net_mode_t ;
typedef enum sal_send_mode {
SAL_SEND_MODE_NORMAL,
SAL_SEND_MODE_TRANSPARENT,
} sal_send_mode_t;
typedef enum sal_multilink_state {
SAL_MULTILINK_STATE_ENABLE,
SAL_MULTILINK_STATE_DISABLE,
} sal_multilink_state_t;
int esp8266_sal_init(hal_uart_port_t uart_port, evtdrv_task_id_t at_task_id, evtdrv_task_id_t esp8266_task_id);
int esp8266_join_ap(const char *ssid, const char *pwd);
evtdrv_event_flag_t esp8266_task(evtdrv_event_flag_t event);
#endif /* __ESP8266_H__ */

View File

@@ -0,0 +1,160 @@
#include "esp8266_evtdrv.h"
#include "tos_at_evtdrv.h"
#include "tos_evtdrv.h"
#include "sal_module_wrapper.h"
evtdrv_task_id_t at_task_id = 0;
evtdrv_task_id_t esp8266_task_id = 1;
evtdrv_task_id_t user_task_id = 2;
int socket_id_0 = 0;
#define RECV_LEN 1024
uint8_t recv_data_0[RECV_LEN];
evtdrv_timer_t task0_send_timer;
#define EVENT_USER_INIT (1u << 0)
#define EVENT_USER_SEND (1u << 1)
#define EVENT_USER_CLOSE (1u << 2)
int send_count = 0;
char host_ip[16];
void timer_callback(void *arg)
{
tos_evtdrv_event_set(user_task_id, EVENT_USER_SEND);
}
evtdrv_event_flag_t user_task(evtdrv_event_flag_t event)
{
esp8266_event_hdr_t *event_hdr;
esp8266_omsg_common_t *omsg_common;
esp8266_omsg_connect_t *omsg_connect;
esp8266_omsg_send_t *omsg_send;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
tos_evtdrv_event_set(user_task_id, EVENT_USER_INIT);
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & EVENT_USER_INIT) {
esp8266_sal_init(HAL_UART_PORT_0, at_task_id, esp8266_task_id);
return EVENT_USER_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
while (event_hdr = (esp8266_event_hdr_t *)tos_evtdrv_msg_recv()) {
if (event_hdr->sender_id == esp8266_task_id) {
switch (event_hdr->event) {
case EVENT_OMSG_ESP8266_INIT:
omsg_common = (esp8266_omsg_common_t *)event_hdr;
if (omsg_common->return_code == 0) {
esp8266_join_ap("SheldonDai", "srnr6x9xbhmb0");
} else {
printf("esp8266 init failed!\n");
}
break;
case EVENT_OMSG_ESP8266_JOIN_AP:
omsg_common = (esp8266_omsg_common_t *)event_hdr;
if (omsg_common->return_code != 0) {
printf("esp8266 join ap failed!\n");
break;
}
tos_sal_module_parse_domain("www.tencent.com", host_ip, sizeof(host_ip));
break;
case EVENT_OMSG_ESP8266_DOMAIN_PARSE:
omsg_common = (esp8266_omsg_common_t *)event_hdr;
if (omsg_common->return_code != 0) {
printf("esp8266 domain parse failed!\n");
} else {
printf("domain parse(www.tencent.com): %s\n", host_ip);
}
tos_sal_module_connect("39.108.190.129", "8080", TOS_SAL_PROTO_TCP);
break;
case EVENT_OMSG_ESP8266_CONNECT:
omsg_connect = (esp8266_omsg_connect_t *)event_hdr;
socket_id_0 = omsg_connect->sockid;
if (socket_id_0 < 0) {
printf("esp8266 connect failed!\n");
break;
}
/* <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> */
tos_evtdrv_timer_create(&task0_send_timer,
timer_callback, NULL,
EVTDRV_TIMER_OPT_PERIODIC);
tos_evtdrv_timer_start(&task0_send_timer, 6000);
break;
case EVENT_OMSG_ESP8266_SEND:
omsg_send = (esp8266_omsg_send_t *)event_hdr;
int write_len = omsg_send->write_len;
if (write_len < 0) {
printf("write failed! %d\n", write_len);
} else {
printf("task0 write success: %d\n", write_len);
}
break;
}
}
tos_evtdrv_msg_free((evtdrv_msg_body_t)event_hdr);
}
return TOS_EVTDRV_SYS_EVENT_MSG;
}
if (event & EVENT_USER_SEND) {
if (++send_count > 5) {
// after send 5 times, we shutdown the connection
tos_evtdrv_event_set(user_task_id, EVENT_USER_CLOSE);
return EVENT_USER_SEND;
}
tos_sal_module_send(socket_id_0, "hello", 5);
int len = tos_sal_module_recv(socket_id_0, recv_data_0, sizeof(recv_data_0));
if (len > 0) {
printf("task0 receive from server(%d): %s\n", len, recv_data_0);
}
return EVENT_USER_SEND;
}
if (event & EVENT_USER_CLOSE) {
tos_evtdrv_timer_stop(&task0_send_timer);
tos_sal_module_close(socket_id_0);
return EVENT_USER_CLOSE;
}
return TOS_EVTDRV_EVENT_NONE;
}
evtdrv_task_entry_t tasks[] = {
tos_at_evtdrv_task,
esp8266_task,
user_task,
};
int main(void)
{
board_init();
tos_evtdrv_sys_init(tasks, sizeof(tasks) / sizeof(tasks[0]), K_NULL);
tos_evtdrv_sys_start();
}

View File

@@ -0,0 +1,261 @@
#include "tos_evtdrv.h"
typedef struct event_hdr_st {
uint8_t event;
} event_hdr_t;
typedef struct consumer_msg_st {
event_hdr_t hdr;
uint16_t require_len;
} consumer_msg_t;
typedef struct productor_msg_st {
event_hdr_t hdr;
uint16_t payload_len;
char *payload;
} productor_msg_t;
evtdrv_task_id_t productor_id = 0;
evtdrv_task_id_t consumer1_id = 1;
evtdrv_task_id_t consumer2_id = 2;
#define EVENT_CONSUMER1 (1u << 0)
#define EVENT_CONSUMER2 (1u << 1)
#define EVENT_PRODUCTOR (1u << 2)
#define EVENT_CONSUER1_HUNGRY (1u << 3)
#define EVENT_CONSUER2_HUNGRY (1u << 4)
#define CONSUMER1_REQUIRE_LEN 5
#define CONSUMER2_REQUIRE_LEN 9
static void msg_payload_fill(char *payload, uint16_t len)
{
uint16_t i = 0;
for (i = 0; i < len - 1; ++i) {
payload[i] = (i % 10) + 'a';
}
payload[len - 1] = '\0';
}
productor_msg_t *msg4consumer_forge(uint16_t consumer_require_len)
{
productor_msg_t *productor_msg;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(productor_msg_t) + consumer_require_len + 1);
if (!msg_body) {
return K_NULL;
}
productor_msg = (productor_msg_t *)msg_body;
productor_msg->hdr.event = EVENT_PRODUCTOR;
productor_msg->payload_len = consumer_require_len;
productor_msg->payload = (char *)(productor_msg + 1);
msg_payload_fill(productor_msg->payload, consumer_require_len + 1);
return productor_msg;
}
evtdrv_event_flag_t task_productor(evtdrv_event_flag_t event)
{
uint16_t consumer_require_len;
consumer_msg_t *consumer_msg;
productor_msg_t *productor_msg;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
printf("init logic for productor\n");
// return event handled
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
while (consumer_msg = (consumer_msg_t *)tos_evtdrv_msg_recv()) {
consumer_require_len = consumer_msg->require_len;
switch (consumer_msg->hdr.event) {
case EVENT_CONSUMER1:
printf("msg from consumer1, %d len required\n", consumer_require_len);
productor_msg = msg4consumer_forge(consumer_require_len);
if (productor_msg) {
tos_evtdrv_msg_send(consumer1_id, (evtdrv_msg_body_t)productor_msg);
}
break;
case EVENT_CONSUMER2:
printf("msg from consumer2, %d len required\n", consumer_require_len);
productor_msg = msg4consumer_forge(consumer_require_len);
if (productor_msg) {
tos_evtdrv_msg_send(consumer2_id, (evtdrv_msg_body_t)productor_msg);
}
break;
}
tos_evtdrv_msg_free((evtdrv_msg_body_t)consumer_msg);
}
// return event handled
return TOS_EVTDRV_SYS_EVENT_MSG;
}
if (event & EVENT_CONSUER1_HUNGRY) {
productor_msg = msg4consumer_forge(CONSUMER1_REQUIRE_LEN);
if (productor_msg) {
tos_evtdrv_msg_send(consumer1_id, (evtdrv_msg_body_t)productor_msg);
}
// return event handled
return EVENT_CONSUER1_HUNGRY;
}
if (event & EVENT_CONSUER2_HUNGRY) {
productor_msg = msg4consumer_forge(CONSUMER2_REQUIRE_LEN);
if (productor_msg) {
tos_evtdrv_msg_send(consumer2_id, (evtdrv_msg_body_t)productor_msg);
}
// return event handled
return EVENT_CONSUER2_HUNGRY;
}
return TOS_EVTDRV_EVENT_NONE;
}
consumer_msg_t *msg4productor_forge(uint16_t consumer_event, uint16_t consumer_require_len)
{
consumer_msg_t *consumer_msg;
evtdrv_msg_body_t msg_body;
msg_body = tos_evtdrv_msg_alloc(sizeof(consumer_msg_t));
if (!msg_body) {
return K_NULL;
}
consumer_msg = (consumer_msg_t *)msg_body;
consumer_msg->hdr.event = consumer_event;
consumer_msg->require_len = consumer_require_len;
return consumer_msg;
}
evtdrv_timer_t consumer1_timer;
evtdrv_timer_t consumer2_timer;
void consumer1_timer_callback(void *arg)
{
printf("consumer1_timer_callback\n");
tos_evtdrv_event_set(productor_id, EVENT_CONSUER1_HUNGRY);
}
void consumer2_timer_callback(void *arg)
{
printf("consumer2_timer_callback\n");
tos_evtdrv_event_set(productor_id, EVENT_CONSUER2_HUNGRY);
}
evtdrv_event_flag_t task_consumer1(evtdrv_event_flag_t event)
{
consumer_msg_t *consumer_msg;
productor_msg_t *productor_msg;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
printf("init logic for consumer1\n");
tos_evtdrv_timer_create(&consumer1_timer,
consumer1_timer_callback, NULL,
EVTDRV_TIMER_OPT_PERIODIC);
tos_evtdrv_timer_start(&consumer1_timer, 4000);
consumer_msg = msg4productor_forge(EVENT_CONSUMER1, CONSUMER1_REQUIRE_LEN);
if (consumer_msg) {
tos_evtdrv_msg_send(productor_id, (evtdrv_msg_body_t)consumer_msg);
}
// return event handled
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
while (productor_msg = (productor_msg_t *)tos_evtdrv_msg_recv()) {
switch (productor_msg->hdr.event) {
case EVENT_PRODUCTOR:
printf("\nconsumer1:\nmsg from productor, payload_len: %d\npayload: %s\n", productor_msg->payload_len, productor_msg->payload);
break;
}
tos_evtdrv_msg_free((evtdrv_msg_body_t)productor_msg);
}
// return event handled
return TOS_EVTDRV_SYS_EVENT_MSG;
}
return TOS_EVTDRV_EVENT_NONE;
}
evtdrv_event_flag_t task_consumer2(evtdrv_event_flag_t event)
{
consumer_msg_t *consumer_msg;
productor_msg_t *productor_msg;
if (event & TOS_EVTDRV_SYS_EVENT_INIT) {
printf("init logic for consumer2\n");
tos_evtdrv_timer_create(&consumer2_timer,
consumer2_timer_callback, NULL,
EVTDRV_TIMER_OPT_PERIODIC);
tos_evtdrv_timer_start(&consumer2_timer, 6000);
consumer_msg = msg4productor_forge(EVENT_CONSUMER2, CONSUMER2_REQUIRE_LEN);
if (consumer_msg) {
tos_evtdrv_msg_send(productor_id, (evtdrv_msg_body_t)consumer_msg);
}
// return event handled
return TOS_EVTDRV_SYS_EVENT_INIT;
}
if (event & TOS_EVTDRV_SYS_EVENT_MSG) {
while (productor_msg = (productor_msg_t *)tos_evtdrv_msg_recv()) {
switch (productor_msg->hdr.event) {
case EVENT_PRODUCTOR:
printf("\nconsumer2:\nmsg from productor, payload_len: %d\npayload: %s\n", productor_msg->payload_len, productor_msg->payload);
break;
}
tos_evtdrv_msg_free((evtdrv_msg_body_t)productor_msg);
}
// return event handled
return TOS_EVTDRV_SYS_EVENT_MSG;
}
return TOS_EVTDRV_EVENT_NONE;
}
evtdrv_task_entry_t tasks[] = {
task_productor,
task_consumer1,
task_consumer2
};
int main(void)
{
board_init();
tos_evtdrv_sys_init(tasks, sizeof(tasks) / sizeof(tasks[0]), K_NULL);
tos_evtdrv_sys_start();
}

View File

@@ -40,6 +40,7 @@
#define __PURE__ __attribute__((__pure__))
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __WEAK__ __attribute__((weak))
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
@@ -61,7 +62,7 @@
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __NAKED__ __attribute__((naked))
#define __WEAK__ __attribute__((weak))
/*------------------ ICC Compiler ----------------------*/
#elif defined(__ICCARM__)
@@ -82,6 +83,8 @@
#define __CONST__
#define __NO_RETURN__
#define __NAKED__
#define __WEAK__ __weak
/*------------------ GNU Compiler ----------------------*/
#elif defined(__GNUC__)
@@ -103,6 +106,7 @@
#define __CONST__ __attribute__((__const__))
#define __NO_RETURN__ __attribute__((__noreturn__))
#define __NAKED__ __attribute__((naked))
#define __WEAK__ __attribute__((weak))
#endif

View File

@@ -1,6 +1,18 @@
#ifndef _TOS_CONFIG_CHECK_H_
#define _TOS_CONFIG_CHECK_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
#if TOS_CFG_MMHEAP_EN == 0u
#error "INVALID config, must enable tos_mmheap to use event-driven"
#endif
#if TOS_CFG_TICKLESS_EN == 1u
#error "INVALID config, tickless not supported in event-driven yet"
#endif
#else /* TOS_CFG_EVENT_DRIVEN_EN */
#if TOS_CFG_TASK_PRIO_MAX < 8u
#error "INVALID config, TOS_CFG_TASK_PRIO_MAX must be >= 8"
#endif
@@ -57,5 +69,7 @@
#error "INVALID config, TOS_CFG_CPU_DATA_SIZE"
#endif
#endif /* _TOS_CHECK_CONFIG_H_ */
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_CONFIG_CHECK_H_ */

View File

@@ -1,6 +1,136 @@
#ifndef _TOS_CONFIG_DEFAULT_H_
#define _TOS_CONFIG_DEFAULT_H_
#ifndef TOS_CFG_EVENT_DRIVEN_EN
#define TOS_CFG_EVENT_DRIVEN_EN 0u
#endif
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
/////////////////////////////////////////
// disable round robin
#ifdef TOS_CFG_ROUND_ROBIN_EN
#undef TOS_CFG_ROUND_ROBIN_EN
#endif
#define TOS_CFG_ROUND_ROBIN_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable event
#ifdef TOS_CFG_EVENT_EN
#undef TOS_CFG_EVENT_EN
#endif
#define TOS_CFG_EVENT_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable mutex
#ifdef TOS_CFG_MUTEX_EN
#undef TOS_CFG_MUTEX_EN
#endif
#define TOS_CFG_MUTEX_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable queue
#ifdef TOS_CFG_QUEUE_EN
#undef TOS_CFG_QUEUE_EN
#endif
#define TOS_CFG_QUEUE_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable semaphore
#ifdef TOS_CFG_SEM_EN
#undef TOS_CFG_SEM_EN
#endif
#define TOS_CFG_SEM_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable the "traditional" timer
#ifdef TOS_CFG_TIMER_EN
#undef TOS_CFG_TIMER_EN
#endif
#define TOS_CFG_TIMER_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// disable stack draught depth detact
#ifdef TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN
#undef TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN
#endif
#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 0u
/////////////////////////////////////////
/////////////////////////////////////////
// enable mmheap
#ifndef TOS_CFG_MMHEAP_EN
#define TOS_CFG_MMHEAP_EN 1u
#endif
#if (TOS_CFG_MMHEAP_EN > 0u) && !defined(TOS_CFG_MMHEAP_POOL_SIZE)
#define TOS_CFG_MMHEAP_POOL_SIZE 0x1000
#endif
/////////////////////////////////////////
/////////////////////////////////////////
// disable default
#ifndef TOS_CFG_MMBLK_EN
#define TOS_CFG_MMBLK_EN 0u
#endif
/////////////////////////////////////////
/////////////////////////////////////////
// disable default
#ifndef TOS_CFG_FAULT_BACKTRACE_EN
#define TOS_CFG_FAULT_BACKTRACE_EN 0u
#endif
/////////////////////////////////////////
/////////////////////////////////////////
#ifndef TOS_CFG_CPU_SYSTICK_PRIO
#define TOS_CFG_CPU_SYSTICK_PRIO 0u
#endif
/////////////////////////////////////////
/////////////////////////////////////////
// disable default
#ifndef TOS_CFG_PWR_MGR_EN
#define TOS_CFG_PWR_MGR_EN 0u
#endif
#ifndef TOS_CFG_TICKLESS_EN
#define TOS_CFG_TICKLESS_EN 0u
#endif
/////////////////////////////////////////
// we donot really need these, it's a compromise to the compiler.
#ifndef TOS_CFG_TASK_PRIO_MAX
#define TOS_CFG_TASK_PRIO_MAX 8u
#endif
#ifndef TOS_CFG_IDLE_TASK_STK_SIZE
#define TOS_CFG_IDLE_TASK_STK_SIZE 128u
#endif
/////////////////////////////////////////
/////////////////////////////////////////
#else /* TOS_CFG_EVENT_DRIVEN_EN */
#ifndef TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN
#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN 0u
#endif
@@ -13,10 +143,6 @@
#define TOS_CFG_EVENT_EN 0u
#endif
#ifndef TOS_CFG_MMHEAP_EN
#define TOS_CFG_MMHEAP_EN 0u
#endif
#ifndef TOS_CFG_MUTEX_EN
#define TOS_CFG_MUTEX_EN 0u
#endif
@@ -29,6 +155,10 @@
#define TOS_CFG_SEM_EN 0u
#endif
#ifndef TOS_CFG_MMHEAP_EN
#define TOS_CFG_MMHEAP_EN 0u
#endif
#if (TOS_CFG_QUEUE_EN > 0u) && !defined(TOS_CFG_MSG_EN)
#define TOS_CFG_MSG_EN 1u
#elif (TOS_CFG_QUEUE_EN == 0u) && !defined(TOS_CFG_MSG_EN)
@@ -76,7 +206,7 @@
#endif
#ifndef TOS_CFG_TASK_PRIO_MAX
#define TOS_CFG_TASK_PRIO_MAX 10u
#define TOS_CFG_TASK_PRIO_MAX 8u
#endif
#ifndef TOS_CFG_MMBLK_EN
@@ -110,5 +240,7 @@
#define TOS_CFG_FAULT_BACKTRACE_EN 0u
#endif
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_CONFIG_DEFAULT_H_ */

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@@ -0,0 +1,16 @@
#ifndef _TOS_EVTDRV_H_
#define _TOS_EVTDRV_H_
#include "tos.h"
#include "tos_evtdrv_err.h"
#include "tos_evtdrv_types.h"
#include "tos_evtdrv_event.h"
#include "tos_evtdrv_msg.h"
#include "tos_evtdrv_timer.h"
#include "tos_evtdrv_task.h"
#include "tos_evtdrv_tick.h"
#include "tos_evtdrv_sys.h"
#include "tos_evtdrv_global.h"
#endif

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@@ -0,0 +1,20 @@
#ifndef _TOS_EVTDRV_ERR_H_
#define _TOS_EVTDRV_ERR_H_
typedef enum evtdrv_err_en {
EVTDRV_ERR_NONE = 0x0u,
EVTDRV_ERR_MEM_ALLOC_FAILED = 0x1u,
EVTDRV_ERR_PTR_NULL = 0x2u,
EVTDRV_ERR_MSG_BUSY = 0x3u,
EVTDRV_ERR_TASK_INVALID = 0x4u,
EVTDRV_ERR_MMHEAP_NOT_ENABLED = 0x5u,
EVTDRV_ERR_EVENT_INVALID = 0x10u,
EVTDRV_ERR_EVENT_OVERFLOW = 0x11u,
EVTDRV_ERR_TIMER_ALREADY_EXIST = 0x20u,
EVTDRV_ERR_TIMER_INACTIVE = 0x21u,
} evtdrv_err_t;
#endif

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@@ -0,0 +1,71 @@
#ifndef _TOS_EVTDRV_EVENT_H_
#define _TOS_EVTDRV_EVENT_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
typedef uint16_t evtdrv_event_flag_t;
typedef uint16_t evtdrv_event_nesting_t;
#define EVTDRV_SYS_EVENT_MASK (evtdrv_event_flag_t)(0x3 << (sizeof(evtdrv_event_flag_t) * 8 - 2))
#define EVTDRV_USR_EVENT_MASK (evtdrv_event_flag_t)(~(EVTDRV_SYS_EVENT_MASK))
/* highest two bits are reserved for system event
0x8000 init all tasks
0x4000 msg received
*/
#define TOS_EVTDRV_EVENT_NONE (evtdrv_event_flag_t)0x0u
#define TOS_EVTDRV_SYS_EVENT_INIT (evtdrv_event_flag_t)(0x2 << (sizeof(evtdrv_event_flag_t) * 8 - 2))
#define TOS_EVTDRV_SYS_EVENT_MSG (evtdrv_event_flag_t)(0x1 << (sizeof(evtdrv_event_flag_t) * 8 - 2))
typedef struct evtdrv_event_st {
evtdrv_event_flag_t flags;
evtdrv_event_nesting_t nesting[sizeof(evtdrv_event_flag_t) * 8];
} evtdrv_event_t;
/**
* @brief Set event to the target task.
* Set event to the target task, next time the target task is "scheduled", the task will handle the event.
*
* @attention None
*
* @param[in] task_id id of the target task.
* @param[in] event_flags the event flags set to the task
*
* @return errcode
* @retval #EVTDRV_ERR_TASK_INVALID task id is invalid.
* @retval #EVTDRV_ERR_NONE return successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_event_set(evtdrv_task_id_t task_id, evtdrv_event_flag_t event_flags);
/**
* @brief Reset the event of the target task.
*
* @attention None
*
* @param[in] task_id id of the target task.
* @param[in] event_flags the event flags reset of the task
*
* @return errcode
* @retval #EVTDRV_ERR_TASK_INVALID task id is invalid.
* @retval #EVTDRV_ERR_NONE return successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_event_reset(evtdrv_task_id_t task_id, evtdrv_event_flag_t event_flags);
__KERNEL__ evtdrv_err_t evtdrv_event_init(void);
__KERNEL__ evtdrv_event_flag_t evtdrv_event_fetch(evtdrv_task_id_t *task_id);
__STATIC_INLINE__ evtdrv_bool_t evtdrv_event_is_usr(evtdrv_event_flag_t event_flag)
{
return event_flag & EVTDRV_USR_EVENT_MASK;
}
__STATIC_INLINE__ evtdrv_bool_t evtdrv_event_is_sys(evtdrv_event_flag_t event_flag)
{
return event_flag & EVTDRV_SYS_EVENT_MASK;
}
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_EVENT_H_ */

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@@ -0,0 +1,24 @@
#ifndef _TOS_EVTDRV_GLOBAL_H_
#define _TOS_EVTDRV_GLOBAL_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
extern evtdrv_task_entry_t *evtdrv_task_table;
extern evtdrv_ttb_sz_t evtdrv_task_table_size;
extern evtdrv_task_id_t evtdrv_curr_task;
extern evtdrv_event_t *evtdrv_events;
extern k_list_t evtdrv_msg_list;
extern k_list_t evtdrv_timer_list;
extern k_evtdrv_poll_t evtdrv_poll;
extern evtdrv_tick_t evtdrv_tick_count;
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_GLOBAL_H_ */

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@@ -0,0 +1,69 @@
#ifndef _TOS_EVTDRV_MSG_H_
#define _TOS_EVTDRV_MSG_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
typedef uint16_t evtdrv_msg_len_t;
typedef uint8_t *evtdrv_msg_body_t;
typedef struct evtdrv_message_header_st {
k_list_t list;
evtdrv_task_id_t dst_task_id; // destination task id
evtdrv_msg_len_t len;
} evtdrv_msg_hdr_t;
#define EVTDRV_MSG_BODY2HDR(msg_body) ((evtdrv_msg_hdr_t *)((uint8_t *)msg_body - sizeof(evtdrv_msg_hdr_t)))
#define EVTDRV_MSG_LEN(msg_len) (sizeof(evtdrv_msg_hdr_t) + msg_len)
#define EVTDRV_MSG_HDR2BODY(msg_hdr) ((evtdrv_msg_body_t)((evtdrv_msg_hdr_t *)msg_hdr + 1))
/**
* @brief Allocate a message body.
* Allocate a message body as a payload to hold the message content.
*
* @attention None
*
* @param[in] msg_len the length of the message payload.
*
* @return the message body allocated.
* @retval #NULL allocate failed.
* @retval #NO-NULL allocate successfully.
*/
__API__ evtdrv_msg_body_t tos_evtdrv_msg_alloc(evtdrv_msg_len_t msg_len);
/**
* @brief Free a message body.
*
* @attention if you wanna free a message body, the message must be "dequeued"(already received by the target task)
*
* @param[in] msg_body message body to free.
*
* @return errcode
* @retval #EVTDRV_ERR_PTR_NULL message body is NULL.
* @retval #EVTDRV_ERR_MSG_BUSY message is still in the message queue(not received).
* @retval #EVTDRV_ERR_NONE free successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_msg_free(evtdrv_msg_body_t msg_body);
/**
* @brief Send a message to the target task.
*
* @attention next time the target task should be "wakeup" by the event of TOS_EVTDRV_SYS_EVENT_MSG.
*
* @param[in] task_id id of the target task.
* @param[in] msg_body message body to send.
*
* @return errcode
* @retval #EVTDRV_ERR_PTR_NULL message body is NULL.
* @retval #EVTDRV_ERR_TASK_INVALID target task id is invalid.
* @retval #EVTDRV_ERR_NONE send successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_msg_send(evtdrv_task_id_t dst_task_id, evtdrv_msg_body_t msg_body);
__API__ evtdrv_msg_body_t tos_evtdrv_msg_recv(void);
__KERNEL__ void evtdrv_msg_init(void);
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_MSG_H_ */

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@@ -0,0 +1,37 @@
#ifndef _TOS_EVTDRV_SYS_H_
#define _TOS_EVTDRV_SYS_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
typedef void (*k_evtdrv_poll_t)(void);
/**
* @brief Initialize the event-driven system.
*
* @attention event-driven is a simplified schedule model to support the none-context-swith-based multi-task programming.("the big while 1")
* must enable TOS_CFG_MMHEAP_EN to use event-driven.
*
* @param[in] tasks array of the tasks.
* @param[in] task_table_size size of the tasks.
* @param[in] poll the user defined poll function.
*
* @return errcode
* @retval #EVTDRV_ERR_MMHEAP_NOT_ENABLED mmheap is not enabled.
* @retval #EVTDRV_ERR_MEM_ALLOC_FAILED memory allocate failed.
* @retval #EVTDRV_ERR_NONE initialize successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_sys_init(evtdrv_task_entry_t tasks[], evtdrv_ttb_sz_t task_table_size, k_evtdrv_poll_t poll);
/**
* @brief Start the event-driven system.
*
* @attention start the event-driven multi-task "schedule".
*
* @return None
*/
__API__ void tos_evtdrv_sys_start(void);
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_SYS_H_ */

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@@ -0,0 +1,31 @@
#ifndef _TOS_EVTDRV_TASK_H_
#define _TOS_EVTDRV_TASK_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
#define TOS_EVTDRV_TASK_ID_NONE ((evtdrv_task_id_t)-1)
// return event handled
typedef evtdrv_event_flag_t (*evtdrv_task_entry_t)(evtdrv_event_flag_t event_flags);
#define EVTDRV_TASK_ID2TASK(task_id) (evtdrv_task_entry_t)(evtdrv_task_table[task_id])
/**
* @brief Get the actived("running") task id.
*
* @attention
*
* @return the actived("running") task id.
*/
__API__ evtdrv_task_id_t tos_evtdrv_task_self(void);
__KERNEL__ evtdrv_bool_t evtdrv_task_id_is_invalid(evtdrv_task_id_t task_id);
__KERNEL__ evtdrv_bool_t evtdrv_task_is_self(evtdrv_task_id_t task_id);
__KERNEL__ void evtdrv_task_init(void);
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_TASK_H_ */

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@@ -0,0 +1,45 @@
#ifndef _TOS_EVTDRV_TICK_H_
#define _TOS_EVTDRV_TICK_H_
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
/**
* @brief Get the current systick cout.
*
* @attention
*
* @return current systick count.
*/
__API__ evtdrv_tick_t tos_evtdrv_systick_get(void);
/**
* @brief tick interrupt handler.
*
* @attention if you wanna use event-driven timer, you must deal with the tick.
*
* @return None.
*/
__API__ void tos_evtdrv_tick_handler(void);
/**
* @brief Convert tick count to milli-seconds.
*
* @attention
*
* @return the milli-seconds equals to the tick count.
*/
__API__ evtdrv_time_t tos_evtdrv_tick2millisec(evtdrv_tick_t tick);
/**
* @brief Convert milli-seconds to tick count.
*
* @attention
*
* @return the tick count equals to the tick count.
*/
__API__ evtdrv_tick_t tos_evtdrv_millisec2tick(evtdrv_time_t ms);
#endif /* TOS_CFG_EVENT_DRIVEN_EN */
#endif /* _TOS_EVTDRV_TICK_H_ */

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@@ -0,0 +1,82 @@
#ifndef _TOS_EVTDRV_TIMER_H_
#define _TOS_EVTDRV_TIMER_H_
#define EVTDRV_TIME_MILLISEC_PER_SEC (1000u)
typedef enum evtdrv_timer_option_en {
EVTDRV_TIMER_OPT_ONESHOT,
EVTDRV_TIMER_OPT_PERIODIC,
} evtdrv_timer_opt_t;
typedef void (*evtdrv_timer_callback_t)(void *arg);
typedef struct evtdrv_timer_st {
evtdrv_timer_callback_t cb;
void *cb_arg;
k_list_t list;
evtdrv_tick_t expires;
evtdrv_tick_t period;
evtdrv_timer_opt_t opt;
} evtdrv_timer_t;
typedef struct evtdrv_timer_control_st {
evtdrv_tick_t next_expires;
evtdrv_tick_t list;
} evtdrv_timer_ctl_t;
/**
* @brief Create a timer.
* Create a timer.
*
* @attention
*
* @param[in] tmr pointer to the handler of the timer.
* @param[in] callback callback function called when the timer expires.
* @param[in] cb_arg argument for the callback.
* @param[in] opt option for the function call.
*
* @return errcode
* @retval #EVTDRV_ERR_PTR_NULL task_id is invalid.
* @retval #EVTDRV_ERR_NONE event_flags is not valid for user use.
*/
__API__ evtdrv_err_t tos_evtdrv_timer_create(evtdrv_timer_t *tmr,
evtdrv_timer_callback_t callback,
void *cb_arg,
evtdrv_timer_opt_t opt);
/**
* @brief Start a timer.
* Start the timer to run.
*
* @attention None
*
* @param[in] tmr pointer to the handler of the timer.
*
* @return errcode
* @retval #EVTDRV_ERR_PTR_NULL tmr is a NULL pointer.
* @retval #EVTDRV_ERR_TIMER_ALREADY_EXIST tmr is already exist.
* @retval #EVTDRV_ERR_NONE return successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_timer_start(evtdrv_timer_t *tmr, evtdrv_tick_t timeout);
/**
* @brief Stop a timer.
* Stop the timer from running.
*
* @attention None
*
* @param[in] tmr pointer to the handler of the timer.
*
* @return errcode
* @retval #EVTDRV_ERR_PTR_NULL tmr is a NULL pointer.
* @retval #EVTDRV_ERR_TIMER_INACTIVE the timer is not active yet.
* @retval #EVTDRV_ERR_NONE return successfully.
*/
__API__ evtdrv_err_t tos_evtdrv_timer_stop(evtdrv_timer_t *tmr);
__KERNEL__ void evtdrv_timer_update(void);
#endif /* _TOS_EVTDRV_TIMER_H_ */

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@@ -0,0 +1,11 @@
#ifndef _TOS_EVTDRV_TYPES_H_
#define _TOS_EVTDRV_TYPES_H_
typedef int8_t evtdrv_bool_t;
typedef uint8_t evtdrv_task_id_t; // task id type
typedef uint8_t evtdrv_ttb_sz_t; // task table size type
typedef uint64_t evtdrv_tick_t;
typedef uint32_t evtdrv_time_t;
#endif

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@@ -0,0 +1,111 @@
#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__API__ evtdrv_err_t tos_evtdrv_event_set(evtdrv_task_id_t task_id, evtdrv_event_flag_t event_flags)
{
TOS_CPU_CPSR_ALLOC();
uint8_t i = 0;
evtdrv_event_t *event;
evtdrv_event_flag_t flag;
if (evtdrv_task_id_is_invalid(task_id)) {
return EVTDRV_ERR_TASK_INVALID;
}
TOS_CPU_INT_DISABLE();
event = &evtdrv_events[task_id];
for (i = 0; i < sizeof(evtdrv_event_flag_t) * 8; ++i) {
flag = (1 << i);
if (event_flags & flag) {
if (event->nesting[i] == (evtdrv_event_nesting_t)-1) {
continue;
}
++event->nesting[i];
event->flags |= flag;
}
}
TOS_CPU_INT_ENABLE();
return EVTDRV_ERR_NONE;
}
__API__ evtdrv_err_t tos_evtdrv_event_reset(evtdrv_task_id_t task_id, evtdrv_event_flag_t event_flags)
{
TOS_CPU_CPSR_ALLOC();
uint8_t i = 0;
evtdrv_event_t *event;
evtdrv_event_flag_t flag;
if (evtdrv_task_id_is_invalid(task_id)) {
return EVTDRV_ERR_TASK_INVALID;
}
TOS_CPU_INT_DISABLE();
event = &evtdrv_events[task_id];
for (i = 0; i < sizeof(evtdrv_event_flag_t) * 8; ++i) {
flag = (1 << i);
if (event_flags & flag) {
if (!(event->flags & flag)) {
continue;
}
if (event->nesting[i] > (evtdrv_event_nesting_t)0u) {
--event->nesting[i];
}
if (event->nesting[i] == (evtdrv_event_nesting_t)0u) {
event->flags &= ~flag;
}
}
}
TOS_CPU_INT_ENABLE();
return EVTDRV_ERR_NONE;
}
__KERNEL__ evtdrv_err_t evtdrv_event_init(void)
{
evtdrv_task_id_t i;
evtdrv_event_t *event;
evtdrv_events = (evtdrv_event_t *)tos_mmheap_calloc(evtdrv_task_table_size, sizeof(evtdrv_event_t));
if (!evtdrv_events) {
return EVTDRV_ERR_MEM_ALLOC_FAILED;
}
for (i = 0; i < evtdrv_task_table_size; ++i) {
event = &evtdrv_events[i];
event->flags = TOS_EVTDRV_EVENT_NONE;
}
return EVTDRV_ERR_NONE;
}
__KERNEL__ evtdrv_event_flag_t evtdrv_event_fetch(evtdrv_task_id_t *task_id)
{
evtdrv_task_id_t i;
evtdrv_event_t *event;
for (i = 0; i < evtdrv_task_table_size; ++i) {
event = &evtdrv_events[i];
if (event->flags != TOS_EVTDRV_EVENT_NONE) {
if (task_id) {
*task_id = i;
}
return event->flags;
}
}
return TOS_EVTDRV_EVENT_NONE;
}
#endif

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@@ -0,0 +1,21 @@
#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
evtdrv_task_entry_t *evtdrv_task_table = K_NULL;
evtdrv_ttb_sz_t evtdrv_task_table_size = 0;
evtdrv_task_id_t evtdrv_curr_task = TOS_EVTDRV_TASK_ID_NONE;
evtdrv_event_t *evtdrv_events = K_NULL;
k_evtdrv_poll_t evtdrv_poll = K_NULL;
evtdrv_tick_t evtdrv_tick_count = (evtdrv_tick_t)0u;
TOS_LIST_DEFINE(evtdrv_msg_list);
TOS_LIST_DEFINE(evtdrv_timer_list);
#endif

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@@ -0,0 +1,106 @@
#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__API__ evtdrv_msg_body_t tos_evtdrv_msg_alloc(evtdrv_msg_len_t msg_len)
{
evtdrv_msg_hdr_t *msg_hdr = K_NULL;
if (!msg_len) {
return K_NULL;
}
msg_hdr = (evtdrv_msg_hdr_t *)tos_mmheap_alloc(EVTDRV_MSG_LEN(msg_len));
if (!msg_hdr) {
return K_NULL;
}
tos_list_init(&msg_hdr->list);
msg_hdr->len = msg_len;
msg_hdr->dst_task_id = TOS_EVTDRV_TASK_ID_NONE;
return EVTDRV_MSG_HDR2BODY(msg_hdr);
}
__API__ evtdrv_err_t tos_evtdrv_msg_free(evtdrv_msg_body_t msg_body)
{
evtdrv_msg_hdr_t *msg_hdr = K_NULL;
if (!msg_body) {
return EVTDRV_ERR_PTR_NULL;
}
msg_hdr = EVTDRV_MSG_BODY2HDR(msg_body);
if (msg_hdr->dst_task_id != TOS_EVTDRV_TASK_ID_NONE ||
!tos_list_empty(&msg_hdr->list)) {
return EVTDRV_ERR_MSG_BUSY;
}
tos_mmheap_free(msg_hdr);
return EVTDRV_ERR_NONE;
}
__API__ evtdrv_err_t tos_evtdrv_msg_send(evtdrv_task_id_t dst_task_id, evtdrv_msg_body_t msg_body)
{
evtdrv_msg_hdr_t *msg_hdr = K_NULL;
if (!msg_body) {
return EVTDRV_ERR_PTR_NULL;
}
if (evtdrv_task_id_is_invalid(dst_task_id)) {
tos_evtdrv_msg_free(msg_body);
return EVTDRV_ERR_TASK_INVALID;
}
msg_hdr = EVTDRV_MSG_BODY2HDR(msg_body);
msg_hdr->dst_task_id = dst_task_id;
tos_list_add(&msg_hdr->list, &evtdrv_msg_list);
tos_evtdrv_event_set(dst_task_id, TOS_EVTDRV_SYS_EVENT_MSG);
return EVTDRV_ERR_NONE;
}
__STATIC_INLINE__ void evtdrv_msg_prepare4use(evtdrv_msg_hdr_t *msg_hdr)
{
tos_list_del_init(&msg_hdr->list);
msg_hdr->dst_task_id = TOS_EVTDRV_TASK_ID_NONE;
}
__API__ evtdrv_msg_body_t tos_evtdrv_msg_recv(void)
{
TOS_CPU_CPSR_ALLOC();
k_list_t *curr, *next;
evtdrv_msg_hdr_t *msg_hdr = K_NULL;
TOS_CPU_INT_DISABLE();
TOS_LIST_FOR_EACH_SAFE(curr, next, &evtdrv_msg_list) {
msg_hdr = TOS_LIST_ENTRY(curr, evtdrv_msg_hdr_t, list);
if (!evtdrv_task_is_self(msg_hdr->dst_task_id)) {
continue;
}
evtdrv_msg_prepare4use(msg_hdr);
tos_evtdrv_event_set(tos_evtdrv_task_self(), TOS_EVTDRV_SYS_EVENT_MSG);
TOS_CPU_INT_ENABLE();
return EVTDRV_MSG_HDR2BODY(msg_hdr);
}
TOS_CPU_INT_ENABLE();
tos_evtdrv_event_reset(tos_evtdrv_task_self(), TOS_EVTDRV_SYS_EVENT_MSG);
return K_NULL;
}
__KERNEL__ void evtdrv_msg_init(void)
{
tos_list_init(&evtdrv_msg_list);
}
#endif

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#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__API__ evtdrv_err_t tos_evtdrv_sys_init(evtdrv_task_entry_t tasks[], evtdrv_ttb_sz_t task_table_size, k_evtdrv_poll_t poll)
{
evtdrv_err_t err;
evtdrv_task_table = &tasks[0];
evtdrv_task_table_size = task_table_size;
evtdrv_poll = poll;
#if TOS_CFG_MMHEAP_EN > 0
mmheap_init(k_mmheap_pool, TOS_CFG_MMHEAP_POOL_SIZE);
#else
return EVTDRV_ERR_MMHEAP_NOT_ENABLED;
#endif
err = evtdrv_event_init();
if (err != EVTDRV_ERR_NONE) {
return err;
}
evtdrv_msg_init();
evtdrv_task_init();
return EVTDRV_ERR_NONE;
}
__STATIC__ void evtdrv_sys_run(void)
{
evtdrv_event_flag_t event_flag = TOS_EVTDRV_EVENT_NONE;
evtdrv_task_id_t task_id = TOS_EVTDRV_TASK_ID_NONE;
evtdrv_timer_update();
if (evtdrv_poll) {
evtdrv_poll();
}
event_flag = evtdrv_event_fetch(&task_id);
if (event_flag != TOS_EVTDRV_EVENT_NONE) {
evtdrv_curr_task = task_id;
event_flag = (EVTDRV_TASK_ID2TASK(task_id))(event_flag);
evtdrv_curr_task = TOS_EVTDRV_TASK_ID_NONE;
// after task process, event that the task handled is returned.
tos_evtdrv_event_reset(task_id, event_flag);
} else {
#if TOS_CFG_PWR_MGR_EN > 0u
pm_power_manager();
#endif
}
}
__API__ void tos_evtdrv_sys_start(void)
{
while (K_TRUE) {
evtdrv_sys_run();
}
}
#endif

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#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__API__ evtdrv_task_id_t tos_evtdrv_task_self(void)
{
return evtdrv_curr_task;
}
__KERNEL__ evtdrv_bool_t evtdrv_task_id_is_invalid(evtdrv_task_id_t task_id)
{
return task_id >= evtdrv_task_table_size;
}
__KERNEL__ evtdrv_bool_t evtdrv_task_is_self(evtdrv_task_id_t task_id)
{
return task_id == evtdrv_curr_task;
}
__KERNEL__ void evtdrv_task_init(void)
{
evtdrv_task_id_t i;
for (i = 0; i < evtdrv_task_table_size; ++i) {
(evtdrv_task_table[i])(TOS_EVTDRV_SYS_EVENT_INIT);
}
}
#endif

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#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__API__ evtdrv_time_t tos_evtdrv_tick2millisec(evtdrv_tick_t tick)
{
return (evtdrv_time_t)(tick * EVTDRV_TIME_MILLISEC_PER_SEC / TOS_CFG_CPU_TICK_PER_SECOND);
}
__API__ evtdrv_tick_t tos_evtdrv_millisec2tick(evtdrv_time_t ms)
{
return ((evtdrv_tick_t)ms * TOS_CFG_CPU_TICK_PER_SECOND / EVTDRV_TIME_MILLISEC_PER_SEC);
}
__API__ evtdrv_tick_t tos_evtdrv_systick_get(void)
{
TOS_CPU_CPSR_ALLOC();
evtdrv_tick_t tick;
TOS_CPU_INT_DISABLE();
tick = evtdrv_tick_count;
TOS_CPU_INT_ENABLE();
return tick;
}
__API__ void tos_evtdrv_tick_handler(void)
{
TOS_CPU_CPSR_ALLOC();
TOS_CPU_INT_DISABLE();
++evtdrv_tick_count;
TOS_CPU_INT_ENABLE();
}
#endif

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#include "tos_evtdrv.h"
#if TOS_CFG_EVENT_DRIVEN_EN > 0u
__STATIC__ void evtdrv_timer_place(evtdrv_timer_t *tmr, evtdrv_tick_t timeout)
{
TOS_CPU_CPSR_ALLOC();
k_list_t *curr;
evtdrv_timer_t *curr_tmr;
TOS_CPU_INT_DISABLE();
tmr->expires = tos_evtdrv_systick_get() + timeout;
TOS_LIST_FOR_EACH(curr, &evtdrv_timer_list) {
curr_tmr = TOS_LIST_ENTRY(curr, evtdrv_timer_t, list);
if (tmr->expires < curr_tmr->expires) {
break;
}
}
tos_list_add_tail(&tmr->list, curr);
TOS_CPU_INT_ENABLE();
}
__STATIC__ void evtdrv_timer_takeoff(evtdrv_timer_t *tmr)
{
TOS_CPU_CPSR_ALLOC();
TOS_CPU_INT_DISABLE();
tos_list_del(&tmr->list);
TOS_CPU_INT_ENABLE();
}
__API__ evtdrv_err_t tos_evtdrv_timer_create(evtdrv_timer_t *tmr,
evtdrv_timer_callback_t callback,
void *cb_arg,
evtdrv_timer_opt_t opt)
{
if (!tmr || !callback) {
return EVTDRV_ERR_PTR_NULL;
}
tmr->cb = callback;
tmr->opt = opt;
tos_list_init(&tmr->list);
return EVTDRV_ERR_NONE;
}
__API__ evtdrv_err_t tos_evtdrv_timer_start(evtdrv_timer_t *tmr, evtdrv_tick_t timeout)
{
if (!tmr) {
return EVTDRV_ERR_PTR_NULL;
}
if (!tos_list_empty(&tmr->list)) {
return EVTDRV_ERR_TIMER_ALREADY_EXIST;
}
evtdrv_timer_place(tmr, timeout);
if (tmr->opt == EVTDRV_TIMER_OPT_PERIODIC) {
tmr->period = timeout;
}
return EVTDRV_ERR_NONE;
}
__API__ evtdrv_err_t tos_evtdrv_timer_stop(evtdrv_timer_t *tmr)
{
if (!tmr) {
return EVTDRV_ERR_PTR_NULL;
}
if (tos_list_empty(&tmr->list)) {
return EVTDRV_ERR_TIMER_INACTIVE;
}
evtdrv_timer_takeoff(tmr);
return EVTDRV_ERR_NONE;
}
__KERNEL__ void evtdrv_timer_update(void)
{
TOS_CPU_CPSR_ALLOC();
evtdrv_timer_t *tmr;
k_list_t *curr, *next;
TOS_CPU_INT_DISABLE();
TOS_LIST_FOR_EACH_SAFE(curr, next, &evtdrv_timer_list) {
tmr = TOS_LIST_ENTRY(curr, evtdrv_timer_t, list);
if (tmr->expires > tos_evtdrv_systick_get()) {
break;
}
// time's up
evtdrv_timer_takeoff(tmr);
if (tmr->opt == EVTDRV_TIMER_OPT_PERIODIC) {
evtdrv_timer_place(tmr, tmr->period);
} else {
evtdrv_timer_takeoff(tmr);
}
(*tmr->cb)(tmr->cb_arg);
}
TOS_CPU_INT_ENABLE();
}
#endif /* TOS_CFG_EVENT_DRIVEN_EN */